xref: /openbmc/linux/drivers/gpu/drm/i915/display/intel_lspcon.c (revision 630dce2810b9f09d312aed4189300e785254c24b)
1 /*
2  * Copyright © 2016 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  *
24  */
25 
26 #include <drm/drm_atomic_helper.h>
27 #include <drm/drm_dp_dual_mode_helper.h>
28 #include <drm/drm_edid.h>
29 
30 #include "intel_display_types.h"
31 #include "intel_dp.h"
32 #include "intel_lspcon.h"
33 
34 /* LSPCON OUI Vendor ID(signatures) */
35 #define LSPCON_VENDOR_PARADE_OUI 0x001CF8
36 #define LSPCON_VENDOR_MCA_OUI 0x0060AD
37 
38 /* AUX addresses to write MCA AVI IF */
39 #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
40 #define LSPCON_MCA_AVI_IF_CTRL 0x5DF
41 #define  LSPCON_MCA_AVI_IF_KICKOFF (1 << 0)
42 #define  LSPCON_MCA_AVI_IF_HANDLED (1 << 1)
43 
44 /* AUX addresses to write Parade AVI IF */
45 #define LSPCON_PARADE_AVI_IF_WRITE_OFFSET 0x516
46 #define LSPCON_PARADE_AVI_IF_CTRL 0x51E
47 #define  LSPCON_PARADE_AVI_IF_KICKOFF (1 << 7)
48 #define LSPCON_PARADE_AVI_IF_DATA_SIZE 32
49 
50 static struct intel_dp *lspcon_to_intel_dp(struct intel_lspcon *lspcon)
51 {
52 	struct intel_digital_port *dig_port =
53 		container_of(lspcon, struct intel_digital_port, lspcon);
54 
55 	return &dig_port->dp;
56 }
57 
58 static const char *lspcon_mode_name(enum drm_lspcon_mode mode)
59 {
60 	switch (mode) {
61 	case DRM_LSPCON_MODE_PCON:
62 		return "PCON";
63 	case DRM_LSPCON_MODE_LS:
64 		return "LS";
65 	case DRM_LSPCON_MODE_INVALID:
66 		return "INVALID";
67 	default:
68 		MISSING_CASE(mode);
69 		return "INVALID";
70 	}
71 }
72 
73 static bool lspcon_detect_vendor(struct intel_lspcon *lspcon)
74 {
75 	struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
76 	struct drm_dp_dpcd_ident *ident;
77 	u32 vendor_oui;
78 
79 	if (drm_dp_read_desc(&dp->aux, &dp->desc, drm_dp_is_branch(dp->dpcd))) {
80 		DRM_ERROR("Can't read description\n");
81 		return false;
82 	}
83 
84 	ident = &dp->desc.ident;
85 	vendor_oui = (ident->oui[0] << 16) | (ident->oui[1] << 8) |
86 		      ident->oui[2];
87 
88 	switch (vendor_oui) {
89 	case LSPCON_VENDOR_MCA_OUI:
90 		lspcon->vendor = LSPCON_VENDOR_MCA;
91 		DRM_DEBUG_KMS("Vendor: Mega Chips\n");
92 		break;
93 
94 	case LSPCON_VENDOR_PARADE_OUI:
95 		lspcon->vendor = LSPCON_VENDOR_PARADE;
96 		DRM_DEBUG_KMS("Vendor: Parade Tech\n");
97 		break;
98 
99 	default:
100 		DRM_ERROR("Invalid/Unknown vendor OUI\n");
101 		return false;
102 	}
103 
104 	return true;
105 }
106 
107 static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon *lspcon)
108 {
109 	enum drm_lspcon_mode current_mode;
110 	struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
111 
112 	if (drm_lspcon_get_mode(adapter, &current_mode)) {
113 		DRM_DEBUG_KMS("Error reading LSPCON mode\n");
114 		return DRM_LSPCON_MODE_INVALID;
115 	}
116 	return current_mode;
117 }
118 
119 static enum drm_lspcon_mode lspcon_wait_mode(struct intel_lspcon *lspcon,
120 					     enum drm_lspcon_mode mode)
121 {
122 	enum drm_lspcon_mode current_mode;
123 
124 	current_mode = lspcon_get_current_mode(lspcon);
125 	if (current_mode == mode)
126 		goto out;
127 
128 	DRM_DEBUG_KMS("Waiting for LSPCON mode %s to settle\n",
129 		      lspcon_mode_name(mode));
130 
131 	wait_for((current_mode = lspcon_get_current_mode(lspcon)) == mode, 400);
132 	if (current_mode != mode)
133 		DRM_ERROR("LSPCON mode hasn't settled\n");
134 
135 out:
136 	DRM_DEBUG_KMS("Current LSPCON mode %s\n",
137 		      lspcon_mode_name(current_mode));
138 
139 	return current_mode;
140 }
141 
142 static int lspcon_change_mode(struct intel_lspcon *lspcon,
143 			      enum drm_lspcon_mode mode)
144 {
145 	int err;
146 	enum drm_lspcon_mode current_mode;
147 	struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
148 
149 	err = drm_lspcon_get_mode(adapter, &current_mode);
150 	if (err) {
151 		DRM_ERROR("Error reading LSPCON mode\n");
152 		return err;
153 	}
154 
155 	if (current_mode == mode) {
156 		DRM_DEBUG_KMS("Current mode = desired LSPCON mode\n");
157 		return 0;
158 	}
159 
160 	err = drm_lspcon_set_mode(adapter, mode);
161 	if (err < 0) {
162 		DRM_ERROR("LSPCON mode change failed\n");
163 		return err;
164 	}
165 
166 	lspcon->mode = mode;
167 	DRM_DEBUG_KMS("LSPCON mode changed done\n");
168 	return 0;
169 }
170 
171 static bool lspcon_wake_native_aux_ch(struct intel_lspcon *lspcon)
172 {
173 	u8 rev;
174 
175 	if (drm_dp_dpcd_readb(&lspcon_to_intel_dp(lspcon)->aux, DP_DPCD_REV,
176 			      &rev) != 1) {
177 		DRM_DEBUG_KMS("Native AUX CH down\n");
178 		return false;
179 	}
180 
181 	DRM_DEBUG_KMS("Native AUX CH up, DPCD version: %d.%d\n",
182 		      rev >> 4, rev & 0xf);
183 
184 	return true;
185 }
186 
187 static bool lspcon_probe(struct intel_lspcon *lspcon)
188 {
189 	int retry;
190 	enum drm_dp_dual_mode_type adaptor_type;
191 	struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
192 	enum drm_lspcon_mode expected_mode;
193 
194 	expected_mode = lspcon_wake_native_aux_ch(lspcon) ?
195 			DRM_LSPCON_MODE_PCON : DRM_LSPCON_MODE_LS;
196 
197 	/* Lets probe the adaptor and check its type */
198 	for (retry = 0; retry < 6; retry++) {
199 		if (retry)
200 			usleep_range(500, 1000);
201 
202 		adaptor_type = drm_dp_dual_mode_detect(adapter);
203 		if (adaptor_type == DRM_DP_DUAL_MODE_LSPCON)
204 			break;
205 	}
206 
207 	if (adaptor_type != DRM_DP_DUAL_MODE_LSPCON) {
208 		DRM_DEBUG_KMS("No LSPCON detected, found %s\n",
209 			       drm_dp_get_dual_mode_type_name(adaptor_type));
210 		return false;
211 	}
212 
213 	/* Yay ... got a LSPCON device */
214 	DRM_DEBUG_KMS("LSPCON detected\n");
215 	lspcon->mode = lspcon_wait_mode(lspcon, expected_mode);
216 
217 	/*
218 	 * In the SW state machine, lets Put LSPCON in PCON mode only.
219 	 * In this way, it will work with both HDMI 1.4 sinks as well as HDMI
220 	 * 2.0 sinks.
221 	 */
222 	if (lspcon->mode != DRM_LSPCON_MODE_PCON) {
223 		if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON) < 0) {
224 			DRM_ERROR("LSPCON mode change to PCON failed\n");
225 			return false;
226 		}
227 	}
228 	return true;
229 }
230 
231 static void lspcon_resume_in_pcon_wa(struct intel_lspcon *lspcon)
232 {
233 	struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
234 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
235 	unsigned long start = jiffies;
236 
237 	while (1) {
238 		if (intel_digital_port_connected(&dig_port->base)) {
239 			DRM_DEBUG_KMS("LSPCON recovering in PCON mode after %u ms\n",
240 				      jiffies_to_msecs(jiffies - start));
241 			return;
242 		}
243 
244 		if (time_after(jiffies, start + msecs_to_jiffies(1000)))
245 			break;
246 
247 		usleep_range(10000, 15000);
248 	}
249 
250 	DRM_DEBUG_KMS("LSPCON DP descriptor mismatch after resume\n");
251 }
252 
253 static bool lspcon_parade_fw_ready(struct drm_dp_aux *aux)
254 {
255 	u8 avi_if_ctrl;
256 	u8 retry;
257 	ssize_t ret;
258 
259 	/* Check if LSPCON FW is ready for data */
260 	for (retry = 0; retry < 5; retry++) {
261 		if (retry)
262 			usleep_range(200, 300);
263 
264 		ret = drm_dp_dpcd_read(aux, LSPCON_PARADE_AVI_IF_CTRL,
265 				       &avi_if_ctrl, 1);
266 		if (ret < 0) {
267 			DRM_ERROR("Failed to read AVI IF control\n");
268 			return false;
269 		}
270 
271 		if ((avi_if_ctrl & LSPCON_PARADE_AVI_IF_KICKOFF) == 0)
272 			return true;
273 	}
274 
275 	DRM_ERROR("Parade FW not ready to accept AVI IF\n");
276 	return false;
277 }
278 
279 static bool _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
280 						  u8 *avi_buf)
281 {
282 	u8 avi_if_ctrl;
283 	u8 block_count = 0;
284 	u8 *data;
285 	u16 reg;
286 	ssize_t ret;
287 
288 	while (block_count < 4) {
289 		if (!lspcon_parade_fw_ready(aux)) {
290 			DRM_DEBUG_KMS("LSPCON FW not ready, block %d\n",
291 				      block_count);
292 			return false;
293 		}
294 
295 		reg = LSPCON_PARADE_AVI_IF_WRITE_OFFSET;
296 		data = avi_buf + block_count * 8;
297 		ret = drm_dp_dpcd_write(aux, reg, data, 8);
298 		if (ret < 0) {
299 			DRM_ERROR("Failed to write AVI IF block %d\n",
300 				  block_count);
301 			return false;
302 		}
303 
304 		/*
305 		 * Once a block of data is written, we have to inform the FW
306 		 * about this by writing into avi infoframe control register:
307 		 * - set the kickoff bit[7] to 1
308 		 * - write the block no. to bits[1:0]
309 		 */
310 		reg = LSPCON_PARADE_AVI_IF_CTRL;
311 		avi_if_ctrl = LSPCON_PARADE_AVI_IF_KICKOFF | block_count;
312 		ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1);
313 		if (ret < 0) {
314 			DRM_ERROR("Failed to update (0x%x), block %d\n",
315 				  reg, block_count);
316 			return false;
317 		}
318 
319 		block_count++;
320 	}
321 
322 	DRM_DEBUG_KMS("Wrote AVI IF blocks successfully\n");
323 	return true;
324 }
325 
326 static bool _lspcon_write_avi_infoframe_parade(struct drm_dp_aux *aux,
327 					       const u8 *frame,
328 					       ssize_t len)
329 {
330 	u8 avi_if[LSPCON_PARADE_AVI_IF_DATA_SIZE] = {1, };
331 
332 	/*
333 	 * Parade's frames contains 32 bytes of data, divided
334 	 * into 4 frames:
335 	 *	Token byte (first byte of first frame, must be non-zero)
336 	 *	HB0 to HB2	 from AVI IF (3 bytes header)
337 	 *	PB0 to PB27 from AVI IF (28 bytes data)
338 	 * So it should look like this
339 	 *	first block: | <token> <HB0-HB2> <DB0-DB3> |
340 	 *	next 3 blocks: |<DB4-DB11>|<DB12-DB19>|<DB20-DB28>|
341 	 */
342 
343 	if (len > LSPCON_PARADE_AVI_IF_DATA_SIZE - 1) {
344 		DRM_ERROR("Invalid length of infoframes\n");
345 		return false;
346 	}
347 
348 	memcpy(&avi_if[1], frame, len);
349 
350 	if (!_lspcon_parade_write_infoframe_blocks(aux, avi_if)) {
351 		DRM_DEBUG_KMS("Failed to write infoframe blocks\n");
352 		return false;
353 	}
354 
355 	return true;
356 }
357 
358 static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux,
359 					    const u8 *buffer, ssize_t len)
360 {
361 	int ret;
362 	u32 val = 0;
363 	u32 retry;
364 	u16 reg;
365 	const u8 *data = buffer;
366 
367 	reg = LSPCON_MCA_AVI_IF_WRITE_OFFSET;
368 	while (val < len) {
369 		/* DPCD write for AVI IF can fail on a slow FW day, so retry */
370 		for (retry = 0; retry < 5; retry++) {
371 			ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1);
372 			if (ret == 1) {
373 				break;
374 			} else if (retry < 4) {
375 				mdelay(50);
376 				continue;
377 			} else {
378 				DRM_ERROR("DPCD write failed at:0x%x\n", reg);
379 				return false;
380 			}
381 		}
382 		val++; reg++; data++;
383 	}
384 
385 	val = 0;
386 	reg = LSPCON_MCA_AVI_IF_CTRL;
387 	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
388 	if (ret < 0) {
389 		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
390 		return false;
391 	}
392 
393 	/* Indicate LSPCON chip about infoframe, clear bit 1 and set bit 0 */
394 	val &= ~LSPCON_MCA_AVI_IF_HANDLED;
395 	val |= LSPCON_MCA_AVI_IF_KICKOFF;
396 
397 	ret = drm_dp_dpcd_write(aux, reg, &val, 1);
398 	if (ret < 0) {
399 		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
400 		return false;
401 	}
402 
403 	val = 0;
404 	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
405 	if (ret < 0) {
406 		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
407 		return false;
408 	}
409 
410 	if (val == LSPCON_MCA_AVI_IF_HANDLED)
411 		DRM_DEBUG_KMS("AVI IF handled by FW\n");
412 
413 	return true;
414 }
415 
416 void lspcon_write_infoframe(struct intel_encoder *encoder,
417 			    const struct intel_crtc_state *crtc_state,
418 			    unsigned int type,
419 			    const void *frame, ssize_t len)
420 {
421 	bool ret;
422 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
423 	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
424 
425 	/* LSPCON only needs AVI IF */
426 	if (type != HDMI_INFOFRAME_TYPE_AVI)
427 		return;
428 
429 	if (lspcon->vendor == LSPCON_VENDOR_MCA)
430 		ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux,
431 						      frame, len);
432 	else
433 		ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux,
434 							 frame, len);
435 
436 	if (!ret) {
437 		DRM_ERROR("Failed to write AVI infoframes\n");
438 		return;
439 	}
440 
441 	DRM_DEBUG_DRIVER("AVI infoframes updated successfully\n");
442 }
443 
444 void lspcon_read_infoframe(struct intel_encoder *encoder,
445 			   const struct intel_crtc_state *crtc_state,
446 			   unsigned int type,
447 			   void *frame, ssize_t len)
448 {
449 	/* FIXME implement this */
450 }
451 
452 void lspcon_set_infoframes(struct intel_encoder *encoder,
453 			   bool enable,
454 			   const struct intel_crtc_state *crtc_state,
455 			   const struct drm_connector_state *conn_state)
456 {
457 	ssize_t ret;
458 	union hdmi_infoframe frame;
459 	u8 buf[VIDEO_DIP_DATA_SIZE];
460 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
461 	struct intel_lspcon *lspcon = &dig_port->lspcon;
462 	const struct drm_display_mode *adjusted_mode =
463 		&crtc_state->hw.adjusted_mode;
464 
465 	if (!lspcon->active) {
466 		DRM_ERROR("Writing infoframes while LSPCON disabled ?\n");
467 		return;
468 	}
469 
470 	/* FIXME precompute infoframes */
471 
472 	ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
473 						       conn_state->connector,
474 						       adjusted_mode);
475 	if (ret < 0) {
476 		DRM_ERROR("couldn't fill AVI infoframe\n");
477 		return;
478 	}
479 
480 	/*
481 	 * Currently there is no interface defined to
482 	 * check user preference between RGB/YCBCR444
483 	 * or YCBCR420. So the only possible case for
484 	 * YCBCR444 usage is driving YCBCR420 output
485 	 * with LSPCON, when pipe is configured for
486 	 * YCBCR444 output and LSPCON takes care of
487 	 * downsampling it.
488 	 */
489 	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444)
490 		frame.avi.colorspace = HDMI_COLORSPACE_YUV420;
491 	else
492 		frame.avi.colorspace = HDMI_COLORSPACE_RGB;
493 
494 	drm_hdmi_avi_infoframe_quant_range(&frame.avi,
495 					   conn_state->connector,
496 					   adjusted_mode,
497 					   crtc_state->limited_color_range ?
498 					   HDMI_QUANTIZATION_RANGE_LIMITED :
499 					   HDMI_QUANTIZATION_RANGE_FULL);
500 
501 	ret = hdmi_infoframe_pack(&frame, buf, sizeof(buf));
502 	if (ret < 0) {
503 		DRM_ERROR("Failed to pack AVI IF\n");
504 		return;
505 	}
506 
507 	dig_port->write_infoframe(encoder, crtc_state, HDMI_INFOFRAME_TYPE_AVI,
508 				  buf, ret);
509 }
510 
511 u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
512 			      const struct intel_crtc_state *pipe_config)
513 {
514 	/* FIXME actually read this from the hw */
515 	return 0;
516 }
517 
518 void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon)
519 {
520 	lspcon_wait_mode(lspcon, DRM_LSPCON_MODE_PCON);
521 }
522 
523 static bool lspcon_init(struct intel_digital_port *dig_port)
524 {
525 	struct intel_dp *dp = &dig_port->dp;
526 	struct intel_lspcon *lspcon = &dig_port->lspcon;
527 	struct drm_connector *connector = &dp->attached_connector->base;
528 
529 	lspcon->active = false;
530 	lspcon->mode = DRM_LSPCON_MODE_INVALID;
531 
532 	if (!lspcon_probe(lspcon)) {
533 		DRM_ERROR("Failed to probe lspcon\n");
534 		return false;
535 	}
536 
537 	if (drm_dp_read_dpcd_caps(&dp->aux, dp->dpcd) != 0) {
538 		DRM_ERROR("LSPCON DPCD read failed\n");
539 		return false;
540 	}
541 
542 	if (!lspcon_detect_vendor(lspcon)) {
543 		DRM_ERROR("LSPCON vendor detection failed\n");
544 		return false;
545 	}
546 
547 	connector->ycbcr_420_allowed = true;
548 	lspcon->active = true;
549 	DRM_DEBUG_KMS("Success: LSPCON init\n");
550 	return true;
551 }
552 
553 void lspcon_resume(struct intel_digital_port *dig_port)
554 {
555 	struct intel_lspcon *lspcon = &dig_port->lspcon;
556 	struct drm_device *dev = dig_port->base.base.dev;
557 	struct drm_i915_private *dev_priv = to_i915(dev);
558 	enum drm_lspcon_mode expected_mode;
559 
560 	if (!intel_bios_is_lspcon_present(dev_priv, dig_port->base.port))
561 		return;
562 
563 	if (!lspcon->active) {
564 		if (!lspcon_init(dig_port)) {
565 			DRM_ERROR("LSPCON init failed on port %c\n",
566 				  port_name(dig_port->base.port));
567 			return;
568 		}
569 	}
570 
571 	if (lspcon_wake_native_aux_ch(lspcon)) {
572 		expected_mode = DRM_LSPCON_MODE_PCON;
573 		lspcon_resume_in_pcon_wa(lspcon);
574 	} else {
575 		expected_mode = DRM_LSPCON_MODE_LS;
576 	}
577 
578 	if (lspcon_wait_mode(lspcon, expected_mode) == DRM_LSPCON_MODE_PCON)
579 		return;
580 
581 	if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON))
582 		DRM_ERROR("LSPCON resume failed\n");
583 	else
584 		DRM_DEBUG_KMS("LSPCON resume success\n");
585 }
586