1 /*
2  * Copyright © 2016 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  *
24  */
25 
26 #include <drm/display/drm_dp_dual_mode_helper.h>
27 #include <drm/display/drm_hdmi_helper.h>
28 #include <drm/drm_atomic_helper.h>
29 #include <drm/drm_edid.h>
30 
31 #include "i915_reg.h"
32 #include "intel_de.h"
33 #include "intel_display_types.h"
34 #include "intel_dp.h"
35 #include "intel_lspcon.h"
36 #include "intel_hdmi.h"
37 
38 /* LSPCON OUI Vendor ID(signatures) */
39 #define LSPCON_VENDOR_PARADE_OUI 0x001CF8
40 #define LSPCON_VENDOR_MCA_OUI 0x0060AD
41 
42 #define DPCD_MCA_LSPCON_HDR_STATUS	0x70003
43 #define DPCD_PARADE_LSPCON_HDR_STATUS	0x00511
44 
45 /* AUX addresses to write MCA AVI IF */
46 #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
47 #define LSPCON_MCA_AVI_IF_CTRL 0x5DF
48 #define  LSPCON_MCA_AVI_IF_KICKOFF (1 << 0)
49 #define  LSPCON_MCA_AVI_IF_HANDLED (1 << 1)
50 
51 /* AUX addresses to write Parade AVI IF */
52 #define LSPCON_PARADE_AVI_IF_WRITE_OFFSET 0x516
53 #define LSPCON_PARADE_AVI_IF_CTRL 0x51E
54 #define  LSPCON_PARADE_AVI_IF_KICKOFF (1 << 7)
55 #define LSPCON_PARADE_AVI_IF_DATA_SIZE 32
56 
57 static struct intel_dp *lspcon_to_intel_dp(struct intel_lspcon *lspcon)
58 {
59 	struct intel_digital_port *dig_port =
60 		container_of(lspcon, struct intel_digital_port, lspcon);
61 
62 	return &dig_port->dp;
63 }
64 
65 static const char *lspcon_mode_name(enum drm_lspcon_mode mode)
66 {
67 	switch (mode) {
68 	case DRM_LSPCON_MODE_PCON:
69 		return "PCON";
70 	case DRM_LSPCON_MODE_LS:
71 		return "LS";
72 	case DRM_LSPCON_MODE_INVALID:
73 		return "INVALID";
74 	default:
75 		MISSING_CASE(mode);
76 		return "INVALID";
77 	}
78 }
79 
80 static bool lspcon_detect_vendor(struct intel_lspcon *lspcon)
81 {
82 	struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
83 	struct drm_i915_private *i915 = dp_to_i915(dp);
84 	struct drm_dp_dpcd_ident *ident;
85 	u32 vendor_oui;
86 
87 	if (drm_dp_read_desc(&dp->aux, &dp->desc, drm_dp_is_branch(dp->dpcd))) {
88 		drm_err(&i915->drm, "Can't read description\n");
89 		return false;
90 	}
91 
92 	ident = &dp->desc.ident;
93 	vendor_oui = (ident->oui[0] << 16) | (ident->oui[1] << 8) |
94 		      ident->oui[2];
95 
96 	switch (vendor_oui) {
97 	case LSPCON_VENDOR_MCA_OUI:
98 		lspcon->vendor = LSPCON_VENDOR_MCA;
99 		drm_dbg_kms(&i915->drm, "Vendor: Mega Chips\n");
100 		break;
101 
102 	case LSPCON_VENDOR_PARADE_OUI:
103 		lspcon->vendor = LSPCON_VENDOR_PARADE;
104 		drm_dbg_kms(&i915->drm, "Vendor: Parade Tech\n");
105 		break;
106 
107 	default:
108 		drm_err(&i915->drm, "Invalid/Unknown vendor OUI\n");
109 		return false;
110 	}
111 
112 	return true;
113 }
114 
115 static u32 get_hdr_status_reg(struct intel_lspcon *lspcon)
116 {
117 	if (lspcon->vendor == LSPCON_VENDOR_MCA)
118 		return DPCD_MCA_LSPCON_HDR_STATUS;
119 	else
120 		return DPCD_PARADE_LSPCON_HDR_STATUS;
121 }
122 
123 void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
124 {
125 	struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
126 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
127 	u8 hdr_caps;
128 	int ret;
129 
130 	ret = drm_dp_dpcd_read(&intel_dp->aux, get_hdr_status_reg(lspcon),
131 			       &hdr_caps, 1);
132 
133 	if (ret < 0) {
134 		drm_dbg_kms(&i915->drm, "HDR capability detection failed\n");
135 		lspcon->hdr_supported = false;
136 	} else if (hdr_caps & 0x1) {
137 		drm_dbg_kms(&i915->drm, "LSPCON capable of HDR\n");
138 		lspcon->hdr_supported = true;
139 	}
140 }
141 
142 static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon *lspcon)
143 {
144 	struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
145 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
146 	enum drm_lspcon_mode current_mode;
147 	struct i2c_adapter *adapter = &intel_dp->aux.ddc;
148 
149 	if (drm_lspcon_get_mode(intel_dp->aux.drm_dev, adapter, &current_mode)) {
150 		drm_dbg_kms(&i915->drm, "Error reading LSPCON mode\n");
151 		return DRM_LSPCON_MODE_INVALID;
152 	}
153 	return current_mode;
154 }
155 
156 static enum drm_lspcon_mode lspcon_wait_mode(struct intel_lspcon *lspcon,
157 					     enum drm_lspcon_mode mode)
158 {
159 	struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
160 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
161 	enum drm_lspcon_mode current_mode;
162 
163 	current_mode = lspcon_get_current_mode(lspcon);
164 	if (current_mode == mode)
165 		goto out;
166 
167 	drm_dbg_kms(&i915->drm, "Waiting for LSPCON mode %s to settle\n",
168 		    lspcon_mode_name(mode));
169 
170 	wait_for((current_mode = lspcon_get_current_mode(lspcon)) == mode, 400);
171 	if (current_mode != mode)
172 		drm_err(&i915->drm, "LSPCON mode hasn't settled\n");
173 
174 out:
175 	drm_dbg_kms(&i915->drm, "Current LSPCON mode %s\n",
176 		    lspcon_mode_name(current_mode));
177 
178 	return current_mode;
179 }
180 
181 static int lspcon_change_mode(struct intel_lspcon *lspcon,
182 			      enum drm_lspcon_mode mode)
183 {
184 	struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
185 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
186 	int err;
187 	enum drm_lspcon_mode current_mode;
188 	struct i2c_adapter *adapter = &intel_dp->aux.ddc;
189 
190 	err = drm_lspcon_get_mode(intel_dp->aux.drm_dev, adapter, &current_mode);
191 	if (err) {
192 		drm_err(&i915->drm, "Error reading LSPCON mode\n");
193 		return err;
194 	}
195 
196 	if (current_mode == mode) {
197 		drm_dbg_kms(&i915->drm, "Current mode = desired LSPCON mode\n");
198 		return 0;
199 	}
200 
201 	err = drm_lspcon_set_mode(intel_dp->aux.drm_dev, adapter, mode);
202 	if (err < 0) {
203 		drm_err(&i915->drm, "LSPCON mode change failed\n");
204 		return err;
205 	}
206 
207 	lspcon->mode = mode;
208 	drm_dbg_kms(&i915->drm, "LSPCON mode changed done\n");
209 	return 0;
210 }
211 
212 static bool lspcon_wake_native_aux_ch(struct intel_lspcon *lspcon)
213 {
214 	struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
215 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
216 	u8 rev;
217 
218 	if (drm_dp_dpcd_readb(&lspcon_to_intel_dp(lspcon)->aux, DP_DPCD_REV,
219 			      &rev) != 1) {
220 		drm_dbg_kms(&i915->drm, "Native AUX CH down\n");
221 		return false;
222 	}
223 
224 	drm_dbg_kms(&i915->drm, "Native AUX CH up, DPCD version: %d.%d\n",
225 		    rev >> 4, rev & 0xf);
226 
227 	return true;
228 }
229 
230 static bool lspcon_probe(struct intel_lspcon *lspcon)
231 {
232 	int retry;
233 	enum drm_dp_dual_mode_type adaptor_type;
234 	struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
235 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
236 	struct i2c_adapter *adapter = &intel_dp->aux.ddc;
237 	enum drm_lspcon_mode expected_mode;
238 
239 	expected_mode = lspcon_wake_native_aux_ch(lspcon) ?
240 			DRM_LSPCON_MODE_PCON : DRM_LSPCON_MODE_LS;
241 
242 	/* Lets probe the adaptor and check its type */
243 	for (retry = 0; retry < 6; retry++) {
244 		if (retry)
245 			usleep_range(500, 1000);
246 
247 		adaptor_type = drm_dp_dual_mode_detect(intel_dp->aux.drm_dev, adapter);
248 		if (adaptor_type == DRM_DP_DUAL_MODE_LSPCON)
249 			break;
250 	}
251 
252 	if (adaptor_type != DRM_DP_DUAL_MODE_LSPCON) {
253 		drm_dbg_kms(&i915->drm, "No LSPCON detected, found %s\n",
254 			    drm_dp_get_dual_mode_type_name(adaptor_type));
255 		return false;
256 	}
257 
258 	/* Yay ... got a LSPCON device */
259 	drm_dbg_kms(&i915->drm, "LSPCON detected\n");
260 	lspcon->mode = lspcon_wait_mode(lspcon, expected_mode);
261 
262 	/*
263 	 * In the SW state machine, lets Put LSPCON in PCON mode only.
264 	 * In this way, it will work with both HDMI 1.4 sinks as well as HDMI
265 	 * 2.0 sinks.
266 	 */
267 	if (lspcon->mode != DRM_LSPCON_MODE_PCON) {
268 		if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON) < 0) {
269 			drm_err(&i915->drm, "LSPCON mode change to PCON failed\n");
270 			return false;
271 		}
272 	}
273 	return true;
274 }
275 
276 static void lspcon_resume_in_pcon_wa(struct intel_lspcon *lspcon)
277 {
278 	struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
279 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
280 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
281 	unsigned long start = jiffies;
282 
283 	while (1) {
284 		if (intel_digital_port_connected(&dig_port->base)) {
285 			drm_dbg_kms(&i915->drm, "LSPCON recovering in PCON mode after %u ms\n",
286 				    jiffies_to_msecs(jiffies - start));
287 			return;
288 		}
289 
290 		if (time_after(jiffies, start + msecs_to_jiffies(1000)))
291 			break;
292 
293 		usleep_range(10000, 15000);
294 	}
295 
296 	drm_dbg_kms(&i915->drm, "LSPCON DP descriptor mismatch after resume\n");
297 }
298 
299 static bool lspcon_parade_fw_ready(struct drm_dp_aux *aux)
300 {
301 	u8 avi_if_ctrl;
302 	u8 retry;
303 	ssize_t ret;
304 
305 	/* Check if LSPCON FW is ready for data */
306 	for (retry = 0; retry < 5; retry++) {
307 		if (retry)
308 			usleep_range(200, 300);
309 
310 		ret = drm_dp_dpcd_read(aux, LSPCON_PARADE_AVI_IF_CTRL,
311 				       &avi_if_ctrl, 1);
312 		if (ret < 0) {
313 			drm_err(aux->drm_dev, "Failed to read AVI IF control\n");
314 			return false;
315 		}
316 
317 		if ((avi_if_ctrl & LSPCON_PARADE_AVI_IF_KICKOFF) == 0)
318 			return true;
319 	}
320 
321 	drm_err(aux->drm_dev, "Parade FW not ready to accept AVI IF\n");
322 	return false;
323 }
324 
325 static bool _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
326 						  u8 *avi_buf)
327 {
328 	u8 avi_if_ctrl;
329 	u8 block_count = 0;
330 	u8 *data;
331 	u16 reg;
332 	ssize_t ret;
333 
334 	while (block_count < 4) {
335 		if (!lspcon_parade_fw_ready(aux)) {
336 			drm_dbg_kms(aux->drm_dev, "LSPCON FW not ready, block %d\n",
337 				    block_count);
338 			return false;
339 		}
340 
341 		reg = LSPCON_PARADE_AVI_IF_WRITE_OFFSET;
342 		data = avi_buf + block_count * 8;
343 		ret = drm_dp_dpcd_write(aux, reg, data, 8);
344 		if (ret < 0) {
345 			drm_err(aux->drm_dev, "Failed to write AVI IF block %d\n",
346 				block_count);
347 			return false;
348 		}
349 
350 		/*
351 		 * Once a block of data is written, we have to inform the FW
352 		 * about this by writing into avi infoframe control register:
353 		 * - set the kickoff bit[7] to 1
354 		 * - write the block no. to bits[1:0]
355 		 */
356 		reg = LSPCON_PARADE_AVI_IF_CTRL;
357 		avi_if_ctrl = LSPCON_PARADE_AVI_IF_KICKOFF | block_count;
358 		ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1);
359 		if (ret < 0) {
360 			drm_err(aux->drm_dev, "Failed to update (0x%x), block %d\n",
361 				reg, block_count);
362 			return false;
363 		}
364 
365 		block_count++;
366 	}
367 
368 	drm_dbg_kms(aux->drm_dev, "Wrote AVI IF blocks successfully\n");
369 	return true;
370 }
371 
372 static bool _lspcon_write_avi_infoframe_parade(struct drm_dp_aux *aux,
373 					       const u8 *frame,
374 					       ssize_t len)
375 {
376 	u8 avi_if[LSPCON_PARADE_AVI_IF_DATA_SIZE] = {1, };
377 
378 	/*
379 	 * Parade's frames contains 32 bytes of data, divided
380 	 * into 4 frames:
381 	 *	Token byte (first byte of first frame, must be non-zero)
382 	 *	HB0 to HB2	 from AVI IF (3 bytes header)
383 	 *	PB0 to PB27 from AVI IF (28 bytes data)
384 	 * So it should look like this
385 	 *	first block: | <token> <HB0-HB2> <DB0-DB3> |
386 	 *	next 3 blocks: |<DB4-DB11>|<DB12-DB19>|<DB20-DB28>|
387 	 */
388 
389 	if (len > LSPCON_PARADE_AVI_IF_DATA_SIZE - 1) {
390 		drm_err(aux->drm_dev, "Invalid length of infoframes\n");
391 		return false;
392 	}
393 
394 	memcpy(&avi_if[1], frame, len);
395 
396 	if (!_lspcon_parade_write_infoframe_blocks(aux, avi_if)) {
397 		drm_dbg_kms(aux->drm_dev, "Failed to write infoframe blocks\n");
398 		return false;
399 	}
400 
401 	return true;
402 }
403 
404 static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux,
405 					    const u8 *buffer, ssize_t len)
406 {
407 	int ret;
408 	u32 val = 0;
409 	u32 retry;
410 	u16 reg;
411 	const u8 *data = buffer;
412 
413 	reg = LSPCON_MCA_AVI_IF_WRITE_OFFSET;
414 	while (val < len) {
415 		/* DPCD write for AVI IF can fail on a slow FW day, so retry */
416 		for (retry = 0; retry < 5; retry++) {
417 			ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1);
418 			if (ret == 1) {
419 				break;
420 			} else if (retry < 4) {
421 				mdelay(50);
422 				continue;
423 			} else {
424 				drm_err(aux->drm_dev, "DPCD write failed at:0x%x\n", reg);
425 				return false;
426 			}
427 		}
428 		val++; reg++; data++;
429 	}
430 
431 	val = 0;
432 	reg = LSPCON_MCA_AVI_IF_CTRL;
433 	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
434 	if (ret < 0) {
435 		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
436 		return false;
437 	}
438 
439 	/* Indicate LSPCON chip about infoframe, clear bit 1 and set bit 0 */
440 	val &= ~LSPCON_MCA_AVI_IF_HANDLED;
441 	val |= LSPCON_MCA_AVI_IF_KICKOFF;
442 
443 	ret = drm_dp_dpcd_write(aux, reg, &val, 1);
444 	if (ret < 0) {
445 		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
446 		return false;
447 	}
448 
449 	val = 0;
450 	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
451 	if (ret < 0) {
452 		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
453 		return false;
454 	}
455 
456 	if (val == LSPCON_MCA_AVI_IF_HANDLED)
457 		drm_dbg_kms(aux->drm_dev, "AVI IF handled by FW\n");
458 
459 	return true;
460 }
461 
462 void lspcon_write_infoframe(struct intel_encoder *encoder,
463 			    const struct intel_crtc_state *crtc_state,
464 			    unsigned int type,
465 			    const void *frame, ssize_t len)
466 {
467 	bool ret = true;
468 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
469 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
470 	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
471 
472 	switch (type) {
473 	case HDMI_INFOFRAME_TYPE_AVI:
474 		if (lspcon->vendor == LSPCON_VENDOR_MCA)
475 			ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux,
476 							      frame, len);
477 		else
478 			ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux,
479 								 frame, len);
480 		break;
481 	case HDMI_PACKET_TYPE_GAMUT_METADATA:
482 		drm_dbg_kms(&i915->drm, "Update HDR metadata for lspcon\n");
483 		/* It uses the legacy hsw implementation for the same */
484 		hsw_write_infoframe(encoder, crtc_state, type, frame, len);
485 		break;
486 	default:
487 		return;
488 	}
489 
490 	if (!ret) {
491 		drm_err(&i915->drm, "Failed to write infoframes\n");
492 		return;
493 	}
494 }
495 
496 void lspcon_read_infoframe(struct intel_encoder *encoder,
497 			   const struct intel_crtc_state *crtc_state,
498 			   unsigned int type,
499 			   void *frame, ssize_t len)
500 {
501 	/* FIXME implement for AVI Infoframe as well */
502 	if (type == HDMI_PACKET_TYPE_GAMUT_METADATA)
503 		hsw_read_infoframe(encoder, crtc_state, type,
504 				   frame, len);
505 }
506 
507 void lspcon_set_infoframes(struct intel_encoder *encoder,
508 			   bool enable,
509 			   const struct intel_crtc_state *crtc_state,
510 			   const struct drm_connector_state *conn_state)
511 {
512 	ssize_t ret;
513 	union hdmi_infoframe frame;
514 	u8 buf[VIDEO_DIP_DATA_SIZE];
515 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
516 	struct intel_lspcon *lspcon = &dig_port->lspcon;
517 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
518 	const struct drm_display_mode *adjusted_mode =
519 		&crtc_state->hw.adjusted_mode;
520 
521 	if (!lspcon->active) {
522 		drm_err(&i915->drm, "Writing infoframes while LSPCON disabled ?\n");
523 		return;
524 	}
525 
526 	/* FIXME precompute infoframes */
527 
528 	ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
529 						       conn_state->connector,
530 						       adjusted_mode);
531 	if (ret < 0) {
532 		drm_err(&i915->drm, "couldn't fill AVI infoframe\n");
533 		return;
534 	}
535 
536 	/*
537 	 * Currently there is no interface defined to
538 	 * check user preference between RGB/YCBCR444
539 	 * or YCBCR420. So the only possible case for
540 	 * YCBCR444 usage is driving YCBCR420 output
541 	 * with LSPCON, when pipe is configured for
542 	 * YCBCR444 output and LSPCON takes care of
543 	 * downsampling it.
544 	 */
545 	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444)
546 		frame.avi.colorspace = HDMI_COLORSPACE_YUV420;
547 	else
548 		frame.avi.colorspace = HDMI_COLORSPACE_RGB;
549 
550 	/* Set the Colorspace as per the HDMI spec */
551 	drm_hdmi_avi_infoframe_colorimetry(&frame.avi, conn_state);
552 
553 	/* nonsense combination */
554 	drm_WARN_ON(encoder->base.dev, crtc_state->limited_color_range &&
555 		    crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB);
556 
557 	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB) {
558 		drm_hdmi_avi_infoframe_quant_range(&frame.avi,
559 						   conn_state->connector,
560 						   adjusted_mode,
561 						   crtc_state->limited_color_range ?
562 						   HDMI_QUANTIZATION_RANGE_LIMITED :
563 						   HDMI_QUANTIZATION_RANGE_FULL);
564 	} else {
565 		frame.avi.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
566 		frame.avi.ycc_quantization_range = HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
567 	}
568 
569 	drm_hdmi_avi_infoframe_content_type(&frame.avi, conn_state);
570 
571 	ret = hdmi_infoframe_pack(&frame, buf, sizeof(buf));
572 	if (ret < 0) {
573 		drm_err(&i915->drm, "Failed to pack AVI IF\n");
574 		return;
575 	}
576 
577 	dig_port->write_infoframe(encoder, crtc_state, HDMI_INFOFRAME_TYPE_AVI,
578 				  buf, ret);
579 }
580 
581 static bool _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
582 {
583 	int ret;
584 	u32 val = 0;
585 	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
586 
587 	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
588 	if (ret < 0) {
589 		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
590 		return false;
591 	}
592 
593 	return val & LSPCON_MCA_AVI_IF_KICKOFF;
594 }
595 
596 static bool _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)
597 {
598 	int ret;
599 	u32 val = 0;
600 	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
601 
602 	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
603 	if (ret < 0) {
604 		drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
605 		return false;
606 	}
607 
608 	return val & LSPCON_PARADE_AVI_IF_KICKOFF;
609 }
610 
611 u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
612 			      const struct intel_crtc_state *pipe_config)
613 {
614 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
615 	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
616 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
617 	bool infoframes_enabled;
618 	u32 val = 0;
619 	u32 mask, tmp;
620 
621 	if (lspcon->vendor == LSPCON_VENDOR_MCA)
622 		infoframes_enabled = _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
623 	else
624 		infoframes_enabled = _lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
625 
626 	if (infoframes_enabled)
627 		val |= intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
628 
629 	if (lspcon->hdr_supported) {
630 		tmp = intel_de_read(dev_priv,
631 				    HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));
632 		mask = VIDEO_DIP_ENABLE_GMP_HSW;
633 
634 		if (tmp & mask)
635 			val |= intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
636 	}
637 
638 	return val;
639 }
640 
641 void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon)
642 {
643 	lspcon_wait_mode(lspcon, DRM_LSPCON_MODE_PCON);
644 }
645 
646 bool lspcon_init(struct intel_digital_port *dig_port)
647 {
648 	struct intel_dp *intel_dp = &dig_port->dp;
649 	struct intel_lspcon *lspcon = &dig_port->lspcon;
650 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
651 	struct drm_connector *connector = &intel_dp->attached_connector->base;
652 
653 	lspcon->active = false;
654 	lspcon->mode = DRM_LSPCON_MODE_INVALID;
655 
656 	if (!lspcon_probe(lspcon)) {
657 		drm_err(&i915->drm, "Failed to probe lspcon\n");
658 		return false;
659 	}
660 
661 	if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd) != 0) {
662 		drm_err(&i915->drm, "LSPCON DPCD read failed\n");
663 		return false;
664 	}
665 
666 	if (!lspcon_detect_vendor(lspcon)) {
667 		drm_err(&i915->drm, "LSPCON vendor detection failed\n");
668 		return false;
669 	}
670 
671 	connector->ycbcr_420_allowed = true;
672 	lspcon->active = true;
673 	drm_dbg_kms(&i915->drm, "Success: LSPCON init\n");
674 	return true;
675 }
676 
677 u32 intel_lspcon_infoframes_enabled(struct intel_encoder *encoder,
678 				    const struct intel_crtc_state *pipe_config)
679 {
680 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
681 
682 	return dig_port->infoframes_enabled(encoder, pipe_config);
683 }
684 
685 void lspcon_resume(struct intel_digital_port *dig_port)
686 {
687 	struct intel_lspcon *lspcon = &dig_port->lspcon;
688 	struct drm_device *dev = dig_port->base.base.dev;
689 	struct drm_i915_private *i915 = to_i915(dev);
690 	enum drm_lspcon_mode expected_mode;
691 
692 	if (!intel_bios_is_lspcon_present(i915, dig_port->base.port))
693 		return;
694 
695 	if (!lspcon->active) {
696 		if (!lspcon_init(dig_port)) {
697 			drm_err(&i915->drm, "LSPCON init failed on port %c\n",
698 				port_name(dig_port->base.port));
699 			return;
700 		}
701 	}
702 
703 	if (lspcon_wake_native_aux_ch(lspcon)) {
704 		expected_mode = DRM_LSPCON_MODE_PCON;
705 		lspcon_resume_in_pcon_wa(lspcon);
706 	} else {
707 		expected_mode = DRM_LSPCON_MODE_LS;
708 	}
709 
710 	if (lspcon_wait_mode(lspcon, expected_mode) == DRM_LSPCON_MODE_PCON)
711 		return;
712 
713 	if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON))
714 		drm_err(&i915->drm, "LSPCON resume failed\n");
715 	else
716 		drm_dbg_kms(&i915->drm, "LSPCON resume success\n");
717 }
718