1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 */ 27 28 #include <linux/i2c.h> 29 #include <linux/slab.h> 30 31 #include <drm/drm_atomic_helper.h> 32 #include <drm/drm_crtc.h> 33 #include <drm/i915_drm.h> 34 35 #include "i915_drv.h" 36 #include "intel_connector.h" 37 #include "intel_display_types.h" 38 #include "intel_dvo.h" 39 #include "intel_dvo_dev.h" 40 #include "intel_gmbus.h" 41 #include "intel_panel.h" 42 43 #define INTEL_DVO_CHIP_NONE 0 44 #define INTEL_DVO_CHIP_LVDS 1 45 #define INTEL_DVO_CHIP_TMDS 2 46 #define INTEL_DVO_CHIP_TVOUT 4 47 #define INTEL_DVO_CHIP_LVDS_NO_FIXED 5 48 49 #define SIL164_ADDR 0x38 50 #define CH7xxx_ADDR 0x76 51 #define TFP410_ADDR 0x38 52 #define NS2501_ADDR 0x38 53 54 static const struct intel_dvo_device intel_dvo_devices[] = { 55 { 56 .type = INTEL_DVO_CHIP_TMDS, 57 .name = "sil164", 58 .dvo_reg = DVOC, 59 .dvo_srcdim_reg = DVOC_SRCDIM, 60 .slave_addr = SIL164_ADDR, 61 .dev_ops = &sil164_ops, 62 }, 63 { 64 .type = INTEL_DVO_CHIP_TMDS, 65 .name = "ch7xxx", 66 .dvo_reg = DVOC, 67 .dvo_srcdim_reg = DVOC_SRCDIM, 68 .slave_addr = CH7xxx_ADDR, 69 .dev_ops = &ch7xxx_ops, 70 }, 71 { 72 .type = INTEL_DVO_CHIP_TMDS, 73 .name = "ch7xxx", 74 .dvo_reg = DVOC, 75 .dvo_srcdim_reg = DVOC_SRCDIM, 76 .slave_addr = 0x75, /* For some ch7010 */ 77 .dev_ops = &ch7xxx_ops, 78 }, 79 { 80 .type = INTEL_DVO_CHIP_LVDS, 81 .name = "ivch", 82 .dvo_reg = DVOA, 83 .dvo_srcdim_reg = DVOA_SRCDIM, 84 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ 85 .dev_ops = &ivch_ops, 86 }, 87 { 88 .type = INTEL_DVO_CHIP_TMDS, 89 .name = "tfp410", 90 .dvo_reg = DVOC, 91 .dvo_srcdim_reg = DVOC_SRCDIM, 92 .slave_addr = TFP410_ADDR, 93 .dev_ops = &tfp410_ops, 94 }, 95 { 96 .type = INTEL_DVO_CHIP_LVDS, 97 .name = "ch7017", 98 .dvo_reg = DVOC, 99 .dvo_srcdim_reg = DVOC_SRCDIM, 100 .slave_addr = 0x75, 101 .gpio = GMBUS_PIN_DPB, 102 .dev_ops = &ch7017_ops, 103 }, 104 { 105 .type = INTEL_DVO_CHIP_LVDS_NO_FIXED, 106 .name = "ns2501", 107 .dvo_reg = DVOB, 108 .dvo_srcdim_reg = DVOB_SRCDIM, 109 .slave_addr = NS2501_ADDR, 110 .dev_ops = &ns2501_ops, 111 }, 112 }; 113 114 struct intel_dvo { 115 struct intel_encoder base; 116 117 struct intel_dvo_device dev; 118 119 struct intel_connector *attached_connector; 120 121 bool panel_wants_dither; 122 }; 123 124 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) 125 { 126 return container_of(encoder, struct intel_dvo, base); 127 } 128 129 static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector) 130 { 131 return enc_to_dvo(intel_attached_encoder(connector)); 132 } 133 134 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) 135 { 136 struct drm_device *dev = connector->base.dev; 137 struct drm_i915_private *dev_priv = to_i915(dev); 138 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 139 u32 tmp; 140 141 tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg); 142 143 if (!(tmp & DVO_ENABLE)) 144 return false; 145 146 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); 147 } 148 149 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, 150 enum pipe *pipe) 151 { 152 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 153 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 154 u32 tmp; 155 156 tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg); 157 158 *pipe = (tmp & DVO_PIPE_SEL_MASK) >> DVO_PIPE_SEL_SHIFT; 159 160 return tmp & DVO_ENABLE; 161 } 162 163 static void intel_dvo_get_config(struct intel_encoder *encoder, 164 struct intel_crtc_state *pipe_config) 165 { 166 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 167 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 168 u32 tmp, flags = 0; 169 170 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO); 171 172 tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg); 173 if (tmp & DVO_HSYNC_ACTIVE_HIGH) 174 flags |= DRM_MODE_FLAG_PHSYNC; 175 else 176 flags |= DRM_MODE_FLAG_NHSYNC; 177 if (tmp & DVO_VSYNC_ACTIVE_HIGH) 178 flags |= DRM_MODE_FLAG_PVSYNC; 179 else 180 flags |= DRM_MODE_FLAG_NVSYNC; 181 182 pipe_config->hw.adjusted_mode.flags |= flags; 183 184 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; 185 } 186 187 static void intel_disable_dvo(struct intel_encoder *encoder, 188 const struct intel_crtc_state *old_crtc_state, 189 const struct drm_connector_state *old_conn_state) 190 { 191 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 192 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 193 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; 194 u32 temp = intel_de_read(dev_priv, dvo_reg); 195 196 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 197 intel_de_write(dev_priv, dvo_reg, temp & ~DVO_ENABLE); 198 intel_de_read(dev_priv, dvo_reg); 199 } 200 201 static void intel_enable_dvo(struct intel_encoder *encoder, 202 const struct intel_crtc_state *pipe_config, 203 const struct drm_connector_state *conn_state) 204 { 205 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 206 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 207 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; 208 u32 temp = intel_de_read(dev_priv, dvo_reg); 209 210 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 211 &pipe_config->hw.mode, 212 &pipe_config->hw.adjusted_mode); 213 214 intel_de_write(dev_priv, dvo_reg, temp | DVO_ENABLE); 215 intel_de_read(dev_priv, dvo_reg); 216 217 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 218 } 219 220 static enum drm_mode_status 221 intel_dvo_mode_valid(struct drm_connector *connector, 222 struct drm_display_mode *mode) 223 { 224 struct intel_dvo *intel_dvo = intel_attached_dvo(to_intel_connector(connector)); 225 const struct drm_display_mode *fixed_mode = 226 to_intel_connector(connector)->panel.fixed_mode; 227 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; 228 int target_clock = mode->clock; 229 230 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 231 return MODE_NO_DBLESCAN; 232 233 /* XXX: Validate clock range */ 234 235 if (fixed_mode) { 236 if (mode->hdisplay > fixed_mode->hdisplay) 237 return MODE_PANEL; 238 if (mode->vdisplay > fixed_mode->vdisplay) 239 return MODE_PANEL; 240 241 target_clock = fixed_mode->clock; 242 } 243 244 if (target_clock > max_dotclk) 245 return MODE_CLOCK_HIGH; 246 247 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); 248 } 249 250 static int intel_dvo_compute_config(struct intel_encoder *encoder, 251 struct intel_crtc_state *pipe_config, 252 struct drm_connector_state *conn_state) 253 { 254 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 255 const struct drm_display_mode *fixed_mode = 256 intel_dvo->attached_connector->panel.fixed_mode; 257 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 258 259 /* 260 * If we have timings from the BIOS for the panel, put them in 261 * to the adjusted mode. The CRTC will be set up for this mode, 262 * with the panel scaling set up to source from the H/VDisplay 263 * of the original mode. 264 */ 265 if (fixed_mode) 266 intel_fixed_panel_mode(fixed_mode, adjusted_mode); 267 268 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) 269 return -EINVAL; 270 271 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; 272 273 return 0; 274 } 275 276 static void intel_dvo_pre_enable(struct intel_encoder *encoder, 277 const struct intel_crtc_state *pipe_config, 278 const struct drm_connector_state *conn_state) 279 { 280 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 281 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); 282 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 283 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 284 enum pipe pipe = crtc->pipe; 285 u32 dvo_val; 286 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; 287 i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg; 288 289 /* Save the data order, since I don't know what it should be set to. */ 290 dvo_val = intel_de_read(dev_priv, dvo_reg) & 291 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); 292 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | 293 DVO_BLANK_ACTIVE_HIGH; 294 295 dvo_val |= DVO_PIPE_SEL(pipe); 296 dvo_val |= DVO_PIPE_STALL; 297 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 298 dvo_val |= DVO_HSYNC_ACTIVE_HIGH; 299 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 300 dvo_val |= DVO_VSYNC_ACTIVE_HIGH; 301 302 /*I915_WRITE(DVOB_SRCDIM, 303 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 304 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/ 305 intel_de_write(dev_priv, dvo_srcdim_reg, 306 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); 307 /*I915_WRITE(DVOB, dvo_val);*/ 308 intel_de_write(dev_priv, dvo_reg, dvo_val); 309 } 310 311 static enum drm_connector_status 312 intel_dvo_detect(struct drm_connector *connector, bool force) 313 { 314 struct intel_dvo *intel_dvo = intel_attached_dvo(to_intel_connector(connector)); 315 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 316 connector->base.id, connector->name); 317 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); 318 } 319 320 static int intel_dvo_get_modes(struct drm_connector *connector) 321 { 322 struct drm_i915_private *dev_priv = to_i915(connector->dev); 323 const struct drm_display_mode *fixed_mode = 324 to_intel_connector(connector)->panel.fixed_mode; 325 326 /* 327 * We should probably have an i2c driver get_modes function for those 328 * devices which will have a fixed set of modes determined by the chip 329 * (TV-out, for example), but for now with just TMDS and LVDS, 330 * that's not the case. 331 */ 332 intel_ddc_get_modes(connector, 333 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC)); 334 if (!list_empty(&connector->probed_modes)) 335 return 1; 336 337 if (fixed_mode) { 338 struct drm_display_mode *mode; 339 mode = drm_mode_duplicate(connector->dev, fixed_mode); 340 if (mode) { 341 drm_mode_probed_add(connector, mode); 342 return 1; 343 } 344 } 345 346 return 0; 347 } 348 349 static const struct drm_connector_funcs intel_dvo_connector_funcs = { 350 .detect = intel_dvo_detect, 351 .late_register = intel_connector_register, 352 .early_unregister = intel_connector_unregister, 353 .destroy = intel_connector_destroy, 354 .fill_modes = drm_helper_probe_single_connector_modes, 355 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 356 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 357 }; 358 359 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { 360 .mode_valid = intel_dvo_mode_valid, 361 .get_modes = intel_dvo_get_modes, 362 }; 363 364 static void intel_dvo_enc_destroy(struct drm_encoder *encoder) 365 { 366 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); 367 368 if (intel_dvo->dev.dev_ops->destroy) 369 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); 370 371 intel_encoder_destroy(encoder); 372 } 373 374 static const struct drm_encoder_funcs intel_dvo_enc_funcs = { 375 .destroy = intel_dvo_enc_destroy, 376 }; 377 378 /* 379 * Attempts to get a fixed panel timing for LVDS (currently only the i830). 380 * 381 * Other chips with DVO LVDS will need to extend this to deal with the LVDS 382 * chip being on DVOB/C and having multiple pipes. 383 */ 384 static struct drm_display_mode * 385 intel_dvo_get_current_mode(struct intel_encoder *encoder) 386 { 387 struct drm_display_mode *mode; 388 389 mode = intel_encoder_current_mode(encoder); 390 if (mode) { 391 DRM_DEBUG_KMS("using current (BIOS) mode: "); 392 drm_mode_debug_printmodeline(mode); 393 mode->type |= DRM_MODE_TYPE_PREFERRED; 394 } 395 396 return mode; 397 } 398 399 static enum port intel_dvo_port(i915_reg_t dvo_reg) 400 { 401 if (i915_mmio_reg_equal(dvo_reg, DVOA)) 402 return PORT_A; 403 else if (i915_mmio_reg_equal(dvo_reg, DVOB)) 404 return PORT_B; 405 else 406 return PORT_C; 407 } 408 409 void intel_dvo_init(struct drm_i915_private *dev_priv) 410 { 411 struct intel_encoder *intel_encoder; 412 struct intel_dvo *intel_dvo; 413 struct intel_connector *intel_connector; 414 int i; 415 int encoder_type = DRM_MODE_ENCODER_NONE; 416 417 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); 418 if (!intel_dvo) 419 return; 420 421 intel_connector = intel_connector_alloc(); 422 if (!intel_connector) { 423 kfree(intel_dvo); 424 return; 425 } 426 427 intel_dvo->attached_connector = intel_connector; 428 429 intel_encoder = &intel_dvo->base; 430 431 intel_encoder->disable = intel_disable_dvo; 432 intel_encoder->enable = intel_enable_dvo; 433 intel_encoder->get_hw_state = intel_dvo_get_hw_state; 434 intel_encoder->get_config = intel_dvo_get_config; 435 intel_encoder->compute_config = intel_dvo_compute_config; 436 intel_encoder->pre_enable = intel_dvo_pre_enable; 437 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state; 438 439 /* Now, try to find a controller */ 440 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 441 struct drm_connector *connector = &intel_connector->base; 442 const struct intel_dvo_device *dvo = &intel_dvo_devices[i]; 443 struct i2c_adapter *i2c; 444 int gpio; 445 bool dvoinit; 446 enum pipe pipe; 447 u32 dpll[I915_MAX_PIPES]; 448 enum port port; 449 450 /* 451 * Allow the I2C driver info to specify the GPIO to be used in 452 * special cases, but otherwise default to what's defined 453 * in the spec. 454 */ 455 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio)) 456 gpio = dvo->gpio; 457 else if (dvo->type == INTEL_DVO_CHIP_LVDS) 458 gpio = GMBUS_PIN_SSC; 459 else 460 gpio = GMBUS_PIN_DPB; 461 462 /* 463 * Set up the I2C bus necessary for the chip we're probing. 464 * It appears that everything is on GPIOE except for panels 465 * on i830 laptops, which are on GPIOB (DVOA). 466 */ 467 i2c = intel_gmbus_get_adapter(dev_priv, gpio); 468 469 intel_dvo->dev = *dvo; 470 471 /* 472 * GMBUS NAK handling seems to be unstable, hence let the 473 * transmitter detection run in bit banging mode for now. 474 */ 475 intel_gmbus_force_bit(i2c, true); 476 477 /* 478 * ns2501 requires the DVO 2x clock before it will 479 * respond to i2c accesses, so make sure we have 480 * have the clock enabled before we attempt to 481 * initialize the device. 482 */ 483 for_each_pipe(dev_priv, pipe) { 484 dpll[pipe] = intel_de_read(dev_priv, DPLL(pipe)); 485 intel_de_write(dev_priv, DPLL(pipe), 486 dpll[pipe] | DPLL_DVO_2X_MODE); 487 } 488 489 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c); 490 491 /* restore the DVO 2x clock state to original */ 492 for_each_pipe(dev_priv, pipe) { 493 intel_de_write(dev_priv, DPLL(pipe), dpll[pipe]); 494 } 495 496 intel_gmbus_force_bit(i2c, false); 497 498 if (!dvoinit) 499 continue; 500 501 port = intel_dvo_port(dvo->dvo_reg); 502 drm_encoder_init(&dev_priv->drm, &intel_encoder->base, 503 &intel_dvo_enc_funcs, encoder_type, 504 "DVO %c", port_name(port)); 505 506 intel_encoder->type = INTEL_OUTPUT_DVO; 507 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER; 508 intel_encoder->port = port; 509 intel_encoder->pipe_mask = ~0; 510 511 if (dvo->type != INTEL_DVO_CHIP_LVDS) 512 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) | 513 (1 << INTEL_OUTPUT_DVO); 514 515 switch (dvo->type) { 516 case INTEL_DVO_CHIP_TMDS: 517 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | 518 DRM_CONNECTOR_POLL_DISCONNECT; 519 drm_connector_init(&dev_priv->drm, connector, 520 &intel_dvo_connector_funcs, 521 DRM_MODE_CONNECTOR_DVII); 522 encoder_type = DRM_MODE_ENCODER_TMDS; 523 break; 524 case INTEL_DVO_CHIP_LVDS_NO_FIXED: 525 case INTEL_DVO_CHIP_LVDS: 526 drm_connector_init(&dev_priv->drm, connector, 527 &intel_dvo_connector_funcs, 528 DRM_MODE_CONNECTOR_LVDS); 529 encoder_type = DRM_MODE_ENCODER_LVDS; 530 break; 531 } 532 533 drm_connector_helper_add(connector, 534 &intel_dvo_connector_helper_funcs); 535 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 536 connector->interlace_allowed = false; 537 connector->doublescan_allowed = false; 538 539 intel_connector_attach_encoder(intel_connector, intel_encoder); 540 if (dvo->type == INTEL_DVO_CHIP_LVDS) { 541 /* 542 * For our LVDS chipsets, we should hopefully be able 543 * to dig the fixed panel mode out of the BIOS data. 544 * However, it's in a different format from the BIOS 545 * data on chipsets with integrated LVDS (stored in AIM 546 * headers, likely), so for now, just get the current 547 * mode being output through DVO. 548 */ 549 intel_panel_init(&intel_connector->panel, 550 intel_dvo_get_current_mode(intel_encoder), 551 NULL); 552 intel_dvo->panel_wants_dither = true; 553 } 554 555 return; 556 } 557 558 kfree(intel_dvo); 559 kfree(intel_connector); 560 } 561