1379bc100SJani Nikula /* 2379bc100SJani Nikula * Copyright 2006 Dave Airlie <airlied@linux.ie> 3379bc100SJani Nikula * Copyright © 2006-2007 Intel Corporation 4379bc100SJani Nikula * 5379bc100SJani Nikula * Permission is hereby granted, free of charge, to any person obtaining a 6379bc100SJani Nikula * copy of this software and associated documentation files (the "Software"), 7379bc100SJani Nikula * to deal in the Software without restriction, including without limitation 8379bc100SJani Nikula * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9379bc100SJani Nikula * and/or sell copies of the Software, and to permit persons to whom the 10379bc100SJani Nikula * Software is furnished to do so, subject to the following conditions: 11379bc100SJani Nikula * 12379bc100SJani Nikula * The above copyright notice and this permission notice (including the next 13379bc100SJani Nikula * paragraph) shall be included in all copies or substantial portions of the 14379bc100SJani Nikula * Software. 15379bc100SJani Nikula * 16379bc100SJani Nikula * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17379bc100SJani Nikula * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18379bc100SJani Nikula * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19379bc100SJani Nikula * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20379bc100SJani Nikula * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21379bc100SJani Nikula * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22379bc100SJani Nikula * DEALINGS IN THE SOFTWARE. 23379bc100SJani Nikula * 24379bc100SJani Nikula * Authors: 25379bc100SJani Nikula * Eric Anholt <eric@anholt.net> 26379bc100SJani Nikula */ 27379bc100SJani Nikula 28379bc100SJani Nikula #include <linux/i2c.h> 29379bc100SJani Nikula #include <linux/slab.h> 30379bc100SJani Nikula 31379bc100SJani Nikula #include <drm/drm_atomic_helper.h> 32379bc100SJani Nikula #include <drm/drm_crtc.h> 33379bc100SJani Nikula 34379bc100SJani Nikula #include "i915_drv.h" 35801543b2SJani Nikula #include "i915_reg.h" 36379bc100SJani Nikula #include "intel_connector.h" 377785ae0bSVille Syrjälä #include "intel_de.h" 381d455f8dSJani Nikula #include "intel_display_types.h" 39379bc100SJani Nikula #include "intel_dvo.h" 40379bc100SJani Nikula #include "intel_dvo_dev.h" 41df9f0ebeSVille Syrjälä #include "intel_dvo_regs.h" 42379bc100SJani Nikula #include "intel_gmbus.h" 43379bc100SJani Nikula #include "intel_panel.h" 44379bc100SJani Nikula 45379bc100SJani Nikula #define INTEL_DVO_CHIP_NONE 0 46379bc100SJani Nikula #define INTEL_DVO_CHIP_LVDS 1 47379bc100SJani Nikula #define INTEL_DVO_CHIP_TMDS 2 48379bc100SJani Nikula #define INTEL_DVO_CHIP_TVOUT 4 4945608c50SVille Syrjälä #define INTEL_DVO_CHIP_LVDS_NO_FIXED 5 50379bc100SJani Nikula 51379bc100SJani Nikula #define SIL164_ADDR 0x38 52379bc100SJani Nikula #define CH7xxx_ADDR 0x76 53379bc100SJani Nikula #define TFP410_ADDR 0x38 54379bc100SJani Nikula #define NS2501_ADDR 0x38 55379bc100SJani Nikula 56379bc100SJani Nikula static const struct intel_dvo_device intel_dvo_devices[] = { 57379bc100SJani Nikula { 58379bc100SJani Nikula .type = INTEL_DVO_CHIP_TMDS, 59379bc100SJani Nikula .name = "sil164", 60a8d9a13dSVille Syrjälä .port = PORT_C, 61379bc100SJani Nikula .slave_addr = SIL164_ADDR, 62379bc100SJani Nikula .dev_ops = &sil164_ops, 63379bc100SJani Nikula }, 64379bc100SJani Nikula { 65379bc100SJani Nikula .type = INTEL_DVO_CHIP_TMDS, 66379bc100SJani Nikula .name = "ch7xxx", 67a8d9a13dSVille Syrjälä .port = PORT_C, 68379bc100SJani Nikula .slave_addr = CH7xxx_ADDR, 69379bc100SJani Nikula .dev_ops = &ch7xxx_ops, 70379bc100SJani Nikula }, 71379bc100SJani Nikula { 72379bc100SJani Nikula .type = INTEL_DVO_CHIP_TMDS, 73379bc100SJani Nikula .name = "ch7xxx", 74a8d9a13dSVille Syrjälä .port = PORT_C, 75379bc100SJani Nikula .slave_addr = 0x75, /* For some ch7010 */ 76379bc100SJani Nikula .dev_ops = &ch7xxx_ops, 77379bc100SJani Nikula }, 78379bc100SJani Nikula { 79379bc100SJani Nikula .type = INTEL_DVO_CHIP_LVDS, 80379bc100SJani Nikula .name = "ivch", 81a8d9a13dSVille Syrjälä .port = PORT_A, 82379bc100SJani Nikula .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ 83379bc100SJani Nikula .dev_ops = &ivch_ops, 84379bc100SJani Nikula }, 85379bc100SJani Nikula { 86379bc100SJani Nikula .type = INTEL_DVO_CHIP_TMDS, 87379bc100SJani Nikula .name = "tfp410", 88a8d9a13dSVille Syrjälä .port = PORT_C, 89379bc100SJani Nikula .slave_addr = TFP410_ADDR, 90379bc100SJani Nikula .dev_ops = &tfp410_ops, 91379bc100SJani Nikula }, 92379bc100SJani Nikula { 93379bc100SJani Nikula .type = INTEL_DVO_CHIP_LVDS, 94379bc100SJani Nikula .name = "ch7017", 95a8d9a13dSVille Syrjälä .port = PORT_C, 96379bc100SJani Nikula .slave_addr = 0x75, 97379bc100SJani Nikula .gpio = GMBUS_PIN_DPB, 98379bc100SJani Nikula .dev_ops = &ch7017_ops, 99379bc100SJani Nikula }, 100379bc100SJani Nikula { 10145608c50SVille Syrjälä .type = INTEL_DVO_CHIP_LVDS_NO_FIXED, 102379bc100SJani Nikula .name = "ns2501", 103a8d9a13dSVille Syrjälä .port = PORT_B, 104379bc100SJani Nikula .slave_addr = NS2501_ADDR, 105379bc100SJani Nikula .dev_ops = &ns2501_ops, 10645608c50SVille Syrjälä }, 107379bc100SJani Nikula }; 108379bc100SJani Nikula 109379bc100SJani Nikula struct intel_dvo { 110379bc100SJani Nikula struct intel_encoder base; 111379bc100SJani Nikula 112379bc100SJani Nikula struct intel_dvo_device dev; 113379bc100SJani Nikula 114379bc100SJani Nikula struct intel_connector *attached_connector; 115379bc100SJani Nikula }; 116379bc100SJani Nikula 117379bc100SJani Nikula static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) 118379bc100SJani Nikula { 119379bc100SJani Nikula return container_of(encoder, struct intel_dvo, base); 120379bc100SJani Nikula } 121379bc100SJani Nikula 12243a6d19cSVille Syrjälä static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector) 123379bc100SJani Nikula { 124379bc100SJani Nikula return enc_to_dvo(intel_attached_encoder(connector)); 125379bc100SJani Nikula } 126379bc100SJani Nikula 127379bc100SJani Nikula static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) 128379bc100SJani Nikula { 129ef228dbfSVille Syrjälä struct drm_i915_private *i915 = to_i915(connector->base.dev); 130a8d9a13dSVille Syrjälä struct intel_encoder *encoder = intel_attached_encoder(connector); 131a8d9a13dSVille Syrjälä struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 132a8d9a13dSVille Syrjälä enum port port = encoder->port; 133379bc100SJani Nikula u32 tmp; 134379bc100SJani Nikula 135a8d9a13dSVille Syrjälä tmp = intel_de_read(i915, DVO(port)); 136379bc100SJani Nikula 137379bc100SJani Nikula if (!(tmp & DVO_ENABLE)) 138379bc100SJani Nikula return false; 139379bc100SJani Nikula 140379bc100SJani Nikula return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); 141379bc100SJani Nikula } 142379bc100SJani Nikula 143379bc100SJani Nikula static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, 144379bc100SJani Nikula enum pipe *pipe) 145379bc100SJani Nikula { 146ef228dbfSVille Syrjälä struct drm_i915_private *i915 = to_i915(encoder->base.dev); 147a8d9a13dSVille Syrjälä enum port port = encoder->port; 148379bc100SJani Nikula u32 tmp; 149379bc100SJani Nikula 150a8d9a13dSVille Syrjälä tmp = intel_de_read(i915, DVO(port)); 151379bc100SJani Nikula 1527ce5b3a7SVille Syrjälä *pipe = REG_FIELD_GET(DVO_PIPE_SEL_MASK, tmp); 153379bc100SJani Nikula 154379bc100SJani Nikula return tmp & DVO_ENABLE; 155379bc100SJani Nikula } 156379bc100SJani Nikula 157379bc100SJani Nikula static void intel_dvo_get_config(struct intel_encoder *encoder, 158379bc100SJani Nikula struct intel_crtc_state *pipe_config) 159379bc100SJani Nikula { 160ef228dbfSVille Syrjälä struct drm_i915_private *i915 = to_i915(encoder->base.dev); 161a8d9a13dSVille Syrjälä enum port port = encoder->port; 162379bc100SJani Nikula u32 tmp, flags = 0; 163379bc100SJani Nikula 164379bc100SJani Nikula pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO); 165379bc100SJani Nikula 166a8d9a13dSVille Syrjälä tmp = intel_de_read(i915, DVO(port)); 167379bc100SJani Nikula if (tmp & DVO_HSYNC_ACTIVE_HIGH) 168379bc100SJani Nikula flags |= DRM_MODE_FLAG_PHSYNC; 169379bc100SJani Nikula else 170379bc100SJani Nikula flags |= DRM_MODE_FLAG_NHSYNC; 171379bc100SJani Nikula if (tmp & DVO_VSYNC_ACTIVE_HIGH) 172379bc100SJani Nikula flags |= DRM_MODE_FLAG_PVSYNC; 173379bc100SJani Nikula else 174379bc100SJani Nikula flags |= DRM_MODE_FLAG_NVSYNC; 175379bc100SJani Nikula 1761326a92cSMaarten Lankhorst pipe_config->hw.adjusted_mode.flags |= flags; 177379bc100SJani Nikula 1781326a92cSMaarten Lankhorst pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; 179379bc100SJani Nikula } 180379bc100SJani Nikula 181ede9771dSVille Syrjälä static void intel_disable_dvo(struct intel_atomic_state *state, 182ede9771dSVille Syrjälä struct intel_encoder *encoder, 183379bc100SJani Nikula const struct intel_crtc_state *old_crtc_state, 184379bc100SJani Nikula const struct drm_connector_state *old_conn_state) 185379bc100SJani Nikula { 186ef228dbfSVille Syrjälä struct drm_i915_private *i915 = to_i915(encoder->base.dev); 187379bc100SJani Nikula struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 188a8d9a13dSVille Syrjälä enum port port = encoder->port; 189379bc100SJani Nikula 190379bc100SJani Nikula intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 191079c4c0cSVille Syrjälä 192079c4c0cSVille Syrjälä intel_de_rmw(i915, DVO(port), DVO_ENABLE, 0); 193079c4c0cSVille Syrjälä intel_de_posting_read(i915, DVO(port)); 194379bc100SJani Nikula } 195379bc100SJani Nikula 196ede9771dSVille Syrjälä static void intel_enable_dvo(struct intel_atomic_state *state, 197ede9771dSVille Syrjälä struct intel_encoder *encoder, 198379bc100SJani Nikula const struct intel_crtc_state *pipe_config, 199379bc100SJani Nikula const struct drm_connector_state *conn_state) 200379bc100SJani Nikula { 201ef228dbfSVille Syrjälä struct drm_i915_private *i915 = to_i915(encoder->base.dev); 202379bc100SJani Nikula struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 203a8d9a13dSVille Syrjälä enum port port = encoder->port; 204379bc100SJani Nikula 205379bc100SJani Nikula intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 2061326a92cSMaarten Lankhorst &pipe_config->hw.mode, 2071326a92cSMaarten Lankhorst &pipe_config->hw.adjusted_mode); 208379bc100SJani Nikula 209079c4c0cSVille Syrjälä intel_de_rmw(i915, DVO(port), 0, DVO_ENABLE); 210079c4c0cSVille Syrjälä intel_de_posting_read(i915, DVO(port)); 211379bc100SJani Nikula 212379bc100SJani Nikula intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 213379bc100SJani Nikula } 214379bc100SJani Nikula 215379bc100SJani Nikula static enum drm_mode_status 21609b350d7SVille Syrjälä intel_dvo_mode_valid(struct drm_connector *_connector, 217379bc100SJani Nikula struct drm_display_mode *mode) 218379bc100SJani Nikula { 21909b350d7SVille Syrjälä struct intel_connector *connector = to_intel_connector(_connector); 22009b350d7SVille Syrjälä struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 221379bc100SJani Nikula const struct drm_display_mode *fixed_mode = 22209b350d7SVille Syrjälä intel_panel_fixed_mode(connector, mode); 22309b350d7SVille Syrjälä int max_dotclk = to_i915(connector->base.dev)->max_dotclk_freq; 224379bc100SJani Nikula int target_clock = mode->clock; 225379bc100SJani Nikula 226379bc100SJani Nikula if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 227379bc100SJani Nikula return MODE_NO_DBLESCAN; 228379bc100SJani Nikula 229379bc100SJani Nikula /* XXX: Validate clock range */ 230379bc100SJani Nikula 231379bc100SJani Nikula if (fixed_mode) { 2328a567b11SVille Syrjälä enum drm_mode_status status; 2338a567b11SVille Syrjälä 23409b350d7SVille Syrjälä status = intel_panel_mode_valid(connector, mode); 2358a567b11SVille Syrjälä if (status != MODE_OK) 2368a567b11SVille Syrjälä return status; 237379bc100SJani Nikula 238379bc100SJani Nikula target_clock = fixed_mode->clock; 239379bc100SJani Nikula } 240379bc100SJani Nikula 241379bc100SJani Nikula if (target_clock > max_dotclk) 242379bc100SJani Nikula return MODE_CLOCK_HIGH; 243379bc100SJani Nikula 244379bc100SJani Nikula return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); 245379bc100SJani Nikula } 246379bc100SJani Nikula 247379bc100SJani Nikula static int intel_dvo_compute_config(struct intel_encoder *encoder, 248379bc100SJani Nikula struct intel_crtc_state *pipe_config, 249379bc100SJani Nikula struct drm_connector_state *conn_state) 250379bc100SJani Nikula { 251379bc100SJani Nikula struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 252cff4c2c6SVille Syrjälä struct intel_connector *connector = to_intel_connector(conn_state->connector); 2531326a92cSMaarten Lankhorst struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 25409270678SVille Syrjälä const struct drm_display_mode *fixed_mode = 25509270678SVille Syrjälä intel_panel_fixed_mode(intel_dvo->attached_connector, adjusted_mode); 256379bc100SJani Nikula 257379bc100SJani Nikula /* 258379bc100SJani Nikula * If we have timings from the BIOS for the panel, put them in 259379bc100SJani Nikula * to the adjusted mode. The CRTC will be set up for this mode, 260379bc100SJani Nikula * with the panel scaling set up to source from the H/VDisplay 261379bc100SJani Nikula * of the original mode. 262379bc100SJani Nikula */ 263cff4c2c6SVille Syrjälä if (fixed_mode) { 264cff4c2c6SVille Syrjälä int ret; 265cff4c2c6SVille Syrjälä 266cff4c2c6SVille Syrjälä ret = intel_panel_compute_config(connector, adjusted_mode); 267cff4c2c6SVille Syrjälä if (ret) 268cff4c2c6SVille Syrjälä return ret; 269cff4c2c6SVille Syrjälä } 270379bc100SJani Nikula 271379bc100SJani Nikula if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) 272379bc100SJani Nikula return -EINVAL; 273379bc100SJani Nikula 274*a04d27cdSAnkit Nautiyal pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; 275379bc100SJani Nikula pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; 276379bc100SJani Nikula 277379bc100SJani Nikula return 0; 278379bc100SJani Nikula } 279379bc100SJani Nikula 280ede9771dSVille Syrjälä static void intel_dvo_pre_enable(struct intel_atomic_state *state, 281ede9771dSVille Syrjälä struct intel_encoder *encoder, 282379bc100SJani Nikula const struct intel_crtc_state *pipe_config, 283379bc100SJani Nikula const struct drm_connector_state *conn_state) 284379bc100SJani Nikula { 285ef228dbfSVille Syrjälä struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2862225f3c6SMaarten Lankhorst struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); 2871326a92cSMaarten Lankhorst const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 288a8d9a13dSVille Syrjälä enum port port = encoder->port; 289d048a268SVille Syrjälä enum pipe pipe = crtc->pipe; 290379bc100SJani Nikula u32 dvo_val; 291379bc100SJani Nikula 2929710a5c1SVille Syrjälä /* Save the active data order, since I don't know what it should be set to. */ 293a8d9a13dSVille Syrjälä dvo_val = intel_de_read(i915, DVO(port)) & 2945abd7d8dSVille Syrjälä (DVO_DEDICATED_INT_ENABLE | 2957ce5b3a7SVille Syrjälä DVO_PRESERVE_MASK | DVO_ACT_DATA_ORDER_MASK); 296379bc100SJani Nikula dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | 297379bc100SJani Nikula DVO_BLANK_ACTIVE_HIGH; 298379bc100SJani Nikula 299379bc100SJani Nikula dvo_val |= DVO_PIPE_SEL(pipe); 300379bc100SJani Nikula dvo_val |= DVO_PIPE_STALL; 301379bc100SJani Nikula if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 302379bc100SJani Nikula dvo_val |= DVO_HSYNC_ACTIVE_HIGH; 303379bc100SJani Nikula if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 304379bc100SJani Nikula dvo_val |= DVO_VSYNC_ACTIVE_HIGH; 305379bc100SJani Nikula 306a8d9a13dSVille Syrjälä intel_de_write(i915, DVO_SRCDIM(port), 3077ce5b3a7SVille Syrjälä DVO_SRCDIM_HORIZONTAL(adjusted_mode->crtc_hdisplay) | 3087ce5b3a7SVille Syrjälä DVO_SRCDIM_VERTICAL(adjusted_mode->crtc_vdisplay)); 309a8d9a13dSVille Syrjälä intel_de_write(i915, DVO(port), dvo_val); 310379bc100SJani Nikula } 311379bc100SJani Nikula 312379bc100SJani Nikula static enum drm_connector_status 31309b350d7SVille Syrjälä intel_dvo_detect(struct drm_connector *_connector, bool force) 314379bc100SJani Nikula { 31509b350d7SVille Syrjälä struct intel_connector *connector = to_intel_connector(_connector); 31609b350d7SVille Syrjälä struct drm_i915_private *i915 = to_i915(connector->base.dev); 31709b350d7SVille Syrjälä struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 318b81dddb9SVille Syrjälä 319f322ed0dSVille Syrjälä drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n", 32009b350d7SVille Syrjälä connector->base.base.id, connector->base.name); 321b81dddb9SVille Syrjälä 322b81dddb9SVille Syrjälä if (!INTEL_DISPLAY_ENABLED(i915)) 323b81dddb9SVille Syrjälä return connector_status_disconnected; 324b81dddb9SVille Syrjälä 325379bc100SJani Nikula return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); 326379bc100SJani Nikula } 327379bc100SJani Nikula 32809b350d7SVille Syrjälä static int intel_dvo_get_modes(struct drm_connector *_connector) 329379bc100SJani Nikula { 33009b350d7SVille Syrjälä struct intel_connector *connector = to_intel_connector(_connector); 331ef228dbfSVille Syrjälä struct drm_i915_private *i915 = to_i915(connector->base.dev); 3324a2236f9SVille Syrjälä int num_modes; 333379bc100SJani Nikula 334379bc100SJani Nikula /* 335379bc100SJani Nikula * We should probably have an i2c driver get_modes function for those 336379bc100SJani Nikula * devices which will have a fixed set of modes determined by the chip 337379bc100SJani Nikula * (TV-out, for example), but for now with just TMDS and LVDS, 338379bc100SJani Nikula * that's not the case. 339379bc100SJani Nikula */ 34009b350d7SVille Syrjälä num_modes = intel_ddc_get_modes(&connector->base, 341ef228dbfSVille Syrjälä intel_gmbus_get_adapter(i915, GMBUS_PIN_DPC)); 3424a2236f9SVille Syrjälä if (num_modes) 3434a2236f9SVille Syrjälä return num_modes; 344379bc100SJani Nikula 34509b350d7SVille Syrjälä return intel_panel_get_modes(connector); 346379bc100SJani Nikula } 347379bc100SJani Nikula 348379bc100SJani Nikula static const struct drm_connector_funcs intel_dvo_connector_funcs = { 349379bc100SJani Nikula .detect = intel_dvo_detect, 350379bc100SJani Nikula .late_register = intel_connector_register, 351379bc100SJani Nikula .early_unregister = intel_connector_unregister, 352379bc100SJani Nikula .destroy = intel_connector_destroy, 353379bc100SJani Nikula .fill_modes = drm_helper_probe_single_connector_modes, 354379bc100SJani Nikula .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 355379bc100SJani Nikula .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 356379bc100SJani Nikula }; 357379bc100SJani Nikula 358379bc100SJani Nikula static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { 359379bc100SJani Nikula .mode_valid = intel_dvo_mode_valid, 360379bc100SJani Nikula .get_modes = intel_dvo_get_modes, 361379bc100SJani Nikula }; 362379bc100SJani Nikula 363379bc100SJani Nikula static void intel_dvo_enc_destroy(struct drm_encoder *encoder) 364379bc100SJani Nikula { 365379bc100SJani Nikula struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); 366379bc100SJani Nikula 367379bc100SJani Nikula if (intel_dvo->dev.dev_ops->destroy) 368379bc100SJani Nikula intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); 369379bc100SJani Nikula 370379bc100SJani Nikula intel_encoder_destroy(encoder); 371379bc100SJani Nikula } 372379bc100SJani Nikula 373379bc100SJani Nikula static const struct drm_encoder_funcs intel_dvo_enc_funcs = { 374379bc100SJani Nikula .destroy = intel_dvo_enc_destroy, 375379bc100SJani Nikula }; 376379bc100SJani Nikula 3776ebf5cafSVille Syrjälä static int intel_dvo_encoder_type(const struct intel_dvo_device *dvo) 3786ebf5cafSVille Syrjälä { 3796ebf5cafSVille Syrjälä switch (dvo->type) { 3806ebf5cafSVille Syrjälä case INTEL_DVO_CHIP_TMDS: 3816ebf5cafSVille Syrjälä return DRM_MODE_ENCODER_TMDS; 3826ebf5cafSVille Syrjälä case INTEL_DVO_CHIP_LVDS_NO_FIXED: 3836ebf5cafSVille Syrjälä case INTEL_DVO_CHIP_LVDS: 3846ebf5cafSVille Syrjälä return DRM_MODE_ENCODER_LVDS; 3856ebf5cafSVille Syrjälä default: 3866ebf5cafSVille Syrjälä MISSING_CASE(dvo->type); 3876ebf5cafSVille Syrjälä return DRM_MODE_ENCODER_NONE; 3886ebf5cafSVille Syrjälä } 3896ebf5cafSVille Syrjälä } 3906ebf5cafSVille Syrjälä 391201ec1bbSVille Syrjälä static int intel_dvo_connector_type(const struct intel_dvo_device *dvo) 392201ec1bbSVille Syrjälä { 393201ec1bbSVille Syrjälä switch (dvo->type) { 394201ec1bbSVille Syrjälä case INTEL_DVO_CHIP_TMDS: 395201ec1bbSVille Syrjälä return DRM_MODE_CONNECTOR_DVII; 396201ec1bbSVille Syrjälä case INTEL_DVO_CHIP_LVDS_NO_FIXED: 397201ec1bbSVille Syrjälä case INTEL_DVO_CHIP_LVDS: 398201ec1bbSVille Syrjälä return DRM_MODE_CONNECTOR_LVDS; 399201ec1bbSVille Syrjälä default: 400201ec1bbSVille Syrjälä MISSING_CASE(dvo->type); 401201ec1bbSVille Syrjälä return DRM_MODE_CONNECTOR_Unknown; 402201ec1bbSVille Syrjälä } 403201ec1bbSVille Syrjälä } 404201ec1bbSVille Syrjälä 405d82b9a89SVille Syrjälä static bool intel_dvo_init_dev(struct drm_i915_private *dev_priv, 406d82b9a89SVille Syrjälä struct intel_dvo *intel_dvo, 407d82b9a89SVille Syrjälä const struct intel_dvo_device *dvo) 408379bc100SJani Nikula { 409379bc100SJani Nikula struct i2c_adapter *i2c; 410379bc100SJani Nikula u32 dpll[I915_MAX_PIPES]; 411d82b9a89SVille Syrjälä enum pipe pipe; 412d82b9a89SVille Syrjälä int gpio; 413d82b9a89SVille Syrjälä bool ret; 414379bc100SJani Nikula 415379bc100SJani Nikula /* 416379bc100SJani Nikula * Allow the I2C driver info to specify the GPIO to be used in 417379bc100SJani Nikula * special cases, but otherwise default to what's defined 418379bc100SJani Nikula * in the spec. 419379bc100SJani Nikula */ 420379bc100SJani Nikula if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio)) 421379bc100SJani Nikula gpio = dvo->gpio; 422379bc100SJani Nikula else if (dvo->type == INTEL_DVO_CHIP_LVDS) 423379bc100SJani Nikula gpio = GMBUS_PIN_SSC; 424379bc100SJani Nikula else 425379bc100SJani Nikula gpio = GMBUS_PIN_DPB; 426379bc100SJani Nikula 427379bc100SJani Nikula /* 428379bc100SJani Nikula * Set up the I2C bus necessary for the chip we're probing. 429379bc100SJani Nikula * It appears that everything is on GPIOE except for panels 430379bc100SJani Nikula * on i830 laptops, which are on GPIOB (DVOA). 431379bc100SJani Nikula */ 432379bc100SJani Nikula i2c = intel_gmbus_get_adapter(dev_priv, gpio); 433379bc100SJani Nikula 434379bc100SJani Nikula intel_dvo->dev = *dvo; 435379bc100SJani Nikula 436379bc100SJani Nikula /* 437379bc100SJani Nikula * GMBUS NAK handling seems to be unstable, hence let the 438379bc100SJani Nikula * transmitter detection run in bit banging mode for now. 439379bc100SJani Nikula */ 440379bc100SJani Nikula intel_gmbus_force_bit(i2c, true); 441379bc100SJani Nikula 442379bc100SJani Nikula /* 443379bc100SJani Nikula * ns2501 requires the DVO 2x clock before it will 444379bc100SJani Nikula * respond to i2c accesses, so make sure we have 445d82b9a89SVille Syrjälä * the clock enabled before we attempt to initialize 446d82b9a89SVille Syrjälä * the device. 447379bc100SJani Nikula */ 44859ea2887SAndrzej Hajda for_each_pipe(dev_priv, pipe) 44959ea2887SAndrzej Hajda dpll[pipe] = intel_de_rmw(dev_priv, DPLL(pipe), 0, DPLL_DVO_2X_MODE); 450379bc100SJani Nikula 451d82b9a89SVille Syrjälä ret = dvo->dev_ops->init(&intel_dvo->dev, i2c); 452379bc100SJani Nikula 453379bc100SJani Nikula /* restore the DVO 2x clock state to original */ 454379bc100SJani Nikula for_each_pipe(dev_priv, pipe) { 4553f7c376dSJani Nikula intel_de_write(dev_priv, DPLL(pipe), dpll[pipe]); 456379bc100SJani Nikula } 457379bc100SJani Nikula 458379bc100SJani Nikula intel_gmbus_force_bit(i2c, false); 459379bc100SJani Nikula 460d82b9a89SVille Syrjälä return ret; 461d82b9a89SVille Syrjälä } 462d82b9a89SVille Syrjälä 463ef228dbfSVille Syrjälä static bool intel_dvo_probe(struct drm_i915_private *i915, 464d82b9a89SVille Syrjälä struct intel_dvo *intel_dvo) 465d82b9a89SVille Syrjälä { 466d82b9a89SVille Syrjälä int i; 467d82b9a89SVille Syrjälä 468d82b9a89SVille Syrjälä /* Now, try to find a controller */ 469d82b9a89SVille Syrjälä for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 470ef228dbfSVille Syrjälä if (intel_dvo_init_dev(i915, intel_dvo, 471d82b9a89SVille Syrjälä &intel_dvo_devices[i])) 472d82b9a89SVille Syrjälä return true; 473d82b9a89SVille Syrjälä } 474d82b9a89SVille Syrjälä 475d82b9a89SVille Syrjälä return false; 476d82b9a89SVille Syrjälä } 477d82b9a89SVille Syrjälä 478ef228dbfSVille Syrjälä void intel_dvo_init(struct drm_i915_private *i915) 479d82b9a89SVille Syrjälä { 48009b350d7SVille Syrjälä struct intel_connector *connector; 48109b350d7SVille Syrjälä struct intel_encoder *encoder; 482d82b9a89SVille Syrjälä struct intel_dvo *intel_dvo; 483d82b9a89SVille Syrjälä 484d82b9a89SVille Syrjälä intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); 485d82b9a89SVille Syrjälä if (!intel_dvo) 486d82b9a89SVille Syrjälä return; 487d82b9a89SVille Syrjälä 48809b350d7SVille Syrjälä connector = intel_connector_alloc(); 48909b350d7SVille Syrjälä if (!connector) { 490d82b9a89SVille Syrjälä kfree(intel_dvo); 491d82b9a89SVille Syrjälä return; 492d82b9a89SVille Syrjälä } 493d82b9a89SVille Syrjälä 49409b350d7SVille Syrjälä intel_dvo->attached_connector = connector; 495d82b9a89SVille Syrjälä 49609b350d7SVille Syrjälä encoder = &intel_dvo->base; 497d82b9a89SVille Syrjälä 49809b350d7SVille Syrjälä encoder->disable = intel_disable_dvo; 49909b350d7SVille Syrjälä encoder->enable = intel_enable_dvo; 50009b350d7SVille Syrjälä encoder->get_hw_state = intel_dvo_get_hw_state; 50109b350d7SVille Syrjälä encoder->get_config = intel_dvo_get_config; 50209b350d7SVille Syrjälä encoder->compute_config = intel_dvo_compute_config; 50309b350d7SVille Syrjälä encoder->pre_enable = intel_dvo_pre_enable; 50409b350d7SVille Syrjälä connector->get_hw_state = intel_dvo_connector_get_hw_state; 505d82b9a89SVille Syrjälä 506ef228dbfSVille Syrjälä if (!intel_dvo_probe(i915, intel_dvo)) { 507d82b9a89SVille Syrjälä kfree(intel_dvo); 50809b350d7SVille Syrjälä intel_connector_free(connector); 509d82b9a89SVille Syrjälä return; 510d82b9a89SVille Syrjälä } 511379bc100SJani Nikula 51209b350d7SVille Syrjälä encoder->type = INTEL_OUTPUT_DVO; 51309b350d7SVille Syrjälä encoder->power_domain = POWER_DOMAIN_PORT_OTHER; 514a8d9a13dSVille Syrjälä encoder->port = intel_dvo->dev.port; 51509b350d7SVille Syrjälä encoder->pipe_mask = ~0; 516379bc100SJani Nikula 517d82b9a89SVille Syrjälä if (intel_dvo->dev.type != INTEL_DVO_CHIP_LVDS) 51809b350d7SVille Syrjälä encoder->cloneable = BIT(INTEL_OUTPUT_ANALOG) | 51949fd5403SVille Syrjälä BIT(INTEL_OUTPUT_DVO); 52045608c50SVille Syrjälä 521ef228dbfSVille Syrjälä drm_encoder_init(&i915->drm, &encoder->base, 522c584f86cSVille Syrjälä &intel_dvo_enc_funcs, 523d82b9a89SVille Syrjälä intel_dvo_encoder_type(&intel_dvo->dev), 52409b350d7SVille Syrjälä "DVO %c", port_name(encoder->port)); 525c584f86cSVille Syrjälä 526af2c3b55SVille Syrjälä drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] detected %s\n", 527af2c3b55SVille Syrjälä encoder->base.base.id, encoder->base.name, 528af2c3b55SVille Syrjälä intel_dvo->dev.name); 529af2c3b55SVille Syrjälä 530d82b9a89SVille Syrjälä if (intel_dvo->dev.type == INTEL_DVO_CHIP_TMDS) 53109b350d7SVille Syrjälä connector->polled = DRM_CONNECTOR_POLL_CONNECT | 53237ec52abSVille Syrjälä DRM_CONNECTOR_POLL_DISCONNECT; 533201ec1bbSVille Syrjälä 534ef228dbfSVille Syrjälä drm_connector_init(&i915->drm, &connector->base, 535379bc100SJani Nikula &intel_dvo_connector_funcs, 536d82b9a89SVille Syrjälä intel_dvo_connector_type(&intel_dvo->dev)); 537379bc100SJani Nikula 53809b350d7SVille Syrjälä drm_connector_helper_add(&connector->base, 539379bc100SJani Nikula &intel_dvo_connector_helper_funcs); 54009b350d7SVille Syrjälä connector->base.display_info.subpixel_order = SubPixelHorizontalRGB; 541379bc100SJani Nikula 54209b350d7SVille Syrjälä intel_connector_attach_encoder(connector, encoder); 54309b350d7SVille Syrjälä 544d82b9a89SVille Syrjälä if (intel_dvo->dev.type == INTEL_DVO_CHIP_LVDS) { 545379bc100SJani Nikula /* 546379bc100SJani Nikula * For our LVDS chipsets, we should hopefully be able 547379bc100SJani Nikula * to dig the fixed panel mode out of the BIOS data. 548379bc100SJani Nikula * However, it's in a different format from the BIOS 549379bc100SJani Nikula * data on chipsets with integrated LVDS (stored in AIM 550379bc100SJani Nikula * headers, likely), so for now, just get the current 551379bc100SJani Nikula * mode being output through DVO. 552379bc100SJani Nikula */ 55309b350d7SVille Syrjälä intel_panel_add_encoder_fixed_mode(connector, encoder); 5545248cc78SVille Syrjälä 55515d045fdSJani Nikula intel_panel_init(connector, NULL); 556379bc100SJani Nikula } 557379bc100SJani Nikula } 558