1379bc100SJani Nikula /*
2379bc100SJani Nikula  * Copyright 2006 Dave Airlie <airlied@linux.ie>
3379bc100SJani Nikula  * Copyright © 2006-2007 Intel Corporation
4379bc100SJani Nikula  *
5379bc100SJani Nikula  * Permission is hereby granted, free of charge, to any person obtaining a
6379bc100SJani Nikula  * copy of this software and associated documentation files (the "Software"),
7379bc100SJani Nikula  * to deal in the Software without restriction, including without limitation
8379bc100SJani Nikula  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9379bc100SJani Nikula  * and/or sell copies of the Software, and to permit persons to whom the
10379bc100SJani Nikula  * Software is furnished to do so, subject to the following conditions:
11379bc100SJani Nikula  *
12379bc100SJani Nikula  * The above copyright notice and this permission notice (including the next
13379bc100SJani Nikula  * paragraph) shall be included in all copies or substantial portions of the
14379bc100SJani Nikula  * Software.
15379bc100SJani Nikula  *
16379bc100SJani Nikula  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17379bc100SJani Nikula  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18379bc100SJani Nikula  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19379bc100SJani Nikula  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20379bc100SJani Nikula  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21379bc100SJani Nikula  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22379bc100SJani Nikula  * DEALINGS IN THE SOFTWARE.
23379bc100SJani Nikula  *
24379bc100SJani Nikula  * Authors:
25379bc100SJani Nikula  *	Eric Anholt <eric@anholt.net>
26379bc100SJani Nikula  */
27379bc100SJani Nikula 
28379bc100SJani Nikula #include <linux/i2c.h>
29379bc100SJani Nikula #include <linux/slab.h>
30379bc100SJani Nikula 
31379bc100SJani Nikula #include <drm/drm_atomic_helper.h>
32379bc100SJani Nikula #include <drm/drm_crtc.h>
33379bc100SJani Nikula 
34379bc100SJani Nikula #include "i915_drv.h"
35801543b2SJani Nikula #include "i915_reg.h"
36379bc100SJani Nikula #include "intel_connector.h"
377785ae0bSVille Syrjälä #include "intel_de.h"
381d455f8dSJani Nikula #include "intel_display_types.h"
39379bc100SJani Nikula #include "intel_dvo.h"
40379bc100SJani Nikula #include "intel_dvo_dev.h"
41df9f0ebeSVille Syrjälä #include "intel_dvo_regs.h"
42379bc100SJani Nikula #include "intel_gmbus.h"
43379bc100SJani Nikula #include "intel_panel.h"
44379bc100SJani Nikula 
45379bc100SJani Nikula #define INTEL_DVO_CHIP_NONE	0
46379bc100SJani Nikula #define INTEL_DVO_CHIP_LVDS	1
47379bc100SJani Nikula #define INTEL_DVO_CHIP_TMDS	2
48379bc100SJani Nikula #define INTEL_DVO_CHIP_TVOUT	4
4945608c50SVille Syrjälä #define INTEL_DVO_CHIP_LVDS_NO_FIXED	5
50379bc100SJani Nikula 
51379bc100SJani Nikula #define SIL164_ADDR	0x38
52379bc100SJani Nikula #define CH7xxx_ADDR	0x76
53379bc100SJani Nikula #define TFP410_ADDR	0x38
54379bc100SJani Nikula #define NS2501_ADDR     0x38
55379bc100SJani Nikula 
56379bc100SJani Nikula static const struct intel_dvo_device intel_dvo_devices[] = {
57379bc100SJani Nikula 	{
58379bc100SJani Nikula 		.type = INTEL_DVO_CHIP_TMDS,
59379bc100SJani Nikula 		.name = "sil164",
60a8d9a13dSVille Syrjälä 		.port = PORT_C,
61379bc100SJani Nikula 		.slave_addr = SIL164_ADDR,
62379bc100SJani Nikula 		.dev_ops = &sil164_ops,
63379bc100SJani Nikula 	},
64379bc100SJani Nikula 	{
65379bc100SJani Nikula 		.type = INTEL_DVO_CHIP_TMDS,
66379bc100SJani Nikula 		.name = "ch7xxx",
67a8d9a13dSVille Syrjälä 		.port = PORT_C,
68379bc100SJani Nikula 		.slave_addr = CH7xxx_ADDR,
69379bc100SJani Nikula 		.dev_ops = &ch7xxx_ops,
70379bc100SJani Nikula 	},
71379bc100SJani Nikula 	{
72379bc100SJani Nikula 		.type = INTEL_DVO_CHIP_TMDS,
73379bc100SJani Nikula 		.name = "ch7xxx",
74a8d9a13dSVille Syrjälä 		.port = PORT_C,
75379bc100SJani Nikula 		.slave_addr = 0x75, /* For some ch7010 */
76379bc100SJani Nikula 		.dev_ops = &ch7xxx_ops,
77379bc100SJani Nikula 	},
78379bc100SJani Nikula 	{
79379bc100SJani Nikula 		.type = INTEL_DVO_CHIP_LVDS,
80379bc100SJani Nikula 		.name = "ivch",
81a8d9a13dSVille Syrjälä 		.port = PORT_A,
82379bc100SJani Nikula 		.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
83379bc100SJani Nikula 		.dev_ops = &ivch_ops,
84379bc100SJani Nikula 	},
85379bc100SJani Nikula 	{
86379bc100SJani Nikula 		.type = INTEL_DVO_CHIP_TMDS,
87379bc100SJani Nikula 		.name = "tfp410",
88a8d9a13dSVille Syrjälä 		.port = PORT_C,
89379bc100SJani Nikula 		.slave_addr = TFP410_ADDR,
90379bc100SJani Nikula 		.dev_ops = &tfp410_ops,
91379bc100SJani Nikula 	},
92379bc100SJani Nikula 	{
93379bc100SJani Nikula 		.type = INTEL_DVO_CHIP_LVDS,
94379bc100SJani Nikula 		.name = "ch7017",
95a8d9a13dSVille Syrjälä 		.port = PORT_C,
96379bc100SJani Nikula 		.slave_addr = 0x75,
97379bc100SJani Nikula 		.gpio = GMBUS_PIN_DPB,
98379bc100SJani Nikula 		.dev_ops = &ch7017_ops,
99379bc100SJani Nikula 	},
100379bc100SJani Nikula 	{
10145608c50SVille Syrjälä 		.type = INTEL_DVO_CHIP_LVDS_NO_FIXED,
102379bc100SJani Nikula 		.name = "ns2501",
103a8d9a13dSVille Syrjälä 		.port = PORT_B,
104379bc100SJani Nikula 		.slave_addr = NS2501_ADDR,
105379bc100SJani Nikula 		.dev_ops = &ns2501_ops,
10645608c50SVille Syrjälä 	},
107379bc100SJani Nikula };
108379bc100SJani Nikula 
109379bc100SJani Nikula struct intel_dvo {
110379bc100SJani Nikula 	struct intel_encoder base;
111379bc100SJani Nikula 
112379bc100SJani Nikula 	struct intel_dvo_device dev;
113379bc100SJani Nikula 
114379bc100SJani Nikula 	struct intel_connector *attached_connector;
115379bc100SJani Nikula };
116379bc100SJani Nikula 
enc_to_dvo(struct intel_encoder * encoder)117379bc100SJani Nikula static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
118379bc100SJani Nikula {
119379bc100SJani Nikula 	return container_of(encoder, struct intel_dvo, base);
120379bc100SJani Nikula }
121379bc100SJani Nikula 
intel_attached_dvo(struct intel_connector * connector)12243a6d19cSVille Syrjälä static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector)
123379bc100SJani Nikula {
124379bc100SJani Nikula 	return enc_to_dvo(intel_attached_encoder(connector));
125379bc100SJani Nikula }
126379bc100SJani Nikula 
intel_dvo_connector_get_hw_state(struct intel_connector * connector)127379bc100SJani Nikula static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
128379bc100SJani Nikula {
129ef228dbfSVille Syrjälä 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
130a8d9a13dSVille Syrjälä 	struct intel_encoder *encoder = intel_attached_encoder(connector);
131a8d9a13dSVille Syrjälä 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
132a8d9a13dSVille Syrjälä 	enum port port = encoder->port;
133379bc100SJani Nikula 	u32 tmp;
134379bc100SJani Nikula 
135a8d9a13dSVille Syrjälä 	tmp = intel_de_read(i915, DVO(port));
136379bc100SJani Nikula 
137379bc100SJani Nikula 	if (!(tmp & DVO_ENABLE))
138379bc100SJani Nikula 		return false;
139379bc100SJani Nikula 
140379bc100SJani Nikula 	return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
141379bc100SJani Nikula }
142379bc100SJani Nikula 
intel_dvo_get_hw_state(struct intel_encoder * encoder,enum pipe * pipe)143379bc100SJani Nikula static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
144379bc100SJani Nikula 				   enum pipe *pipe)
145379bc100SJani Nikula {
146ef228dbfSVille Syrjälä 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
147a8d9a13dSVille Syrjälä 	enum port port = encoder->port;
148379bc100SJani Nikula 	u32 tmp;
149379bc100SJani Nikula 
150a8d9a13dSVille Syrjälä 	tmp = intel_de_read(i915, DVO(port));
151379bc100SJani Nikula 
1527ce5b3a7SVille Syrjälä 	*pipe = REG_FIELD_GET(DVO_PIPE_SEL_MASK, tmp);
153379bc100SJani Nikula 
154379bc100SJani Nikula 	return tmp & DVO_ENABLE;
155379bc100SJani Nikula }
156379bc100SJani Nikula 
intel_dvo_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config)157379bc100SJani Nikula static void intel_dvo_get_config(struct intel_encoder *encoder,
158379bc100SJani Nikula 				 struct intel_crtc_state *pipe_config)
159379bc100SJani Nikula {
160ef228dbfSVille Syrjälä 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
161a8d9a13dSVille Syrjälä 	enum port port = encoder->port;
162379bc100SJani Nikula 	u32 tmp, flags = 0;
163379bc100SJani Nikula 
164379bc100SJani Nikula 	pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
165379bc100SJani Nikula 
166a8d9a13dSVille Syrjälä 	tmp = intel_de_read(i915, DVO(port));
167379bc100SJani Nikula 	if (tmp & DVO_HSYNC_ACTIVE_HIGH)
168379bc100SJani Nikula 		flags |= DRM_MODE_FLAG_PHSYNC;
169379bc100SJani Nikula 	else
170379bc100SJani Nikula 		flags |= DRM_MODE_FLAG_NHSYNC;
171379bc100SJani Nikula 	if (tmp & DVO_VSYNC_ACTIVE_HIGH)
172379bc100SJani Nikula 		flags |= DRM_MODE_FLAG_PVSYNC;
173379bc100SJani Nikula 	else
174379bc100SJani Nikula 		flags |= DRM_MODE_FLAG_NVSYNC;
175379bc100SJani Nikula 
1761326a92cSMaarten Lankhorst 	pipe_config->hw.adjusted_mode.flags |= flags;
177379bc100SJani Nikula 
1781326a92cSMaarten Lankhorst 	pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock;
179379bc100SJani Nikula }
180379bc100SJani Nikula 
intel_disable_dvo(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * old_crtc_state,const struct drm_connector_state * old_conn_state)181ede9771dSVille Syrjälä static void intel_disable_dvo(struct intel_atomic_state *state,
182ede9771dSVille Syrjälä 			      struct intel_encoder *encoder,
183379bc100SJani Nikula 			      const struct intel_crtc_state *old_crtc_state,
184379bc100SJani Nikula 			      const struct drm_connector_state *old_conn_state)
185379bc100SJani Nikula {
186ef228dbfSVille Syrjälä 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
187379bc100SJani Nikula 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
188a8d9a13dSVille Syrjälä 	enum port port = encoder->port;
189379bc100SJani Nikula 
190379bc100SJani Nikula 	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
191079c4c0cSVille Syrjälä 
192079c4c0cSVille Syrjälä 	intel_de_rmw(i915, DVO(port), DVO_ENABLE, 0);
193079c4c0cSVille Syrjälä 	intel_de_posting_read(i915, DVO(port));
194379bc100SJani Nikula }
195379bc100SJani Nikula 
intel_enable_dvo(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)196ede9771dSVille Syrjälä static void intel_enable_dvo(struct intel_atomic_state *state,
197ede9771dSVille Syrjälä 			     struct intel_encoder *encoder,
198379bc100SJani Nikula 			     const struct intel_crtc_state *pipe_config,
199379bc100SJani Nikula 			     const struct drm_connector_state *conn_state)
200379bc100SJani Nikula {
201ef228dbfSVille Syrjälä 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
202379bc100SJani Nikula 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
203a8d9a13dSVille Syrjälä 	enum port port = encoder->port;
204379bc100SJani Nikula 
205379bc100SJani Nikula 	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
2061326a92cSMaarten Lankhorst 					 &pipe_config->hw.mode,
2071326a92cSMaarten Lankhorst 					 &pipe_config->hw.adjusted_mode);
208379bc100SJani Nikula 
209079c4c0cSVille Syrjälä 	intel_de_rmw(i915, DVO(port), 0, DVO_ENABLE);
210079c4c0cSVille Syrjälä 	intel_de_posting_read(i915, DVO(port));
211379bc100SJani Nikula 
212379bc100SJani Nikula 	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
213379bc100SJani Nikula }
214379bc100SJani Nikula 
215379bc100SJani Nikula static enum drm_mode_status
intel_dvo_mode_valid(struct drm_connector * _connector,struct drm_display_mode * mode)21609b350d7SVille Syrjälä intel_dvo_mode_valid(struct drm_connector *_connector,
217379bc100SJani Nikula 		     struct drm_display_mode *mode)
218379bc100SJani Nikula {
21909b350d7SVille Syrjälä 	struct intel_connector *connector = to_intel_connector(_connector);
220*8e1e489cSVille Syrjälä 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
22109b350d7SVille Syrjälä 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
222379bc100SJani Nikula 	const struct drm_display_mode *fixed_mode =
22309b350d7SVille Syrjälä 		intel_panel_fixed_mode(connector, mode);
22409b350d7SVille Syrjälä 	int max_dotclk = to_i915(connector->base.dev)->max_dotclk_freq;
225379bc100SJani Nikula 	int target_clock = mode->clock;
226*8e1e489cSVille Syrjälä 	enum drm_mode_status status;
227*8e1e489cSVille Syrjälä 
228*8e1e489cSVille Syrjälä 	status = intel_cpu_transcoder_mode_valid(i915, mode);
229*8e1e489cSVille Syrjälä 	if (status != MODE_OK)
230*8e1e489cSVille Syrjälä 		return status;
231379bc100SJani Nikula 
232379bc100SJani Nikula 	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
233379bc100SJani Nikula 		return MODE_NO_DBLESCAN;
234379bc100SJani Nikula 
235379bc100SJani Nikula 	/* XXX: Validate clock range */
236379bc100SJani Nikula 
237379bc100SJani Nikula 	if (fixed_mode) {
2388a567b11SVille Syrjälä 		enum drm_mode_status status;
2398a567b11SVille Syrjälä 
24009b350d7SVille Syrjälä 		status = intel_panel_mode_valid(connector, mode);
2418a567b11SVille Syrjälä 		if (status != MODE_OK)
2428a567b11SVille Syrjälä 			return status;
243379bc100SJani Nikula 
244379bc100SJani Nikula 		target_clock = fixed_mode->clock;
245379bc100SJani Nikula 	}
246379bc100SJani Nikula 
247379bc100SJani Nikula 	if (target_clock > max_dotclk)
248379bc100SJani Nikula 		return MODE_CLOCK_HIGH;
249379bc100SJani Nikula 
250379bc100SJani Nikula 	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
251379bc100SJani Nikula }
252379bc100SJani Nikula 
intel_dvo_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state)253379bc100SJani Nikula static int intel_dvo_compute_config(struct intel_encoder *encoder,
254379bc100SJani Nikula 				    struct intel_crtc_state *pipe_config,
255379bc100SJani Nikula 				    struct drm_connector_state *conn_state)
256379bc100SJani Nikula {
257379bc100SJani Nikula 	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
258cff4c2c6SVille Syrjälä 	struct intel_connector *connector = to_intel_connector(conn_state->connector);
2591326a92cSMaarten Lankhorst 	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
26009270678SVille Syrjälä 	const struct drm_display_mode *fixed_mode =
26109270678SVille Syrjälä 		intel_panel_fixed_mode(intel_dvo->attached_connector, adjusted_mode);
262379bc100SJani Nikula 
263379bc100SJani Nikula 	/*
264379bc100SJani Nikula 	 * If we have timings from the BIOS for the panel, put them in
265379bc100SJani Nikula 	 * to the adjusted mode.  The CRTC will be set up for this mode,
266379bc100SJani Nikula 	 * with the panel scaling set up to source from the H/VDisplay
267379bc100SJani Nikula 	 * of the original mode.
268379bc100SJani Nikula 	 */
269cff4c2c6SVille Syrjälä 	if (fixed_mode) {
270cff4c2c6SVille Syrjälä 		int ret;
271cff4c2c6SVille Syrjälä 
272cff4c2c6SVille Syrjälä 		ret = intel_panel_compute_config(connector, adjusted_mode);
273cff4c2c6SVille Syrjälä 		if (ret)
274cff4c2c6SVille Syrjälä 			return ret;
275cff4c2c6SVille Syrjälä 	}
276379bc100SJani Nikula 
277379bc100SJani Nikula 	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
278379bc100SJani Nikula 		return -EINVAL;
279379bc100SJani Nikula 
280a04d27cdSAnkit Nautiyal 	pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
281379bc100SJani Nikula 	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
282379bc100SJani Nikula 
283379bc100SJani Nikula 	return 0;
284379bc100SJani Nikula }
285379bc100SJani Nikula 
intel_dvo_pre_enable(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)286ede9771dSVille Syrjälä static void intel_dvo_pre_enable(struct intel_atomic_state *state,
287ede9771dSVille Syrjälä 				 struct intel_encoder *encoder,
288379bc100SJani Nikula 				 const struct intel_crtc_state *pipe_config,
289379bc100SJani Nikula 				 const struct drm_connector_state *conn_state)
290379bc100SJani Nikula {
291ef228dbfSVille Syrjälä 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2922225f3c6SMaarten Lankhorst 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
2931326a92cSMaarten Lankhorst 	const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
294a8d9a13dSVille Syrjälä 	enum port port = encoder->port;
295d048a268SVille Syrjälä 	enum pipe pipe = crtc->pipe;
296379bc100SJani Nikula 	u32 dvo_val;
297379bc100SJani Nikula 
2989710a5c1SVille Syrjälä 	/* Save the active data order, since I don't know what it should be set to. */
299a8d9a13dSVille Syrjälä 	dvo_val = intel_de_read(i915, DVO(port)) &
3005abd7d8dSVille Syrjälä 		  (DVO_DEDICATED_INT_ENABLE |
3017ce5b3a7SVille Syrjälä 		   DVO_PRESERVE_MASK | DVO_ACT_DATA_ORDER_MASK);
302379bc100SJani Nikula 	dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
303379bc100SJani Nikula 		   DVO_BLANK_ACTIVE_HIGH;
304379bc100SJani Nikula 
305379bc100SJani Nikula 	dvo_val |= DVO_PIPE_SEL(pipe);
306379bc100SJani Nikula 	dvo_val |= DVO_PIPE_STALL;
307379bc100SJani Nikula 	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
308379bc100SJani Nikula 		dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
309379bc100SJani Nikula 	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
310379bc100SJani Nikula 		dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
311379bc100SJani Nikula 
312a8d9a13dSVille Syrjälä 	intel_de_write(i915, DVO_SRCDIM(port),
3137ce5b3a7SVille Syrjälä 		       DVO_SRCDIM_HORIZONTAL(adjusted_mode->crtc_hdisplay) |
3147ce5b3a7SVille Syrjälä 		       DVO_SRCDIM_VERTICAL(adjusted_mode->crtc_vdisplay));
315a8d9a13dSVille Syrjälä 	intel_de_write(i915, DVO(port), dvo_val);
316379bc100SJani Nikula }
317379bc100SJani Nikula 
318379bc100SJani Nikula static enum drm_connector_status
intel_dvo_detect(struct drm_connector * _connector,bool force)31909b350d7SVille Syrjälä intel_dvo_detect(struct drm_connector *_connector, bool force)
320379bc100SJani Nikula {
32109b350d7SVille Syrjälä 	struct intel_connector *connector = to_intel_connector(_connector);
32209b350d7SVille Syrjälä 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
32309b350d7SVille Syrjälä 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
324b81dddb9SVille Syrjälä 
325f322ed0dSVille Syrjälä 	drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
32609b350d7SVille Syrjälä 		    connector->base.base.id, connector->base.name);
327b81dddb9SVille Syrjälä 
328b81dddb9SVille Syrjälä 	if (!INTEL_DISPLAY_ENABLED(i915))
329b81dddb9SVille Syrjälä 		return connector_status_disconnected;
330b81dddb9SVille Syrjälä 
331379bc100SJani Nikula 	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
332379bc100SJani Nikula }
333379bc100SJani Nikula 
intel_dvo_get_modes(struct drm_connector * _connector)33409b350d7SVille Syrjälä static int intel_dvo_get_modes(struct drm_connector *_connector)
335379bc100SJani Nikula {
33609b350d7SVille Syrjälä 	struct intel_connector *connector = to_intel_connector(_connector);
337ef228dbfSVille Syrjälä 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
3384a2236f9SVille Syrjälä 	int num_modes;
339379bc100SJani Nikula 
340379bc100SJani Nikula 	/*
341379bc100SJani Nikula 	 * We should probably have an i2c driver get_modes function for those
342379bc100SJani Nikula 	 * devices which will have a fixed set of modes determined by the chip
343379bc100SJani Nikula 	 * (TV-out, for example), but for now with just TMDS and LVDS,
344379bc100SJani Nikula 	 * that's not the case.
345379bc100SJani Nikula 	 */
34609b350d7SVille Syrjälä 	num_modes = intel_ddc_get_modes(&connector->base,
347ef228dbfSVille Syrjälä 					intel_gmbus_get_adapter(i915, GMBUS_PIN_DPC));
3484a2236f9SVille Syrjälä 	if (num_modes)
3494a2236f9SVille Syrjälä 		return num_modes;
350379bc100SJani Nikula 
35109b350d7SVille Syrjälä 	return intel_panel_get_modes(connector);
352379bc100SJani Nikula }
353379bc100SJani Nikula 
354379bc100SJani Nikula static const struct drm_connector_funcs intel_dvo_connector_funcs = {
355379bc100SJani Nikula 	.detect = intel_dvo_detect,
356379bc100SJani Nikula 	.late_register = intel_connector_register,
357379bc100SJani Nikula 	.early_unregister = intel_connector_unregister,
358379bc100SJani Nikula 	.destroy = intel_connector_destroy,
359379bc100SJani Nikula 	.fill_modes = drm_helper_probe_single_connector_modes,
360379bc100SJani Nikula 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
361379bc100SJani Nikula 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
362379bc100SJani Nikula };
363379bc100SJani Nikula 
364379bc100SJani Nikula static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
365379bc100SJani Nikula 	.mode_valid = intel_dvo_mode_valid,
366379bc100SJani Nikula 	.get_modes = intel_dvo_get_modes,
367379bc100SJani Nikula };
368379bc100SJani Nikula 
intel_dvo_enc_destroy(struct drm_encoder * encoder)369379bc100SJani Nikula static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
370379bc100SJani Nikula {
371379bc100SJani Nikula 	struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
372379bc100SJani Nikula 
373379bc100SJani Nikula 	if (intel_dvo->dev.dev_ops->destroy)
374379bc100SJani Nikula 		intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
375379bc100SJani Nikula 
376379bc100SJani Nikula 	intel_encoder_destroy(encoder);
377379bc100SJani Nikula }
378379bc100SJani Nikula 
379379bc100SJani Nikula static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
380379bc100SJani Nikula 	.destroy = intel_dvo_enc_destroy,
381379bc100SJani Nikula };
382379bc100SJani Nikula 
intel_dvo_encoder_type(const struct intel_dvo_device * dvo)3836ebf5cafSVille Syrjälä static int intel_dvo_encoder_type(const struct intel_dvo_device *dvo)
3846ebf5cafSVille Syrjälä {
3856ebf5cafSVille Syrjälä 	switch (dvo->type) {
3866ebf5cafSVille Syrjälä 	case INTEL_DVO_CHIP_TMDS:
3876ebf5cafSVille Syrjälä 		return DRM_MODE_ENCODER_TMDS;
3886ebf5cafSVille Syrjälä 	case INTEL_DVO_CHIP_LVDS_NO_FIXED:
3896ebf5cafSVille Syrjälä 	case INTEL_DVO_CHIP_LVDS:
3906ebf5cafSVille Syrjälä 		return DRM_MODE_ENCODER_LVDS;
3916ebf5cafSVille Syrjälä 	default:
3926ebf5cafSVille Syrjälä 		MISSING_CASE(dvo->type);
3936ebf5cafSVille Syrjälä 		return DRM_MODE_ENCODER_NONE;
3946ebf5cafSVille Syrjälä 	}
3956ebf5cafSVille Syrjälä }
3966ebf5cafSVille Syrjälä 
intel_dvo_connector_type(const struct intel_dvo_device * dvo)397201ec1bbSVille Syrjälä static int intel_dvo_connector_type(const struct intel_dvo_device *dvo)
398201ec1bbSVille Syrjälä {
399201ec1bbSVille Syrjälä 	switch (dvo->type) {
400201ec1bbSVille Syrjälä 	case INTEL_DVO_CHIP_TMDS:
401201ec1bbSVille Syrjälä 		return DRM_MODE_CONNECTOR_DVII;
402201ec1bbSVille Syrjälä 	case INTEL_DVO_CHIP_LVDS_NO_FIXED:
403201ec1bbSVille Syrjälä 	case INTEL_DVO_CHIP_LVDS:
404201ec1bbSVille Syrjälä 		return DRM_MODE_CONNECTOR_LVDS;
405201ec1bbSVille Syrjälä 	default:
406201ec1bbSVille Syrjälä 		MISSING_CASE(dvo->type);
407201ec1bbSVille Syrjälä 		return DRM_MODE_CONNECTOR_Unknown;
408201ec1bbSVille Syrjälä 	}
409201ec1bbSVille Syrjälä }
410201ec1bbSVille Syrjälä 
intel_dvo_init_dev(struct drm_i915_private * dev_priv,struct intel_dvo * intel_dvo,const struct intel_dvo_device * dvo)411d82b9a89SVille Syrjälä static bool intel_dvo_init_dev(struct drm_i915_private *dev_priv,
412d82b9a89SVille Syrjälä 			       struct intel_dvo *intel_dvo,
413d82b9a89SVille Syrjälä 			       const struct intel_dvo_device *dvo)
414379bc100SJani Nikula {
415379bc100SJani Nikula 	struct i2c_adapter *i2c;
416379bc100SJani Nikula 	u32 dpll[I915_MAX_PIPES];
417d82b9a89SVille Syrjälä 	enum pipe pipe;
418d82b9a89SVille Syrjälä 	int gpio;
419d82b9a89SVille Syrjälä 	bool ret;
420379bc100SJani Nikula 
421379bc100SJani Nikula 	/*
422379bc100SJani Nikula 	 * Allow the I2C driver info to specify the GPIO to be used in
423379bc100SJani Nikula 	 * special cases, but otherwise default to what's defined
424379bc100SJani Nikula 	 * in the spec.
425379bc100SJani Nikula 	 */
426379bc100SJani Nikula 	if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
427379bc100SJani Nikula 		gpio = dvo->gpio;
428379bc100SJani Nikula 	else if (dvo->type == INTEL_DVO_CHIP_LVDS)
429379bc100SJani Nikula 		gpio = GMBUS_PIN_SSC;
430379bc100SJani Nikula 	else
431379bc100SJani Nikula 		gpio = GMBUS_PIN_DPB;
432379bc100SJani Nikula 
433379bc100SJani Nikula 	/*
434379bc100SJani Nikula 	 * Set up the I2C bus necessary for the chip we're probing.
435379bc100SJani Nikula 	 * It appears that everything is on GPIOE except for panels
436379bc100SJani Nikula 	 * on i830 laptops, which are on GPIOB (DVOA).
437379bc100SJani Nikula 	 */
438379bc100SJani Nikula 	i2c = intel_gmbus_get_adapter(dev_priv, gpio);
439379bc100SJani Nikula 
440379bc100SJani Nikula 	intel_dvo->dev = *dvo;
441379bc100SJani Nikula 
442379bc100SJani Nikula 	/*
443379bc100SJani Nikula 	 * GMBUS NAK handling seems to be unstable, hence let the
444379bc100SJani Nikula 	 * transmitter detection run in bit banging mode for now.
445379bc100SJani Nikula 	 */
446379bc100SJani Nikula 	intel_gmbus_force_bit(i2c, true);
447379bc100SJani Nikula 
448379bc100SJani Nikula 	/*
449379bc100SJani Nikula 	 * ns2501 requires the DVO 2x clock before it will
450379bc100SJani Nikula 	 * respond to i2c accesses, so make sure we have
451d82b9a89SVille Syrjälä 	 * the clock enabled before we attempt to initialize
452d82b9a89SVille Syrjälä 	 * the device.
453379bc100SJani Nikula 	 */
45459ea2887SAndrzej Hajda 	for_each_pipe(dev_priv, pipe)
45559ea2887SAndrzej Hajda 		dpll[pipe] = intel_de_rmw(dev_priv, DPLL(pipe), 0, DPLL_DVO_2X_MODE);
456379bc100SJani Nikula 
457d82b9a89SVille Syrjälä 	ret = dvo->dev_ops->init(&intel_dvo->dev, i2c);
458379bc100SJani Nikula 
459379bc100SJani Nikula 	/* restore the DVO 2x clock state to original */
460379bc100SJani Nikula 	for_each_pipe(dev_priv, pipe) {
4613f7c376dSJani Nikula 		intel_de_write(dev_priv, DPLL(pipe), dpll[pipe]);
462379bc100SJani Nikula 	}
463379bc100SJani Nikula 
464379bc100SJani Nikula 	intel_gmbus_force_bit(i2c, false);
465379bc100SJani Nikula 
466d82b9a89SVille Syrjälä 	return ret;
467d82b9a89SVille Syrjälä }
468d82b9a89SVille Syrjälä 
intel_dvo_probe(struct drm_i915_private * i915,struct intel_dvo * intel_dvo)469ef228dbfSVille Syrjälä static bool intel_dvo_probe(struct drm_i915_private *i915,
470d82b9a89SVille Syrjälä 			    struct intel_dvo *intel_dvo)
471d82b9a89SVille Syrjälä {
472d82b9a89SVille Syrjälä 	int i;
473d82b9a89SVille Syrjälä 
474d82b9a89SVille Syrjälä 	/* Now, try to find a controller */
475d82b9a89SVille Syrjälä 	for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
476ef228dbfSVille Syrjälä 		if (intel_dvo_init_dev(i915, intel_dvo,
477d82b9a89SVille Syrjälä 				       &intel_dvo_devices[i]))
478d82b9a89SVille Syrjälä 			return true;
479d82b9a89SVille Syrjälä 	}
480d82b9a89SVille Syrjälä 
481d82b9a89SVille Syrjälä 	return false;
482d82b9a89SVille Syrjälä }
483d82b9a89SVille Syrjälä 
intel_dvo_init(struct drm_i915_private * i915)484ef228dbfSVille Syrjälä void intel_dvo_init(struct drm_i915_private *i915)
485d82b9a89SVille Syrjälä {
48609b350d7SVille Syrjälä 	struct intel_connector *connector;
48709b350d7SVille Syrjälä 	struct intel_encoder *encoder;
488d82b9a89SVille Syrjälä 	struct intel_dvo *intel_dvo;
489d82b9a89SVille Syrjälä 
490d82b9a89SVille Syrjälä 	intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
491d82b9a89SVille Syrjälä 	if (!intel_dvo)
492d82b9a89SVille Syrjälä 		return;
493d82b9a89SVille Syrjälä 
49409b350d7SVille Syrjälä 	connector = intel_connector_alloc();
49509b350d7SVille Syrjälä 	if (!connector) {
496d82b9a89SVille Syrjälä 		kfree(intel_dvo);
497d82b9a89SVille Syrjälä 		return;
498d82b9a89SVille Syrjälä 	}
499d82b9a89SVille Syrjälä 
50009b350d7SVille Syrjälä 	intel_dvo->attached_connector = connector;
501d82b9a89SVille Syrjälä 
50209b350d7SVille Syrjälä 	encoder = &intel_dvo->base;
503d82b9a89SVille Syrjälä 
50409b350d7SVille Syrjälä 	encoder->disable = intel_disable_dvo;
50509b350d7SVille Syrjälä 	encoder->enable = intel_enable_dvo;
50609b350d7SVille Syrjälä 	encoder->get_hw_state = intel_dvo_get_hw_state;
50709b350d7SVille Syrjälä 	encoder->get_config = intel_dvo_get_config;
50809b350d7SVille Syrjälä 	encoder->compute_config = intel_dvo_compute_config;
50909b350d7SVille Syrjälä 	encoder->pre_enable = intel_dvo_pre_enable;
51009b350d7SVille Syrjälä 	connector->get_hw_state = intel_dvo_connector_get_hw_state;
511d82b9a89SVille Syrjälä 
512ef228dbfSVille Syrjälä 	if (!intel_dvo_probe(i915, intel_dvo)) {
513d82b9a89SVille Syrjälä 		kfree(intel_dvo);
51409b350d7SVille Syrjälä 		intel_connector_free(connector);
515d82b9a89SVille Syrjälä 		return;
516d82b9a89SVille Syrjälä 	}
517379bc100SJani Nikula 
518679df6f1SVille Syrjälä 	assert_port_valid(i915, intel_dvo->dev.port);
519679df6f1SVille Syrjälä 
52009b350d7SVille Syrjälä 	encoder->type = INTEL_OUTPUT_DVO;
52109b350d7SVille Syrjälä 	encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
522a8d9a13dSVille Syrjälä 	encoder->port = intel_dvo->dev.port;
52309b350d7SVille Syrjälä 	encoder->pipe_mask = ~0;
524379bc100SJani Nikula 
525d82b9a89SVille Syrjälä 	if (intel_dvo->dev.type != INTEL_DVO_CHIP_LVDS)
52609b350d7SVille Syrjälä 		encoder->cloneable = BIT(INTEL_OUTPUT_ANALOG) |
52749fd5403SVille Syrjälä 			BIT(INTEL_OUTPUT_DVO);
52845608c50SVille Syrjälä 
529ef228dbfSVille Syrjälä 	drm_encoder_init(&i915->drm, &encoder->base,
530c584f86cSVille Syrjälä 			 &intel_dvo_enc_funcs,
531d82b9a89SVille Syrjälä 			 intel_dvo_encoder_type(&intel_dvo->dev),
53209b350d7SVille Syrjälä 			 "DVO %c", port_name(encoder->port));
533c584f86cSVille Syrjälä 
534af2c3b55SVille Syrjälä 	drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] detected %s\n",
535af2c3b55SVille Syrjälä 		    encoder->base.base.id, encoder->base.name,
536af2c3b55SVille Syrjälä 		    intel_dvo->dev.name);
537af2c3b55SVille Syrjälä 
538d82b9a89SVille Syrjälä 	if (intel_dvo->dev.type == INTEL_DVO_CHIP_TMDS)
53909b350d7SVille Syrjälä 		connector->polled = DRM_CONNECTOR_POLL_CONNECT |
54037ec52abSVille Syrjälä 			DRM_CONNECTOR_POLL_DISCONNECT;
541201ec1bbSVille Syrjälä 
542ef228dbfSVille Syrjälä 	drm_connector_init(&i915->drm, &connector->base,
543379bc100SJani Nikula 			   &intel_dvo_connector_funcs,
544d82b9a89SVille Syrjälä 			   intel_dvo_connector_type(&intel_dvo->dev));
545379bc100SJani Nikula 
54609b350d7SVille Syrjälä 	drm_connector_helper_add(&connector->base,
547379bc100SJani Nikula 				 &intel_dvo_connector_helper_funcs);
54809b350d7SVille Syrjälä 	connector->base.display_info.subpixel_order = SubPixelHorizontalRGB;
549379bc100SJani Nikula 
55009b350d7SVille Syrjälä 	intel_connector_attach_encoder(connector, encoder);
55109b350d7SVille Syrjälä 
552d82b9a89SVille Syrjälä 	if (intel_dvo->dev.type == INTEL_DVO_CHIP_LVDS) {
553379bc100SJani Nikula 		/*
554379bc100SJani Nikula 		 * For our LVDS chipsets, we should hopefully be able
555379bc100SJani Nikula 		 * to dig the fixed panel mode out of the BIOS data.
556379bc100SJani Nikula 		 * However, it's in a different format from the BIOS
557379bc100SJani Nikula 		 * data on chipsets with integrated LVDS (stored in AIM
558379bc100SJani Nikula 		 * headers, likely), so for now, just get the current
559379bc100SJani Nikula 		 * mode being output through DVO.
560379bc100SJani Nikula 		 */
56109b350d7SVille Syrjälä 		intel_panel_add_encoder_fixed_mode(connector, encoder);
5625248cc78SVille Syrjälä 
56315d045fdSJani Nikula 		intel_panel_init(connector, NULL);
564379bc100SJani Nikula 	}
565379bc100SJani Nikula }
566