1 /* 2 * Copyright © 2013 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef _INTEL_DSI_H 25 #define _INTEL_DSI_H 26 27 #include <drm/drm_crtc.h> 28 #include <drm/drm_mipi_dsi.h> 29 30 #include "intel_display_types.h" 31 32 #define INTEL_DSI_VIDEO_MODE 0 33 #define INTEL_DSI_COMMAND_MODE 1 34 35 /* Dual Link support */ 36 #define DSI_DUAL_LINK_NONE 0 37 #define DSI_DUAL_LINK_FRONT_BACK 1 38 #define DSI_DUAL_LINK_PIXEL_ALT 2 39 40 struct intel_dsi_host; 41 42 struct intel_dsi { 43 struct intel_encoder base; 44 45 struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS]; 46 intel_wakeref_t io_wakeref[I915_MAX_PORTS]; 47 48 /* GPIO Desc for panel and backlight control */ 49 struct gpio_desc *gpio_panel; 50 struct gpio_desc *gpio_backlight; 51 52 struct intel_connector *attached_connector; 53 54 /* bit mask of ports (vlv dsi) or phys (icl dsi) being driven */ 55 union { 56 u16 ports; /* VLV DSI */ 57 u16 phys; /* ICL DSI */ 58 }; 59 60 /* if true, use HS mode, otherwise LP */ 61 bool hs; 62 63 /* virtual channel */ 64 int channel; 65 66 /* Video mode or command mode */ 67 u16 operation_mode; 68 69 /* number of DSI lanes */ 70 unsigned int lane_count; 71 72 /* i2c bus associated with the slave device */ 73 int i2c_bus_num; 74 75 /* 76 * video mode pixel format 77 * 78 * XXX: consolidate on .format in struct mipi_dsi_device. 79 */ 80 enum mipi_dsi_pixel_format pixel_format; 81 82 /* video mode format for MIPI_VIDEO_MODE_FORMAT register */ 83 u32 video_mode_format; 84 85 /* eot for MIPI_EOT_DISABLE register */ 86 u8 eotp_pkt; 87 u8 clock_stop; 88 89 u8 escape_clk_div; 90 u8 dual_link; 91 92 u16 dcs_backlight_ports; 93 u16 dcs_cabc_ports; 94 95 /* RGB or BGR */ 96 bool bgr_enabled; 97 98 u8 pixel_overlap; 99 u32 port_bits; 100 u32 bw_timer; 101 u32 dphy_reg; 102 103 /* data lanes dphy timing */ 104 u32 dphy_data_lane_reg; 105 u32 video_frmt_cfg_bits; 106 u16 lp_byte_clk; 107 108 /* timeouts in byte clocks */ 109 u16 hs_tx_timeout; 110 u16 lp_rx_timeout; 111 u16 turn_arnd_val; 112 u16 rst_timer_val; 113 u16 hs_to_lp_count; 114 u16 clk_lp_to_hs_count; 115 u16 clk_hs_to_lp_count; 116 117 u16 init_count; 118 u32 pclk; 119 u16 burst_mode_ratio; 120 121 /* all delays in ms */ 122 u16 backlight_off_delay; 123 u16 backlight_on_delay; 124 u16 panel_on_delay; 125 u16 panel_off_delay; 126 u16 panel_pwr_cycle_delay; 127 }; 128 129 struct intel_dsi_host { 130 struct mipi_dsi_host base; 131 struct intel_dsi *intel_dsi; 132 enum port port; 133 134 /* our little hack */ 135 struct mipi_dsi_device *device; 136 }; 137 138 static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h) 139 { 140 return container_of(h, struct intel_dsi_host, base); 141 } 142 143 #define for_each_dsi_port(__port, __ports_mask) \ 144 for_each_port_masked(__port, __ports_mask) 145 #define for_each_dsi_phy(__phy, __phys_mask) \ 146 for_each_phy_masked(__phy, __phys_mask) 147 148 static inline struct intel_dsi *enc_to_intel_dsi(struct intel_encoder *encoder) 149 { 150 return container_of(&encoder->base, struct intel_dsi, base.base); 151 } 152 153 static inline bool is_vid_mode(struct intel_dsi *intel_dsi) 154 { 155 return intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE; 156 } 157 158 static inline bool is_cmd_mode(struct intel_dsi *intel_dsi) 159 { 160 return intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE; 161 } 162 163 static inline u16 intel_dsi_encoder_ports(struct intel_encoder *encoder) 164 { 165 return enc_to_intel_dsi(encoder)->ports; 166 } 167 168 /* icl_dsi.c */ 169 void icl_dsi_init(struct drm_i915_private *dev_priv); 170 171 /* intel_dsi.c */ 172 int intel_dsi_bitrate(const struct intel_dsi *intel_dsi); 173 int intel_dsi_tlpx_ns(const struct intel_dsi *intel_dsi); 174 enum drm_panel_orientation 175 intel_dsi_get_panel_orientation(struct intel_connector *connector); 176 177 /* vlv_dsi.c */ 178 void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port); 179 enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt); 180 int intel_dsi_get_modes(struct drm_connector *connector); 181 enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector, 182 struct drm_display_mode *mode); 183 struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi, 184 const struct mipi_dsi_host_ops *funcs, 185 enum port port); 186 void vlv_dsi_init(struct drm_i915_private *dev_priv); 187 188 /* vlv_dsi_pll.c */ 189 int vlv_dsi_pll_compute(struct intel_encoder *encoder, 190 struct intel_crtc_state *config); 191 void vlv_dsi_pll_enable(struct intel_encoder *encoder, 192 const struct intel_crtc_state *config); 193 void vlv_dsi_pll_disable(struct intel_encoder *encoder); 194 u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, 195 struct intel_crtc_state *config); 196 void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); 197 198 bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); 199 int bxt_dsi_pll_compute(struct intel_encoder *encoder, 200 struct intel_crtc_state *config); 201 void bxt_dsi_pll_enable(struct intel_encoder *encoder, 202 const struct intel_crtc_state *config); 203 void bxt_dsi_pll_disable(struct intel_encoder *encoder); 204 u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, 205 struct intel_crtc_state *config); 206 void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); 207 208 /* intel_dsi_vbt.c */ 209 bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id); 210 void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on); 211 void intel_dsi_vbt_gpio_cleanup(struct intel_dsi *intel_dsi); 212 void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi, 213 enum mipi_seq seq_id); 214 void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec); 215 void intel_dsi_log_params(struct intel_dsi *intel_dsi); 216 217 #endif /* _INTEL_DSI_H */ 218