1 /* 2 * Copyright © 2013 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef _INTEL_DSI_H 25 #define _INTEL_DSI_H 26 27 #include <drm/drm_crtc.h> 28 #include <drm/drm_mipi_dsi.h> 29 #include "intel_drv.h" 30 31 #define INTEL_DSI_VIDEO_MODE 0 32 #define INTEL_DSI_COMMAND_MODE 1 33 34 /* Dual Link support */ 35 #define DSI_DUAL_LINK_NONE 0 36 #define DSI_DUAL_LINK_FRONT_BACK 1 37 #define DSI_DUAL_LINK_PIXEL_ALT 2 38 39 struct intel_dsi_host; 40 41 struct intel_dsi { 42 struct intel_encoder base; 43 44 struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS]; 45 intel_wakeref_t io_wakeref[I915_MAX_PORTS]; 46 47 /* GPIO Desc for CRC based Panel control */ 48 struct gpio_desc *gpio_panel; 49 50 struct intel_connector *attached_connector; 51 52 /* bit mask of ports (vlv dsi) or phys (icl dsi) being driven */ 53 union { 54 u16 ports; /* VLV DSI */ 55 u16 phys; /* ICL DSI */ 56 }; 57 58 /* if true, use HS mode, otherwise LP */ 59 bool hs; 60 61 /* virtual channel */ 62 int channel; 63 64 /* Video mode or command mode */ 65 u16 operation_mode; 66 67 /* number of DSI lanes */ 68 unsigned int lane_count; 69 70 /* 71 * video mode pixel format 72 * 73 * XXX: consolidate on .format in struct mipi_dsi_device. 74 */ 75 enum mipi_dsi_pixel_format pixel_format; 76 77 /* video mode format for MIPI_VIDEO_MODE_FORMAT register */ 78 u32 video_mode_format; 79 80 /* eot for MIPI_EOT_DISABLE register */ 81 u8 eotp_pkt; 82 u8 clock_stop; 83 84 u8 escape_clk_div; 85 u8 dual_link; 86 87 u16 dcs_backlight_ports; 88 u16 dcs_cabc_ports; 89 90 /* RGB or BGR */ 91 bool bgr_enabled; 92 93 u8 pixel_overlap; 94 u32 port_bits; 95 u32 bw_timer; 96 u32 dphy_reg; 97 98 /* data lanes dphy timing */ 99 u32 dphy_data_lane_reg; 100 u32 video_frmt_cfg_bits; 101 u16 lp_byte_clk; 102 103 /* timeouts in byte clocks */ 104 u16 hs_tx_timeout; 105 u16 lp_rx_timeout; 106 u16 turn_arnd_val; 107 u16 rst_timer_val; 108 u16 hs_to_lp_count; 109 u16 clk_lp_to_hs_count; 110 u16 clk_hs_to_lp_count; 111 112 u16 init_count; 113 u32 pclk; 114 u16 burst_mode_ratio; 115 116 /* all delays in ms */ 117 u16 backlight_off_delay; 118 u16 backlight_on_delay; 119 u16 panel_on_delay; 120 u16 panel_off_delay; 121 u16 panel_pwr_cycle_delay; 122 }; 123 124 struct intel_dsi_host { 125 struct mipi_dsi_host base; 126 struct intel_dsi *intel_dsi; 127 enum port port; 128 129 /* our little hack */ 130 struct mipi_dsi_device *device; 131 }; 132 133 static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h) 134 { 135 return container_of(h, struct intel_dsi_host, base); 136 } 137 138 #define for_each_dsi_port(__port, __ports_mask) \ 139 for_each_port_masked(__port, __ports_mask) 140 #define for_each_dsi_phy(__phy, __phys_mask) \ 141 for_each_phy_masked(__phy, __phys_mask) 142 143 static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder) 144 { 145 return container_of(encoder, struct intel_dsi, base.base); 146 } 147 148 static inline bool is_vid_mode(struct intel_dsi *intel_dsi) 149 { 150 return intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE; 151 } 152 153 static inline bool is_cmd_mode(struct intel_dsi *intel_dsi) 154 { 155 return intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE; 156 } 157 158 static inline u16 intel_dsi_encoder_ports(struct intel_encoder *encoder) 159 { 160 return enc_to_intel_dsi(&encoder->base)->ports; 161 } 162 163 /* icl_dsi.c */ 164 void icl_dsi_init(struct drm_i915_private *dev_priv); 165 166 /* intel_dsi.c */ 167 int intel_dsi_bitrate(const struct intel_dsi *intel_dsi); 168 int intel_dsi_tlpx_ns(const struct intel_dsi *intel_dsi); 169 enum drm_panel_orientation 170 intel_dsi_get_panel_orientation(struct intel_connector *connector); 171 172 /* vlv_dsi.c */ 173 void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port); 174 enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt); 175 int intel_dsi_get_modes(struct drm_connector *connector); 176 enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector, 177 struct drm_display_mode *mode); 178 struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi, 179 const struct mipi_dsi_host_ops *funcs, 180 enum port port); 181 void vlv_dsi_init(struct drm_i915_private *dev_priv); 182 183 /* vlv_dsi_pll.c */ 184 int vlv_dsi_pll_compute(struct intel_encoder *encoder, 185 struct intel_crtc_state *config); 186 void vlv_dsi_pll_enable(struct intel_encoder *encoder, 187 const struct intel_crtc_state *config); 188 void vlv_dsi_pll_disable(struct intel_encoder *encoder); 189 u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, 190 struct intel_crtc_state *config); 191 void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); 192 193 bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); 194 int bxt_dsi_pll_compute(struct intel_encoder *encoder, 195 struct intel_crtc_state *config); 196 void bxt_dsi_pll_enable(struct intel_encoder *encoder, 197 const struct intel_crtc_state *config); 198 void bxt_dsi_pll_disable(struct intel_encoder *encoder); 199 u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, 200 struct intel_crtc_state *config); 201 void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); 202 203 /* intel_dsi_vbt.c */ 204 bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id); 205 void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi, 206 enum mipi_seq seq_id); 207 void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec); 208 void intel_dsi_log_params(struct intel_dsi *intel_dsi); 209 210 #endif /* _INTEL_DSI_H */ 211