1a1b63119SJosé Roberto de Souza // SPDX-License-Identifier: MIT 2a1b63119SJosé Roberto de Souza /* 3a1b63119SJosé Roberto de Souza * Copyright © 2021 Intel Corporation 4a1b63119SJosé Roberto de Souza */ 5a1b63119SJosé Roberto de Souza 6a1b63119SJosé Roberto de Souza #include "i915_drv.h" 7a1b63119SJosé Roberto de Souza #include "intel_atomic.h" 8a1b63119SJosé Roberto de Souza #include "intel_de.h" 9a1b63119SJosé Roberto de Souza #include "intel_display_types.h" 10a1b63119SJosé Roberto de Souza #include "intel_drrs.h" 11a1b63119SJosé Roberto de Souza #include "intel_panel.h" 12a1b63119SJosé Roberto de Souza 13a1b63119SJosé Roberto de Souza /** 14a1b63119SJosé Roberto de Souza * DOC: Display Refresh Rate Switching (DRRS) 15a1b63119SJosé Roberto de Souza * 16a1b63119SJosé Roberto de Souza * Display Refresh Rate Switching (DRRS) is a power conservation feature 17a1b63119SJosé Roberto de Souza * which enables swtching between low and high refresh rates, 18a1b63119SJosé Roberto de Souza * dynamically, based on the usage scenario. This feature is applicable 19a1b63119SJosé Roberto de Souza * for internal panels. 20a1b63119SJosé Roberto de Souza * 21a1b63119SJosé Roberto de Souza * Indication that the panel supports DRRS is given by the panel EDID, which 22a1b63119SJosé Roberto de Souza * would list multiple refresh rates for one resolution. 23a1b63119SJosé Roberto de Souza * 24a1b63119SJosé Roberto de Souza * DRRS is of 2 types - static and seamless. 25a1b63119SJosé Roberto de Souza * Static DRRS involves changing refresh rate (RR) by doing a full modeset 26a1b63119SJosé Roberto de Souza * (may appear as a blink on screen) and is used in dock-undock scenario. 27a1b63119SJosé Roberto de Souza * Seamless DRRS involves changing RR without any visual effect to the user 28a1b63119SJosé Roberto de Souza * and can be used during normal system usage. This is done by programming 29a1b63119SJosé Roberto de Souza * certain registers. 30a1b63119SJosé Roberto de Souza * 31a1b63119SJosé Roberto de Souza * Support for static/seamless DRRS may be indicated in the VBT based on 32a1b63119SJosé Roberto de Souza * inputs from the panel spec. 33a1b63119SJosé Roberto de Souza * 34a1b63119SJosé Roberto de Souza * DRRS saves power by switching to low RR based on usage scenarios. 35a1b63119SJosé Roberto de Souza * 36a1b63119SJosé Roberto de Souza * The implementation is based on frontbuffer tracking implementation. When 37a1b63119SJosé Roberto de Souza * there is a disturbance on the screen triggered by user activity or a periodic 38a1b63119SJosé Roberto de Souza * system activity, DRRS is disabled (RR is changed to high RR). When there is 39a1b63119SJosé Roberto de Souza * no movement on screen, after a timeout of 1 second, a switch to low RR is 40a1b63119SJosé Roberto de Souza * made. 41a1b63119SJosé Roberto de Souza * 423a3dd534SJosé Roberto de Souza * For integration with frontbuffer tracking code, intel_drrs_invalidate() 433a3dd534SJosé Roberto de Souza * and intel_drrs_flush() are called. 44a1b63119SJosé Roberto de Souza * 45a1b63119SJosé Roberto de Souza * DRRS can be further extended to support other internal panels and also 46a1b63119SJosé Roberto de Souza * the scenario of video playback wherein RR is set based on the rate 47a1b63119SJosé Roberto de Souza * requested by userspace. 48a1b63119SJosé Roberto de Souza */ 49a1b63119SJosé Roberto de Souza 50a1b63119SJosé Roberto de Souza void 513a3dd534SJosé Roberto de Souza intel_drrs_compute_config(struct intel_dp *intel_dp, 52a1b63119SJosé Roberto de Souza struct intel_crtc_state *pipe_config, 53a1b63119SJosé Roberto de Souza int output_bpp, bool constant_n) 54a1b63119SJosé Roberto de Souza { 55a1b63119SJosé Roberto de Souza struct intel_connector *intel_connector = intel_dp->attached_connector; 56a1b63119SJosé Roberto de Souza struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); 57a1b63119SJosé Roberto de Souza int pixel_clock; 58a1b63119SJosé Roberto de Souza 59a1b63119SJosé Roberto de Souza if (pipe_config->vrr.enable) 60a1b63119SJosé Roberto de Souza return; 61a1b63119SJosé Roberto de Souza 62a1b63119SJosé Roberto de Souza /* 63a1b63119SJosé Roberto de Souza * DRRS and PSR can't be enable together, so giving preference to PSR 64a1b63119SJosé Roberto de Souza * as it allows more power-savings by complete shutting down display, 653a3dd534SJosé Roberto de Souza * so to guarantee this, intel_drrs_compute_config() must be called 66a1b63119SJosé Roberto de Souza * after intel_psr_compute_config(). 67a1b63119SJosé Roberto de Souza */ 68a1b63119SJosé Roberto de Souza if (pipe_config->has_psr) 69a1b63119SJosé Roberto de Souza return; 70a1b63119SJosé Roberto de Souza 71a1b63119SJosé Roberto de Souza if (!intel_connector->panel.downclock_mode || 72a1b63119SJosé Roberto de Souza dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT) 73a1b63119SJosé Roberto de Souza return; 74a1b63119SJosé Roberto de Souza 75a1b63119SJosé Roberto de Souza pipe_config->has_drrs = true; 76a1b63119SJosé Roberto de Souza 77a1b63119SJosé Roberto de Souza pixel_clock = intel_connector->panel.downclock_mode->clock; 78a1b63119SJosé Roberto de Souza if (pipe_config->splitter.enable) 79a1b63119SJosé Roberto de Souza pixel_clock /= pipe_config->splitter.link_count; 80a1b63119SJosé Roberto de Souza 81a1b63119SJosé Roberto de Souza intel_link_compute_m_n(output_bpp, pipe_config->lane_count, pixel_clock, 82a1b63119SJosé Roberto de Souza pipe_config->port_clock, &pipe_config->dp_m2_n2, 83a1b63119SJosé Roberto de Souza constant_n, pipe_config->fec_enable); 84a1b63119SJosé Roberto de Souza 85a1b63119SJosé Roberto de Souza /* FIXME: abstract this better */ 86a1b63119SJosé Roberto de Souza if (pipe_config->splitter.enable) 87a1b63119SJosé Roberto de Souza pipe_config->dp_m2_n2.gmch_m *= pipe_config->splitter.link_count; 88a1b63119SJosé Roberto de Souza } 89a1b63119SJosé Roberto de Souza 903a3dd534SJosé Roberto de Souza static void intel_drrs_set_state(struct drm_i915_private *dev_priv, 91a1b63119SJosé Roberto de Souza const struct intel_crtc_state *crtc_state, 92*c7c4dfb6SJosé Roberto de Souza enum drrs_refresh_rate_type refresh_type) 93a1b63119SJosé Roberto de Souza { 94a1b63119SJosé Roberto de Souza struct intel_dp *intel_dp = dev_priv->drrs.dp; 95a1b63119SJosé Roberto de Souza struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 96*c7c4dfb6SJosé Roberto de Souza struct drm_display_mode *mode; 97a1b63119SJosé Roberto de Souza 98*c7c4dfb6SJosé Roberto de Souza if (!intel_dp) { 99a1b63119SJosé Roberto de Souza drm_dbg_kms(&dev_priv->drm, "DRRS not supported.\n"); 100a1b63119SJosé Roberto de Souza return; 101a1b63119SJosé Roberto de Souza } 102a1b63119SJosé Roberto de Souza 103a1b63119SJosé Roberto de Souza if (!crtc) { 104a1b63119SJosé Roberto de Souza drm_dbg_kms(&dev_priv->drm, 105a1b63119SJosé Roberto de Souza "DRRS: intel_crtc not initialized\n"); 106a1b63119SJosé Roberto de Souza return; 107a1b63119SJosé Roberto de Souza } 108a1b63119SJosé Roberto de Souza 109a1b63119SJosé Roberto de Souza if (dev_priv->drrs.type < SEAMLESS_DRRS_SUPPORT) { 110a1b63119SJosé Roberto de Souza drm_dbg_kms(&dev_priv->drm, "Only Seamless DRRS supported.\n"); 111a1b63119SJosé Roberto de Souza return; 112a1b63119SJosé Roberto de Souza } 113a1b63119SJosé Roberto de Souza 114*c7c4dfb6SJosé Roberto de Souza if (refresh_type == dev_priv->drrs.refresh_rate_type) 115a1b63119SJosé Roberto de Souza return; 116a1b63119SJosé Roberto de Souza 117a1b63119SJosé Roberto de Souza if (!crtc_state->hw.active) { 118a1b63119SJosé Roberto de Souza drm_dbg_kms(&dev_priv->drm, 119a1b63119SJosé Roberto de Souza "eDP encoder disabled. CRTC not Active\n"); 120a1b63119SJosé Roberto de Souza return; 121a1b63119SJosé Roberto de Souza } 122a1b63119SJosé Roberto de Souza 123a1b63119SJosé Roberto de Souza if (DISPLAY_VER(dev_priv) >= 8 && !IS_CHERRYVIEW(dev_priv)) { 124*c7c4dfb6SJosé Roberto de Souza switch (refresh_type) { 125a1b63119SJosé Roberto de Souza case DRRS_HIGH_RR: 126a1b63119SJosé Roberto de Souza intel_dp_set_m_n(crtc_state, M1_N1); 127a1b63119SJosé Roberto de Souza break; 128a1b63119SJosé Roberto de Souza case DRRS_LOW_RR: 129a1b63119SJosé Roberto de Souza intel_dp_set_m_n(crtc_state, M2_N2); 130a1b63119SJosé Roberto de Souza break; 131a1b63119SJosé Roberto de Souza case DRRS_MAX_RR: 132a1b63119SJosé Roberto de Souza default: 133a1b63119SJosé Roberto de Souza drm_err(&dev_priv->drm, 134a1b63119SJosé Roberto de Souza "Unsupported refreshrate type\n"); 135a1b63119SJosé Roberto de Souza } 136a1b63119SJosé Roberto de Souza } else if (DISPLAY_VER(dev_priv) > 6) { 137a1b63119SJosé Roberto de Souza i915_reg_t reg = PIPECONF(crtc_state->cpu_transcoder); 138a1b63119SJosé Roberto de Souza u32 val; 139a1b63119SJosé Roberto de Souza 140a1b63119SJosé Roberto de Souza val = intel_de_read(dev_priv, reg); 141*c7c4dfb6SJosé Roberto de Souza if (refresh_type == DRRS_LOW_RR) { 142a1b63119SJosé Roberto de Souza if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) 143a1b63119SJosé Roberto de Souza val |= PIPECONF_EDP_RR_MODE_SWITCH_VLV; 144a1b63119SJosé Roberto de Souza else 145a1b63119SJosé Roberto de Souza val |= PIPECONF_EDP_RR_MODE_SWITCH; 146a1b63119SJosé Roberto de Souza } else { 147a1b63119SJosé Roberto de Souza if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) 148a1b63119SJosé Roberto de Souza val &= ~PIPECONF_EDP_RR_MODE_SWITCH_VLV; 149a1b63119SJosé Roberto de Souza else 150a1b63119SJosé Roberto de Souza val &= ~PIPECONF_EDP_RR_MODE_SWITCH; 151a1b63119SJosé Roberto de Souza } 152a1b63119SJosé Roberto de Souza intel_de_write(dev_priv, reg, val); 153a1b63119SJosé Roberto de Souza } 154a1b63119SJosé Roberto de Souza 155*c7c4dfb6SJosé Roberto de Souza dev_priv->drrs.refresh_rate_type = refresh_type; 156a1b63119SJosé Roberto de Souza 157*c7c4dfb6SJosé Roberto de Souza if (refresh_type == DRRS_LOW_RR) 158*c7c4dfb6SJosé Roberto de Souza mode = intel_dp->attached_connector->panel.downclock_mode; 159*c7c4dfb6SJosé Roberto de Souza else 160*c7c4dfb6SJosé Roberto de Souza mode = intel_dp->attached_connector->panel.fixed_mode; 161a1b63119SJosé Roberto de Souza drm_dbg_kms(&dev_priv->drm, "eDP Refresh Rate set to : %dHz\n", 162*c7c4dfb6SJosé Roberto de Souza drm_mode_vrefresh(mode)); 163a1b63119SJosé Roberto de Souza } 164a1b63119SJosé Roberto de Souza 165a1b63119SJosé Roberto de Souza static void 1663a3dd534SJosé Roberto de Souza intel_drrs_enable_locked(struct intel_dp *intel_dp) 167a1b63119SJosé Roberto de Souza { 168a1b63119SJosé Roberto de Souza struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); 169a1b63119SJosé Roberto de Souza 170a1b63119SJosé Roberto de Souza dev_priv->drrs.busy_frontbuffer_bits = 0; 171a1b63119SJosé Roberto de Souza dev_priv->drrs.dp = intel_dp; 172a1b63119SJosé Roberto de Souza } 173a1b63119SJosé Roberto de Souza 174a1b63119SJosé Roberto de Souza /** 1753a3dd534SJosé Roberto de Souza * intel_drrs_enable - init drrs struct if supported 176a1b63119SJosé Roberto de Souza * @intel_dp: DP struct 177a1b63119SJosé Roberto de Souza * @crtc_state: A pointer to the active crtc state. 178a1b63119SJosé Roberto de Souza * 179a1b63119SJosé Roberto de Souza * Initializes frontbuffer_bits and drrs.dp 180a1b63119SJosé Roberto de Souza */ 1813a3dd534SJosé Roberto de Souza void intel_drrs_enable(struct intel_dp *intel_dp, 182a1b63119SJosé Roberto de Souza const struct intel_crtc_state *crtc_state) 183a1b63119SJosé Roberto de Souza { 184a1b63119SJosé Roberto de Souza struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); 185a1b63119SJosé Roberto de Souza 186a1b63119SJosé Roberto de Souza if (!crtc_state->has_drrs) 187a1b63119SJosé Roberto de Souza return; 188a1b63119SJosé Roberto de Souza 189a1b63119SJosé Roberto de Souza drm_dbg_kms(&dev_priv->drm, "Enabling DRRS\n"); 190a1b63119SJosé Roberto de Souza 191a1b63119SJosé Roberto de Souza mutex_lock(&dev_priv->drrs.mutex); 192a1b63119SJosé Roberto de Souza 193a1b63119SJosé Roberto de Souza if (dev_priv->drrs.dp) { 194a1b63119SJosé Roberto de Souza drm_warn(&dev_priv->drm, "DRRS already enabled\n"); 195a1b63119SJosé Roberto de Souza goto unlock; 196a1b63119SJosé Roberto de Souza } 197a1b63119SJosé Roberto de Souza 1983a3dd534SJosé Roberto de Souza intel_drrs_enable_locked(intel_dp); 199a1b63119SJosé Roberto de Souza 200a1b63119SJosé Roberto de Souza unlock: 201a1b63119SJosé Roberto de Souza mutex_unlock(&dev_priv->drrs.mutex); 202a1b63119SJosé Roberto de Souza } 203a1b63119SJosé Roberto de Souza 204a1b63119SJosé Roberto de Souza static void 2053a3dd534SJosé Roberto de Souza intel_drrs_disable_locked(struct intel_dp *intel_dp, 206a1b63119SJosé Roberto de Souza const struct intel_crtc_state *crtc_state) 207a1b63119SJosé Roberto de Souza { 208a1b63119SJosé Roberto de Souza struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); 209a1b63119SJosé Roberto de Souza 210*c7c4dfb6SJosé Roberto de Souza intel_drrs_set_state(dev_priv, crtc_state, DRRS_HIGH_RR); 211a1b63119SJosé Roberto de Souza dev_priv->drrs.dp = NULL; 212a1b63119SJosé Roberto de Souza } 213a1b63119SJosé Roberto de Souza 214a1b63119SJosé Roberto de Souza /** 2153a3dd534SJosé Roberto de Souza * intel_drrs_disable - Disable DRRS 216a1b63119SJosé Roberto de Souza * @intel_dp: DP struct 217a1b63119SJosé Roberto de Souza * @old_crtc_state: Pointer to old crtc_state. 218a1b63119SJosé Roberto de Souza * 219a1b63119SJosé Roberto de Souza */ 2203a3dd534SJosé Roberto de Souza void intel_drrs_disable(struct intel_dp *intel_dp, 221a1b63119SJosé Roberto de Souza const struct intel_crtc_state *old_crtc_state) 222a1b63119SJosé Roberto de Souza { 223a1b63119SJosé Roberto de Souza struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); 224a1b63119SJosé Roberto de Souza 225a1b63119SJosé Roberto de Souza if (!old_crtc_state->has_drrs) 226a1b63119SJosé Roberto de Souza return; 227a1b63119SJosé Roberto de Souza 228a1b63119SJosé Roberto de Souza mutex_lock(&dev_priv->drrs.mutex); 229a1b63119SJosé Roberto de Souza if (!dev_priv->drrs.dp) { 230a1b63119SJosé Roberto de Souza mutex_unlock(&dev_priv->drrs.mutex); 231a1b63119SJosé Roberto de Souza return; 232a1b63119SJosé Roberto de Souza } 233a1b63119SJosé Roberto de Souza 2343a3dd534SJosé Roberto de Souza intel_drrs_disable_locked(intel_dp, old_crtc_state); 235a1b63119SJosé Roberto de Souza mutex_unlock(&dev_priv->drrs.mutex); 236a1b63119SJosé Roberto de Souza 237a1b63119SJosé Roberto de Souza cancel_delayed_work_sync(&dev_priv->drrs.work); 238a1b63119SJosé Roberto de Souza } 239a1b63119SJosé Roberto de Souza 240a1b63119SJosé Roberto de Souza /** 2413a3dd534SJosé Roberto de Souza * intel_drrs_update - Update DRRS state 242a1b63119SJosé Roberto de Souza * @intel_dp: Intel DP 243a1b63119SJosé Roberto de Souza * @crtc_state: new CRTC state 244a1b63119SJosé Roberto de Souza * 245a1b63119SJosé Roberto de Souza * This function will update DRRS states, disabling or enabling DRRS when 2463a3dd534SJosé Roberto de Souza * executing fastsets. For full modeset, intel_drrs_disable() and 2473a3dd534SJosé Roberto de Souza * intel_drrs_enable() should be called instead. 248a1b63119SJosé Roberto de Souza */ 249a1b63119SJosé Roberto de Souza void 2503a3dd534SJosé Roberto de Souza intel_drrs_update(struct intel_dp *intel_dp, 251a1b63119SJosé Roberto de Souza const struct intel_crtc_state *crtc_state) 252a1b63119SJosé Roberto de Souza { 253a1b63119SJosé Roberto de Souza struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); 254a1b63119SJosé Roberto de Souza 255a1b63119SJosé Roberto de Souza if (dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT) 256a1b63119SJosé Roberto de Souza return; 257a1b63119SJosé Roberto de Souza 258a1b63119SJosé Roberto de Souza mutex_lock(&dev_priv->drrs.mutex); 259a1b63119SJosé Roberto de Souza 260a1b63119SJosé Roberto de Souza /* New state matches current one? */ 261a1b63119SJosé Roberto de Souza if (crtc_state->has_drrs == !!dev_priv->drrs.dp) 262a1b63119SJosé Roberto de Souza goto unlock; 263a1b63119SJosé Roberto de Souza 264a1b63119SJosé Roberto de Souza if (crtc_state->has_drrs) 2653a3dd534SJosé Roberto de Souza intel_drrs_enable_locked(intel_dp); 266a1b63119SJosé Roberto de Souza else 2673a3dd534SJosé Roberto de Souza intel_drrs_disable_locked(intel_dp, crtc_state); 268a1b63119SJosé Roberto de Souza 269a1b63119SJosé Roberto de Souza unlock: 270a1b63119SJosé Roberto de Souza mutex_unlock(&dev_priv->drrs.mutex); 271a1b63119SJosé Roberto de Souza } 272a1b63119SJosé Roberto de Souza 2733a3dd534SJosé Roberto de Souza static void intel_drrs_downclock_work(struct work_struct *work) 274a1b63119SJosé Roberto de Souza { 275a1b63119SJosé Roberto de Souza struct drm_i915_private *dev_priv = 276a1b63119SJosé Roberto de Souza container_of(work, typeof(*dev_priv), drrs.work.work); 277a1b63119SJosé Roberto de Souza struct intel_dp *intel_dp; 278*c7c4dfb6SJosé Roberto de Souza struct drm_crtc *crtc; 279a1b63119SJosé Roberto de Souza 280a1b63119SJosé Roberto de Souza mutex_lock(&dev_priv->drrs.mutex); 281a1b63119SJosé Roberto de Souza 282a1b63119SJosé Roberto de Souza intel_dp = dev_priv->drrs.dp; 283a1b63119SJosé Roberto de Souza 284a1b63119SJosé Roberto de Souza if (!intel_dp) 285a1b63119SJosé Roberto de Souza goto unlock; 286a1b63119SJosé Roberto de Souza 287a1b63119SJosé Roberto de Souza /* 288a1b63119SJosé Roberto de Souza * The delayed work can race with an invalidate hence we need to 289a1b63119SJosé Roberto de Souza * recheck. 290a1b63119SJosé Roberto de Souza */ 291a1b63119SJosé Roberto de Souza 292a1b63119SJosé Roberto de Souza if (dev_priv->drrs.busy_frontbuffer_bits) 293a1b63119SJosé Roberto de Souza goto unlock; 294a1b63119SJosé Roberto de Souza 295*c7c4dfb6SJosé Roberto de Souza crtc = dp_to_dig_port(intel_dp)->base.base.crtc; 296*c7c4dfb6SJosé Roberto de Souza intel_drrs_set_state(dev_priv, to_intel_crtc(crtc)->config, DRRS_LOW_RR); 297a1b63119SJosé Roberto de Souza 298a1b63119SJosé Roberto de Souza unlock: 299a1b63119SJosé Roberto de Souza mutex_unlock(&dev_priv->drrs.mutex); 300a1b63119SJosé Roberto de Souza } 301a1b63119SJosé Roberto de Souza 302a1b63119SJosé Roberto de Souza /** 3033a3dd534SJosé Roberto de Souza * intel_drrs_invalidate - Disable Idleness DRRS 304a1b63119SJosé Roberto de Souza * @dev_priv: i915 device 305a1b63119SJosé Roberto de Souza * @frontbuffer_bits: frontbuffer plane tracking bits 306a1b63119SJosé Roberto de Souza * 307a1b63119SJosé Roberto de Souza * This function gets called everytime rendering on the given planes start. 308a1b63119SJosé Roberto de Souza * Hence DRRS needs to be Upclocked, i.e. (LOW_RR -> HIGH_RR). 309a1b63119SJosé Roberto de Souza * 310a1b63119SJosé Roberto de Souza * Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits. 311a1b63119SJosé Roberto de Souza */ 3123a3dd534SJosé Roberto de Souza void intel_drrs_invalidate(struct drm_i915_private *dev_priv, 313a1b63119SJosé Roberto de Souza unsigned int frontbuffer_bits) 314a1b63119SJosé Roberto de Souza { 315a1b63119SJosé Roberto de Souza struct intel_dp *intel_dp; 316a1b63119SJosé Roberto de Souza struct drm_crtc *crtc; 317a1b63119SJosé Roberto de Souza enum pipe pipe; 318a1b63119SJosé Roberto de Souza 319a1b63119SJosé Roberto de Souza if (dev_priv->drrs.type == DRRS_NOT_SUPPORTED) 320a1b63119SJosé Roberto de Souza return; 321a1b63119SJosé Roberto de Souza 322a1b63119SJosé Roberto de Souza cancel_delayed_work(&dev_priv->drrs.work); 323a1b63119SJosé Roberto de Souza 324a1b63119SJosé Roberto de Souza mutex_lock(&dev_priv->drrs.mutex); 325a1b63119SJosé Roberto de Souza 326a1b63119SJosé Roberto de Souza intel_dp = dev_priv->drrs.dp; 327a1b63119SJosé Roberto de Souza if (!intel_dp) { 328a1b63119SJosé Roberto de Souza mutex_unlock(&dev_priv->drrs.mutex); 329a1b63119SJosé Roberto de Souza return; 330a1b63119SJosé Roberto de Souza } 331a1b63119SJosé Roberto de Souza 332a1b63119SJosé Roberto de Souza crtc = dp_to_dig_port(intel_dp)->base.base.crtc; 333a1b63119SJosé Roberto de Souza pipe = to_intel_crtc(crtc)->pipe; 334a1b63119SJosé Roberto de Souza 335a1b63119SJosé Roberto de Souza frontbuffer_bits &= INTEL_FRONTBUFFER_ALL_MASK(pipe); 336a1b63119SJosé Roberto de Souza dev_priv->drrs.busy_frontbuffer_bits |= frontbuffer_bits; 337a1b63119SJosé Roberto de Souza 338a1b63119SJosé Roberto de Souza /* invalidate means busy screen hence upclock */ 339*c7c4dfb6SJosé Roberto de Souza if (frontbuffer_bits) 3403a3dd534SJosé Roberto de Souza intel_drrs_set_state(dev_priv, to_intel_crtc(crtc)->config, 341*c7c4dfb6SJosé Roberto de Souza DRRS_HIGH_RR); 342a1b63119SJosé Roberto de Souza 343a1b63119SJosé Roberto de Souza mutex_unlock(&dev_priv->drrs.mutex); 344a1b63119SJosé Roberto de Souza } 345a1b63119SJosé Roberto de Souza 346a1b63119SJosé Roberto de Souza /** 3473a3dd534SJosé Roberto de Souza * intel_drrs_flush - Restart Idleness DRRS 348a1b63119SJosé Roberto de Souza * @dev_priv: i915 device 349a1b63119SJosé Roberto de Souza * @frontbuffer_bits: frontbuffer plane tracking bits 350a1b63119SJosé Roberto de Souza * 351a1b63119SJosé Roberto de Souza * This function gets called every time rendering on the given planes has 352a1b63119SJosé Roberto de Souza * completed or flip on a crtc is completed. So DRRS should be upclocked 353a1b63119SJosé Roberto de Souza * (LOW_RR -> HIGH_RR). And also Idleness detection should be started again, 354a1b63119SJosé Roberto de Souza * if no other planes are dirty. 355a1b63119SJosé Roberto de Souza * 356a1b63119SJosé Roberto de Souza * Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits. 357a1b63119SJosé Roberto de Souza */ 3583a3dd534SJosé Roberto de Souza void intel_drrs_flush(struct drm_i915_private *dev_priv, 359a1b63119SJosé Roberto de Souza unsigned int frontbuffer_bits) 360a1b63119SJosé Roberto de Souza { 361a1b63119SJosé Roberto de Souza struct intel_dp *intel_dp; 362a1b63119SJosé Roberto de Souza struct drm_crtc *crtc; 363a1b63119SJosé Roberto de Souza enum pipe pipe; 364a1b63119SJosé Roberto de Souza 365a1b63119SJosé Roberto de Souza if (dev_priv->drrs.type == DRRS_NOT_SUPPORTED) 366a1b63119SJosé Roberto de Souza return; 367a1b63119SJosé Roberto de Souza 368a1b63119SJosé Roberto de Souza cancel_delayed_work(&dev_priv->drrs.work); 369a1b63119SJosé Roberto de Souza 370a1b63119SJosé Roberto de Souza mutex_lock(&dev_priv->drrs.mutex); 371a1b63119SJosé Roberto de Souza 372a1b63119SJosé Roberto de Souza intel_dp = dev_priv->drrs.dp; 373a1b63119SJosé Roberto de Souza if (!intel_dp) { 374a1b63119SJosé Roberto de Souza mutex_unlock(&dev_priv->drrs.mutex); 375a1b63119SJosé Roberto de Souza return; 376a1b63119SJosé Roberto de Souza } 377a1b63119SJosé Roberto de Souza 378a1b63119SJosé Roberto de Souza crtc = dp_to_dig_port(intel_dp)->base.base.crtc; 379a1b63119SJosé Roberto de Souza pipe = to_intel_crtc(crtc)->pipe; 380a1b63119SJosé Roberto de Souza 381a1b63119SJosé Roberto de Souza frontbuffer_bits &= INTEL_FRONTBUFFER_ALL_MASK(pipe); 382a1b63119SJosé Roberto de Souza dev_priv->drrs.busy_frontbuffer_bits &= ~frontbuffer_bits; 383a1b63119SJosé Roberto de Souza 384a1b63119SJosé Roberto de Souza /* flush means busy screen hence upclock */ 385*c7c4dfb6SJosé Roberto de Souza if (frontbuffer_bits) 3863a3dd534SJosé Roberto de Souza intel_drrs_set_state(dev_priv, to_intel_crtc(crtc)->config, 387*c7c4dfb6SJosé Roberto de Souza DRRS_HIGH_RR); 388a1b63119SJosé Roberto de Souza 389a1b63119SJosé Roberto de Souza /* 390a1b63119SJosé Roberto de Souza * flush also means no more activity hence schedule downclock, if all 391a1b63119SJosé Roberto de Souza * other fbs are quiescent too 392a1b63119SJosé Roberto de Souza */ 393a1b63119SJosé Roberto de Souza if (!dev_priv->drrs.busy_frontbuffer_bits) 394a1b63119SJosé Roberto de Souza schedule_delayed_work(&dev_priv->drrs.work, 395a1b63119SJosé Roberto de Souza msecs_to_jiffies(1000)); 396a1b63119SJosé Roberto de Souza mutex_unlock(&dev_priv->drrs.mutex); 397a1b63119SJosé Roberto de Souza } 398a1b63119SJosé Roberto de Souza 399a1b63119SJosé Roberto de Souza /** 4003a3dd534SJosé Roberto de Souza * intel_drrs_init - Init basic DRRS work and mutex. 401a1b63119SJosé Roberto de Souza * @connector: eDP connector 402a1b63119SJosé Roberto de Souza * @fixed_mode: preferred mode of panel 403a1b63119SJosé Roberto de Souza * 404a1b63119SJosé Roberto de Souza * This function is called only once at driver load to initialize basic 405a1b63119SJosé Roberto de Souza * DRRS stuff. 406a1b63119SJosé Roberto de Souza * 407a1b63119SJosé Roberto de Souza * Returns: 408a1b63119SJosé Roberto de Souza * Downclock mode if panel supports it, else return NULL. 409a1b63119SJosé Roberto de Souza * DRRS support is determined by the presence of downclock mode (apart 410a1b63119SJosé Roberto de Souza * from VBT setting). 411a1b63119SJosé Roberto de Souza */ 412a1b63119SJosé Roberto de Souza struct drm_display_mode * 4133a3dd534SJosé Roberto de Souza intel_drrs_init(struct intel_connector *connector, 414a1b63119SJosé Roberto de Souza struct drm_display_mode *fixed_mode) 415a1b63119SJosé Roberto de Souza { 416a1b63119SJosé Roberto de Souza struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 417a1b63119SJosé Roberto de Souza struct drm_display_mode *downclock_mode = NULL; 418a1b63119SJosé Roberto de Souza 4193a3dd534SJosé Roberto de Souza INIT_DELAYED_WORK(&dev_priv->drrs.work, intel_drrs_downclock_work); 420a1b63119SJosé Roberto de Souza mutex_init(&dev_priv->drrs.mutex); 421a1b63119SJosé Roberto de Souza 422a1b63119SJosé Roberto de Souza if (DISPLAY_VER(dev_priv) <= 6) { 423a1b63119SJosé Roberto de Souza drm_dbg_kms(&dev_priv->drm, 424a1b63119SJosé Roberto de Souza "DRRS supported for Gen7 and above\n"); 425a1b63119SJosé Roberto de Souza return NULL; 426a1b63119SJosé Roberto de Souza } 427a1b63119SJosé Roberto de Souza 428a1b63119SJosé Roberto de Souza if (dev_priv->vbt.drrs_type != SEAMLESS_DRRS_SUPPORT) { 429a1b63119SJosé Roberto de Souza drm_dbg_kms(&dev_priv->drm, "VBT doesn't support DRRS\n"); 430a1b63119SJosé Roberto de Souza return NULL; 431a1b63119SJosé Roberto de Souza } 432a1b63119SJosé Roberto de Souza 433a1b63119SJosé Roberto de Souza downclock_mode = intel_panel_edid_downclock_mode(connector, fixed_mode); 434a1b63119SJosé Roberto de Souza if (!downclock_mode) { 435a1b63119SJosé Roberto de Souza drm_dbg_kms(&dev_priv->drm, 436a1b63119SJosé Roberto de Souza "Downclock mode is not found. DRRS not supported\n"); 437a1b63119SJosé Roberto de Souza return NULL; 438a1b63119SJosé Roberto de Souza } 439a1b63119SJosé Roberto de Souza 440a1b63119SJosé Roberto de Souza dev_priv->drrs.type = dev_priv->vbt.drrs_type; 441a1b63119SJosé Roberto de Souza 442a1b63119SJosé Roberto de Souza dev_priv->drrs.refresh_rate_type = DRRS_HIGH_RR; 443a1b63119SJosé Roberto de Souza drm_dbg_kms(&dev_priv->drm, 444a1b63119SJosé Roberto de Souza "seamless DRRS supported for eDP panel.\n"); 445a1b63119SJosé Roberto de Souza return downclock_mode; 446a1b63119SJosé Roberto de Souza } 447