1 /* 2 * Copyright © 2008 Intel Corporation 3 * 2014 Red Hat Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 * 24 */ 25 26 #include <drm/drm_atomic.h> 27 #include <drm/drm_atomic_helper.h> 28 #include <drm/drm_edid.h> 29 #include <drm/drm_probe_helper.h> 30 31 #include "i915_drv.h" 32 #include "intel_atomic.h" 33 #include "intel_audio.h" 34 #include "intel_connector.h" 35 #include "intel_ddi.h" 36 #include "intel_display_types.h" 37 #include "intel_hotplug.h" 38 #include "intel_dp.h" 39 #include "intel_dp_mst.h" 40 #include "intel_dpio_phy.h" 41 #include "intel_hdcp.h" 42 43 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder, 44 struct intel_crtc_state *crtc_state, 45 struct drm_connector_state *conn_state, 46 struct link_config_limits *limits) 47 { 48 struct drm_atomic_state *state = crtc_state->uapi.state; 49 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 50 struct intel_dp *intel_dp = &intel_mst->primary->dp; 51 struct intel_connector *connector = 52 to_intel_connector(conn_state->connector); 53 struct drm_i915_private *i915 = to_i915(connector->base.dev); 54 const struct drm_display_mode *adjusted_mode = 55 &crtc_state->hw.adjusted_mode; 56 bool constant_n = drm_dp_has_quirk(&intel_dp->desc, 0, 57 DP_DPCD_QUIRK_CONSTANT_N); 58 int bpp, slots = -EINVAL; 59 60 crtc_state->lane_count = limits->max_lane_count; 61 crtc_state->port_clock = limits->max_clock; 62 63 for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) { 64 crtc_state->pipe_bpp = bpp; 65 66 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, 67 crtc_state->pipe_bpp, 68 false); 69 70 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr, 71 connector->port, 72 crtc_state->pbn, 0); 73 if (slots == -EDEADLK) 74 return slots; 75 if (slots >= 0) 76 break; 77 } 78 79 if (slots < 0) { 80 drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n", 81 slots); 82 return slots; 83 } 84 85 intel_link_compute_m_n(crtc_state->pipe_bpp, 86 crtc_state->lane_count, 87 adjusted_mode->crtc_clock, 88 crtc_state->port_clock, 89 &crtc_state->dp_m_n, 90 constant_n, crtc_state->fec_enable); 91 crtc_state->dp_m_n.tu = slots; 92 93 return 0; 94 } 95 96 static int intel_dp_mst_compute_config(struct intel_encoder *encoder, 97 struct intel_crtc_state *pipe_config, 98 struct drm_connector_state *conn_state) 99 { 100 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 101 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 102 struct intel_dp *intel_dp = &intel_mst->primary->dp; 103 struct intel_connector *connector = 104 to_intel_connector(conn_state->connector); 105 struct intel_digital_connector_state *intel_conn_state = 106 to_intel_digital_connector_state(conn_state); 107 const struct drm_display_mode *adjusted_mode = 108 &pipe_config->hw.adjusted_mode; 109 struct link_config_limits limits; 110 int ret; 111 112 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) 113 return -EINVAL; 114 115 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; 116 pipe_config->has_pch_encoder = false; 117 118 if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO) 119 pipe_config->has_audio = connector->port->has_audio; 120 else 121 pipe_config->has_audio = 122 intel_conn_state->force_audio == HDMI_AUDIO_ON; 123 124 /* 125 * for MST we always configure max link bw - the spec doesn't 126 * seem to suggest we should do otherwise. 127 */ 128 limits.min_clock = 129 limits.max_clock = intel_dp_max_link_rate(intel_dp); 130 131 limits.min_lane_count = 132 limits.max_lane_count = intel_dp_max_lane_count(intel_dp); 133 134 limits.min_bpp = intel_dp_min_bpp(pipe_config->output_format); 135 /* 136 * FIXME: If all the streams can't fit into the link with 137 * their current pipe_bpp we should reduce pipe_bpp across 138 * the board until things start to fit. Until then we 139 * limit to <= 8bpc since that's what was hardcoded for all 140 * MST streams previously. This hack should be removed once 141 * we have the proper retry logic in place. 142 */ 143 limits.max_bpp = min(pipe_config->pipe_bpp, 24); 144 145 intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits); 146 147 ret = intel_dp_mst_compute_link_config(encoder, pipe_config, 148 conn_state, &limits); 149 if (ret) 150 return ret; 151 152 pipe_config->limited_color_range = 153 intel_dp_limited_color_range(pipe_config, conn_state); 154 155 if (IS_GEN9_LP(dev_priv)) 156 pipe_config->lane_lat_optim_mask = 157 bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count); 158 159 intel_ddi_compute_min_voltage_level(dev_priv, pipe_config); 160 161 return 0; 162 } 163 164 /* 165 * Iterate over all connectors and return a mask of 166 * all CPU transcoders streaming over the same DP link. 167 */ 168 static unsigned int 169 intel_dp_mst_transcoder_mask(struct intel_atomic_state *state, 170 struct intel_dp *mst_port) 171 { 172 struct drm_i915_private *dev_priv = to_i915(state->base.dev); 173 const struct intel_digital_connector_state *conn_state; 174 struct intel_connector *connector; 175 u8 transcoders = 0; 176 int i; 177 178 if (INTEL_GEN(dev_priv) < 12) 179 return 0; 180 181 for_each_new_intel_connector_in_state(state, connector, conn_state, i) { 182 const struct intel_crtc_state *crtc_state; 183 struct intel_crtc *crtc; 184 185 if (connector->mst_port != mst_port || !conn_state->base.crtc) 186 continue; 187 188 crtc = to_intel_crtc(conn_state->base.crtc); 189 crtc_state = intel_atomic_get_new_crtc_state(state, crtc); 190 191 if (!crtc_state->hw.active) 192 continue; 193 194 transcoders |= BIT(crtc_state->cpu_transcoder); 195 } 196 197 return transcoders; 198 } 199 200 static int intel_dp_mst_compute_config_late(struct intel_encoder *encoder, 201 struct intel_crtc_state *crtc_state, 202 struct drm_connector_state *conn_state) 203 { 204 struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state); 205 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 206 struct intel_dp *intel_dp = &intel_mst->primary->dp; 207 208 /* lowest numbered transcoder will be designated master */ 209 crtc_state->mst_master_transcoder = 210 ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1; 211 212 return 0; 213 } 214 215 /* 216 * If one of the connectors in a MST stream needs a modeset, mark all CRTCs 217 * that shares the same MST stream as mode changed, 218 * intel_modeset_pipe_config()+intel_crtc_check_fastset() will take care to do 219 * a fastset when possible. 220 */ 221 static int 222 intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector, 223 struct intel_atomic_state *state) 224 { 225 struct drm_i915_private *dev_priv = to_i915(state->base.dev); 226 struct drm_connector_list_iter connector_list_iter; 227 struct intel_connector *connector_iter; 228 229 if (INTEL_GEN(dev_priv) < 12) 230 return 0; 231 232 if (!intel_connector_needs_modeset(state, &connector->base)) 233 return 0; 234 235 drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter); 236 for_each_intel_connector_iter(connector_iter, &connector_list_iter) { 237 struct intel_digital_connector_state *conn_iter_state; 238 struct intel_crtc_state *crtc_state; 239 struct intel_crtc *crtc; 240 int ret; 241 242 if (connector_iter->mst_port != connector->mst_port || 243 connector_iter == connector) 244 continue; 245 246 conn_iter_state = intel_atomic_get_digital_connector_state(state, 247 connector_iter); 248 if (IS_ERR(conn_iter_state)) { 249 drm_connector_list_iter_end(&connector_list_iter); 250 return PTR_ERR(conn_iter_state); 251 } 252 253 if (!conn_iter_state->base.crtc) 254 continue; 255 256 crtc = to_intel_crtc(conn_iter_state->base.crtc); 257 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); 258 if (IS_ERR(crtc_state)) { 259 drm_connector_list_iter_end(&connector_list_iter); 260 return PTR_ERR(crtc_state); 261 } 262 263 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base); 264 if (ret) { 265 drm_connector_list_iter_end(&connector_list_iter); 266 return ret; 267 } 268 crtc_state->uapi.mode_changed = true; 269 } 270 drm_connector_list_iter_end(&connector_list_iter); 271 272 return 0; 273 } 274 275 static int 276 intel_dp_mst_atomic_check(struct drm_connector *connector, 277 struct drm_atomic_state *_state) 278 { 279 struct intel_atomic_state *state = to_intel_atomic_state(_state); 280 struct drm_connector_state *new_conn_state = 281 drm_atomic_get_new_connector_state(&state->base, connector); 282 struct drm_connector_state *old_conn_state = 283 drm_atomic_get_old_connector_state(&state->base, connector); 284 struct intel_connector *intel_connector = 285 to_intel_connector(connector); 286 struct drm_crtc *new_crtc = new_conn_state->crtc; 287 struct drm_dp_mst_topology_mgr *mgr; 288 int ret; 289 290 ret = intel_digital_connector_atomic_check(connector, &state->base); 291 if (ret) 292 return ret; 293 294 ret = intel_dp_mst_atomic_master_trans_check(intel_connector, state); 295 if (ret) 296 return ret; 297 298 if (!old_conn_state->crtc) 299 return 0; 300 301 /* We only want to free VCPI if this state disables the CRTC on this 302 * connector 303 */ 304 if (new_crtc) { 305 struct intel_crtc *intel_crtc = to_intel_crtc(new_crtc); 306 struct intel_crtc_state *crtc_state = 307 intel_atomic_get_new_crtc_state(state, intel_crtc); 308 309 if (!crtc_state || 310 !drm_atomic_crtc_needs_modeset(&crtc_state->uapi) || 311 crtc_state->uapi.enable) 312 return 0; 313 } 314 315 mgr = &enc_to_mst(to_intel_encoder(old_conn_state->best_encoder))->primary->dp.mst_mgr; 316 ret = drm_dp_atomic_release_vcpi_slots(&state->base, mgr, 317 intel_connector->port); 318 319 return ret; 320 } 321 322 static void clear_act_sent(struct intel_encoder *encoder, 323 const struct intel_crtc_state *crtc_state) 324 { 325 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 326 327 intel_de_write(i915, dp_tp_status_reg(encoder, crtc_state), 328 DP_TP_STATUS_ACT_SENT); 329 } 330 331 static void wait_for_act_sent(struct intel_encoder *encoder, 332 const struct intel_crtc_state *crtc_state) 333 { 334 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 335 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 336 struct intel_dp *intel_dp = &intel_mst->primary->dp; 337 338 if (intel_de_wait_for_set(i915, dp_tp_status_reg(encoder, crtc_state), 339 DP_TP_STATUS_ACT_SENT, 1)) 340 drm_err(&i915->drm, "Timed out waiting for ACT sent\n"); 341 342 drm_dp_check_act_status(&intel_dp->mst_mgr); 343 } 344 345 static void intel_mst_disable_dp(struct intel_atomic_state *state, 346 struct intel_encoder *encoder, 347 const struct intel_crtc_state *old_crtc_state, 348 const struct drm_connector_state *old_conn_state) 349 { 350 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 351 struct intel_digital_port *dig_port = intel_mst->primary; 352 struct intel_dp *intel_dp = &dig_port->dp; 353 struct intel_connector *connector = 354 to_intel_connector(old_conn_state->connector); 355 struct drm_i915_private *i915 = to_i915(connector->base.dev); 356 int ret; 357 358 drm_dbg_kms(&i915->drm, "active links %d\n", 359 intel_dp->active_mst_links); 360 361 intel_hdcp_disable(intel_mst->connector); 362 363 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port); 364 365 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); 366 if (ret) { 367 drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret); 368 } 369 if (old_crtc_state->has_audio) 370 intel_audio_codec_disable(encoder, 371 old_crtc_state, old_conn_state); 372 } 373 374 static void intel_mst_post_disable_dp(struct intel_atomic_state *state, 375 struct intel_encoder *encoder, 376 const struct intel_crtc_state *old_crtc_state, 377 const struct drm_connector_state *old_conn_state) 378 { 379 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 380 struct intel_digital_port *dig_port = intel_mst->primary; 381 struct intel_dp *intel_dp = &dig_port->dp; 382 struct intel_connector *connector = 383 to_intel_connector(old_conn_state->connector); 384 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 385 bool last_mst_stream; 386 u32 val; 387 388 intel_dp->active_mst_links--; 389 last_mst_stream = intel_dp->active_mst_links == 0; 390 drm_WARN_ON(&dev_priv->drm, 391 INTEL_GEN(dev_priv) >= 12 && last_mst_stream && 392 !intel_dp_mst_is_master_trans(old_crtc_state)); 393 394 intel_crtc_vblank_off(old_crtc_state); 395 396 intel_disable_pipe(old_crtc_state); 397 398 drm_dp_update_payload_part2(&intel_dp->mst_mgr); 399 400 clear_act_sent(encoder, old_crtc_state); 401 402 val = intel_de_read(dev_priv, 403 TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder)); 404 val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC; 405 intel_de_write(dev_priv, 406 TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder), 407 val); 408 409 wait_for_act_sent(encoder, old_crtc_state); 410 411 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port); 412 413 intel_ddi_disable_transcoder_func(old_crtc_state); 414 415 if (INTEL_GEN(dev_priv) >= 9) 416 skl_scaler_disable(old_crtc_state); 417 else 418 ilk_pfit_disable(old_crtc_state); 419 420 /* 421 * Power down mst path before disabling the port, otherwise we end 422 * up getting interrupts from the sink upon detecting link loss. 423 */ 424 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, 425 false); 426 427 /* 428 * BSpec 4287: disable DIP after the transcoder is disabled and before 429 * the transcoder clock select is set to none. 430 */ 431 if (last_mst_stream) 432 intel_dp_set_infoframes(&dig_port->base, false, 433 old_crtc_state, NULL); 434 /* 435 * From TGL spec: "If multi-stream slave transcoder: Configure 436 * Transcoder Clock Select to direct no clock to the transcoder" 437 * 438 * From older GENs spec: "Configure Transcoder Clock Select to direct 439 * no clock to the transcoder" 440 */ 441 if (INTEL_GEN(dev_priv) < 12 || !last_mst_stream) 442 intel_ddi_disable_pipe_clock(old_crtc_state); 443 444 445 intel_mst->connector = NULL; 446 if (last_mst_stream) 447 dig_port->base.post_disable(state, &dig_port->base, 448 old_crtc_state, NULL); 449 450 drm_dbg_kms(&dev_priv->drm, "active links %d\n", 451 intel_dp->active_mst_links); 452 } 453 454 static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state, 455 struct intel_encoder *encoder, 456 const struct intel_crtc_state *pipe_config, 457 const struct drm_connector_state *conn_state) 458 { 459 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 460 struct intel_digital_port *dig_port = intel_mst->primary; 461 struct intel_dp *intel_dp = &dig_port->dp; 462 463 if (intel_dp->active_mst_links == 0) 464 dig_port->base.pre_pll_enable(state, &dig_port->base, 465 pipe_config, NULL); 466 } 467 468 static void intel_mst_pre_enable_dp(struct intel_atomic_state *state, 469 struct intel_encoder *encoder, 470 const struct intel_crtc_state *pipe_config, 471 const struct drm_connector_state *conn_state) 472 { 473 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 474 struct intel_digital_port *dig_port = intel_mst->primary; 475 struct intel_dp *intel_dp = &dig_port->dp; 476 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 477 struct intel_connector *connector = 478 to_intel_connector(conn_state->connector); 479 int ret; 480 bool first_mst_stream; 481 482 /* MST encoders are bound to a crtc, not to a connector, 483 * force the mapping here for get_hw_state. 484 */ 485 connector->encoder = encoder; 486 intel_mst->connector = connector; 487 first_mst_stream = intel_dp->active_mst_links == 0; 488 drm_WARN_ON(&dev_priv->drm, 489 INTEL_GEN(dev_priv) >= 12 && first_mst_stream && 490 !intel_dp_mst_is_master_trans(pipe_config)); 491 492 drm_dbg_kms(&dev_priv->drm, "active links %d\n", 493 intel_dp->active_mst_links); 494 495 if (first_mst_stream) 496 intel_dp_set_power(intel_dp, DP_SET_POWER_D0); 497 498 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true); 499 500 if (first_mst_stream) 501 dig_port->base.pre_enable(state, &dig_port->base, 502 pipe_config, NULL); 503 504 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, 505 connector->port, 506 pipe_config->pbn, 507 pipe_config->dp_m_n.tu); 508 if (!ret) 509 drm_err(&dev_priv->drm, "failed to allocate vcpi\n"); 510 511 intel_dp->active_mst_links++; 512 513 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); 514 515 /* 516 * Before Gen 12 this is not done as part of 517 * dig_port->base.pre_enable() and should be done here. For 518 * Gen 12+ the step in which this should be done is different for the 519 * first MST stream, so it's done on the DDI for the first stream and 520 * here for the following ones. 521 */ 522 if (INTEL_GEN(dev_priv) < 12 || !first_mst_stream) 523 intel_ddi_enable_pipe_clock(encoder, pipe_config); 524 525 intel_ddi_set_dp_msa(pipe_config, conn_state); 526 527 intel_dp_set_m_n(pipe_config, M1_N1); 528 } 529 530 static void intel_mst_enable_dp(struct intel_atomic_state *state, 531 struct intel_encoder *encoder, 532 const struct intel_crtc_state *pipe_config, 533 const struct drm_connector_state *conn_state) 534 { 535 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 536 struct intel_digital_port *dig_port = intel_mst->primary; 537 struct intel_dp *intel_dp = &dig_port->dp; 538 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 539 u32 val; 540 541 drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder); 542 543 clear_act_sent(encoder, pipe_config); 544 545 intel_ddi_enable_transcoder_func(encoder, pipe_config); 546 547 val = intel_de_read(dev_priv, 548 TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder)); 549 val |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC; 550 intel_de_write(dev_priv, 551 TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder), 552 val); 553 554 drm_dbg_kms(&dev_priv->drm, "active links %d\n", 555 intel_dp->active_mst_links); 556 557 wait_for_act_sent(encoder, pipe_config); 558 559 drm_dp_update_payload_part2(&intel_dp->mst_mgr); 560 561 intel_enable_pipe(pipe_config); 562 563 intel_crtc_vblank_on(pipe_config); 564 565 if (pipe_config->has_audio) 566 intel_audio_codec_enable(encoder, pipe_config, conn_state); 567 568 /* Enable hdcp if it's desired */ 569 if (conn_state->content_protection == 570 DRM_MODE_CONTENT_PROTECTION_DESIRED) 571 intel_hdcp_enable(to_intel_connector(conn_state->connector), 572 pipe_config->cpu_transcoder, 573 (u8)conn_state->hdcp_content_type); 574 } 575 576 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, 577 enum pipe *pipe) 578 { 579 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 580 *pipe = intel_mst->pipe; 581 if (intel_mst->connector) 582 return true; 583 return false; 584 } 585 586 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, 587 struct intel_crtc_state *pipe_config) 588 { 589 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 590 struct intel_digital_port *dig_port = intel_mst->primary; 591 592 intel_ddi_get_config(&dig_port->base, pipe_config); 593 } 594 595 static bool intel_dp_mst_initial_fastset_check(struct intel_encoder *encoder, 596 struct intel_crtc_state *crtc_state) 597 { 598 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 599 struct intel_digital_port *dig_port = intel_mst->primary; 600 601 return intel_dp_initial_fastset_check(&dig_port->base, crtc_state); 602 } 603 604 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) 605 { 606 struct intel_connector *intel_connector = to_intel_connector(connector); 607 struct intel_dp *intel_dp = intel_connector->mst_port; 608 struct edid *edid; 609 int ret; 610 611 if (drm_connector_is_unregistered(connector)) 612 return intel_connector_update_modes(connector, NULL); 613 614 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); 615 ret = intel_connector_update_modes(connector, edid); 616 kfree(edid); 617 618 return ret; 619 } 620 621 static int 622 intel_dp_mst_connector_late_register(struct drm_connector *connector) 623 { 624 struct intel_connector *intel_connector = to_intel_connector(connector); 625 int ret; 626 627 ret = drm_dp_mst_connector_late_register(connector, 628 intel_connector->port); 629 if (ret < 0) 630 return ret; 631 632 ret = intel_connector_register(connector); 633 if (ret < 0) 634 drm_dp_mst_connector_early_unregister(connector, 635 intel_connector->port); 636 637 return ret; 638 } 639 640 static void 641 intel_dp_mst_connector_early_unregister(struct drm_connector *connector) 642 { 643 struct intel_connector *intel_connector = to_intel_connector(connector); 644 645 intel_connector_unregister(connector); 646 drm_dp_mst_connector_early_unregister(connector, 647 intel_connector->port); 648 } 649 650 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { 651 .fill_modes = drm_helper_probe_single_connector_modes, 652 .atomic_get_property = intel_digital_connector_atomic_get_property, 653 .atomic_set_property = intel_digital_connector_atomic_set_property, 654 .late_register = intel_dp_mst_connector_late_register, 655 .early_unregister = intel_dp_mst_connector_early_unregister, 656 .destroy = intel_connector_destroy, 657 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 658 .atomic_duplicate_state = intel_digital_connector_duplicate_state, 659 }; 660 661 static int intel_dp_mst_get_modes(struct drm_connector *connector) 662 { 663 return intel_dp_mst_get_ddc_modes(connector); 664 } 665 666 static int 667 intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, 668 struct drm_display_mode *mode, 669 struct drm_modeset_acquire_ctx *ctx, 670 enum drm_mode_status *status) 671 { 672 struct drm_i915_private *dev_priv = to_i915(connector->dev); 673 struct intel_connector *intel_connector = to_intel_connector(connector); 674 struct intel_dp *intel_dp = intel_connector->mst_port; 675 struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr; 676 struct drm_dp_mst_port *port = intel_connector->port; 677 const int min_bpp = 18; 678 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; 679 int max_rate, mode_rate, max_lanes, max_link_clock; 680 int ret; 681 682 if (drm_connector_is_unregistered(connector)) { 683 *status = MODE_ERROR; 684 return 0; 685 } 686 687 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) { 688 *status = MODE_NO_DBLESCAN; 689 return 0; 690 } 691 692 max_link_clock = intel_dp_max_link_rate(intel_dp); 693 max_lanes = intel_dp_max_lane_count(intel_dp); 694 695 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); 696 mode_rate = intel_dp_link_required(mode->clock, min_bpp); 697 698 ret = drm_modeset_lock(&mgr->base.lock, ctx); 699 if (ret) 700 return ret; 701 702 if (mode_rate > max_rate || mode->clock > max_dotclk || 703 drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { 704 *status = MODE_CLOCK_HIGH; 705 return 0; 706 } 707 708 if (mode->clock < 10000) { 709 *status = MODE_CLOCK_LOW; 710 return 0; 711 } 712 713 if (mode->flags & DRM_MODE_FLAG_DBLCLK) { 714 *status = MODE_H_ILLEGAL; 715 return 0; 716 } 717 718 *status = intel_mode_valid_max_plane_size(dev_priv, mode, false); 719 return 0; 720 } 721 722 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector, 723 struct drm_atomic_state *state) 724 { 725 struct drm_connector_state *connector_state = drm_atomic_get_new_connector_state(state, 726 connector); 727 struct intel_connector *intel_connector = to_intel_connector(connector); 728 struct intel_dp *intel_dp = intel_connector->mst_port; 729 struct intel_crtc *crtc = to_intel_crtc(connector_state->crtc); 730 731 return &intel_dp->mst_encoders[crtc->pipe]->base.base; 732 } 733 734 static int 735 intel_dp_mst_detect(struct drm_connector *connector, 736 struct drm_modeset_acquire_ctx *ctx, bool force) 737 { 738 struct drm_i915_private *i915 = to_i915(connector->dev); 739 struct intel_connector *intel_connector = to_intel_connector(connector); 740 struct intel_dp *intel_dp = intel_connector->mst_port; 741 742 if (!INTEL_DISPLAY_ENABLED(i915)) 743 return connector_status_disconnected; 744 745 if (drm_connector_is_unregistered(connector)) 746 return connector_status_disconnected; 747 748 return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr, 749 intel_connector->port); 750 } 751 752 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { 753 .get_modes = intel_dp_mst_get_modes, 754 .mode_valid_ctx = intel_dp_mst_mode_valid_ctx, 755 .atomic_best_encoder = intel_mst_atomic_best_encoder, 756 .atomic_check = intel_dp_mst_atomic_check, 757 .detect_ctx = intel_dp_mst_detect, 758 }; 759 760 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) 761 { 762 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(to_intel_encoder(encoder)); 763 764 drm_encoder_cleanup(encoder); 765 kfree(intel_mst); 766 } 767 768 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { 769 .destroy = intel_dp_mst_encoder_destroy, 770 }; 771 772 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) 773 { 774 if (intel_attached_encoder(connector) && connector->base.state->crtc) { 775 enum pipe pipe; 776 if (!intel_attached_encoder(connector)->get_hw_state(intel_attached_encoder(connector), &pipe)) 777 return false; 778 return true; 779 } 780 return false; 781 } 782 783 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) 784 { 785 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); 786 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); 787 struct drm_device *dev = dig_port->base.base.dev; 788 struct drm_i915_private *dev_priv = to_i915(dev); 789 struct intel_connector *intel_connector; 790 struct drm_connector *connector; 791 enum pipe pipe; 792 int ret; 793 794 intel_connector = intel_connector_alloc(); 795 if (!intel_connector) 796 return NULL; 797 798 intel_connector->get_hw_state = intel_dp_mst_get_hw_state; 799 intel_connector->mst_port = intel_dp; 800 intel_connector->port = port; 801 drm_dp_mst_get_port_malloc(port); 802 803 connector = &intel_connector->base; 804 ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, 805 DRM_MODE_CONNECTOR_DisplayPort); 806 if (ret) { 807 intel_connector_free(intel_connector); 808 return NULL; 809 } 810 811 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); 812 813 for_each_pipe(dev_priv, pipe) { 814 struct drm_encoder *enc = 815 &intel_dp->mst_encoders[pipe]->base.base; 816 817 ret = drm_connector_attach_encoder(&intel_connector->base, enc); 818 if (ret) 819 goto err; 820 } 821 822 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); 823 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); 824 825 ret = drm_connector_set_path_property(connector, pathprop); 826 if (ret) 827 goto err; 828 829 intel_attach_force_audio_property(connector); 830 intel_attach_broadcast_rgb_property(connector); 831 832 833 /* TODO: Figure out how to make HDCP work on GEN12+ */ 834 if (INTEL_GEN(dev_priv) < 12) { 835 ret = intel_dp_init_hdcp(dig_port, intel_connector); 836 if (ret) 837 DRM_DEBUG_KMS("HDCP init failed, skipping.\n"); 838 } 839 840 /* 841 * Reuse the prop from the SST connector because we're 842 * not allowed to create new props after device registration. 843 */ 844 connector->max_bpc_property = 845 intel_dp->attached_connector->base.max_bpc_property; 846 if (connector->max_bpc_property) 847 drm_connector_attach_max_bpc_property(connector, 6, 12); 848 849 return connector; 850 851 err: 852 drm_connector_cleanup(connector); 853 return NULL; 854 } 855 856 static void 857 intel_dp_mst_poll_hpd_irq(struct drm_dp_mst_topology_mgr *mgr) 858 { 859 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); 860 861 intel_hpd_trigger_irq(dp_to_dig_port(intel_dp)); 862 } 863 864 static const struct drm_dp_mst_topology_cbs mst_cbs = { 865 .add_connector = intel_dp_add_mst_connector, 866 .poll_hpd_irq = intel_dp_mst_poll_hpd_irq, 867 }; 868 869 static struct intel_dp_mst_encoder * 870 intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe pipe) 871 { 872 struct intel_dp_mst_encoder *intel_mst; 873 struct intel_encoder *intel_encoder; 874 struct drm_device *dev = dig_port->base.base.dev; 875 876 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); 877 878 if (!intel_mst) 879 return NULL; 880 881 intel_mst->pipe = pipe; 882 intel_encoder = &intel_mst->base; 883 intel_mst->primary = dig_port; 884 885 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, 886 DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe)); 887 888 intel_encoder->type = INTEL_OUTPUT_DP_MST; 889 intel_encoder->power_domain = dig_port->base.power_domain; 890 intel_encoder->port = dig_port->base.port; 891 intel_encoder->cloneable = 0; 892 /* 893 * This is wrong, but broken userspace uses the intersection 894 * of possible_crtcs of all the encoders of a given connector 895 * to figure out which crtcs can drive said connector. What 896 * should be used instead is the union of possible_crtcs. 897 * To keep such userspace functioning we must misconfigure 898 * this to make sure the intersection is not empty :( 899 */ 900 intel_encoder->pipe_mask = ~0; 901 902 intel_encoder->compute_config = intel_dp_mst_compute_config; 903 intel_encoder->compute_config_late = intel_dp_mst_compute_config_late; 904 intel_encoder->disable = intel_mst_disable_dp; 905 intel_encoder->post_disable = intel_mst_post_disable_dp; 906 intel_encoder->update_pipe = intel_ddi_update_pipe; 907 intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp; 908 intel_encoder->pre_enable = intel_mst_pre_enable_dp; 909 intel_encoder->enable = intel_mst_enable_dp; 910 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; 911 intel_encoder->get_config = intel_dp_mst_enc_get_config; 912 intel_encoder->initial_fastset_check = intel_dp_mst_initial_fastset_check; 913 914 return intel_mst; 915 916 } 917 918 static bool 919 intel_dp_create_fake_mst_encoders(struct intel_digital_port *dig_port) 920 { 921 struct intel_dp *intel_dp = &dig_port->dp; 922 struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); 923 enum pipe pipe; 924 925 for_each_pipe(dev_priv, pipe) 926 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(dig_port, pipe); 927 return true; 928 } 929 930 int 931 intel_dp_mst_encoder_active_links(struct intel_digital_port *dig_port) 932 { 933 return dig_port->dp.active_mst_links; 934 } 935 936 int 937 intel_dp_mst_encoder_init(struct intel_digital_port *dig_port, int conn_base_id) 938 { 939 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); 940 struct intel_dp *intel_dp = &dig_port->dp; 941 enum port port = dig_port->base.port; 942 int ret; 943 944 if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp)) 945 return 0; 946 947 if (INTEL_GEN(i915) < 12 && port == PORT_A) 948 return 0; 949 950 if (INTEL_GEN(i915) < 11 && port == PORT_E) 951 return 0; 952 953 intel_dp->mst_mgr.cbs = &mst_cbs; 954 955 /* create encoders */ 956 intel_dp_create_fake_mst_encoders(dig_port); 957 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm, 958 &intel_dp->aux, 16, 3, conn_base_id); 959 if (ret) 960 return ret; 961 962 intel_dp->can_mst = true; 963 964 return 0; 965 } 966 967 void 968 intel_dp_mst_encoder_cleanup(struct intel_digital_port *dig_port) 969 { 970 struct intel_dp *intel_dp = &dig_port->dp; 971 972 if (!intel_dp->can_mst) 973 return; 974 975 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); 976 /* encoders will get killed by normal cleanup */ 977 } 978 979 bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state) 980 { 981 return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder; 982 } 983 984 bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state) 985 { 986 return crtc_state->mst_master_transcoder != INVALID_TRANSCODER && 987 crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder; 988 } 989