1 /* 2 * Copyright © 2008 Intel Corporation 3 * 2014 Red Hat Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 * 24 */ 25 26 #include <drm/drm_atomic_helper.h> 27 #include <drm/drm_edid.h> 28 #include <drm/drm_probe_helper.h> 29 30 #include "i915_drv.h" 31 #include "intel_atomic.h" 32 #include "intel_audio.h" 33 #include "intel_connector.h" 34 #include "intel_ddi.h" 35 #include "intel_display_types.h" 36 #include "intel_hotplug.h" 37 #include "intel_dp.h" 38 #include "intel_dp_mst.h" 39 #include "intel_dpio_phy.h" 40 41 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder, 42 struct intel_crtc_state *crtc_state, 43 struct drm_connector_state *conn_state, 44 struct link_config_limits *limits) 45 { 46 struct drm_atomic_state *state = crtc_state->uapi.state; 47 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 48 struct intel_dp *intel_dp = &intel_mst->primary->dp; 49 struct intel_connector *connector = 50 to_intel_connector(conn_state->connector); 51 struct drm_i915_private *i915 = to_i915(connector->base.dev); 52 const struct drm_display_mode *adjusted_mode = 53 &crtc_state->hw.adjusted_mode; 54 bool constant_n = drm_dp_has_quirk(&intel_dp->desc, 0, 55 DP_DPCD_QUIRK_CONSTANT_N); 56 int bpp, slots = -EINVAL; 57 58 crtc_state->lane_count = limits->max_lane_count; 59 crtc_state->port_clock = limits->max_clock; 60 61 for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) { 62 crtc_state->pipe_bpp = bpp; 63 64 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, 65 crtc_state->pipe_bpp, 66 false); 67 68 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr, 69 connector->port, 70 crtc_state->pbn, 0); 71 if (slots == -EDEADLK) 72 return slots; 73 if (slots >= 0) 74 break; 75 } 76 77 if (slots < 0) { 78 drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n", 79 slots); 80 return slots; 81 } 82 83 intel_link_compute_m_n(crtc_state->pipe_bpp, 84 crtc_state->lane_count, 85 adjusted_mode->crtc_clock, 86 crtc_state->port_clock, 87 &crtc_state->dp_m_n, 88 constant_n, crtc_state->fec_enable); 89 crtc_state->dp_m_n.tu = slots; 90 91 return 0; 92 } 93 94 static int intel_dp_mst_compute_config(struct intel_encoder *encoder, 95 struct intel_crtc_state *pipe_config, 96 struct drm_connector_state *conn_state) 97 { 98 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 99 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 100 struct intel_dp *intel_dp = &intel_mst->primary->dp; 101 struct intel_connector *connector = 102 to_intel_connector(conn_state->connector); 103 struct intel_digital_connector_state *intel_conn_state = 104 to_intel_digital_connector_state(conn_state); 105 const struct drm_display_mode *adjusted_mode = 106 &pipe_config->hw.adjusted_mode; 107 struct link_config_limits limits; 108 int ret; 109 110 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) 111 return -EINVAL; 112 113 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; 114 pipe_config->has_pch_encoder = false; 115 116 if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO) 117 pipe_config->has_audio = connector->port->has_audio; 118 else 119 pipe_config->has_audio = 120 intel_conn_state->force_audio == HDMI_AUDIO_ON; 121 122 /* 123 * for MST we always configure max link bw - the spec doesn't 124 * seem to suggest we should do otherwise. 125 */ 126 limits.min_clock = 127 limits.max_clock = intel_dp_max_link_rate(intel_dp); 128 129 limits.min_lane_count = 130 limits.max_lane_count = intel_dp_max_lane_count(intel_dp); 131 132 limits.min_bpp = intel_dp_min_bpp(pipe_config); 133 /* 134 * FIXME: If all the streams can't fit into the link with 135 * their current pipe_bpp we should reduce pipe_bpp across 136 * the board until things start to fit. Until then we 137 * limit to <= 8bpc since that's what was hardcoded for all 138 * MST streams previously. This hack should be removed once 139 * we have the proper retry logic in place. 140 */ 141 limits.max_bpp = min(pipe_config->pipe_bpp, 24); 142 143 intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits); 144 145 ret = intel_dp_mst_compute_link_config(encoder, pipe_config, 146 conn_state, &limits); 147 if (ret) 148 return ret; 149 150 pipe_config->limited_color_range = 151 intel_dp_limited_color_range(pipe_config, conn_state); 152 153 if (IS_GEN9_LP(dev_priv)) 154 pipe_config->lane_lat_optim_mask = 155 bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count); 156 157 intel_ddi_compute_min_voltage_level(dev_priv, pipe_config); 158 159 return 0; 160 } 161 162 /* 163 * Iterate over all connectors and return a mask of 164 * all CPU transcoders streaming over the same DP link. 165 */ 166 static unsigned int 167 intel_dp_mst_transcoder_mask(struct intel_atomic_state *state, 168 struct intel_dp *mst_port) 169 { 170 struct drm_i915_private *dev_priv = to_i915(state->base.dev); 171 const struct intel_digital_connector_state *conn_state; 172 struct intel_connector *connector; 173 u8 transcoders = 0; 174 int i; 175 176 if (INTEL_GEN(dev_priv) < 12) 177 return 0; 178 179 for_each_new_intel_connector_in_state(state, connector, conn_state, i) { 180 const struct intel_crtc_state *crtc_state; 181 struct intel_crtc *crtc; 182 183 if (connector->mst_port != mst_port || !conn_state->base.crtc) 184 continue; 185 186 crtc = to_intel_crtc(conn_state->base.crtc); 187 crtc_state = intel_atomic_get_new_crtc_state(state, crtc); 188 189 if (!crtc_state->hw.active) 190 continue; 191 192 transcoders |= BIT(crtc_state->cpu_transcoder); 193 } 194 195 return transcoders; 196 } 197 198 static int intel_dp_mst_compute_config_late(struct intel_encoder *encoder, 199 struct intel_crtc_state *crtc_state, 200 struct drm_connector_state *conn_state) 201 { 202 struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state); 203 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 204 struct intel_dp *intel_dp = &intel_mst->primary->dp; 205 206 /* lowest numbered transcoder will be designated master */ 207 crtc_state->mst_master_transcoder = 208 ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1; 209 210 return 0; 211 } 212 213 /* 214 * If one of the connectors in a MST stream needs a modeset, mark all CRTCs 215 * that shares the same MST stream as mode changed, 216 * intel_modeset_pipe_config()+intel_crtc_check_fastset() will take care to do 217 * a fastset when possible. 218 */ 219 static int 220 intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector, 221 struct intel_atomic_state *state) 222 { 223 struct drm_i915_private *dev_priv = to_i915(state->base.dev); 224 struct drm_connector_list_iter connector_list_iter; 225 struct intel_connector *connector_iter; 226 227 if (INTEL_GEN(dev_priv) < 12) 228 return 0; 229 230 if (!intel_connector_needs_modeset(state, &connector->base)) 231 return 0; 232 233 drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter); 234 for_each_intel_connector_iter(connector_iter, &connector_list_iter) { 235 struct intel_digital_connector_state *conn_iter_state; 236 struct intel_crtc_state *crtc_state; 237 struct intel_crtc *crtc; 238 int ret; 239 240 if (connector_iter->mst_port != connector->mst_port || 241 connector_iter == connector) 242 continue; 243 244 conn_iter_state = intel_atomic_get_digital_connector_state(state, 245 connector_iter); 246 if (IS_ERR(conn_iter_state)) { 247 drm_connector_list_iter_end(&connector_list_iter); 248 return PTR_ERR(conn_iter_state); 249 } 250 251 if (!conn_iter_state->base.crtc) 252 continue; 253 254 crtc = to_intel_crtc(conn_iter_state->base.crtc); 255 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); 256 if (IS_ERR(crtc_state)) { 257 drm_connector_list_iter_end(&connector_list_iter); 258 return PTR_ERR(crtc_state); 259 } 260 261 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base); 262 if (ret) { 263 drm_connector_list_iter_end(&connector_list_iter); 264 return ret; 265 } 266 crtc_state->uapi.mode_changed = true; 267 } 268 drm_connector_list_iter_end(&connector_list_iter); 269 270 return 0; 271 } 272 273 static int 274 intel_dp_mst_atomic_check(struct drm_connector *connector, 275 struct drm_atomic_state *_state) 276 { 277 struct intel_atomic_state *state = to_intel_atomic_state(_state); 278 struct drm_connector_state *new_conn_state = 279 drm_atomic_get_new_connector_state(&state->base, connector); 280 struct drm_connector_state *old_conn_state = 281 drm_atomic_get_old_connector_state(&state->base, connector); 282 struct intel_connector *intel_connector = 283 to_intel_connector(connector); 284 struct drm_crtc *new_crtc = new_conn_state->crtc; 285 struct drm_dp_mst_topology_mgr *mgr; 286 int ret; 287 288 ret = intel_digital_connector_atomic_check(connector, &state->base); 289 if (ret) 290 return ret; 291 292 ret = intel_dp_mst_atomic_master_trans_check(intel_connector, state); 293 if (ret) 294 return ret; 295 296 if (!old_conn_state->crtc) 297 return 0; 298 299 /* We only want to free VCPI if this state disables the CRTC on this 300 * connector 301 */ 302 if (new_crtc) { 303 struct intel_crtc *intel_crtc = to_intel_crtc(new_crtc); 304 struct intel_crtc_state *crtc_state = 305 intel_atomic_get_new_crtc_state(state, intel_crtc); 306 307 if (!crtc_state || 308 !drm_atomic_crtc_needs_modeset(&crtc_state->uapi) || 309 crtc_state->uapi.enable) 310 return 0; 311 } 312 313 mgr = &enc_to_mst(to_intel_encoder(old_conn_state->best_encoder))->primary->dp.mst_mgr; 314 ret = drm_dp_atomic_release_vcpi_slots(&state->base, mgr, 315 intel_connector->port); 316 317 return ret; 318 } 319 320 static void clear_act_sent(struct intel_dp *intel_dp) 321 { 322 struct drm_i915_private *i915 = dp_to_i915(intel_dp); 323 324 intel_de_write(i915, intel_dp->regs.dp_tp_status, 325 DP_TP_STATUS_ACT_SENT); 326 } 327 328 static void wait_for_act_sent(struct intel_dp *intel_dp) 329 { 330 struct drm_i915_private *i915 = dp_to_i915(intel_dp); 331 332 if (intel_de_wait_for_set(i915, intel_dp->regs.dp_tp_status, 333 DP_TP_STATUS_ACT_SENT, 1)) 334 drm_err(&i915->drm, "Timed out waiting for ACT sent\n"); 335 336 drm_dp_check_act_status(&intel_dp->mst_mgr); 337 } 338 339 static void intel_mst_disable_dp(struct intel_atomic_state *state, 340 struct intel_encoder *encoder, 341 const struct intel_crtc_state *old_crtc_state, 342 const struct drm_connector_state *old_conn_state) 343 { 344 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 345 struct intel_digital_port *dig_port = intel_mst->primary; 346 struct intel_dp *intel_dp = &dig_port->dp; 347 struct intel_connector *connector = 348 to_intel_connector(old_conn_state->connector); 349 struct drm_i915_private *i915 = to_i915(connector->base.dev); 350 int ret; 351 352 drm_dbg_kms(&i915->drm, "active links %d\n", 353 intel_dp->active_mst_links); 354 355 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port); 356 357 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); 358 if (ret) { 359 drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret); 360 } 361 if (old_crtc_state->has_audio) 362 intel_audio_codec_disable(encoder, 363 old_crtc_state, old_conn_state); 364 } 365 366 static void intel_mst_post_disable_dp(struct intel_atomic_state *state, 367 struct intel_encoder *encoder, 368 const struct intel_crtc_state *old_crtc_state, 369 const struct drm_connector_state *old_conn_state) 370 { 371 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 372 struct intel_digital_port *dig_port = intel_mst->primary; 373 struct intel_dp *intel_dp = &dig_port->dp; 374 struct intel_connector *connector = 375 to_intel_connector(old_conn_state->connector); 376 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 377 bool last_mst_stream; 378 u32 val; 379 380 intel_dp->active_mst_links--; 381 last_mst_stream = intel_dp->active_mst_links == 0; 382 drm_WARN_ON(&dev_priv->drm, 383 INTEL_GEN(dev_priv) >= 12 && last_mst_stream && 384 !intel_dp_mst_is_master_trans(old_crtc_state)); 385 386 intel_crtc_vblank_off(old_crtc_state); 387 388 intel_disable_pipe(old_crtc_state); 389 390 drm_dp_update_payload_part2(&intel_dp->mst_mgr); 391 392 clear_act_sent(intel_dp); 393 394 val = intel_de_read(dev_priv, 395 TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder)); 396 val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC; 397 intel_de_write(dev_priv, 398 TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder), 399 val); 400 401 wait_for_act_sent(intel_dp); 402 403 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port); 404 405 intel_ddi_disable_transcoder_func(old_crtc_state); 406 407 if (INTEL_GEN(dev_priv) >= 9) 408 skl_scaler_disable(old_crtc_state); 409 else 410 ilk_pfit_disable(old_crtc_state); 411 412 /* 413 * Power down mst path before disabling the port, otherwise we end 414 * up getting interrupts from the sink upon detecting link loss. 415 */ 416 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, 417 false); 418 419 /* 420 * BSpec 4287: disable DIP after the transcoder is disabled and before 421 * the transcoder clock select is set to none. 422 */ 423 if (last_mst_stream) 424 intel_dp_set_infoframes(&dig_port->base, false, 425 old_crtc_state, NULL); 426 /* 427 * From TGL spec: "If multi-stream slave transcoder: Configure 428 * Transcoder Clock Select to direct no clock to the transcoder" 429 * 430 * From older GENs spec: "Configure Transcoder Clock Select to direct 431 * no clock to the transcoder" 432 */ 433 if (INTEL_GEN(dev_priv) < 12 || !last_mst_stream) 434 intel_ddi_disable_pipe_clock(old_crtc_state); 435 436 437 intel_mst->connector = NULL; 438 if (last_mst_stream) 439 dig_port->base.post_disable(state, &dig_port->base, 440 old_crtc_state, NULL); 441 442 drm_dbg_kms(&dev_priv->drm, "active links %d\n", 443 intel_dp->active_mst_links); 444 } 445 446 static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state, 447 struct intel_encoder *encoder, 448 const struct intel_crtc_state *pipe_config, 449 const struct drm_connector_state *conn_state) 450 { 451 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 452 struct intel_digital_port *dig_port = intel_mst->primary; 453 struct intel_dp *intel_dp = &dig_port->dp; 454 455 if (intel_dp->active_mst_links == 0) 456 dig_port->base.pre_pll_enable(state, &dig_port->base, 457 pipe_config, NULL); 458 } 459 460 static void intel_mst_pre_enable_dp(struct intel_atomic_state *state, 461 struct intel_encoder *encoder, 462 const struct intel_crtc_state *pipe_config, 463 const struct drm_connector_state *conn_state) 464 { 465 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 466 struct intel_digital_port *dig_port = intel_mst->primary; 467 struct intel_dp *intel_dp = &dig_port->dp; 468 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 469 struct intel_connector *connector = 470 to_intel_connector(conn_state->connector); 471 int ret; 472 bool first_mst_stream; 473 474 /* MST encoders are bound to a crtc, not to a connector, 475 * force the mapping here for get_hw_state. 476 */ 477 connector->encoder = encoder; 478 intel_mst->connector = connector; 479 first_mst_stream = intel_dp->active_mst_links == 0; 480 drm_WARN_ON(&dev_priv->drm, 481 INTEL_GEN(dev_priv) >= 12 && first_mst_stream && 482 !intel_dp_mst_is_master_trans(pipe_config)); 483 484 drm_dbg_kms(&dev_priv->drm, "active links %d\n", 485 intel_dp->active_mst_links); 486 487 if (first_mst_stream) 488 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); 489 490 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true); 491 492 if (first_mst_stream) 493 dig_port->base.pre_enable(state, &dig_port->base, 494 pipe_config, NULL); 495 496 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, 497 connector->port, 498 pipe_config->pbn, 499 pipe_config->dp_m_n.tu); 500 if (!ret) 501 drm_err(&dev_priv->drm, "failed to allocate vcpi\n"); 502 503 intel_dp->active_mst_links++; 504 505 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); 506 507 /* 508 * Before Gen 12 this is not done as part of 509 * dig_port->base.pre_enable() and should be done here. For 510 * Gen 12+ the step in which this should be done is different for the 511 * first MST stream, so it's done on the DDI for the first stream and 512 * here for the following ones. 513 */ 514 if (INTEL_GEN(dev_priv) < 12 || !first_mst_stream) 515 intel_ddi_enable_pipe_clock(encoder, pipe_config); 516 517 intel_ddi_set_dp_msa(pipe_config, conn_state); 518 519 intel_dp_set_m_n(pipe_config, M1_N1); 520 } 521 522 static void intel_mst_enable_dp(struct intel_atomic_state *state, 523 struct intel_encoder *encoder, 524 const struct intel_crtc_state *pipe_config, 525 const struct drm_connector_state *conn_state) 526 { 527 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 528 struct intel_digital_port *dig_port = intel_mst->primary; 529 struct intel_dp *intel_dp = &dig_port->dp; 530 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 531 u32 val; 532 533 drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder); 534 535 clear_act_sent(intel_dp); 536 537 intel_ddi_enable_transcoder_func(encoder, pipe_config); 538 539 val = intel_de_read(dev_priv, 540 TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder)); 541 val |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC; 542 intel_de_write(dev_priv, 543 TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder), 544 val); 545 546 drm_dbg_kms(&dev_priv->drm, "active links %d\n", 547 intel_dp->active_mst_links); 548 549 wait_for_act_sent(intel_dp); 550 551 drm_dp_update_payload_part2(&intel_dp->mst_mgr); 552 553 intel_enable_pipe(pipe_config); 554 555 intel_crtc_vblank_on(pipe_config); 556 557 if (pipe_config->has_audio) 558 intel_audio_codec_enable(encoder, pipe_config, conn_state); 559 } 560 561 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, 562 enum pipe *pipe) 563 { 564 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 565 *pipe = intel_mst->pipe; 566 if (intel_mst->connector) 567 return true; 568 return false; 569 } 570 571 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, 572 struct intel_crtc_state *pipe_config) 573 { 574 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); 575 struct intel_digital_port *dig_port = intel_mst->primary; 576 577 intel_ddi_get_config(&dig_port->base, pipe_config); 578 } 579 580 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) 581 { 582 struct intel_connector *intel_connector = to_intel_connector(connector); 583 struct intel_dp *intel_dp = intel_connector->mst_port; 584 struct edid *edid; 585 int ret; 586 587 if (drm_connector_is_unregistered(connector)) 588 return intel_connector_update_modes(connector, NULL); 589 590 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); 591 ret = intel_connector_update_modes(connector, edid); 592 kfree(edid); 593 594 return ret; 595 } 596 597 static int 598 intel_dp_mst_connector_late_register(struct drm_connector *connector) 599 { 600 struct intel_connector *intel_connector = to_intel_connector(connector); 601 int ret; 602 603 ret = drm_dp_mst_connector_late_register(connector, 604 intel_connector->port); 605 if (ret < 0) 606 return ret; 607 608 ret = intel_connector_register(connector); 609 if (ret < 0) 610 drm_dp_mst_connector_early_unregister(connector, 611 intel_connector->port); 612 613 return ret; 614 } 615 616 static void 617 intel_dp_mst_connector_early_unregister(struct drm_connector *connector) 618 { 619 struct intel_connector *intel_connector = to_intel_connector(connector); 620 621 intel_connector_unregister(connector); 622 drm_dp_mst_connector_early_unregister(connector, 623 intel_connector->port); 624 } 625 626 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { 627 .fill_modes = drm_helper_probe_single_connector_modes, 628 .atomic_get_property = intel_digital_connector_atomic_get_property, 629 .atomic_set_property = intel_digital_connector_atomic_set_property, 630 .late_register = intel_dp_mst_connector_late_register, 631 .early_unregister = intel_dp_mst_connector_early_unregister, 632 .destroy = intel_connector_destroy, 633 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 634 .atomic_duplicate_state = intel_digital_connector_duplicate_state, 635 }; 636 637 static int intel_dp_mst_get_modes(struct drm_connector *connector) 638 { 639 return intel_dp_mst_get_ddc_modes(connector); 640 } 641 642 static int 643 intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, 644 struct drm_display_mode *mode, 645 struct drm_modeset_acquire_ctx *ctx, 646 enum drm_mode_status *status) 647 { 648 struct drm_i915_private *dev_priv = to_i915(connector->dev); 649 struct intel_connector *intel_connector = to_intel_connector(connector); 650 struct intel_dp *intel_dp = intel_connector->mst_port; 651 struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr; 652 struct drm_dp_mst_port *port = intel_connector->port; 653 const int min_bpp = 18; 654 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; 655 int max_rate, mode_rate, max_lanes, max_link_clock; 656 int ret; 657 658 if (drm_connector_is_unregistered(connector)) { 659 *status = MODE_ERROR; 660 return 0; 661 } 662 663 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) { 664 *status = MODE_NO_DBLESCAN; 665 return 0; 666 } 667 668 max_link_clock = intel_dp_max_link_rate(intel_dp); 669 max_lanes = intel_dp_max_lane_count(intel_dp); 670 671 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); 672 mode_rate = intel_dp_link_required(mode->clock, min_bpp); 673 674 ret = drm_modeset_lock(&mgr->base.lock, ctx); 675 if (ret) 676 return ret; 677 678 if (mode_rate > max_rate || mode->clock > max_dotclk || 679 drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) { 680 *status = MODE_CLOCK_HIGH; 681 return 0; 682 } 683 684 if (mode->clock < 10000) { 685 *status = MODE_CLOCK_LOW; 686 return 0; 687 } 688 689 if (mode->flags & DRM_MODE_FLAG_DBLCLK) { 690 *status = MODE_H_ILLEGAL; 691 return 0; 692 } 693 694 *status = intel_mode_valid_max_plane_size(dev_priv, mode); 695 return 0; 696 } 697 698 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector, 699 struct drm_connector_state *state) 700 { 701 struct intel_connector *intel_connector = to_intel_connector(connector); 702 struct intel_dp *intel_dp = intel_connector->mst_port; 703 struct intel_crtc *crtc = to_intel_crtc(state->crtc); 704 705 return &intel_dp->mst_encoders[crtc->pipe]->base.base; 706 } 707 708 static int 709 intel_dp_mst_detect(struct drm_connector *connector, 710 struct drm_modeset_acquire_ctx *ctx, bool force) 711 { 712 struct intel_connector *intel_connector = to_intel_connector(connector); 713 struct intel_dp *intel_dp = intel_connector->mst_port; 714 715 if (drm_connector_is_unregistered(connector)) 716 return connector_status_disconnected; 717 718 return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr, 719 intel_connector->port); 720 } 721 722 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { 723 .get_modes = intel_dp_mst_get_modes, 724 .mode_valid_ctx = intel_dp_mst_mode_valid_ctx, 725 .atomic_best_encoder = intel_mst_atomic_best_encoder, 726 .atomic_check = intel_dp_mst_atomic_check, 727 .detect_ctx = intel_dp_mst_detect, 728 }; 729 730 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) 731 { 732 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(to_intel_encoder(encoder)); 733 734 drm_encoder_cleanup(encoder); 735 kfree(intel_mst); 736 } 737 738 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { 739 .destroy = intel_dp_mst_encoder_destroy, 740 }; 741 742 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) 743 { 744 if (intel_attached_encoder(connector) && connector->base.state->crtc) { 745 enum pipe pipe; 746 if (!intel_attached_encoder(connector)->get_hw_state(intel_attached_encoder(connector), &pipe)) 747 return false; 748 return true; 749 } 750 return false; 751 } 752 753 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) 754 { 755 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); 756 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); 757 struct drm_device *dev = dig_port->base.base.dev; 758 struct drm_i915_private *dev_priv = to_i915(dev); 759 struct intel_connector *intel_connector; 760 struct drm_connector *connector; 761 enum pipe pipe; 762 int ret; 763 764 intel_connector = intel_connector_alloc(); 765 if (!intel_connector) 766 return NULL; 767 768 intel_connector->get_hw_state = intel_dp_mst_get_hw_state; 769 intel_connector->mst_port = intel_dp; 770 intel_connector->port = port; 771 drm_dp_mst_get_port_malloc(port); 772 773 connector = &intel_connector->base; 774 ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, 775 DRM_MODE_CONNECTOR_DisplayPort); 776 if (ret) { 777 intel_connector_free(intel_connector); 778 return NULL; 779 } 780 781 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); 782 783 for_each_pipe(dev_priv, pipe) { 784 struct drm_encoder *enc = 785 &intel_dp->mst_encoders[pipe]->base.base; 786 787 ret = drm_connector_attach_encoder(&intel_connector->base, enc); 788 if (ret) 789 goto err; 790 } 791 792 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); 793 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); 794 795 ret = drm_connector_set_path_property(connector, pathprop); 796 if (ret) 797 goto err; 798 799 intel_attach_force_audio_property(connector); 800 intel_attach_broadcast_rgb_property(connector); 801 802 /* 803 * Reuse the prop from the SST connector because we're 804 * not allowed to create new props after device registration. 805 */ 806 connector->max_bpc_property = 807 intel_dp->attached_connector->base.max_bpc_property; 808 if (connector->max_bpc_property) 809 drm_connector_attach_max_bpc_property(connector, 6, 12); 810 811 return connector; 812 813 err: 814 drm_connector_cleanup(connector); 815 return NULL; 816 } 817 818 static void 819 intel_dp_mst_poll_hpd_irq(struct drm_dp_mst_topology_mgr *mgr) 820 { 821 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); 822 823 intel_hpd_trigger_irq(dp_to_dig_port(intel_dp)); 824 } 825 826 static const struct drm_dp_mst_topology_cbs mst_cbs = { 827 .add_connector = intel_dp_add_mst_connector, 828 .poll_hpd_irq = intel_dp_mst_poll_hpd_irq, 829 }; 830 831 static struct intel_dp_mst_encoder * 832 intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe pipe) 833 { 834 struct intel_dp_mst_encoder *intel_mst; 835 struct intel_encoder *intel_encoder; 836 struct drm_device *dev = dig_port->base.base.dev; 837 838 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); 839 840 if (!intel_mst) 841 return NULL; 842 843 intel_mst->pipe = pipe; 844 intel_encoder = &intel_mst->base; 845 intel_mst->primary = dig_port; 846 847 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, 848 DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe)); 849 850 intel_encoder->type = INTEL_OUTPUT_DP_MST; 851 intel_encoder->power_domain = dig_port->base.power_domain; 852 intel_encoder->port = dig_port->base.port; 853 intel_encoder->cloneable = 0; 854 /* 855 * This is wrong, but broken userspace uses the intersection 856 * of possible_crtcs of all the encoders of a given connector 857 * to figure out which crtcs can drive said connector. What 858 * should be used instead is the union of possible_crtcs. 859 * To keep such userspace functioning we must misconfigure 860 * this to make sure the intersection is not empty :( 861 */ 862 intel_encoder->pipe_mask = ~0; 863 864 intel_encoder->compute_config = intel_dp_mst_compute_config; 865 intel_encoder->compute_config_late = intel_dp_mst_compute_config_late; 866 intel_encoder->disable = intel_mst_disable_dp; 867 intel_encoder->post_disable = intel_mst_post_disable_dp; 868 intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp; 869 intel_encoder->pre_enable = intel_mst_pre_enable_dp; 870 intel_encoder->enable = intel_mst_enable_dp; 871 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; 872 intel_encoder->get_config = intel_dp_mst_enc_get_config; 873 874 return intel_mst; 875 876 } 877 878 static bool 879 intel_dp_create_fake_mst_encoders(struct intel_digital_port *dig_port) 880 { 881 struct intel_dp *intel_dp = &dig_port->dp; 882 struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); 883 enum pipe pipe; 884 885 for_each_pipe(dev_priv, pipe) 886 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(dig_port, pipe); 887 return true; 888 } 889 890 int 891 intel_dp_mst_encoder_active_links(struct intel_digital_port *dig_port) 892 { 893 return dig_port->dp.active_mst_links; 894 } 895 896 int 897 intel_dp_mst_encoder_init(struct intel_digital_port *dig_port, int conn_base_id) 898 { 899 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); 900 struct intel_dp *intel_dp = &dig_port->dp; 901 enum port port = dig_port->base.port; 902 int ret; 903 904 if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp)) 905 return 0; 906 907 if (INTEL_GEN(i915) < 12 && port == PORT_A) 908 return 0; 909 910 if (INTEL_GEN(i915) < 11 && port == PORT_E) 911 return 0; 912 913 intel_dp->mst_mgr.cbs = &mst_cbs; 914 915 /* create encoders */ 916 intel_dp_create_fake_mst_encoders(dig_port); 917 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm, 918 &intel_dp->aux, 16, 3, conn_base_id); 919 if (ret) 920 return ret; 921 922 intel_dp->can_mst = true; 923 924 return 0; 925 } 926 927 void 928 intel_dp_mst_encoder_cleanup(struct intel_digital_port *dig_port) 929 { 930 struct intel_dp *intel_dp = &dig_port->dp; 931 932 if (!intel_dp->can_mst) 933 return; 934 935 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); 936 /* encoders will get killed by normal cleanup */ 937 } 938 939 bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state) 940 { 941 return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder; 942 } 943 944 bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state) 945 { 946 return crtc_state->mst_master_transcoder != INVALID_TRANSCODER && 947 crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder; 948 } 949