1 /* 2 * Copyright © 2015 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 */ 24 25 #include "intel_display_types.h" 26 #include "intel_dp_aux_backlight.h" 27 28 static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable) 29 { 30 u8 reg_val = 0; 31 32 /* Early return when display use other mechanism to enable backlight. */ 33 if (!(intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP)) 34 return; 35 36 if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, 37 ®_val) < 0) { 38 DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", 39 DP_EDP_DISPLAY_CONTROL_REGISTER); 40 return; 41 } 42 if (enable) 43 reg_val |= DP_EDP_BACKLIGHT_ENABLE; 44 else 45 reg_val &= ~(DP_EDP_BACKLIGHT_ENABLE); 46 47 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, 48 reg_val) != 1) { 49 DRM_DEBUG_KMS("Failed to %s aux backlight\n", 50 enable ? "enable" : "disable"); 51 } 52 } 53 54 /* 55 * Read the current backlight value from DPCD register(s) based 56 * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported 57 */ 58 static u32 intel_dp_aux_get_backlight(struct intel_connector *connector) 59 { 60 struct intel_dp *intel_dp = intel_attached_dp(connector); 61 u8 read_val[2] = { 0x0 }; 62 u8 mode_reg; 63 u16 level = 0; 64 65 if (drm_dp_dpcd_readb(&intel_dp->aux, 66 DP_EDP_BACKLIGHT_MODE_SET_REGISTER, 67 &mode_reg) != 1) { 68 DRM_DEBUG_KMS("Failed to read the DPCD register 0x%x\n", 69 DP_EDP_BACKLIGHT_MODE_SET_REGISTER); 70 return 0; 71 } 72 73 /* 74 * If we're not in DPCD control mode yet, the programmed brightness 75 * value is meaningless and we should assume max brightness 76 */ 77 if ((mode_reg & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK) != 78 DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD) 79 return connector->panel.backlight.max; 80 81 if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, 82 &read_val, sizeof(read_val)) < 0) { 83 DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", 84 DP_EDP_BACKLIGHT_BRIGHTNESS_MSB); 85 return 0; 86 } 87 level = read_val[0]; 88 if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) 89 level = (read_val[0] << 8 | read_val[1]); 90 91 return level; 92 } 93 94 /* 95 * Sends the current backlight level over the aux channel, checking if its using 96 * 8-bit or 16 bit value (MSB and LSB) 97 */ 98 static void 99 intel_dp_aux_set_backlight(const struct drm_connector_state *conn_state, u32 level) 100 { 101 struct intel_connector *connector = to_intel_connector(conn_state->connector); 102 struct intel_dp *intel_dp = intel_attached_dp(connector); 103 u8 vals[2] = { 0x0 }; 104 105 vals[0] = level; 106 107 /* Write the MSB and/or LSB */ 108 if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) { 109 vals[0] = (level & 0xFF00) >> 8; 110 vals[1] = (level & 0xFF); 111 } 112 if (drm_dp_dpcd_write(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, 113 vals, sizeof(vals)) < 0) { 114 DRM_DEBUG_KMS("Failed to write aux backlight level\n"); 115 return; 116 } 117 } 118 119 /* 120 * Set PWM Frequency divider to match desired frequency in vbt. 121 * The PWM Frequency is calculated as 27Mhz / (F x P). 122 * - Where F = PWM Frequency Pre-Divider value programmed by field 7:0 of the 123 * EDP_BACKLIGHT_FREQ_SET register (DPCD Address 00728h) 124 * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the 125 * EDP_PWMGEN_BIT_COUNT register (DPCD Address 00724h) 126 */ 127 static bool intel_dp_aux_set_pwm_freq(struct intel_connector *connector) 128 { 129 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 130 struct intel_dp *intel_dp = intel_attached_dp(connector); 131 const u8 pn = connector->panel.backlight.pwmgen_bit_count; 132 int freq, fxp, f, fxp_actual, fxp_min, fxp_max; 133 134 freq = dev_priv->vbt.backlight.pwm_freq_hz; 135 if (!freq) { 136 DRM_DEBUG_KMS("Use panel default backlight frequency\n"); 137 return false; 138 } 139 140 fxp = DIV_ROUND_CLOSEST(KHz(DP_EDP_BACKLIGHT_FREQ_BASE_KHZ), freq); 141 f = clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255); 142 fxp_actual = f << pn; 143 144 /* Ensure frequency is within 25% of desired value */ 145 fxp_min = DIV_ROUND_CLOSEST(fxp * 3, 4); 146 fxp_max = DIV_ROUND_CLOSEST(fxp * 5, 4); 147 148 if (fxp_min > fxp_actual || fxp_actual > fxp_max) { 149 DRM_DEBUG_KMS("Actual frequency out of range\n"); 150 return false; 151 } 152 153 if (drm_dp_dpcd_writeb(&intel_dp->aux, 154 DP_EDP_BACKLIGHT_FREQ_SET, (u8) f) < 0) { 155 DRM_DEBUG_KMS("Failed to write aux backlight freq\n"); 156 return false; 157 } 158 return true; 159 } 160 161 static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_state, 162 const struct drm_connector_state *conn_state) 163 { 164 struct intel_connector *connector = to_intel_connector(conn_state->connector); 165 struct intel_dp *intel_dp = intel_attached_dp(connector); 166 struct intel_panel *panel = &connector->panel; 167 u8 dpcd_buf, new_dpcd_buf, edp_backlight_mode; 168 169 if (drm_dp_dpcd_readb(&intel_dp->aux, 170 DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) != 1) { 171 DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", 172 DP_EDP_BACKLIGHT_MODE_SET_REGISTER); 173 return; 174 } 175 176 new_dpcd_buf = dpcd_buf; 177 edp_backlight_mode = dpcd_buf & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK; 178 179 switch (edp_backlight_mode) { 180 case DP_EDP_BACKLIGHT_CONTROL_MODE_PWM: 181 case DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET: 182 case DP_EDP_BACKLIGHT_CONTROL_MODE_PRODUCT: 183 new_dpcd_buf &= ~DP_EDP_BACKLIGHT_CONTROL_MODE_MASK; 184 new_dpcd_buf |= DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD; 185 186 if (drm_dp_dpcd_writeb(&intel_dp->aux, 187 DP_EDP_PWMGEN_BIT_COUNT, 188 panel->backlight.pwmgen_bit_count) < 0) 189 DRM_DEBUG_KMS("Failed to write aux pwmgen bit count\n"); 190 191 break; 192 193 /* Do nothing when it is already DPCD mode */ 194 case DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD: 195 default: 196 break; 197 } 198 199 if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP) 200 if (intel_dp_aux_set_pwm_freq(connector)) 201 new_dpcd_buf |= DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE; 202 203 if (new_dpcd_buf != dpcd_buf) { 204 if (drm_dp_dpcd_writeb(&intel_dp->aux, 205 DP_EDP_BACKLIGHT_MODE_SET_REGISTER, new_dpcd_buf) < 0) { 206 DRM_DEBUG_KMS("Failed to write aux backlight mode\n"); 207 } 208 } 209 210 intel_dp_aux_set_backlight(conn_state, 211 connector->panel.backlight.level); 212 set_aux_backlight_enable(intel_dp, true); 213 } 214 215 static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old_conn_state) 216 { 217 set_aux_backlight_enable(enc_to_intel_dp(to_intel_encoder(old_conn_state->best_encoder)), 218 false); 219 } 220 221 static u32 intel_dp_aux_calc_max_backlight(struct intel_connector *connector) 222 { 223 struct drm_i915_private *i915 = to_i915(connector->base.dev); 224 struct intel_dp *intel_dp = intel_attached_dp(connector); 225 struct intel_panel *panel = &connector->panel; 226 u32 max_backlight = 0; 227 int freq, fxp, fxp_min, fxp_max, fxp_actual, f = 1; 228 u8 pn, pn_min, pn_max; 229 230 if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_PWMGEN_BIT_COUNT, &pn) == 1) { 231 pn &= DP_EDP_PWMGEN_BIT_COUNT_MASK; 232 max_backlight = (1 << pn) - 1; 233 } 234 235 /* Find desired value of (F x P) 236 * Note that, if F x P is out of supported range, the maximum value or 237 * minimum value will applied automatically. So no need to check that. 238 */ 239 freq = i915->vbt.backlight.pwm_freq_hz; 240 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", freq); 241 if (!freq) { 242 DRM_DEBUG_KMS("Use panel default backlight frequency\n"); 243 return max_backlight; 244 } 245 246 fxp = DIV_ROUND_CLOSEST(KHz(DP_EDP_BACKLIGHT_FREQ_BASE_KHZ), freq); 247 248 /* Use highest possible value of Pn for more granularity of brightness 249 * adjustment while satifying the conditions below. 250 * - Pn is in the range of Pn_min and Pn_max 251 * - F is in the range of 1 and 255 252 * - FxP is within 25% of desired value. 253 * Note: 25% is arbitrary value and may need some tweak. 254 */ 255 if (drm_dp_dpcd_readb(&intel_dp->aux, 256 DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min) != 1) { 257 DRM_DEBUG_KMS("Failed to read pwmgen bit count cap min\n"); 258 return max_backlight; 259 } 260 if (drm_dp_dpcd_readb(&intel_dp->aux, 261 DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max) != 1) { 262 DRM_DEBUG_KMS("Failed to read pwmgen bit count cap max\n"); 263 return max_backlight; 264 } 265 pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK; 266 pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK; 267 268 fxp_min = DIV_ROUND_CLOSEST(fxp * 3, 4); 269 fxp_max = DIV_ROUND_CLOSEST(fxp * 5, 4); 270 if (fxp_min < (1 << pn_min) || (255 << pn_max) < fxp_max) { 271 DRM_DEBUG_KMS("VBT defined backlight frequency out of range\n"); 272 return max_backlight; 273 } 274 275 for (pn = pn_max; pn >= pn_min; pn--) { 276 f = clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255); 277 fxp_actual = f << pn; 278 if (fxp_min <= fxp_actual && fxp_actual <= fxp_max) 279 break; 280 } 281 282 DRM_DEBUG_KMS("Using eDP pwmgen bit count of %d\n", pn); 283 if (drm_dp_dpcd_writeb(&intel_dp->aux, 284 DP_EDP_PWMGEN_BIT_COUNT, pn) < 0) { 285 DRM_DEBUG_KMS("Failed to write aux pwmgen bit count\n"); 286 return max_backlight; 287 } 288 panel->backlight.pwmgen_bit_count = pn; 289 290 max_backlight = (1 << pn) - 1; 291 292 return max_backlight; 293 } 294 295 static int intel_dp_aux_setup_backlight(struct intel_connector *connector, 296 enum pipe pipe) 297 { 298 struct intel_panel *panel = &connector->panel; 299 300 panel->backlight.max = intel_dp_aux_calc_max_backlight(connector); 301 if (!panel->backlight.max) 302 return -ENODEV; 303 304 panel->backlight.min = 0; 305 panel->backlight.level = intel_dp_aux_get_backlight(connector); 306 panel->backlight.enabled = panel->backlight.level != 0; 307 308 return 0; 309 } 310 311 static bool 312 intel_dp_aux_display_control_capable(struct intel_connector *connector) 313 { 314 struct intel_dp *intel_dp = intel_attached_dp(connector); 315 316 /* Check the eDP Display control capabilities registers to determine if 317 * the panel can support backlight control over the aux channel 318 */ 319 if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP && 320 (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP) && 321 !(intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP)) { 322 DRM_DEBUG_KMS("AUX Backlight Control Supported!\n"); 323 return true; 324 } 325 return false; 326 } 327 328 int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector) 329 { 330 struct intel_panel *panel = &intel_connector->panel; 331 struct intel_dp *intel_dp = enc_to_intel_dp(intel_connector->encoder); 332 struct drm_device *dev = intel_connector->base.dev; 333 struct drm_i915_private *dev_priv = to_i915(dev); 334 335 if (i915_modparams.enable_dpcd_backlight == 0 || 336 !intel_dp_aux_display_control_capable(intel_connector)) 337 return -ENODEV; 338 339 /* 340 * There are a lot of machines that don't advertise the backlight 341 * control interface to use properly in their VBIOS, :\ 342 */ 343 if (dev_priv->vbt.backlight.type != 344 INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE && 345 !drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks, 346 DP_QUIRK_FORCE_DPCD_BACKLIGHT)) { 347 DRM_DEV_INFO(dev->dev, 348 "Panel advertises DPCD backlight support, but " 349 "VBT disagrees. If your backlight controls " 350 "don't work try booting with " 351 "i915.enable_dpcd_backlight=1. If your machine " 352 "needs this, please file a _new_ bug report on " 353 "drm/i915, see " FDO_BUG_URL " for details.\n"); 354 return -ENODEV; 355 } 356 357 panel->backlight.setup = intel_dp_aux_setup_backlight; 358 panel->backlight.enable = intel_dp_aux_enable_backlight; 359 panel->backlight.disable = intel_dp_aux_disable_backlight; 360 panel->backlight.set = intel_dp_aux_set_backlight; 361 panel->backlight.get = intel_dp_aux_get_backlight; 362 363 return 0; 364 } 365