1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2019 Intel Corporation
4  */
5 
6 #ifndef __INTEL_DMC_H__
7 #define __INTEL_DMC_H__
8 
9 #include "i915_reg.h"
10 #include "intel_wakeref.h"
11 #include <linux/workqueue.h>
12 
13 struct drm_i915_private;
14 
15 #define DMC_VERSION(major, minor)	((major) << 16 | (minor))
16 #define DMC_VERSION_MAJOR(version)	((version) >> 16)
17 #define DMC_VERSION_MINOR(version)	((version) & 0xffff)
18 
19 enum {
20 	DMC_FW_MAIN = 0,
21 	DMC_FW_PIPEA,
22 	DMC_FW_PIPEB,
23 	DMC_FW_PIPEC,
24 	DMC_FW_PIPED,
25 	DMC_FW_MAX
26 };
27 
28 struct intel_dmc {
29 	struct work_struct work;
30 	const char *fw_path;
31 	u32 required_version;
32 	u32 max_fw_size; /* bytes */
33 	u32 version;
34 	struct dmc_fw_info {
35 		u32 mmio_count;
36 		i915_reg_t mmioaddr[20];
37 		u32 mmiodata[20];
38 		u32 dmc_offset;
39 		u32 start_mmioaddr;
40 		u32 dmc_fw_size; /*dwords */
41 		u32 *payload;
42 		bool present;
43 	} dmc_info[DMC_FW_MAX];
44 
45 	u32 dc_state;
46 	u32 target_dc_state;
47 	u32 allowed_dc_mask;
48 	intel_wakeref_t wakeref;
49 };
50 
51 void intel_dmc_ucode_init(struct drm_i915_private *i915);
52 void intel_dmc_load_program(struct drm_i915_private *i915);
53 void intel_dmc_ucode_fini(struct drm_i915_private *i915);
54 void intel_dmc_ucode_suspend(struct drm_i915_private *i915);
55 void intel_dmc_ucode_resume(struct drm_i915_private *i915);
56 bool intel_dmc_has_payload(struct drm_i915_private *i915);
57 
58 #endif /* __INTEL_DMC_H__ */
59