132f9402dSAnusha Srivatsa /* SPDX-License-Identifier: MIT */ 232f9402dSAnusha Srivatsa /* 332f9402dSAnusha Srivatsa * Copyright © 2019 Intel Corporation 432f9402dSAnusha Srivatsa */ 532f9402dSAnusha Srivatsa 632f9402dSAnusha Srivatsa #ifndef __INTEL_DMC_H__ 732f9402dSAnusha Srivatsa #define __INTEL_DMC_H__ 832f9402dSAnusha Srivatsa 9ce2fce25SMatt Roper #include "i915_reg_defs.h" 103ed131e5SAnusha Srivatsa #include "intel_wakeref.h" 113ed131e5SAnusha Srivatsa #include <linux/workqueue.h> 123ed131e5SAnusha Srivatsa 1332f9402dSAnusha Srivatsa struct drm_i915_private; 1432f9402dSAnusha Srivatsa 1532f9402dSAnusha Srivatsa #define DMC_VERSION(major, minor) ((major) << 16 | (minor)) 1632f9402dSAnusha Srivatsa #define DMC_VERSION_MAJOR(version) ((version) >> 16) 1732f9402dSAnusha Srivatsa #define DMC_VERSION_MINOR(version) ((version) & 0xffff) 1832f9402dSAnusha Srivatsa 19451e05e2SAnusha Srivatsa enum { 20451e05e2SAnusha Srivatsa DMC_FW_MAIN = 0, 213d5928a1SAnusha Srivatsa DMC_FW_PIPEA, 222ef140bdSAnusha Srivatsa DMC_FW_PIPEB, 23f2787d87SAnusha Srivatsa DMC_FW_PIPEC, 24f2787d87SAnusha Srivatsa DMC_FW_PIPED, 25451e05e2SAnusha Srivatsa DMC_FW_MAX 26451e05e2SAnusha Srivatsa }; 27451e05e2SAnusha Srivatsa 283ed131e5SAnusha Srivatsa struct intel_dmc { 293ed131e5SAnusha Srivatsa struct work_struct work; 303ed131e5SAnusha Srivatsa const char *fw_path; 313ed131e5SAnusha Srivatsa u32 required_version; 323ed131e5SAnusha Srivatsa u32 max_fw_size; /* bytes */ 333ed131e5SAnusha Srivatsa u32 version; 34451e05e2SAnusha Srivatsa struct dmc_fw_info { 353ed131e5SAnusha Srivatsa u32 mmio_count; 363ed131e5SAnusha Srivatsa i915_reg_t mmioaddr[20]; 373ed131e5SAnusha Srivatsa u32 mmiodata[20]; 383d5928a1SAnusha Srivatsa u32 dmc_offset; 393d5928a1SAnusha Srivatsa u32 start_mmioaddr; 40451e05e2SAnusha Srivatsa u32 dmc_fw_size; /*dwords */ 41451e05e2SAnusha Srivatsa u32 *payload; 423d5928a1SAnusha Srivatsa bool present; 43451e05e2SAnusha Srivatsa } dmc_info[DMC_FW_MAX]; 44451e05e2SAnusha Srivatsa 453ed131e5SAnusha Srivatsa u32 dc_state; 463ed131e5SAnusha Srivatsa u32 target_dc_state; 473ed131e5SAnusha Srivatsa u32 allowed_dc_mask; 483ed131e5SAnusha Srivatsa intel_wakeref_t wakeref; 493ed131e5SAnusha Srivatsa }; 503ed131e5SAnusha Srivatsa 5132f9402dSAnusha Srivatsa void intel_dmc_ucode_init(struct drm_i915_private *i915); 5232f9402dSAnusha Srivatsa void intel_dmc_load_program(struct drm_i915_private *i915); 5332f9402dSAnusha Srivatsa void intel_dmc_ucode_fini(struct drm_i915_private *i915); 5432f9402dSAnusha Srivatsa void intel_dmc_ucode_suspend(struct drm_i915_private *i915); 5532f9402dSAnusha Srivatsa void intel_dmc_ucode_resume(struct drm_i915_private *i915); 5603256487SAnusha Srivatsa bool intel_dmc_has_payload(struct drm_i915_private *i915); 5732f9402dSAnusha Srivatsa 58*790daf74SJani Nikula void assert_dmc_loaded(struct drm_i915_private *i915); 59*790daf74SJani Nikula 6032f9402dSAnusha Srivatsa #endif /* __INTEL_DMC_H__ */ 61