132f9402dSAnusha Srivatsa /* SPDX-License-Identifier: MIT */ 232f9402dSAnusha Srivatsa /* 332f9402dSAnusha Srivatsa * Copyright © 2019 Intel Corporation 432f9402dSAnusha Srivatsa */ 532f9402dSAnusha Srivatsa 632f9402dSAnusha Srivatsa #ifndef __INTEL_DMC_H__ 732f9402dSAnusha Srivatsa #define __INTEL_DMC_H__ 832f9402dSAnusha Srivatsa 93ed131e5SAnusha Srivatsa #include "i915_reg.h" 103ed131e5SAnusha Srivatsa #include "intel_wakeref.h" 113ed131e5SAnusha Srivatsa #include <linux/workqueue.h> 123ed131e5SAnusha Srivatsa 1332f9402dSAnusha Srivatsa struct drm_i915_private; 1432f9402dSAnusha Srivatsa 1532f9402dSAnusha Srivatsa #define DMC_VERSION(major, minor) ((major) << 16 | (minor)) 1632f9402dSAnusha Srivatsa #define DMC_VERSION_MAJOR(version) ((version) >> 16) 1732f9402dSAnusha Srivatsa #define DMC_VERSION_MINOR(version) ((version) & 0xffff) 1832f9402dSAnusha Srivatsa 19*451e05e2SAnusha Srivatsa enum { 20*451e05e2SAnusha Srivatsa DMC_FW_MAIN = 0, 21*451e05e2SAnusha Srivatsa DMC_FW_MAX 22*451e05e2SAnusha Srivatsa }; 23*451e05e2SAnusha Srivatsa 243ed131e5SAnusha Srivatsa struct intel_dmc { 253ed131e5SAnusha Srivatsa struct work_struct work; 263ed131e5SAnusha Srivatsa const char *fw_path; 273ed131e5SAnusha Srivatsa u32 required_version; 283ed131e5SAnusha Srivatsa u32 max_fw_size; /* bytes */ 293ed131e5SAnusha Srivatsa u32 version; 30*451e05e2SAnusha Srivatsa struct dmc_fw_info { 313ed131e5SAnusha Srivatsa u32 mmio_count; 323ed131e5SAnusha Srivatsa i915_reg_t mmioaddr[20]; 333ed131e5SAnusha Srivatsa u32 mmiodata[20]; 34*451e05e2SAnusha Srivatsa u32 dmc_fw_size; /*dwords */ 35*451e05e2SAnusha Srivatsa u32 *payload; 36*451e05e2SAnusha Srivatsa } dmc_info[DMC_FW_MAX]; 37*451e05e2SAnusha Srivatsa 383ed131e5SAnusha Srivatsa u32 dc_state; 393ed131e5SAnusha Srivatsa u32 target_dc_state; 403ed131e5SAnusha Srivatsa u32 allowed_dc_mask; 413ed131e5SAnusha Srivatsa intel_wakeref_t wakeref; 423ed131e5SAnusha Srivatsa }; 433ed131e5SAnusha Srivatsa 4432f9402dSAnusha Srivatsa void intel_dmc_ucode_init(struct drm_i915_private *i915); 4532f9402dSAnusha Srivatsa void intel_dmc_load_program(struct drm_i915_private *i915); 4632f9402dSAnusha Srivatsa void intel_dmc_ucode_fini(struct drm_i915_private *i915); 4732f9402dSAnusha Srivatsa void intel_dmc_ucode_suspend(struct drm_i915_private *i915); 4832f9402dSAnusha Srivatsa void intel_dmc_ucode_resume(struct drm_i915_private *i915); 4903256487SAnusha Srivatsa bool intel_dmc_has_payload(struct drm_i915_private *i915); 5032f9402dSAnusha Srivatsa 5132f9402dSAnusha Srivatsa #endif /* __INTEL_DMC_H__ */ 52