132f9402dSAnusha Srivatsa /* SPDX-License-Identifier: MIT */
232f9402dSAnusha Srivatsa /*
332f9402dSAnusha Srivatsa  * Copyright © 2019 Intel Corporation
432f9402dSAnusha Srivatsa  */
532f9402dSAnusha Srivatsa 
632f9402dSAnusha Srivatsa #ifndef __INTEL_DMC_H__
732f9402dSAnusha Srivatsa #define __INTEL_DMC_H__
832f9402dSAnusha Srivatsa 
9*3ed131e5SAnusha Srivatsa #include "i915_reg.h"
10*3ed131e5SAnusha Srivatsa #include "intel_wakeref.h"
11*3ed131e5SAnusha Srivatsa #include <linux/workqueue.h>
12*3ed131e5SAnusha Srivatsa 
1332f9402dSAnusha Srivatsa struct drm_i915_private;
1432f9402dSAnusha Srivatsa 
1532f9402dSAnusha Srivatsa #define DMC_VERSION(major, minor)	((major) << 16 | (minor))
1632f9402dSAnusha Srivatsa #define DMC_VERSION_MAJOR(version)	((version) >> 16)
1732f9402dSAnusha Srivatsa #define DMC_VERSION_MINOR(version)	((version) & 0xffff)
1832f9402dSAnusha Srivatsa 
19*3ed131e5SAnusha Srivatsa struct intel_dmc {
20*3ed131e5SAnusha Srivatsa 	struct work_struct work;
21*3ed131e5SAnusha Srivatsa 	const char *fw_path;
22*3ed131e5SAnusha Srivatsa 	u32 required_version;
23*3ed131e5SAnusha Srivatsa 	u32 max_fw_size; /* bytes */
24*3ed131e5SAnusha Srivatsa 	u32 *dmc_payload;
25*3ed131e5SAnusha Srivatsa 	u32 dmc_fw_size; /* dwords */
26*3ed131e5SAnusha Srivatsa 	u32 version;
27*3ed131e5SAnusha Srivatsa 	u32 mmio_count;
28*3ed131e5SAnusha Srivatsa 	i915_reg_t mmioaddr[20];
29*3ed131e5SAnusha Srivatsa 	u32 mmiodata[20];
30*3ed131e5SAnusha Srivatsa 	u32 dc_state;
31*3ed131e5SAnusha Srivatsa 	u32 target_dc_state;
32*3ed131e5SAnusha Srivatsa 	u32 allowed_dc_mask;
33*3ed131e5SAnusha Srivatsa 	intel_wakeref_t wakeref;
34*3ed131e5SAnusha Srivatsa };
35*3ed131e5SAnusha Srivatsa 
3632f9402dSAnusha Srivatsa void intel_dmc_ucode_init(struct drm_i915_private *i915);
3732f9402dSAnusha Srivatsa void intel_dmc_load_program(struct drm_i915_private *i915);
3832f9402dSAnusha Srivatsa void intel_dmc_ucode_fini(struct drm_i915_private *i915);
3932f9402dSAnusha Srivatsa void intel_dmc_ucode_suspend(struct drm_i915_private *i915);
4032f9402dSAnusha Srivatsa void intel_dmc_ucode_resume(struct drm_i915_private *i915);
4103256487SAnusha Srivatsa bool intel_dmc_has_payload(struct drm_i915_private *i915);
4232f9402dSAnusha Srivatsa 
4332f9402dSAnusha Srivatsa #endif /* __INTEL_DMC_H__ */
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