1*32f9402dSAnusha Srivatsa /* SPDX-License-Identifier: MIT */
2*32f9402dSAnusha Srivatsa /*
3*32f9402dSAnusha Srivatsa  * Copyright © 2019 Intel Corporation
4*32f9402dSAnusha Srivatsa  */
5*32f9402dSAnusha Srivatsa 
6*32f9402dSAnusha Srivatsa #ifndef __INTEL_DMC_H__
7*32f9402dSAnusha Srivatsa #define __INTEL_DMC_H__
8*32f9402dSAnusha Srivatsa 
9*32f9402dSAnusha Srivatsa struct drm_i915_private;
10*32f9402dSAnusha Srivatsa 
11*32f9402dSAnusha Srivatsa #define DMC_VERSION(major, minor)	((major) << 16 | (minor))
12*32f9402dSAnusha Srivatsa #define DMC_VERSION_MAJOR(version)	((version) >> 16)
13*32f9402dSAnusha Srivatsa #define DMC_VERSION_MINOR(version)	((version) & 0xffff)
14*32f9402dSAnusha Srivatsa 
15*32f9402dSAnusha Srivatsa void intel_dmc_ucode_init(struct drm_i915_private *i915);
16*32f9402dSAnusha Srivatsa void intel_dmc_load_program(struct drm_i915_private *i915);
17*32f9402dSAnusha Srivatsa void intel_dmc_ucode_fini(struct drm_i915_private *i915);
18*32f9402dSAnusha Srivatsa void intel_dmc_ucode_suspend(struct drm_i915_private *i915);
19*32f9402dSAnusha Srivatsa void intel_dmc_ucode_resume(struct drm_i915_private *i915);
20*32f9402dSAnusha Srivatsa 
21*32f9402dSAnusha Srivatsa #endif /* __INTEL_DMC_H__ */
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