1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020 Intel Corporation 4 */ 5 6 #include <linux/string_helpers.h> 7 8 #include <drm/drm_debugfs.h> 9 #include <drm/drm_fourcc.h> 10 11 #include "hsw_ips.h" 12 #include "i915_debugfs.h" 13 #include "i915_irq.h" 14 #include "i915_reg.h" 15 #include "intel_de.h" 16 #include "intel_crtc_state_dump.h" 17 #include "intel_display_debugfs.h" 18 #include "intel_display_power.h" 19 #include "intel_display_power_well.h" 20 #include "intel_display_types.h" 21 #include "intel_dmc.h" 22 #include "intel_dp.h" 23 #include "intel_dp_mst.h" 24 #include "intel_drrs.h" 25 #include "intel_fbc.h" 26 #include "intel_fbdev.h" 27 #include "intel_hdcp.h" 28 #include "intel_hdmi.h" 29 #include "intel_hotplug.h" 30 #include "intel_panel.h" 31 #include "intel_psr.h" 32 #include "intel_psr_regs.h" 33 #include "intel_sprite.h" 34 #include "intel_wm.h" 35 36 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node) 37 { 38 return to_i915(node->minor->dev); 39 } 40 41 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) 42 { 43 struct drm_i915_private *dev_priv = node_to_i915(m->private); 44 45 seq_printf(m, "FB tracking busy bits: 0x%08x\n", 46 dev_priv->display.fb_tracking.busy_bits); 47 48 seq_printf(m, "FB tracking flip bits: 0x%08x\n", 49 dev_priv->display.fb_tracking.flip_bits); 50 51 return 0; 52 } 53 54 static int i915_sr_status(struct seq_file *m, void *unused) 55 { 56 struct drm_i915_private *dev_priv = node_to_i915(m->private); 57 intel_wakeref_t wakeref; 58 bool sr_enabled = false; 59 60 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); 61 62 if (DISPLAY_VER(dev_priv) >= 9) 63 /* no global SR status; inspect per-plane WM */; 64 else if (HAS_PCH_SPLIT(dev_priv)) 65 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE; 66 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) || 67 IS_I945G(dev_priv) || IS_I945GM(dev_priv)) 68 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN; 69 else if (IS_I915GM(dev_priv)) 70 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN; 71 else if (IS_PINEVIEW(dev_priv)) 72 sr_enabled = intel_de_read(dev_priv, DSPFW3) & PINEVIEW_SELF_REFRESH_EN; 73 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) 74 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; 75 76 intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref); 77 78 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled)); 79 80 return 0; 81 } 82 83 static int i915_opregion(struct seq_file *m, void *unused) 84 { 85 struct drm_i915_private *i915 = node_to_i915(m->private); 86 struct intel_opregion *opregion = &i915->display.opregion; 87 88 if (opregion->header) 89 seq_write(m, opregion->header, OPREGION_SIZE); 90 91 return 0; 92 } 93 94 static int i915_vbt(struct seq_file *m, void *unused) 95 { 96 struct drm_i915_private *i915 = node_to_i915(m->private); 97 struct intel_opregion *opregion = &i915->display.opregion; 98 99 if (opregion->vbt) 100 seq_write(m, opregion->vbt, opregion->vbt_size); 101 102 return 0; 103 } 104 105 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 106 { 107 struct drm_i915_private *dev_priv = node_to_i915(m->private); 108 struct intel_framebuffer *fbdev_fb = NULL; 109 struct drm_framebuffer *drm_fb; 110 111 #ifdef CONFIG_DRM_FBDEV_EMULATION 112 fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev); 113 if (fbdev_fb) { 114 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 115 fbdev_fb->base.width, 116 fbdev_fb->base.height, 117 fbdev_fb->base.format->depth, 118 fbdev_fb->base.format->cpp[0] * 8, 119 fbdev_fb->base.modifier, 120 drm_framebuffer_read_refcount(&fbdev_fb->base)); 121 i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base)); 122 seq_putc(m, '\n'); 123 } 124 #endif 125 126 mutex_lock(&dev_priv->drm.mode_config.fb_lock); 127 drm_for_each_fb(drm_fb, &dev_priv->drm) { 128 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); 129 if (fb == fbdev_fb) 130 continue; 131 132 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 133 fb->base.width, 134 fb->base.height, 135 fb->base.format->depth, 136 fb->base.format->cpp[0] * 8, 137 fb->base.modifier, 138 drm_framebuffer_read_refcount(&fb->base)); 139 i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base)); 140 seq_putc(m, '\n'); 141 } 142 mutex_unlock(&dev_priv->drm.mode_config.fb_lock); 143 144 return 0; 145 } 146 147 static int i915_power_domain_info(struct seq_file *m, void *unused) 148 { 149 struct drm_i915_private *i915 = node_to_i915(m->private); 150 151 intel_display_power_debug(i915, m); 152 153 return 0; 154 } 155 156 static void intel_seq_print_mode(struct seq_file *m, int tabs, 157 const struct drm_display_mode *mode) 158 { 159 int i; 160 161 for (i = 0; i < tabs; i++) 162 seq_putc(m, '\t'); 163 164 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); 165 } 166 167 static void intel_encoder_info(struct seq_file *m, 168 struct intel_crtc *crtc, 169 struct intel_encoder *encoder) 170 { 171 struct drm_i915_private *dev_priv = node_to_i915(m->private); 172 struct drm_connector_list_iter conn_iter; 173 struct drm_connector *connector; 174 175 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n", 176 encoder->base.base.id, encoder->base.name); 177 178 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 179 drm_for_each_connector_iter(connector, &conn_iter) { 180 const struct drm_connector_state *conn_state = 181 connector->state; 182 183 if (conn_state->best_encoder != &encoder->base) 184 continue; 185 186 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n", 187 connector->base.id, connector->name); 188 } 189 drm_connector_list_iter_end(&conn_iter); 190 } 191 192 static void intel_panel_info(struct seq_file *m, 193 struct intel_connector *connector) 194 { 195 const struct drm_display_mode *fixed_mode; 196 197 if (list_empty(&connector->panel.fixed_modes)) 198 return; 199 200 seq_puts(m, "\tfixed modes:\n"); 201 202 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) 203 intel_seq_print_mode(m, 2, fixed_mode); 204 } 205 206 static void intel_hdcp_info(struct seq_file *m, 207 struct intel_connector *intel_connector) 208 { 209 bool hdcp_cap, hdcp2_cap; 210 211 if (!intel_connector->hdcp.shim) { 212 seq_puts(m, "No Connector Support"); 213 goto out; 214 } 215 216 hdcp_cap = intel_hdcp_capable(intel_connector); 217 hdcp2_cap = intel_hdcp2_capable(intel_connector); 218 219 if (hdcp_cap) 220 seq_puts(m, "HDCP1.4 "); 221 if (hdcp2_cap) 222 seq_puts(m, "HDCP2.2 "); 223 224 if (!hdcp_cap && !hdcp2_cap) 225 seq_puts(m, "None"); 226 227 out: 228 seq_puts(m, "\n"); 229 } 230 231 static void intel_dp_info(struct seq_file *m, 232 struct intel_connector *intel_connector) 233 { 234 struct intel_encoder *intel_encoder = intel_attached_encoder(intel_connector); 235 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder); 236 const struct drm_property_blob *edid = intel_connector->base.edid_blob_ptr; 237 238 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); 239 seq_printf(m, "\taudio support: %s\n", 240 str_yes_no(intel_dp->has_audio)); 241 242 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports, 243 edid ? edid->data : NULL, &intel_dp->aux); 244 } 245 246 static void intel_dp_mst_info(struct seq_file *m, 247 struct intel_connector *intel_connector) 248 { 249 bool has_audio = intel_connector->port->has_audio; 250 251 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 252 } 253 254 static void intel_hdmi_info(struct seq_file *m, 255 struct intel_connector *intel_connector) 256 { 257 struct intel_encoder *intel_encoder = intel_attached_encoder(intel_connector); 258 struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(intel_encoder); 259 260 seq_printf(m, "\taudio support: %s\n", 261 str_yes_no(intel_hdmi->has_audio)); 262 } 263 264 static void intel_connector_info(struct seq_file *m, 265 struct drm_connector *connector) 266 { 267 struct intel_connector *intel_connector = to_intel_connector(connector); 268 const struct drm_connector_state *conn_state = connector->state; 269 struct intel_encoder *encoder = 270 to_intel_encoder(conn_state->best_encoder); 271 const struct drm_display_mode *mode; 272 273 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n", 274 connector->base.id, connector->name, 275 drm_get_connector_status_name(connector->status)); 276 277 if (connector->status == connector_status_disconnected) 278 return; 279 280 seq_printf(m, "\tphysical dimensions: %dx%dmm\n", 281 connector->display_info.width_mm, 282 connector->display_info.height_mm); 283 seq_printf(m, "\tsubpixel order: %s\n", 284 drm_get_subpixel_order_name(connector->display_info.subpixel_order)); 285 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev); 286 287 if (!encoder) 288 return; 289 290 switch (connector->connector_type) { 291 case DRM_MODE_CONNECTOR_DisplayPort: 292 case DRM_MODE_CONNECTOR_eDP: 293 if (encoder->type == INTEL_OUTPUT_DP_MST) 294 intel_dp_mst_info(m, intel_connector); 295 else 296 intel_dp_info(m, intel_connector); 297 break; 298 case DRM_MODE_CONNECTOR_HDMIA: 299 if (encoder->type == INTEL_OUTPUT_HDMI || 300 encoder->type == INTEL_OUTPUT_DDI) 301 intel_hdmi_info(m, intel_connector); 302 break; 303 default: 304 break; 305 } 306 307 seq_puts(m, "\tHDCP version: "); 308 intel_hdcp_info(m, intel_connector); 309 310 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc); 311 312 intel_panel_info(m, intel_connector); 313 314 seq_printf(m, "\tmodes:\n"); 315 list_for_each_entry(mode, &connector->modes, head) 316 intel_seq_print_mode(m, 2, mode); 317 } 318 319 static const char *plane_type(enum drm_plane_type type) 320 { 321 switch (type) { 322 case DRM_PLANE_TYPE_OVERLAY: 323 return "OVL"; 324 case DRM_PLANE_TYPE_PRIMARY: 325 return "PRI"; 326 case DRM_PLANE_TYPE_CURSOR: 327 return "CUR"; 328 /* 329 * Deliberately omitting default: to generate compiler warnings 330 * when a new drm_plane_type gets added. 331 */ 332 } 333 334 return "unknown"; 335 } 336 337 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation) 338 { 339 /* 340 * According to doc only one DRM_MODE_ROTATE_ is allowed but this 341 * will print them all to visualize if the values are misused 342 */ 343 snprintf(buf, bufsize, 344 "%s%s%s%s%s%s(0x%08x)", 345 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "", 346 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "", 347 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "", 348 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "", 349 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "", 350 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "", 351 rotation); 352 } 353 354 static const char *plane_visibility(const struct intel_plane_state *plane_state) 355 { 356 if (plane_state->uapi.visible) 357 return "visible"; 358 359 if (plane_state->planar_slave) 360 return "planar-slave"; 361 362 return "hidden"; 363 } 364 365 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) 366 { 367 const struct intel_plane_state *plane_state = 368 to_intel_plane_state(plane->base.state); 369 const struct drm_framebuffer *fb = plane_state->uapi.fb; 370 struct drm_rect src, dst; 371 char rot_str[48]; 372 373 src = drm_plane_state_src(&plane_state->uapi); 374 dst = drm_plane_state_dest(&plane_state->uapi); 375 376 plane_rotation(rot_str, sizeof(rot_str), 377 plane_state->uapi.rotation); 378 379 seq_puts(m, "\t\tuapi: [FB:"); 380 if (fb) 381 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id, 382 &fb->format->format, fb->modifier, fb->width, 383 fb->height); 384 else 385 seq_puts(m, "0] n/a,0x0,0x0,"); 386 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT 387 ", rotation=%s\n", plane_visibility(plane_state), 388 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str); 389 390 if (plane_state->planar_linked_plane) 391 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", 392 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, 393 plane_state->planar_slave ? "slave" : "master"); 394 } 395 396 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) 397 { 398 const struct intel_plane_state *plane_state = 399 to_intel_plane_state(plane->base.state); 400 const struct drm_framebuffer *fb = plane_state->hw.fb; 401 char rot_str[48]; 402 403 if (!fb) 404 return; 405 406 plane_rotation(rot_str, sizeof(rot_str), 407 plane_state->hw.rotation); 408 409 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src=" 410 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 411 fb->base.id, &fb->format->format, 412 fb->modifier, fb->width, fb->height, 413 str_yes_no(plane_state->uapi.visible), 414 DRM_RECT_FP_ARG(&plane_state->uapi.src), 415 DRM_RECT_ARG(&plane_state->uapi.dst), 416 rot_str); 417 } 418 419 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc) 420 { 421 struct drm_i915_private *dev_priv = node_to_i915(m->private); 422 struct intel_plane *plane; 423 424 for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { 425 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n", 426 plane->base.base.id, plane->base.name, 427 plane_type(plane->base.type)); 428 intel_plane_uapi_info(m, plane); 429 intel_plane_hw_info(m, plane); 430 } 431 } 432 433 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc) 434 { 435 const struct intel_crtc_state *crtc_state = 436 to_intel_crtc_state(crtc->base.state); 437 int num_scalers = crtc->num_scalers; 438 int i; 439 440 /* Not all platformas have a scaler */ 441 if (num_scalers) { 442 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d", 443 num_scalers, 444 crtc_state->scaler_state.scaler_users, 445 crtc_state->scaler_state.scaler_id, 446 crtc_state->hw.scaling_filter); 447 448 for (i = 0; i < num_scalers; i++) { 449 const struct intel_scaler *sc = 450 &crtc_state->scaler_state.scalers[i]; 451 452 seq_printf(m, ", scalers[%d]: use=%s, mode=%x", 453 i, str_yes_no(sc->in_use), sc->mode); 454 } 455 seq_puts(m, "\n"); 456 } else { 457 seq_puts(m, "\tNo scalers available on this platform\n"); 458 } 459 } 460 461 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE) 462 static void crtc_updates_info(struct seq_file *m, 463 struct intel_crtc *crtc, 464 const char *hdr) 465 { 466 u64 count; 467 int row; 468 469 count = 0; 470 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) 471 count += crtc->debug.vbl.times[row]; 472 seq_printf(m, "%sUpdates: %llu\n", hdr, count); 473 if (!count) 474 return; 475 476 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) { 477 char columns[80] = " |"; 478 unsigned int x; 479 480 if (row & 1) { 481 const char *units; 482 483 if (row > 10) { 484 x = 1000000; 485 units = "ms"; 486 } else { 487 x = 1000; 488 units = "us"; 489 } 490 491 snprintf(columns, sizeof(columns), "%4ld%s |", 492 DIV_ROUND_CLOSEST(BIT(row + 9), x), units); 493 } 494 495 if (crtc->debug.vbl.times[row]) { 496 x = ilog2(crtc->debug.vbl.times[row]); 497 memset(columns + 8, '*', x); 498 columns[8 + x] = '\0'; 499 } 500 501 seq_printf(m, "%s%s\n", hdr, columns); 502 } 503 504 seq_printf(m, "%sMin update: %lluns\n", 505 hdr, crtc->debug.vbl.min); 506 seq_printf(m, "%sMax update: %lluns\n", 507 hdr, crtc->debug.vbl.max); 508 seq_printf(m, "%sAverage update: %lluns\n", 509 hdr, div64_u64(crtc->debug.vbl.sum, count)); 510 seq_printf(m, "%sOverruns > %uus: %u\n", 511 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over); 512 } 513 514 static int crtc_updates_show(struct seq_file *m, void *data) 515 { 516 crtc_updates_info(m, m->private, ""); 517 return 0; 518 } 519 520 static int crtc_updates_open(struct inode *inode, struct file *file) 521 { 522 return single_open(file, crtc_updates_show, inode->i_private); 523 } 524 525 static ssize_t crtc_updates_write(struct file *file, 526 const char __user *ubuf, 527 size_t len, loff_t *offp) 528 { 529 struct seq_file *m = file->private_data; 530 struct intel_crtc *crtc = m->private; 531 532 /* May race with an update. Meh. */ 533 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); 534 535 return len; 536 } 537 538 static const struct file_operations crtc_updates_fops = { 539 .owner = THIS_MODULE, 540 .open = crtc_updates_open, 541 .read = seq_read, 542 .llseek = seq_lseek, 543 .release = single_release, 544 .write = crtc_updates_write 545 }; 546 547 static void crtc_updates_add(struct intel_crtc *crtc) 548 { 549 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry, 550 crtc, &crtc_updates_fops); 551 } 552 553 #else 554 static void crtc_updates_info(struct seq_file *m, 555 struct intel_crtc *crtc, 556 const char *hdr) 557 { 558 } 559 560 static void crtc_updates_add(struct intel_crtc *crtc) 561 { 562 } 563 #endif 564 565 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) 566 { 567 struct drm_i915_private *dev_priv = node_to_i915(m->private); 568 const struct intel_crtc_state *crtc_state = 569 to_intel_crtc_state(crtc->base.state); 570 struct intel_encoder *encoder; 571 572 seq_printf(m, "[CRTC:%d:%s]:\n", 573 crtc->base.base.id, crtc->base.name); 574 575 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n", 576 str_yes_no(crtc_state->uapi.enable), 577 str_yes_no(crtc_state->uapi.active), 578 DRM_MODE_ARG(&crtc_state->uapi.mode)); 579 580 seq_printf(m, "\thw: enable=%s, active=%s\n", 581 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active)); 582 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n", 583 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode)); 584 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n", 585 DRM_MODE_ARG(&crtc_state->hw.pipe_mode)); 586 587 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n", 588 DRM_RECT_ARG(&crtc_state->pipe_src), 589 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp); 590 591 intel_scaler_info(m, crtc); 592 593 if (crtc_state->bigjoiner_pipes) 594 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n", 595 crtc_state->bigjoiner_pipes, 596 intel_crtc_is_bigjoiner_slave(crtc_state) ? "slave" : "master"); 597 598 for_each_intel_encoder_mask(&dev_priv->drm, encoder, 599 crtc_state->uapi.encoder_mask) 600 intel_encoder_info(m, crtc, encoder); 601 602 intel_plane_info(m, crtc); 603 604 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n", 605 str_yes_no(!crtc->cpu_fifo_underrun_disabled), 606 str_yes_no(!crtc->pch_fifo_underrun_disabled)); 607 608 crtc_updates_info(m, crtc, "\t"); 609 } 610 611 static int i915_display_info(struct seq_file *m, void *unused) 612 { 613 struct drm_i915_private *dev_priv = node_to_i915(m->private); 614 struct intel_crtc *crtc; 615 struct drm_connector *connector; 616 struct drm_connector_list_iter conn_iter; 617 intel_wakeref_t wakeref; 618 619 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); 620 621 drm_modeset_lock_all(&dev_priv->drm); 622 623 seq_printf(m, "CRTC info\n"); 624 seq_printf(m, "---------\n"); 625 for_each_intel_crtc(&dev_priv->drm, crtc) 626 intel_crtc_info(m, crtc); 627 628 seq_printf(m, "\n"); 629 seq_printf(m, "Connector info\n"); 630 seq_printf(m, "--------------\n"); 631 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 632 drm_for_each_connector_iter(connector, &conn_iter) 633 intel_connector_info(m, connector); 634 drm_connector_list_iter_end(&conn_iter); 635 636 drm_modeset_unlock_all(&dev_priv->drm); 637 638 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); 639 640 return 0; 641 } 642 643 static int i915_shared_dplls_info(struct seq_file *m, void *unused) 644 { 645 struct drm_i915_private *dev_priv = node_to_i915(m->private); 646 int i; 647 648 drm_modeset_lock_all(&dev_priv->drm); 649 650 seq_printf(m, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n", 651 dev_priv->display.dpll.ref_clks.nssc, 652 dev_priv->display.dpll.ref_clks.ssc); 653 654 for (i = 0; i < dev_priv->display.dpll.num_shared_dpll; i++) { 655 struct intel_shared_dpll *pll = &dev_priv->display.dpll.shared_dplls[i]; 656 657 seq_printf(m, "DPLL%i: %s, id: %i\n", i, pll->info->name, 658 pll->info->id); 659 seq_printf(m, " pipe_mask: 0x%x, active: 0x%x, on: %s\n", 660 pll->state.pipe_mask, pll->active_mask, 661 str_yes_no(pll->on)); 662 seq_printf(m, " tracked hardware state:\n"); 663 seq_printf(m, " dpll: 0x%08x\n", pll->state.hw_state.dpll); 664 seq_printf(m, " dpll_md: 0x%08x\n", 665 pll->state.hw_state.dpll_md); 666 seq_printf(m, " fp0: 0x%08x\n", pll->state.hw_state.fp0); 667 seq_printf(m, " fp1: 0x%08x\n", pll->state.hw_state.fp1); 668 seq_printf(m, " wrpll: 0x%08x\n", pll->state.hw_state.wrpll); 669 seq_printf(m, " cfgcr0: 0x%08x\n", pll->state.hw_state.cfgcr0); 670 seq_printf(m, " cfgcr1: 0x%08x\n", pll->state.hw_state.cfgcr1); 671 seq_printf(m, " div0: 0x%08x\n", pll->state.hw_state.div0); 672 seq_printf(m, " mg_refclkin_ctl: 0x%08x\n", 673 pll->state.hw_state.mg_refclkin_ctl); 674 seq_printf(m, " mg_clktop2_coreclkctl1: 0x%08x\n", 675 pll->state.hw_state.mg_clktop2_coreclkctl1); 676 seq_printf(m, " mg_clktop2_hsclkctl: 0x%08x\n", 677 pll->state.hw_state.mg_clktop2_hsclkctl); 678 seq_printf(m, " mg_pll_div0: 0x%08x\n", 679 pll->state.hw_state.mg_pll_div0); 680 seq_printf(m, " mg_pll_div1: 0x%08x\n", 681 pll->state.hw_state.mg_pll_div1); 682 seq_printf(m, " mg_pll_lf: 0x%08x\n", 683 pll->state.hw_state.mg_pll_lf); 684 seq_printf(m, " mg_pll_frac_lock: 0x%08x\n", 685 pll->state.hw_state.mg_pll_frac_lock); 686 seq_printf(m, " mg_pll_ssc: 0x%08x\n", 687 pll->state.hw_state.mg_pll_ssc); 688 seq_printf(m, " mg_pll_bias: 0x%08x\n", 689 pll->state.hw_state.mg_pll_bias); 690 seq_printf(m, " mg_pll_tdc_coldst_bias: 0x%08x\n", 691 pll->state.hw_state.mg_pll_tdc_coldst_bias); 692 } 693 drm_modeset_unlock_all(&dev_priv->drm); 694 695 return 0; 696 } 697 698 static int i915_ddb_info(struct seq_file *m, void *unused) 699 { 700 struct drm_i915_private *dev_priv = node_to_i915(m->private); 701 struct skl_ddb_entry *entry; 702 struct intel_crtc *crtc; 703 704 if (DISPLAY_VER(dev_priv) < 9) 705 return -ENODEV; 706 707 drm_modeset_lock_all(&dev_priv->drm); 708 709 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); 710 711 for_each_intel_crtc(&dev_priv->drm, crtc) { 712 struct intel_crtc_state *crtc_state = 713 to_intel_crtc_state(crtc->base.state); 714 enum pipe pipe = crtc->pipe; 715 enum plane_id plane_id; 716 717 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); 718 719 for_each_plane_id_on_crtc(crtc, plane_id) { 720 entry = &crtc_state->wm.skl.plane_ddb[plane_id]; 721 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, 722 entry->start, entry->end, 723 skl_ddb_entry_size(entry)); 724 } 725 726 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR]; 727 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start, 728 entry->end, skl_ddb_entry_size(entry)); 729 } 730 731 drm_modeset_unlock_all(&dev_priv->drm); 732 733 return 0; 734 } 735 736 static bool 737 intel_lpsp_power_well_enabled(struct drm_i915_private *i915, 738 enum i915_power_well_id power_well_id) 739 { 740 intel_wakeref_t wakeref; 741 bool is_enabled; 742 743 wakeref = intel_runtime_pm_get(&i915->runtime_pm); 744 is_enabled = intel_display_power_well_is_enabled(i915, 745 power_well_id); 746 intel_runtime_pm_put(&i915->runtime_pm, wakeref); 747 748 return is_enabled; 749 } 750 751 static int i915_lpsp_status(struct seq_file *m, void *unused) 752 { 753 struct drm_i915_private *i915 = node_to_i915(m->private); 754 bool lpsp_enabled = false; 755 756 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) { 757 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2); 758 } else if (IS_DISPLAY_VER(i915, 11, 12)) { 759 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3); 760 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { 761 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL); 762 } else { 763 seq_puts(m, "LPSP: not supported\n"); 764 return 0; 765 } 766 767 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled)); 768 769 return 0; 770 } 771 772 static int i915_dp_mst_info(struct seq_file *m, void *unused) 773 { 774 struct drm_i915_private *dev_priv = node_to_i915(m->private); 775 struct intel_encoder *intel_encoder; 776 struct intel_digital_port *dig_port; 777 struct drm_connector *connector; 778 struct drm_connector_list_iter conn_iter; 779 780 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 781 drm_for_each_connector_iter(connector, &conn_iter) { 782 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 783 continue; 784 785 intel_encoder = intel_attached_encoder(to_intel_connector(connector)); 786 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST) 787 continue; 788 789 dig_port = enc_to_dig_port(intel_encoder); 790 if (!intel_dp_mst_source_support(&dig_port->dp)) 791 continue; 792 793 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n", 794 dig_port->base.base.base.id, 795 dig_port->base.base.name); 796 drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr); 797 } 798 drm_connector_list_iter_end(&conn_iter); 799 800 return 0; 801 } 802 803 static ssize_t i915_displayport_test_active_write(struct file *file, 804 const char __user *ubuf, 805 size_t len, loff_t *offp) 806 { 807 char *input_buffer; 808 int status = 0; 809 struct drm_device *dev; 810 struct drm_connector *connector; 811 struct drm_connector_list_iter conn_iter; 812 struct intel_dp *intel_dp; 813 int val = 0; 814 815 dev = ((struct seq_file *)file->private_data)->private; 816 817 if (len == 0) 818 return 0; 819 820 input_buffer = memdup_user_nul(ubuf, len); 821 if (IS_ERR(input_buffer)) 822 return PTR_ERR(input_buffer); 823 824 drm_dbg(&to_i915(dev)->drm, 825 "Copied %d bytes from user\n", (unsigned int)len); 826 827 drm_connector_list_iter_begin(dev, &conn_iter); 828 drm_for_each_connector_iter(connector, &conn_iter) { 829 struct intel_encoder *encoder; 830 831 if (connector->connector_type != 832 DRM_MODE_CONNECTOR_DisplayPort) 833 continue; 834 835 encoder = to_intel_encoder(connector->encoder); 836 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 837 continue; 838 839 if (encoder && connector->status == connector_status_connected) { 840 intel_dp = enc_to_intel_dp(encoder); 841 status = kstrtoint(input_buffer, 10, &val); 842 if (status < 0) 843 break; 844 drm_dbg(&to_i915(dev)->drm, 845 "Got %d for test active\n", val); 846 /* To prevent erroneous activation of the compliance 847 * testing code, only accept an actual value of 1 here 848 */ 849 if (val == 1) 850 intel_dp->compliance.test_active = true; 851 else 852 intel_dp->compliance.test_active = false; 853 } 854 } 855 drm_connector_list_iter_end(&conn_iter); 856 kfree(input_buffer); 857 if (status < 0) 858 return status; 859 860 *offp += len; 861 return len; 862 } 863 864 static int i915_displayport_test_active_show(struct seq_file *m, void *data) 865 { 866 struct drm_i915_private *dev_priv = m->private; 867 struct drm_connector *connector; 868 struct drm_connector_list_iter conn_iter; 869 struct intel_dp *intel_dp; 870 871 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 872 drm_for_each_connector_iter(connector, &conn_iter) { 873 struct intel_encoder *encoder; 874 875 if (connector->connector_type != 876 DRM_MODE_CONNECTOR_DisplayPort) 877 continue; 878 879 encoder = to_intel_encoder(connector->encoder); 880 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 881 continue; 882 883 if (encoder && connector->status == connector_status_connected) { 884 intel_dp = enc_to_intel_dp(encoder); 885 if (intel_dp->compliance.test_active) 886 seq_puts(m, "1"); 887 else 888 seq_puts(m, "0"); 889 } else 890 seq_puts(m, "0"); 891 } 892 drm_connector_list_iter_end(&conn_iter); 893 894 return 0; 895 } 896 897 static int i915_displayport_test_active_open(struct inode *inode, 898 struct file *file) 899 { 900 return single_open(file, i915_displayport_test_active_show, 901 inode->i_private); 902 } 903 904 static const struct file_operations i915_displayport_test_active_fops = { 905 .owner = THIS_MODULE, 906 .open = i915_displayport_test_active_open, 907 .read = seq_read, 908 .llseek = seq_lseek, 909 .release = single_release, 910 .write = i915_displayport_test_active_write 911 }; 912 913 static int i915_displayport_test_data_show(struct seq_file *m, void *data) 914 { 915 struct drm_i915_private *dev_priv = m->private; 916 struct drm_connector *connector; 917 struct drm_connector_list_iter conn_iter; 918 struct intel_dp *intel_dp; 919 920 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 921 drm_for_each_connector_iter(connector, &conn_iter) { 922 struct intel_encoder *encoder; 923 924 if (connector->connector_type != 925 DRM_MODE_CONNECTOR_DisplayPort) 926 continue; 927 928 encoder = to_intel_encoder(connector->encoder); 929 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 930 continue; 931 932 if (encoder && connector->status == connector_status_connected) { 933 intel_dp = enc_to_intel_dp(encoder); 934 if (intel_dp->compliance.test_type == 935 DP_TEST_LINK_EDID_READ) 936 seq_printf(m, "%lx", 937 intel_dp->compliance.test_data.edid); 938 else if (intel_dp->compliance.test_type == 939 DP_TEST_LINK_VIDEO_PATTERN) { 940 seq_printf(m, "hdisplay: %d\n", 941 intel_dp->compliance.test_data.hdisplay); 942 seq_printf(m, "vdisplay: %d\n", 943 intel_dp->compliance.test_data.vdisplay); 944 seq_printf(m, "bpc: %u\n", 945 intel_dp->compliance.test_data.bpc); 946 } else if (intel_dp->compliance.test_type == 947 DP_TEST_LINK_PHY_TEST_PATTERN) { 948 seq_printf(m, "pattern: %d\n", 949 intel_dp->compliance.test_data.phytest.phy_pattern); 950 seq_printf(m, "Number of lanes: %d\n", 951 intel_dp->compliance.test_data.phytest.num_lanes); 952 seq_printf(m, "Link Rate: %d\n", 953 intel_dp->compliance.test_data.phytest.link_rate); 954 seq_printf(m, "level: %02x\n", 955 intel_dp->train_set[0]); 956 } 957 } else 958 seq_puts(m, "0"); 959 } 960 drm_connector_list_iter_end(&conn_iter); 961 962 return 0; 963 } 964 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data); 965 966 static int i915_displayport_test_type_show(struct seq_file *m, void *data) 967 { 968 struct drm_i915_private *dev_priv = m->private; 969 struct drm_connector *connector; 970 struct drm_connector_list_iter conn_iter; 971 struct intel_dp *intel_dp; 972 973 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 974 drm_for_each_connector_iter(connector, &conn_iter) { 975 struct intel_encoder *encoder; 976 977 if (connector->connector_type != 978 DRM_MODE_CONNECTOR_DisplayPort) 979 continue; 980 981 encoder = to_intel_encoder(connector->encoder); 982 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 983 continue; 984 985 if (encoder && connector->status == connector_status_connected) { 986 intel_dp = enc_to_intel_dp(encoder); 987 seq_printf(m, "%02lx\n", intel_dp->compliance.test_type); 988 } else 989 seq_puts(m, "0"); 990 } 991 drm_connector_list_iter_end(&conn_iter); 992 993 return 0; 994 } 995 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type); 996 997 static ssize_t 998 i915_fifo_underrun_reset_write(struct file *filp, 999 const char __user *ubuf, 1000 size_t cnt, loff_t *ppos) 1001 { 1002 struct drm_i915_private *dev_priv = filp->private_data; 1003 struct intel_crtc *crtc; 1004 int ret; 1005 bool reset; 1006 1007 ret = kstrtobool_from_user(ubuf, cnt, &reset); 1008 if (ret) 1009 return ret; 1010 1011 if (!reset) 1012 return cnt; 1013 1014 for_each_intel_crtc(&dev_priv->drm, crtc) { 1015 struct drm_crtc_commit *commit; 1016 struct intel_crtc_state *crtc_state; 1017 1018 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1019 if (ret) 1020 return ret; 1021 1022 crtc_state = to_intel_crtc_state(crtc->base.state); 1023 commit = crtc_state->uapi.commit; 1024 if (commit) { 1025 ret = wait_for_completion_interruptible(&commit->hw_done); 1026 if (!ret) 1027 ret = wait_for_completion_interruptible(&commit->flip_done); 1028 } 1029 1030 if (!ret && crtc_state->hw.active) { 1031 drm_dbg_kms(&dev_priv->drm, 1032 "Re-arming FIFO underruns on pipe %c\n", 1033 pipe_name(crtc->pipe)); 1034 1035 intel_crtc_arm_fifo_underrun(crtc, crtc_state); 1036 } 1037 1038 drm_modeset_unlock(&crtc->base.mutex); 1039 1040 if (ret) 1041 return ret; 1042 } 1043 1044 intel_fbc_reset_underrun(dev_priv); 1045 1046 return cnt; 1047 } 1048 1049 static const struct file_operations i915_fifo_underrun_reset_ops = { 1050 .owner = THIS_MODULE, 1051 .open = simple_open, 1052 .write = i915_fifo_underrun_reset_write, 1053 .llseek = default_llseek, 1054 }; 1055 1056 static const struct drm_info_list intel_display_debugfs_list[] = { 1057 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0}, 1058 {"i915_sr_status", i915_sr_status, 0}, 1059 {"i915_opregion", i915_opregion, 0}, 1060 {"i915_vbt", i915_vbt, 0}, 1061 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, 1062 {"i915_power_domain_info", i915_power_domain_info, 0}, 1063 {"i915_display_info", i915_display_info, 0}, 1064 {"i915_shared_dplls_info", i915_shared_dplls_info, 0}, 1065 {"i915_dp_mst_info", i915_dp_mst_info, 0}, 1066 {"i915_ddb_info", i915_ddb_info, 0}, 1067 {"i915_lpsp_status", i915_lpsp_status, 0}, 1068 }; 1069 1070 static const struct { 1071 const char *name; 1072 const struct file_operations *fops; 1073 } intel_display_debugfs_files[] = { 1074 {"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops}, 1075 {"i915_dp_test_data", &i915_displayport_test_data_fops}, 1076 {"i915_dp_test_type", &i915_displayport_test_type_fops}, 1077 {"i915_dp_test_active", &i915_displayport_test_active_fops}, 1078 }; 1079 1080 void intel_display_debugfs_register(struct drm_i915_private *i915) 1081 { 1082 struct drm_minor *minor = i915->drm.primary; 1083 int i; 1084 1085 for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) { 1086 debugfs_create_file(intel_display_debugfs_files[i].name, 1087 S_IRUGO | S_IWUSR, 1088 minor->debugfs_root, 1089 to_i915(minor->dev), 1090 intel_display_debugfs_files[i].fops); 1091 } 1092 1093 drm_debugfs_create_files(intel_display_debugfs_list, 1094 ARRAY_SIZE(intel_display_debugfs_list), 1095 minor->debugfs_root, minor); 1096 1097 intel_dmc_debugfs_register(i915); 1098 intel_fbc_debugfs_register(i915); 1099 intel_hpd_debugfs_register(i915); 1100 intel_psr_debugfs_register(i915); 1101 intel_wm_debugfs_register(i915); 1102 } 1103 1104 static int i915_panel_show(struct seq_file *m, void *data) 1105 { 1106 struct drm_connector *connector = m->private; 1107 struct intel_dp *intel_dp = 1108 intel_attached_dp(to_intel_connector(connector)); 1109 1110 if (connector->status != connector_status_connected) 1111 return -ENODEV; 1112 1113 seq_printf(m, "Panel power up delay: %d\n", 1114 intel_dp->pps.panel_power_up_delay); 1115 seq_printf(m, "Panel power down delay: %d\n", 1116 intel_dp->pps.panel_power_down_delay); 1117 seq_printf(m, "Backlight on delay: %d\n", 1118 intel_dp->pps.backlight_on_delay); 1119 seq_printf(m, "Backlight off delay: %d\n", 1120 intel_dp->pps.backlight_off_delay); 1121 1122 return 0; 1123 } 1124 DEFINE_SHOW_ATTRIBUTE(i915_panel); 1125 1126 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data) 1127 { 1128 struct drm_connector *connector = m->private; 1129 struct drm_i915_private *i915 = to_i915(connector->dev); 1130 struct intel_connector *intel_connector = to_intel_connector(connector); 1131 int ret; 1132 1133 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1134 if (ret) 1135 return ret; 1136 1137 if (!connector->encoder || connector->status != connector_status_connected) { 1138 ret = -ENODEV; 1139 goto out; 1140 } 1141 1142 seq_printf(m, "%s:%d HDCP version: ", connector->name, 1143 connector->base.id); 1144 intel_hdcp_info(m, intel_connector); 1145 1146 out: 1147 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1148 1149 return ret; 1150 } 1151 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability); 1152 1153 static int i915_lpsp_capability_show(struct seq_file *m, void *data) 1154 { 1155 struct drm_connector *connector = m->private; 1156 struct drm_i915_private *i915 = to_i915(connector->dev); 1157 struct intel_encoder *encoder; 1158 bool lpsp_capable = false; 1159 1160 encoder = intel_attached_encoder(to_intel_connector(connector)); 1161 if (!encoder) 1162 return -ENODEV; 1163 1164 if (connector->status != connector_status_connected) 1165 return -ENODEV; 1166 1167 if (DISPLAY_VER(i915) >= 13) 1168 lpsp_capable = encoder->port <= PORT_B; 1169 else if (DISPLAY_VER(i915) >= 12) 1170 /* 1171 * Actually TGL can drive LPSP on port till DDI_C 1172 * but there is no physical connected DDI_C on TGL sku's, 1173 * even driver is not initilizing DDI_C port for gen12. 1174 */ 1175 lpsp_capable = encoder->port <= PORT_B; 1176 else if (DISPLAY_VER(i915) == 11) 1177 lpsp_capable = (connector->connector_type == DRM_MODE_CONNECTOR_DSI || 1178 connector->connector_type == DRM_MODE_CONNECTOR_eDP); 1179 else if (IS_DISPLAY_VER(i915, 9, 10)) 1180 lpsp_capable = (encoder->port == PORT_A && 1181 (connector->connector_type == DRM_MODE_CONNECTOR_DSI || 1182 connector->connector_type == DRM_MODE_CONNECTOR_eDP || 1183 connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort)); 1184 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) 1185 lpsp_capable = connector->connector_type == DRM_MODE_CONNECTOR_eDP; 1186 1187 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable"); 1188 1189 return 0; 1190 } 1191 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability); 1192 1193 static int i915_dsc_fec_support_show(struct seq_file *m, void *data) 1194 { 1195 struct drm_connector *connector = m->private; 1196 struct drm_device *dev = connector->dev; 1197 struct drm_crtc *crtc; 1198 struct intel_dp *intel_dp; 1199 struct drm_modeset_acquire_ctx ctx; 1200 struct intel_crtc_state *crtc_state = NULL; 1201 int ret = 0; 1202 bool try_again = false; 1203 1204 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); 1205 1206 do { 1207 try_again = false; 1208 ret = drm_modeset_lock(&dev->mode_config.connection_mutex, 1209 &ctx); 1210 if (ret) { 1211 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) { 1212 try_again = true; 1213 continue; 1214 } 1215 break; 1216 } 1217 crtc = connector->state->crtc; 1218 if (connector->status != connector_status_connected || !crtc) { 1219 ret = -ENODEV; 1220 break; 1221 } 1222 ret = drm_modeset_lock(&crtc->mutex, &ctx); 1223 if (ret == -EDEADLK) { 1224 ret = drm_modeset_backoff(&ctx); 1225 if (!ret) { 1226 try_again = true; 1227 continue; 1228 } 1229 break; 1230 } else if (ret) { 1231 break; 1232 } 1233 intel_dp = intel_attached_dp(to_intel_connector(connector)); 1234 crtc_state = to_intel_crtc_state(crtc->state); 1235 seq_printf(m, "DSC_Enabled: %s\n", 1236 str_yes_no(crtc_state->dsc.compression_enable)); 1237 seq_printf(m, "DSC_Sink_Support: %s\n", 1238 str_yes_no(drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd))); 1239 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n", 1240 str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd, 1241 DP_DSC_RGB)), 1242 str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd, 1243 DP_DSC_YCbCr420_Native)), 1244 str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd, 1245 DP_DSC_YCbCr444))); 1246 seq_printf(m, "Force_DSC_Enable: %s\n", 1247 str_yes_no(intel_dp->force_dsc_en)); 1248 if (!intel_dp_is_edp(intel_dp)) 1249 seq_printf(m, "FEC_Sink_Support: %s\n", 1250 str_yes_no(drm_dp_sink_supports_fec(intel_dp->fec_capable))); 1251 } while (try_again); 1252 1253 drm_modeset_drop_locks(&ctx); 1254 drm_modeset_acquire_fini(&ctx); 1255 1256 return ret; 1257 } 1258 1259 static ssize_t i915_dsc_fec_support_write(struct file *file, 1260 const char __user *ubuf, 1261 size_t len, loff_t *offp) 1262 { 1263 bool dsc_enable = false; 1264 int ret; 1265 struct drm_connector *connector = 1266 ((struct seq_file *)file->private_data)->private; 1267 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1268 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 1269 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1270 1271 if (len == 0) 1272 return 0; 1273 1274 drm_dbg(&i915->drm, 1275 "Copied %zu bytes from user to force DSC\n", len); 1276 1277 ret = kstrtobool_from_user(ubuf, len, &dsc_enable); 1278 if (ret < 0) 1279 return ret; 1280 1281 drm_dbg(&i915->drm, "Got %s for DSC Enable\n", 1282 (dsc_enable) ? "true" : "false"); 1283 intel_dp->force_dsc_en = dsc_enable; 1284 1285 *offp += len; 1286 return len; 1287 } 1288 1289 static int i915_dsc_fec_support_open(struct inode *inode, 1290 struct file *file) 1291 { 1292 return single_open(file, i915_dsc_fec_support_show, 1293 inode->i_private); 1294 } 1295 1296 static const struct file_operations i915_dsc_fec_support_fops = { 1297 .owner = THIS_MODULE, 1298 .open = i915_dsc_fec_support_open, 1299 .read = seq_read, 1300 .llseek = seq_lseek, 1301 .release = single_release, 1302 .write = i915_dsc_fec_support_write 1303 }; 1304 1305 static int i915_dsc_bpc_show(struct seq_file *m, void *data) 1306 { 1307 struct drm_connector *connector = m->private; 1308 struct drm_device *dev = connector->dev; 1309 struct drm_crtc *crtc; 1310 struct intel_crtc_state *crtc_state; 1311 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1312 int ret; 1313 1314 if (!encoder) 1315 return -ENODEV; 1316 1317 ret = drm_modeset_lock_single_interruptible(&dev->mode_config.connection_mutex); 1318 if (ret) 1319 return ret; 1320 1321 crtc = connector->state->crtc; 1322 if (connector->status != connector_status_connected || !crtc) { 1323 ret = -ENODEV; 1324 goto out; 1325 } 1326 1327 crtc_state = to_intel_crtc_state(crtc->state); 1328 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component); 1329 1330 out: drm_modeset_unlock(&dev->mode_config.connection_mutex); 1331 1332 return ret; 1333 } 1334 1335 static ssize_t i915_dsc_bpc_write(struct file *file, 1336 const char __user *ubuf, 1337 size_t len, loff_t *offp) 1338 { 1339 struct drm_connector *connector = 1340 ((struct seq_file *)file->private_data)->private; 1341 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1342 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1343 int dsc_bpc = 0; 1344 int ret; 1345 1346 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc); 1347 if (ret < 0) 1348 return ret; 1349 1350 intel_dp->force_dsc_bpc = dsc_bpc; 1351 *offp += len; 1352 1353 return len; 1354 } 1355 1356 static int i915_dsc_bpc_open(struct inode *inode, 1357 struct file *file) 1358 { 1359 return single_open(file, i915_dsc_bpc_show, inode->i_private); 1360 } 1361 1362 static const struct file_operations i915_dsc_bpc_fops = { 1363 .owner = THIS_MODULE, 1364 .open = i915_dsc_bpc_open, 1365 .read = seq_read, 1366 .llseek = seq_lseek, 1367 .release = single_release, 1368 .write = i915_dsc_bpc_write 1369 }; 1370 1371 static int i915_dsc_output_format_show(struct seq_file *m, void *data) 1372 { 1373 struct drm_connector *connector = m->private; 1374 struct drm_device *dev = connector->dev; 1375 struct drm_crtc *crtc; 1376 struct intel_crtc_state *crtc_state; 1377 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1378 int ret; 1379 1380 if (!encoder) 1381 return -ENODEV; 1382 1383 ret = drm_modeset_lock_single_interruptible(&dev->mode_config.connection_mutex); 1384 if (ret) 1385 return ret; 1386 1387 crtc = connector->state->crtc; 1388 if (connector->status != connector_status_connected || !crtc) { 1389 ret = -ENODEV; 1390 goto out; 1391 } 1392 1393 crtc_state = to_intel_crtc_state(crtc->state); 1394 seq_printf(m, "DSC_Output_Format: %s\n", 1395 intel_output_format_name(crtc_state->output_format)); 1396 1397 out: drm_modeset_unlock(&dev->mode_config.connection_mutex); 1398 1399 return ret; 1400 } 1401 1402 static ssize_t i915_dsc_output_format_write(struct file *file, 1403 const char __user *ubuf, 1404 size_t len, loff_t *offp) 1405 { 1406 struct drm_connector *connector = 1407 ((struct seq_file *)file->private_data)->private; 1408 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1409 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1410 int dsc_output_format = 0; 1411 int ret; 1412 1413 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format); 1414 if (ret < 0) 1415 return ret; 1416 1417 intel_dp->force_dsc_output_format = dsc_output_format; 1418 *offp += len; 1419 1420 return len; 1421 } 1422 1423 static int i915_dsc_output_format_open(struct inode *inode, 1424 struct file *file) 1425 { 1426 return single_open(file, i915_dsc_output_format_show, inode->i_private); 1427 } 1428 1429 static const struct file_operations i915_dsc_output_format_fops = { 1430 .owner = THIS_MODULE, 1431 .open = i915_dsc_output_format_open, 1432 .read = seq_read, 1433 .llseek = seq_lseek, 1434 .release = single_release, 1435 .write = i915_dsc_output_format_write 1436 }; 1437 1438 /* 1439 * Returns the Current CRTC's bpc. 1440 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc 1441 */ 1442 static int i915_current_bpc_show(struct seq_file *m, void *data) 1443 { 1444 struct intel_crtc *crtc = m->private; 1445 struct intel_crtc_state *crtc_state; 1446 int ret; 1447 1448 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1449 if (ret) 1450 return ret; 1451 1452 crtc_state = to_intel_crtc_state(crtc->base.state); 1453 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3); 1454 1455 drm_modeset_unlock(&crtc->base.mutex); 1456 1457 return ret; 1458 } 1459 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc); 1460 1461 /* Pipe may differ from crtc index if pipes are fused off */ 1462 static int intel_crtc_pipe_show(struct seq_file *m, void *unused) 1463 { 1464 struct intel_crtc *crtc = m->private; 1465 1466 seq_printf(m, "%c\n", pipe_name(crtc->pipe)); 1467 1468 return 0; 1469 } 1470 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe); 1471 1472 /** 1473 * intel_connector_debugfs_add - add i915 specific connector debugfs files 1474 * @intel_connector: pointer to a registered drm_connector 1475 * 1476 * Cleanup will be done by drm_connector_unregister() through a call to 1477 * drm_debugfs_connector_remove(). 1478 */ 1479 void intel_connector_debugfs_add(struct intel_connector *intel_connector) 1480 { 1481 struct drm_connector *connector = &intel_connector->base; 1482 struct dentry *root = connector->debugfs_entry; 1483 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1484 1485 /* The connector must have been registered beforehands. */ 1486 if (!root) 1487 return; 1488 1489 intel_drrs_connector_debugfs_add(intel_connector); 1490 intel_psr_connector_debugfs_add(intel_connector); 1491 1492 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) 1493 debugfs_create_file("i915_panel_timings", S_IRUGO, root, 1494 connector, &i915_panel_fops); 1495 1496 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1497 connector->connector_type == DRM_MODE_CONNECTOR_HDMIA || 1498 connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) { 1499 debugfs_create_file("i915_hdcp_sink_capability", S_IRUGO, root, 1500 connector, &i915_hdcp_sink_capability_fops); 1501 } 1502 1503 if (DISPLAY_VER(dev_priv) >= 11 && 1504 ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort && 1505 !to_intel_connector(connector)->mst_port) || 1506 connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { 1507 debugfs_create_file("i915_dsc_fec_support", 0644, root, 1508 connector, &i915_dsc_fec_support_fops); 1509 1510 debugfs_create_file("i915_dsc_bpc", 0644, root, 1511 connector, &i915_dsc_bpc_fops); 1512 1513 debugfs_create_file("i915_dsc_output_format", 0644, root, 1514 connector, &i915_dsc_output_format_fops); 1515 } 1516 1517 if (connector->connector_type == DRM_MODE_CONNECTOR_DSI || 1518 connector->connector_type == DRM_MODE_CONNECTOR_eDP || 1519 connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1520 connector->connector_type == DRM_MODE_CONNECTOR_HDMIA || 1521 connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) 1522 debugfs_create_file("i915_lpsp_capability", 0444, root, 1523 connector, &i915_lpsp_capability_fops); 1524 } 1525 1526 /** 1527 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files 1528 * @crtc: pointer to a drm_crtc 1529 * 1530 * Failure to add debugfs entries should generally be ignored. 1531 */ 1532 void intel_crtc_debugfs_add(struct intel_crtc *crtc) 1533 { 1534 struct dentry *root = crtc->base.debugfs_entry; 1535 1536 if (!root) 1537 return; 1538 1539 crtc_updates_add(crtc); 1540 intel_drrs_crtc_debugfs_add(crtc); 1541 intel_fbc_crtc_debugfs_add(crtc); 1542 hsw_ips_crtc_debugfs_add(crtc); 1543 1544 debugfs_create_file("i915_current_bpc", 0444, root, crtc, 1545 &i915_current_bpc_fops); 1546 debugfs_create_file("i915_pipe", 0444, root, crtc, 1547 &intel_crtc_pipe_fops); 1548 } 1549