1379bc100SJani Nikula /* SPDX-License-Identifier: MIT */ 2379bc100SJani Nikula /* 3379bc100SJani Nikula * Copyright © 2019 Intel Corporation 4379bc100SJani Nikula */ 5379bc100SJani Nikula 6379bc100SJani Nikula #ifndef __INTEL_DDI_H__ 7379bc100SJani Nikula #define __INTEL_DDI_H__ 8379bc100SJani Nikula 9ef79fafeSVille Syrjälä #include "i915_reg.h" 10379bc100SJani Nikula 11379bc100SJani Nikula struct drm_connector_state; 12379bc100SJani Nikula struct drm_i915_private; 13*6f51260fSJani Nikula struct intel_atomic_state; 14379bc100SJani Nikula struct intel_connector; 15379bc100SJani Nikula struct intel_crtc; 16379bc100SJani Nikula struct intel_crtc_state; 17379bc100SJani Nikula struct intel_dp; 18379bc100SJani Nikula struct intel_dpll_hw_state; 19379bc100SJani Nikula struct intel_encoder; 20dcb38f79SDave Airlie struct intel_shared_dpll; 21*6f51260fSJani Nikula enum pipe; 22*6f51260fSJani Nikula enum port; 230b9c9290SSean Paul enum transcoder; 24379bc100SJani Nikula 25ef79fafeSVille Syrjälä i915_reg_t dp_tp_ctl_reg(struct intel_encoder *encoder, 26ef79fafeSVille Syrjälä const struct intel_crtc_state *crtc_state); 27ef79fafeSVille Syrjälä i915_reg_t dp_tp_status_reg(struct intel_encoder *encoder, 28ef79fafeSVille Syrjälä const struct intel_crtc_state *crtc_state); 29ede9771dSVille Syrjälä void intel_ddi_fdi_post_disable(struct intel_atomic_state *state, 30ede9771dSVille Syrjälä struct intel_encoder *intel_encoder, 31379bc100SJani Nikula const struct intel_crtc_state *old_crtc_state, 32379bc100SJani Nikula const struct drm_connector_state *old_conn_state); 33c133df69SVille Syrjälä void intel_ddi_enable_clock(struct intel_encoder *encoder, 34ad952982SVille Syrjälä const struct intel_crtc_state *crtc_state); 35d39ef5d5SVille Syrjälä void intel_ddi_disable_clock(struct intel_encoder *encoder); 36351221ffSVille Syrjälä void intel_ddi_get_clock(struct intel_encoder *encoder, 37351221ffSVille Syrjälä struct intel_crtc_state *crtc_state, 38351221ffSVille Syrjälä struct intel_shared_dpll *pll); 39d135368dSVille Syrjälä void hsw_ddi_enable_clock(struct intel_encoder *encoder, 40d135368dSVille Syrjälä const struct intel_crtc_state *crtc_state); 41d135368dSVille Syrjälä void hsw_ddi_disable_clock(struct intel_encoder *encoder); 420fbd8694SVille Syrjälä bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder); 43351221ffSVille Syrjälä void hsw_ddi_get_config(struct intel_encoder *encoder, 44351221ffSVille Syrjälä struct intel_crtc_state *crtc_state); 45351221ffSVille Syrjälä struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder); 46266152aeSVille Syrjälä void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder, 47379bc100SJani Nikula const struct intel_crtc_state *crtc_state); 48dcb38f79SDave Airlie void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv, 49dcb38f79SDave Airlie enum port port); 50379bc100SJani Nikula void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port); 51379bc100SJani Nikula bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe); 52eed22a46SVille Syrjälä void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder, 53eed22a46SVille Syrjälä const struct intel_crtc_state *crtc_state); 54379bc100SJani Nikula void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state); 5502a715c3SVille Syrjälä void intel_ddi_enable_pipe_clock(struct intel_encoder *encoder, 5602a715c3SVille Syrjälä const struct intel_crtc_state *crtc_state); 57379bc100SJani Nikula void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state); 580c06fa15SGwan-gyeong Mun void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state, 590c06fa15SGwan-gyeong Mun const struct drm_connector_state *conn_state); 60379bc100SJani Nikula bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); 61379bc100SJani Nikula void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state, 62379bc100SJani Nikula bool state); 63379bc100SJani Nikula void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv, 64379bc100SJani Nikula struct intel_crtc_state *crtc_state); 651a67a168SAnshuman Gupta int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder, 660b9c9290SSean Paul enum transcoder cpu_transcoder, 671a67a168SAnshuman Gupta bool enable, u32 hdcp_mask); 68aaca50efSVille Syrjälä void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder); 69193299adSVille Syrjälä int intel_ddi_level(struct intel_encoder *encoder, 70d0920a45SVille Syrjälä const struct intel_crtc_state *crtc_state, 71d0920a45SVille Syrjälä int lane); 72379bc100SJani Nikula 73379bc100SJani Nikula #endif /* __INTEL_DDI_H__ */ 74