1379bc100SJani Nikula /* SPDX-License-Identifier: MIT */ 2379bc100SJani Nikula /* 3379bc100SJani Nikula * Copyright © 2019 Intel Corporation 4379bc100SJani Nikula */ 5379bc100SJani Nikula 6379bc100SJani Nikula #ifndef __INTEL_DDI_H__ 7379bc100SJani Nikula #define __INTEL_DDI_H__ 8379bc100SJani Nikula 9379bc100SJani Nikula #include <drm/i915_drm.h> 10379bc100SJani Nikula 11379bc100SJani Nikula #include "intel_display.h" 12379bc100SJani Nikula 13379bc100SJani Nikula struct drm_connector_state; 14379bc100SJani Nikula struct drm_i915_private; 15379bc100SJani Nikula struct intel_connector; 16379bc100SJani Nikula struct intel_crtc; 17379bc100SJani Nikula struct intel_crtc_state; 18379bc100SJani Nikula struct intel_dp; 19379bc100SJani Nikula struct intel_dpll_hw_state; 20379bc100SJani Nikula struct intel_encoder; 21379bc100SJani Nikula 22379bc100SJani Nikula void intel_ddi_fdi_post_disable(struct intel_encoder *intel_encoder, 23379bc100SJani Nikula const struct intel_crtc_state *old_crtc_state, 24379bc100SJani Nikula const struct drm_connector_state *old_conn_state); 256a6d79deSVille Syrjälä void hsw_fdi_link_train(struct intel_encoder *encoder, 26379bc100SJani Nikula const struct intel_crtc_state *crtc_state); 27379bc100SJani Nikula void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port); 28379bc100SJani Nikula bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe); 29379bc100SJani Nikula void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state); 30379bc100SJani Nikula void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state); 31379bc100SJani Nikula void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state); 32379bc100SJani Nikula void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state); 330c06fa15SGwan-gyeong Mun void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state, 340c06fa15SGwan-gyeong Mun const struct drm_connector_state *conn_state); 35379bc100SJani Nikula bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); 36379bc100SJani Nikula void intel_ddi_get_config(struct intel_encoder *encoder, 37379bc100SJani Nikula struct intel_crtc_state *pipe_config); 38379bc100SJani Nikula void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state, 39379bc100SJani Nikula bool state); 40379bc100SJani Nikula void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv, 41379bc100SJani Nikula struct intel_crtc_state *crtc_state); 42379bc100SJani Nikula u32 bxt_signal_levels(struct intel_dp *intel_dp); 43379bc100SJani Nikula u32 ddi_signal_levels(struct intel_dp *intel_dp); 44379bc100SJani Nikula u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder); 45379bc100SJani Nikula u8 intel_ddi_dp_pre_emphasis_max(struct intel_encoder *encoder, 46379bc100SJani Nikula u8 voltage_swing); 47379bc100SJani Nikula int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder, 48379bc100SJani Nikula bool enable); 49379bc100SJani Nikula void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder); 50379bc100SJani Nikula int cnl_calc_wrpll_link(struct drm_i915_private *dev_priv, 51379bc100SJani Nikula struct intel_dpll_hw_state *state); 52379bc100SJani Nikula 53379bc100SJani Nikula #endif /* __INTEL_DDI_H__ */ 54