1379bc100SJani Nikula /* SPDX-License-Identifier: MIT */ 2379bc100SJani Nikula /* 3379bc100SJani Nikula * Copyright © 2019 Intel Corporation 4379bc100SJani Nikula */ 5379bc100SJani Nikula 6379bc100SJani Nikula #ifndef __INTEL_DDI_H__ 7379bc100SJani Nikula #define __INTEL_DDI_H__ 8379bc100SJani Nikula 9379bc100SJani Nikula #include "intel_display.h" 10ef79fafeSVille Syrjälä #include "i915_reg.h" 11379bc100SJani Nikula 12379bc100SJani Nikula struct drm_connector_state; 13379bc100SJani Nikula struct drm_i915_private; 14379bc100SJani Nikula struct intel_connector; 15379bc100SJani Nikula struct intel_crtc; 16379bc100SJani Nikula struct intel_crtc_state; 17379bc100SJani Nikula struct intel_dp; 18379bc100SJani Nikula struct intel_dpll_hw_state; 19379bc100SJani Nikula struct intel_encoder; 20dcb38f79SDave Airlie struct intel_shared_dpll; 210b9c9290SSean Paul enum transcoder; 22379bc100SJani Nikula 23ef79fafeSVille Syrjälä i915_reg_t dp_tp_ctl_reg(struct intel_encoder *encoder, 24ef79fafeSVille Syrjälä const struct intel_crtc_state *crtc_state); 25ef79fafeSVille Syrjälä i915_reg_t dp_tp_status_reg(struct intel_encoder *encoder, 26ef79fafeSVille Syrjälä const struct intel_crtc_state *crtc_state); 27ede9771dSVille Syrjälä void intel_ddi_fdi_post_disable(struct intel_atomic_state *state, 28ede9771dSVille Syrjälä struct intel_encoder *intel_encoder, 29379bc100SJani Nikula const struct intel_crtc_state *old_crtc_state, 30379bc100SJani Nikula const struct drm_connector_state *old_conn_state); 31c133df69SVille Syrjälä void intel_ddi_enable_clock(struct intel_encoder *encoder, 32ad952982SVille Syrjälä const struct intel_crtc_state *crtc_state); 33351221ffSVille Syrjälä void intel_ddi_get_clock(struct intel_encoder *encoder, 34351221ffSVille Syrjälä struct intel_crtc_state *crtc_state, 35351221ffSVille Syrjälä struct intel_shared_dpll *pll); 36d135368dSVille Syrjälä void hsw_ddi_enable_clock(struct intel_encoder *encoder, 37d135368dSVille Syrjälä const struct intel_crtc_state *crtc_state); 38d135368dSVille Syrjälä void hsw_ddi_disable_clock(struct intel_encoder *encoder); 390fbd8694SVille Syrjälä bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder); 40351221ffSVille Syrjälä void hsw_ddi_get_config(struct intel_encoder *encoder, 41351221ffSVille Syrjälä struct intel_crtc_state *crtc_state); 42351221ffSVille Syrjälä struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder); 43266152aeSVille Syrjälä void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder, 44379bc100SJani Nikula const struct intel_crtc_state *crtc_state); 45dcb38f79SDave Airlie void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv, 46dcb38f79SDave Airlie enum port port); 47379bc100SJani Nikula void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port); 48379bc100SJani Nikula bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe); 49eed22a46SVille Syrjälä void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder, 50eed22a46SVille Syrjälä const struct intel_crtc_state *crtc_state); 51379bc100SJani Nikula void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state); 5202a715c3SVille Syrjälä void intel_ddi_enable_pipe_clock(struct intel_encoder *encoder, 5302a715c3SVille Syrjälä const struct intel_crtc_state *crtc_state); 54379bc100SJani Nikula void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state); 550c06fa15SGwan-gyeong Mun void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state, 560c06fa15SGwan-gyeong Mun const struct drm_connector_state *conn_state); 57379bc100SJani Nikula bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); 58379bc100SJani Nikula void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state, 59379bc100SJani Nikula bool state); 60379bc100SJani Nikula void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv, 61379bc100SJani Nikula struct intel_crtc_state *crtc_state); 621a67a168SAnshuman Gupta int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder, 630b9c9290SSean Paul enum transcoder cpu_transcoder, 641a67a168SAnshuman Gupta bool enable, u32 hdcp_mask); 65aaca50efSVille Syrjälä void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder); 66*193299adSVille Syrjälä int intel_ddi_level(struct intel_encoder *encoder, 67*193299adSVille Syrjälä const struct intel_crtc_state *crtc_state); 68379bc100SJani Nikula 69379bc100SJani Nikula #endif /* __INTEL_DDI_H__ */ 70