1379bc100SJani Nikula /* SPDX-License-Identifier: MIT */
2379bc100SJani Nikula /*
3379bc100SJani Nikula  * Copyright © 2019 Intel Corporation
4379bc100SJani Nikula  */
5379bc100SJani Nikula 
6379bc100SJani Nikula #ifndef __INTEL_DDI_H__
7379bc100SJani Nikula #define __INTEL_DDI_H__
8379bc100SJani Nikula 
9ce2fce25SMatt Roper #include "i915_reg_defs.h"
10379bc100SJani Nikula 
11379bc100SJani Nikula struct drm_connector_state;
12379bc100SJani Nikula struct drm_i915_private;
136f51260fSJani Nikula struct intel_atomic_state;
14*021a62a5SVille Syrjälä struct intel_bios_encoder_data;
15379bc100SJani Nikula struct intel_connector;
16379bc100SJani Nikula struct intel_crtc;
17379bc100SJani Nikula struct intel_crtc_state;
18379bc100SJani Nikula struct intel_dp;
19379bc100SJani Nikula struct intel_dpll_hw_state;
20379bc100SJani Nikula struct intel_encoder;
21dcb38f79SDave Airlie struct intel_shared_dpll;
226f51260fSJani Nikula enum pipe;
236f51260fSJani Nikula enum port;
240b9c9290SSean Paul enum transcoder;
25379bc100SJani Nikula 
26ef79fafeSVille Syrjälä i915_reg_t dp_tp_ctl_reg(struct intel_encoder *encoder,
27ef79fafeSVille Syrjälä 			 const struct intel_crtc_state *crtc_state);
28ef79fafeSVille Syrjälä i915_reg_t dp_tp_status_reg(struct intel_encoder *encoder,
29ef79fafeSVille Syrjälä 			    const struct intel_crtc_state *crtc_state);
30ede9771dSVille Syrjälä void intel_ddi_fdi_post_disable(struct intel_atomic_state *state,
31ede9771dSVille Syrjälä 				struct intel_encoder *intel_encoder,
32379bc100SJani Nikula 				const struct intel_crtc_state *old_crtc_state,
33379bc100SJani Nikula 				const struct drm_connector_state *old_conn_state);
34c133df69SVille Syrjälä void intel_ddi_enable_clock(struct intel_encoder *encoder,
35ad952982SVille Syrjälä 			    const struct intel_crtc_state *crtc_state);
36d39ef5d5SVille Syrjälä void intel_ddi_disable_clock(struct intel_encoder *encoder);
37351221ffSVille Syrjälä void intel_ddi_get_clock(struct intel_encoder *encoder,
38351221ffSVille Syrjälä 			 struct intel_crtc_state *crtc_state,
39351221ffSVille Syrjälä 			 struct intel_shared_dpll *pll);
40d135368dSVille Syrjälä void hsw_ddi_enable_clock(struct intel_encoder *encoder,
41d135368dSVille Syrjälä 			  const struct intel_crtc_state *crtc_state);
42d135368dSVille Syrjälä void hsw_ddi_disable_clock(struct intel_encoder *encoder);
430fbd8694SVille Syrjälä bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder);
447c1da068SImre Deak enum icl_port_dpll_id
457c1da068SImre Deak intel_ddi_port_pll_type(struct intel_encoder *encoder,
467c1da068SImre Deak 			const struct intel_crtc_state *crtc_state);
47351221ffSVille Syrjälä void hsw_ddi_get_config(struct intel_encoder *encoder,
48351221ffSVille Syrjälä 			struct intel_crtc_state *crtc_state);
49351221ffSVille Syrjälä struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
50266152aeSVille Syrjälä void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
51379bc100SJani Nikula 				const struct intel_crtc_state *crtc_state);
52dcb38f79SDave Airlie void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
53dcb38f79SDave Airlie 			     enum port port);
54*021a62a5SVille Syrjälä void intel_ddi_init(struct drm_i915_private *dev_priv,
55*021a62a5SVille Syrjälä 		    const struct intel_bios_encoder_data *devdata);
56379bc100SJani Nikula bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
57eed22a46SVille Syrjälä void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder,
58eed22a46SVille Syrjälä 				      const struct intel_crtc_state *crtc_state);
59379bc100SJani Nikula void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
6055a4679eSVille Syrjälä void intel_ddi_enable_transcoder_clock(struct intel_encoder *encoder,
6102a715c3SVille Syrjälä 				       const struct intel_crtc_state *crtc_state);
6255a4679eSVille Syrjälä void intel_ddi_disable_transcoder_clock(const  struct intel_crtc_state *crtc_state);
630c06fa15SGwan-gyeong Mun void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state,
640c06fa15SGwan-gyeong Mun 			  const struct drm_connector_state *conn_state);
65379bc100SJani Nikula bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
66379bc100SJani Nikula void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state,
67379bc100SJani Nikula 				    bool state);
68379bc100SJani Nikula void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
69379bc100SJani Nikula 					 struct intel_crtc_state *crtc_state);
701a67a168SAnshuman Gupta int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
710b9c9290SSean Paul 			       enum transcoder cpu_transcoder,
721a67a168SAnshuman Gupta 			       bool enable, u32 hdcp_mask);
73aaca50efSVille Syrjälä void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
74193299adSVille Syrjälä int intel_ddi_level(struct intel_encoder *encoder,
75d0920a45SVille Syrjälä 		    const struct intel_crtc_state *crtc_state,
76d0920a45SVille Syrjälä 		    int lane);
7727ac123bSImre Deak void intel_ddi_update_active_dpll(struct intel_atomic_state *state,
7827ac123bSImre Deak 				  struct intel_encoder *encoder,
7927ac123bSImre Deak 				  struct intel_crtc *crtc);
80379bc100SJani Nikula 
81379bc100SJani Nikula #endif /* __INTEL_DDI_H__ */
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