1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2023 Intel Corporation
4  */
5 
6 #ifndef __INTEL_CX0_PHY_H__
7 #define __INTEL_CX0_PHY_H__
8 
9 #include <linux/types.h>
10 #include <linux/bitfield.h>
11 #include <linux/bits.h>
12 
13 #include "i915_drv.h"
14 #include "intel_display_types.h"
15 
16 struct drm_i915_private;
17 struct intel_encoder;
18 struct intel_crtc_state;
19 enum icl_port_dpll_id;
20 enum phy;
21 
22 bool intel_is_c10phy(struct drm_i915_private *dev_priv, enum phy phy);
23 void intel_mtl_pll_enable(struct intel_encoder *encoder,
24 			  const struct intel_crtc_state *crtc_state);
25 void intel_mtl_pll_disable(struct intel_encoder *encoder);
26 enum icl_port_dpll_id
27 intel_mtl_port_pll_type(struct intel_encoder *encoder,
28 			const struct intel_crtc_state *crtc_state);
29 void intel_c10pll_readout_hw_state(struct intel_encoder *encoder, struct intel_c10pll_state *pll_state);
30 int intel_cx0pll_calc_state(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder);
31 void intel_c10pll_dump_hw_state(struct drm_i915_private *dev_priv,
32 				const struct intel_c10pll_state *hw_state);
33 int intel_c10pll_calc_port_clock(struct intel_encoder *encoder,
34 				 const struct intel_c10pll_state *pll_state);
35 void intel_c10pll_state_verify(struct intel_atomic_state *state,
36 			       struct intel_crtc_state *new_crtc_state);
37 void intel_c20pll_readout_hw_state(struct intel_encoder *encoder,
38 				   struct intel_c20pll_state *pll_state);
39 void intel_c20pll_dump_hw_state(struct drm_i915_private *i915,
40 				const struct intel_c20pll_state *hw_state);
41 int intel_c20pll_calc_port_clock(struct intel_encoder *encoder,
42 				 const struct intel_c20pll_state *pll_state);
43 void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder,
44 				     const struct intel_crtc_state *crtc_state);
45 int intel_cx0_phy_check_hdmi_link_rate(struct intel_hdmi *hdmi, int clock);
46 void intel_cx0_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
47 				       const struct intel_crtc_state *crtc_state,
48 				       u32 level);
49 int intel_mtl_tbt_calc_port_clock(struct intel_encoder *encoder);
50 #endif /* __INTEL_CX0_PHY_H__ */
51