1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #ifndef __INTEL_CDCLK_H__ 7 #define __INTEL_CDCLK_H__ 8 9 #include <linux/types.h> 10 11 #include "i915_drv.h" 12 #include "intel_display.h" 13 #include "intel_global_state.h" 14 15 struct drm_i915_private; 16 struct intel_atomic_state; 17 struct intel_crtc_state; 18 19 struct intel_cdclk_state { 20 struct intel_global_state base; 21 22 /* 23 * Logical configuration of cdclk (used for all scaling, 24 * watermark, etc. calculations and checks). This is 25 * computed as if all enabled crtcs were active. 26 */ 27 struct intel_cdclk_config logical; 28 29 /* 30 * Actual configuration of cdclk, can be different from the 31 * logical configuration only when all crtc's are DPMS off. 32 */ 33 struct intel_cdclk_config actual; 34 35 /* minimum acceptable cdclk for each pipe */ 36 int min_cdclk[I915_MAX_PIPES]; 37 /* minimum acceptable voltage level for each pipe */ 38 u8 min_voltage_level[I915_MAX_PIPES]; 39 40 /* pipe to which cd2x update is synchronized */ 41 enum pipe pipe; 42 43 /* forced minimum cdclk for glk+ audio w/a */ 44 int force_min_cdclk; 45 46 /* bitmask of active pipes */ 47 u8 active_pipes; 48 }; 49 50 int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state); 51 void intel_cdclk_init_hw(struct drm_i915_private *i915); 52 void intel_cdclk_uninit_hw(struct drm_i915_private *i915); 53 void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv); 54 void intel_update_max_cdclk(struct drm_i915_private *dev_priv); 55 void intel_update_cdclk(struct drm_i915_private *dev_priv); 56 u32 intel_read_rawclk(struct drm_i915_private *dev_priv); 57 bool intel_cdclk_needs_modeset(const struct intel_cdclk_config *a, 58 const struct intel_cdclk_config *b); 59 void intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state); 60 void intel_set_cdclk_post_plane_update(struct intel_atomic_state *state); 61 void intel_dump_cdclk_config(const struct intel_cdclk_config *cdclk_config, 62 const char *context); 63 int intel_modeset_calc_cdclk(struct intel_atomic_state *state); 64 void intel_cdclk_get_cdclk(struct drm_i915_private *dev_priv, 65 struct intel_cdclk_config *cdclk_config); 66 int intel_cdclk_atomic_check(struct intel_atomic_state *state, 67 bool *need_cdclk_calc); 68 struct intel_cdclk_state * 69 intel_atomic_get_cdclk_state(struct intel_atomic_state *state); 70 71 #define to_intel_cdclk_state(x) container_of((x), struct intel_cdclk_state, base) 72 #define intel_atomic_get_old_cdclk_state(state) \ 73 to_intel_cdclk_state(intel_atomic_get_old_global_obj_state(state, &to_i915(state->base.dev)->cdclk.obj)) 74 #define intel_atomic_get_new_cdclk_state(state) \ 75 to_intel_cdclk_state(intel_atomic_get_new_global_obj_state(state, &to_i915(state->base.dev)->cdclk.obj)) 76 77 int intel_cdclk_init(struct drm_i915_private *dev_priv); 78 79 #endif /* __INTEL_CDCLK_H__ */ 80