1 /*
2  * Copyright © 2016-2019 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  */
23 
24 /*
25  * Please use intel_vbt_defs.h for VBT private data, to hide and abstract away
26  * the VBT from the rest of the driver. Add the parsed, clean data to struct
27  * intel_vbt_data within struct drm_i915_private.
28  */
29 
30 #ifndef _INTEL_BIOS_H_
31 #define _INTEL_BIOS_H_
32 
33 #include <linux/types.h>
34 
35 struct drm_i915_private;
36 struct intel_bios_encoder_data;
37 struct intel_crtc_state;
38 struct intel_encoder;
39 enum port;
40 
41 enum intel_backlight_type {
42 	INTEL_BACKLIGHT_PMIC,
43 	INTEL_BACKLIGHT_LPSS,
44 	INTEL_BACKLIGHT_DISPLAY_DDI,
45 	INTEL_BACKLIGHT_DSI_DCS,
46 	INTEL_BACKLIGHT_PANEL_DRIVER_INTERFACE,
47 	INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE,
48 };
49 
50 struct edp_power_seq {
51 	u16 t1_t3;
52 	u16 t8;
53 	u16 t9;
54 	u16 t10;
55 	u16 t11_t12;
56 } __packed;
57 
58 /*
59  * MIPI Sequence Block definitions
60  *
61  * Note the VBT spec has AssertReset / DeassertReset swapped from their
62  * usual naming, we use the proper names here to avoid confusion when
63  * reading the code.
64  */
65 enum mipi_seq {
66 	MIPI_SEQ_END = 0,
67 	MIPI_SEQ_DEASSERT_RESET,	/* Spec says MipiAssertResetPin */
68 	MIPI_SEQ_INIT_OTP,
69 	MIPI_SEQ_DISPLAY_ON,
70 	MIPI_SEQ_DISPLAY_OFF,
71 	MIPI_SEQ_ASSERT_RESET,		/* Spec says MipiDeassertResetPin */
72 	MIPI_SEQ_BACKLIGHT_ON,		/* sequence block v2+ */
73 	MIPI_SEQ_BACKLIGHT_OFF,		/* sequence block v2+ */
74 	MIPI_SEQ_TEAR_ON,		/* sequence block v2+ */
75 	MIPI_SEQ_TEAR_OFF,		/* sequence block v3+ */
76 	MIPI_SEQ_POWER_ON,		/* sequence block v3+ */
77 	MIPI_SEQ_POWER_OFF,		/* sequence block v3+ */
78 	MIPI_SEQ_MAX
79 };
80 
81 enum mipi_seq_element {
82 	MIPI_SEQ_ELEM_END = 0,
83 	MIPI_SEQ_ELEM_SEND_PKT,
84 	MIPI_SEQ_ELEM_DELAY,
85 	MIPI_SEQ_ELEM_GPIO,
86 	MIPI_SEQ_ELEM_I2C,		/* sequence block v2+ */
87 	MIPI_SEQ_ELEM_SPI,		/* sequence block v3+ */
88 	MIPI_SEQ_ELEM_PMIC,		/* sequence block v3+ */
89 	MIPI_SEQ_ELEM_MAX
90 };
91 
92 #define MIPI_DSI_UNDEFINED_PANEL_ID	0
93 #define MIPI_DSI_GENERIC_PANEL_ID	1
94 
95 struct mipi_config {
96 	u16 panel_id;
97 
98 	/* General Params */
99 	u32 enable_dithering:1;
100 	u32 rsvd1:1;
101 	u32 is_bridge:1;
102 
103 	u32 panel_arch_type:2;
104 	u32 is_cmd_mode:1;
105 
106 #define NON_BURST_SYNC_PULSE	0x1
107 #define NON_BURST_SYNC_EVENTS	0x2
108 #define BURST_MODE		0x3
109 	u32 video_transfer_mode:2;
110 
111 	u32 cabc_supported:1;
112 #define PPS_BLC_PMIC   0
113 #define PPS_BLC_SOC    1
114 	u32 pwm_blc:1;
115 
116 	/* Bit 13:10 */
117 #define PIXEL_FORMAT_RGB565			0x1
118 #define PIXEL_FORMAT_RGB666			0x2
119 #define PIXEL_FORMAT_RGB666_LOOSELY_PACKED	0x3
120 #define PIXEL_FORMAT_RGB888			0x4
121 	u32 videomode_color_format:4;
122 
123 	/* Bit 15:14 */
124 #define ENABLE_ROTATION_0	0x0
125 #define ENABLE_ROTATION_90	0x1
126 #define ENABLE_ROTATION_180	0x2
127 #define ENABLE_ROTATION_270	0x3
128 	u32 rotation:2;
129 	u32 bta_enabled:1;
130 	u32 rsvd2:15;
131 
132 	/* 2 byte Port Description */
133 #define DUAL_LINK_NOT_SUPPORTED	0
134 #define DUAL_LINK_FRONT_BACK	1
135 #define DUAL_LINK_PIXEL_ALT	2
136 	u16 dual_link:2;
137 	u16 lane_cnt:2;
138 	u16 pixel_overlap:3;
139 	u16 rgb_flip:1;
140 #define DL_DCS_PORT_A			0x00
141 #define DL_DCS_PORT_C			0x01
142 #define DL_DCS_PORT_A_AND_C		0x02
143 	u16 dl_dcs_cabc_ports:2;
144 	u16 dl_dcs_backlight_ports:2;
145 	u16 rsvd3:4;
146 
147 	u16 rsvd4;
148 
149 	u8 rsvd5;
150 	u32 target_burst_mode_freq;
151 	u32 dsi_ddr_clk;
152 	u32 bridge_ref_clk;
153 
154 #define  BYTE_CLK_SEL_20MHZ		0
155 #define  BYTE_CLK_SEL_10MHZ		1
156 #define  BYTE_CLK_SEL_5MHZ		2
157 	u8 byte_clk_sel:2;
158 
159 	u8 rsvd6:6;
160 
161 	/* DPHY Flags */
162 	u16 dphy_param_valid:1;
163 	u16 eot_pkt_disabled:1;
164 	u16 enable_clk_stop:1;
165 	u16 rsvd7:13;
166 
167 	u32 hs_tx_timeout;
168 	u32 lp_rx_timeout;
169 	u32 turn_around_timeout;
170 	u32 device_reset_timer;
171 	u32 master_init_timer;
172 	u32 dbi_bw_timer;
173 	u32 lp_byte_clk_val;
174 
175 	/*  4 byte Dphy Params */
176 	u32 prepare_cnt:6;
177 	u32 rsvd8:2;
178 	u32 clk_zero_cnt:8;
179 	u32 trail_cnt:5;
180 	u32 rsvd9:3;
181 	u32 exit_zero_cnt:6;
182 	u32 rsvd10:2;
183 
184 	u32 clk_lane_switch_cnt;
185 	u32 hl_switch_cnt;
186 
187 	u32 rsvd11[6];
188 
189 	/* timings based on dphy spec */
190 	u8 tclk_miss;
191 	u8 tclk_post;
192 	u8 rsvd12;
193 	u8 tclk_pre;
194 	u8 tclk_prepare;
195 	u8 tclk_settle;
196 	u8 tclk_term_enable;
197 	u8 tclk_trail;
198 	u16 tclk_prepare_clkzero;
199 	u8 rsvd13;
200 	u8 td_term_enable;
201 	u8 teot;
202 	u8 ths_exit;
203 	u8 ths_prepare;
204 	u16 ths_prepare_hszero;
205 	u8 rsvd14;
206 	u8 ths_settle;
207 	u8 ths_skip;
208 	u8 ths_trail;
209 	u8 tinit;
210 	u8 tlpx;
211 	u8 rsvd15[3];
212 
213 	/* GPIOs */
214 	u8 panel_enable;
215 	u8 bl_enable;
216 	u8 pwm_enable;
217 	u8 reset_r_n;
218 	u8 pwr_down_r;
219 	u8 stdby_r_n;
220 
221 } __packed;
222 
223 /* all delays have a unit of 100us */
224 struct mipi_pps_data {
225 	u16 panel_on_delay;
226 	u16 bl_enable_delay;
227 	u16 bl_disable_delay;
228 	u16 panel_off_delay;
229 	u16 panel_power_cycle_delay;
230 } __packed;
231 
232 void intel_bios_init(struct drm_i915_private *dev_priv);
233 void intel_bios_driver_remove(struct drm_i915_private *dev_priv);
234 bool intel_bios_is_valid_vbt(const void *buf, size_t size);
235 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv);
236 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin);
237 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port);
238 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
239 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum port port);
240 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, enum port *port);
241 bool intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
242 				     enum port port);
243 bool intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
244 				  enum port port);
245 bool intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
246 					enum port port);
247 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, enum port port);
248 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
249 			       struct intel_crtc_state *crtc_state,
250 			       int dsc_max_bpc);
251 int intel_bios_max_tmds_clock(struct intel_encoder *encoder);
252 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder);
253 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder);
254 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder);
255 bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915, enum port port);
256 bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port);
257 
258 const struct intel_bios_encoder_data *
259 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port);
260 
261 bool intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata);
262 bool intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata);
263 bool intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata);
264 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata);
265 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata);
266 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata);
267 int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata);
268 
269 #endif /* _INTEL_BIOS_H_ */
270