1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <drm/drm_dp_helper.h> 29 #include <drm/i915_drm.h> 30 31 #include "display/intel_display.h" 32 #include "display/intel_display_types.h" 33 #include "display/intel_gmbus.h" 34 35 #include "i915_drv.h" 36 37 #define _INTEL_BIOS_PRIVATE 38 #include "intel_vbt_defs.h" 39 40 /** 41 * DOC: Video BIOS Table (VBT) 42 * 43 * The Video BIOS Table, or VBT, provides platform and board specific 44 * configuration information to the driver that is not discoverable or available 45 * through other means. The configuration is mostly related to display 46 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 47 * the PCI ROM. 48 * 49 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 50 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 51 * contain the actual configuration information. The VBT Header, and thus the 52 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 53 * BDB Header. The data blocks are concatenated after the BDB Header. The data 54 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 55 * data. (Block 53, the MIPI Sequence Block is an exception.) 56 * 57 * The driver parses the VBT during load. The relevant information is stored in 58 * driver private data for ease of use, and the actual VBT is not read after 59 * that. 60 */ 61 62 /* Wrapper for VBT child device config */ 63 struct display_device_data { 64 struct child_device_config child; 65 struct dsc_compression_parameters_entry *dsc; 66 struct list_head node; 67 }; 68 69 #define SLAVE_ADDR1 0x70 70 #define SLAVE_ADDR2 0x72 71 72 /* Get BDB block size given a pointer to Block ID. */ 73 static u32 _get_blocksize(const u8 *block_base) 74 { 75 /* The MIPI Sequence Block v3+ has a separate size field. */ 76 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 77 return *((const u32 *)(block_base + 4)); 78 else 79 return *((const u16 *)(block_base + 1)); 80 } 81 82 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 83 static u32 get_blocksize(const void *block_data) 84 { 85 return _get_blocksize(block_data - 3); 86 } 87 88 static const void * 89 find_section(const void *_bdb, enum bdb_block_id section_id) 90 { 91 const struct bdb_header *bdb = _bdb; 92 const u8 *base = _bdb; 93 int index = 0; 94 u32 total, current_size; 95 enum bdb_block_id current_id; 96 97 /* skip to first section */ 98 index += bdb->header_size; 99 total = bdb->bdb_size; 100 101 /* walk the sections looking for section_id */ 102 while (index + 3 < total) { 103 current_id = *(base + index); 104 current_size = _get_blocksize(base + index); 105 index += 3; 106 107 if (index + current_size > total) 108 return NULL; 109 110 if (current_id == section_id) 111 return base + index; 112 113 index += current_size; 114 } 115 116 return NULL; 117 } 118 119 static void 120 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 121 const struct lvds_dvo_timing *dvo_timing) 122 { 123 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 124 dvo_timing->hactive_lo; 125 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 126 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 127 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 128 ((dvo_timing->hsync_pulse_width_hi << 8) | 129 dvo_timing->hsync_pulse_width_lo); 130 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 131 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 132 133 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 134 dvo_timing->vactive_lo; 135 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 136 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 137 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 138 ((dvo_timing->vsync_pulse_width_hi << 4) | 139 dvo_timing->vsync_pulse_width_lo); 140 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 141 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 142 panel_fixed_mode->clock = dvo_timing->clock * 10; 143 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 144 145 if (dvo_timing->hsync_positive) 146 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 147 else 148 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 149 150 if (dvo_timing->vsync_positive) 151 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 152 else 153 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 154 155 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 156 dvo_timing->himage_lo; 157 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 158 dvo_timing->vimage_lo; 159 160 /* Some VBTs have bogus h/vtotal values */ 161 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 162 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 163 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 164 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 165 166 drm_mode_set_name(panel_fixed_mode); 167 } 168 169 static const struct lvds_dvo_timing * 170 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, 171 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, 172 int index) 173 { 174 /* 175 * the size of fp_timing varies on the different platform. 176 * So calculate the DVO timing relative offset in LVDS data 177 * entry to get the DVO timing entry 178 */ 179 180 int lfp_data_size = 181 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - 182 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; 183 int dvo_timing_offset = 184 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - 185 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; 186 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; 187 188 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); 189 } 190 191 /* get lvds_fp_timing entry 192 * this function may return NULL if the corresponding entry is invalid 193 */ 194 static const struct lvds_fp_timing * 195 get_lvds_fp_timing(const struct bdb_header *bdb, 196 const struct bdb_lvds_lfp_data *data, 197 const struct bdb_lvds_lfp_data_ptrs *ptrs, 198 int index) 199 { 200 size_t data_ofs = (const u8 *)data - (const u8 *)bdb; 201 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ 202 size_t ofs; 203 204 if (index >= ARRAY_SIZE(ptrs->ptr)) 205 return NULL; 206 ofs = ptrs->ptr[index].fp_timing_offset; 207 if (ofs < data_ofs || 208 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) 209 return NULL; 210 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); 211 } 212 213 /* Parse general panel options */ 214 static void 215 parse_panel_options(struct drm_i915_private *dev_priv, 216 const struct bdb_header *bdb) 217 { 218 const struct bdb_lvds_options *lvds_options; 219 int panel_type; 220 int drrs_mode; 221 int ret; 222 223 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); 224 if (!lvds_options) 225 return; 226 227 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; 228 229 ret = intel_opregion_get_panel_type(dev_priv); 230 if (ret >= 0) { 231 WARN_ON(ret > 0xf); 232 panel_type = ret; 233 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type); 234 } else { 235 if (lvds_options->panel_type > 0xf) { 236 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n", 237 lvds_options->panel_type); 238 return; 239 } 240 panel_type = lvds_options->panel_type; 241 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type); 242 } 243 244 dev_priv->vbt.panel_type = panel_type; 245 246 drrs_mode = (lvds_options->dps_panel_type_bits 247 >> (panel_type * 2)) & MODE_MASK; 248 /* 249 * VBT has static DRRS = 0 and seamless DRRS = 2. 250 * The below piece of code is required to adjust vbt.drrs_type 251 * to match the enum drrs_support_type. 252 */ 253 switch (drrs_mode) { 254 case 0: 255 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; 256 DRM_DEBUG_KMS("DRRS supported mode is static\n"); 257 break; 258 case 2: 259 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; 260 DRM_DEBUG_KMS("DRRS supported mode is seamless\n"); 261 break; 262 default: 263 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 264 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n"); 265 break; 266 } 267 } 268 269 /* Try to find integrated panel timing data */ 270 static void 271 parse_lfp_panel_dtd(struct drm_i915_private *dev_priv, 272 const struct bdb_header *bdb) 273 { 274 const struct bdb_lvds_lfp_data *lvds_lfp_data; 275 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; 276 const struct lvds_dvo_timing *panel_dvo_timing; 277 const struct lvds_fp_timing *fp_timing; 278 struct drm_display_mode *panel_fixed_mode; 279 int panel_type = dev_priv->vbt.panel_type; 280 281 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); 282 if (!lvds_lfp_data) 283 return; 284 285 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); 286 if (!lvds_lfp_data_ptrs) 287 return; 288 289 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 290 lvds_lfp_data_ptrs, 291 panel_type); 292 293 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 294 if (!panel_fixed_mode) 295 return; 296 297 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 298 299 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 300 301 DRM_DEBUG_KMS("Found panel mode in BIOS VBT legacy lfp table:\n"); 302 drm_mode_debug_printmodeline(panel_fixed_mode); 303 304 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, 305 lvds_lfp_data_ptrs, 306 panel_type); 307 if (fp_timing) { 308 /* check the resolution, just to be sure */ 309 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 310 fp_timing->y_res == panel_fixed_mode->vdisplay) { 311 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 312 DRM_DEBUG_KMS("VBT initial LVDS value %x\n", 313 dev_priv->vbt.bios_lvds_val); 314 } 315 } 316 } 317 318 static void 319 parse_generic_dtd(struct drm_i915_private *dev_priv, 320 const struct bdb_header *bdb) 321 { 322 const struct bdb_generic_dtd *generic_dtd; 323 const struct generic_dtd_entry *dtd; 324 struct drm_display_mode *panel_fixed_mode; 325 int num_dtd; 326 327 generic_dtd = find_section(bdb, BDB_GENERIC_DTD); 328 if (!generic_dtd) 329 return; 330 331 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 332 DRM_ERROR("GDTD size %u is too small.\n", 333 generic_dtd->gdtd_size); 334 return; 335 } else if (generic_dtd->gdtd_size != 336 sizeof(struct generic_dtd_entry)) { 337 DRM_ERROR("Unexpected GDTD size %u\n", generic_dtd->gdtd_size); 338 /* DTD has unknown fields, but keep going */ 339 } 340 341 num_dtd = (get_blocksize(generic_dtd) - 342 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 343 if (dev_priv->vbt.panel_type >= num_dtd) { 344 DRM_ERROR("Panel type %d not found in table of %d DTD's\n", 345 dev_priv->vbt.panel_type, num_dtd); 346 return; 347 } 348 349 dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type]; 350 351 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 352 if (!panel_fixed_mode) 353 return; 354 355 panel_fixed_mode->hdisplay = dtd->hactive; 356 panel_fixed_mode->hsync_start = 357 panel_fixed_mode->hdisplay + dtd->hfront_porch; 358 panel_fixed_mode->hsync_end = 359 panel_fixed_mode->hsync_start + dtd->hsync; 360 panel_fixed_mode->htotal = 361 panel_fixed_mode->hdisplay + dtd->hblank; 362 363 panel_fixed_mode->vdisplay = dtd->vactive; 364 panel_fixed_mode->vsync_start = 365 panel_fixed_mode->vdisplay + dtd->vfront_porch; 366 panel_fixed_mode->vsync_end = 367 panel_fixed_mode->vsync_start + dtd->vsync; 368 panel_fixed_mode->vtotal = 369 panel_fixed_mode->vdisplay + dtd->vblank; 370 371 panel_fixed_mode->clock = dtd->pixel_clock; 372 panel_fixed_mode->width_mm = dtd->width_mm; 373 panel_fixed_mode->height_mm = dtd->height_mm; 374 375 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 376 drm_mode_set_name(panel_fixed_mode); 377 378 if (dtd->hsync_positive_polarity) 379 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 380 else 381 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 382 383 if (dtd->vsync_positive_polarity) 384 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 385 else 386 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 387 388 DRM_DEBUG_KMS("Found panel mode in BIOS VBT generic dtd table:\n"); 389 drm_mode_debug_printmodeline(panel_fixed_mode); 390 391 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 392 } 393 394 static void 395 parse_panel_dtd(struct drm_i915_private *dev_priv, 396 const struct bdb_header *bdb) 397 { 398 /* 399 * Older VBTs provided provided DTD information for internal displays 400 * through the "LFP panel DTD" block (42). As of VBT revision 229, 401 * that block is now deprecated and DTD information should be provided 402 * via a newer "generic DTD" block (58). Just to be safe, we'll 403 * try the new generic DTD block first on VBT >= 229, but still fall 404 * back to trying the old LFP block if that fails. 405 */ 406 if (bdb->version >= 229) 407 parse_generic_dtd(dev_priv, bdb); 408 if (!dev_priv->vbt.lfp_lvds_vbt_mode) 409 parse_lfp_panel_dtd(dev_priv, bdb); 410 } 411 412 static void 413 parse_lfp_backlight(struct drm_i915_private *dev_priv, 414 const struct bdb_header *bdb) 415 { 416 const struct bdb_lfp_backlight_data *backlight_data; 417 const struct lfp_backlight_data_entry *entry; 418 int panel_type = dev_priv->vbt.panel_type; 419 420 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); 421 if (!backlight_data) 422 return; 423 424 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 425 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n", 426 backlight_data->entry_size); 427 return; 428 } 429 430 entry = &backlight_data->data[panel_type]; 431 432 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 433 if (!dev_priv->vbt.backlight.present) { 434 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n", 435 entry->type); 436 return; 437 } 438 439 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 440 if (bdb->version >= 191 && 441 get_blocksize(backlight_data) >= sizeof(*backlight_data)) { 442 const struct lfp_backlight_control_method *method; 443 444 method = &backlight_data->backlight_control[panel_type]; 445 dev_priv->vbt.backlight.type = method->type; 446 dev_priv->vbt.backlight.controller = method->controller; 447 } 448 449 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 450 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; 451 dev_priv->vbt.backlight.min_brightness = entry->min_brightness; 452 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, " 453 "active %s, min brightness %u, level %u, controller %u\n", 454 dev_priv->vbt.backlight.pwm_freq_hz, 455 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", 456 dev_priv->vbt.backlight.min_brightness, 457 backlight_data->level[panel_type], 458 dev_priv->vbt.backlight.controller); 459 } 460 461 /* Try to find sdvo panel data */ 462 static void 463 parse_sdvo_panel_data(struct drm_i915_private *dev_priv, 464 const struct bdb_header *bdb) 465 { 466 const struct bdb_sdvo_panel_dtds *dtds; 467 struct drm_display_mode *panel_fixed_mode; 468 int index; 469 470 index = i915_modparams.vbt_sdvo_panel_type; 471 if (index == -2) { 472 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n"); 473 return; 474 } 475 476 if (index == -1) { 477 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 478 479 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); 480 if (!sdvo_lvds_options) 481 return; 482 483 index = sdvo_lvds_options->panel_type; 484 } 485 486 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS); 487 if (!dtds) 488 return; 489 490 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 491 if (!panel_fixed_mode) 492 return; 493 494 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 495 496 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 497 498 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n"); 499 drm_mode_debug_printmodeline(panel_fixed_mode); 500 } 501 502 static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv, 503 bool alternate) 504 { 505 switch (INTEL_GEN(dev_priv)) { 506 case 2: 507 return alternate ? 66667 : 48000; 508 case 3: 509 case 4: 510 return alternate ? 100000 : 96000; 511 default: 512 return alternate ? 100000 : 120000; 513 } 514 } 515 516 static void 517 parse_general_features(struct drm_i915_private *dev_priv, 518 const struct bdb_header *bdb) 519 { 520 const struct bdb_general_features *general; 521 522 general = find_section(bdb, BDB_GENERAL_FEATURES); 523 if (!general) 524 return; 525 526 dev_priv->vbt.int_tv_support = general->int_tv_support; 527 /* int_crt_support can't be trusted on earlier platforms */ 528 if (bdb->version >= 155 && 529 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv))) 530 dev_priv->vbt.int_crt_support = general->int_crt_support; 531 dev_priv->vbt.lvds_use_ssc = general->enable_ssc; 532 dev_priv->vbt.lvds_ssc_freq = 533 intel_bios_ssc_frequency(dev_priv, general->ssc_freq); 534 dev_priv->vbt.display_clock_mode = general->display_clock_mode; 535 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 536 if (bdb->version >= 181) { 537 dev_priv->vbt.orientation = general->rotate_180 ? 538 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 539 DRM_MODE_PANEL_ORIENTATION_NORMAL; 540 } else { 541 dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 542 } 543 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 544 dev_priv->vbt.int_tv_support, 545 dev_priv->vbt.int_crt_support, 546 dev_priv->vbt.lvds_use_ssc, 547 dev_priv->vbt.lvds_ssc_freq, 548 dev_priv->vbt.display_clock_mode, 549 dev_priv->vbt.fdi_rx_polarity_inverted); 550 } 551 552 static const struct child_device_config * 553 child_device_ptr(const struct bdb_general_definitions *defs, int i) 554 { 555 return (const void *) &defs->devices[i * defs->child_dev_size]; 556 } 557 558 static void 559 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version) 560 { 561 struct sdvo_device_mapping *mapping; 562 const struct display_device_data *devdata; 563 const struct child_device_config *child; 564 int count = 0; 565 566 /* 567 * Only parse SDVO mappings on gens that could have SDVO. This isn't 568 * accurate and doesn't have to be, as long as it's not too strict. 569 */ 570 if (!IS_GEN_RANGE(dev_priv, 3, 7)) { 571 DRM_DEBUG_KMS("Skipping SDVO device mapping\n"); 572 return; 573 } 574 575 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 576 child = &devdata->child; 577 578 if (child->slave_addr != SLAVE_ADDR1 && 579 child->slave_addr != SLAVE_ADDR2) { 580 /* 581 * If the slave address is neither 0x70 nor 0x72, 582 * it is not a SDVO device. Skip it. 583 */ 584 continue; 585 } 586 if (child->dvo_port != DEVICE_PORT_DVOB && 587 child->dvo_port != DEVICE_PORT_DVOC) { 588 /* skip the incorrect SDVO port */ 589 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); 590 continue; 591 } 592 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" 593 " %s port\n", 594 child->slave_addr, 595 (child->dvo_port == DEVICE_PORT_DVOB) ? 596 "SDVOB" : "SDVOC"); 597 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1]; 598 if (!mapping->initialized) { 599 mapping->dvo_port = child->dvo_port; 600 mapping->slave_addr = child->slave_addr; 601 mapping->dvo_wiring = child->dvo_wiring; 602 mapping->ddc_pin = child->ddc_pin; 603 mapping->i2c_pin = child->i2c_pin; 604 mapping->initialized = 1; 605 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 606 mapping->dvo_port, 607 mapping->slave_addr, 608 mapping->dvo_wiring, 609 mapping->ddc_pin, 610 mapping->i2c_pin); 611 } else { 612 DRM_DEBUG_KMS("Maybe one SDVO port is shared by " 613 "two SDVO device.\n"); 614 } 615 if (child->slave2_addr) { 616 /* Maybe this is a SDVO device with multiple inputs */ 617 /* And the mapping info is not added */ 618 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" 619 " is a SDVO device with multiple inputs.\n"); 620 } 621 count++; 622 } 623 624 if (!count) { 625 /* No SDVO device info is found */ 626 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n"); 627 } 628 } 629 630 static void 631 parse_driver_features(struct drm_i915_private *dev_priv, 632 const struct bdb_header *bdb) 633 { 634 const struct bdb_driver_features *driver; 635 636 driver = find_section(bdb, BDB_DRIVER_FEATURES); 637 if (!driver) 638 return; 639 640 if (INTEL_GEN(dev_priv) >= 5) { 641 /* 642 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 643 * to mean "eDP". The VBT spec doesn't agree with that 644 * interpretation, but real world VBTs seem to. 645 */ 646 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 647 dev_priv->vbt.int_lvds_support = 0; 648 } else { 649 /* 650 * FIXME it's not clear which BDB version has the LVDS config 651 * bits defined. Revision history in the VBT spec says: 652 * "0.92 | Add two definitions for VBT value of LVDS Active 653 * Config (00b and 11b values defined) | 06/13/2005" 654 * but does not the specify the BDB version. 655 * 656 * So far version 134 (on i945gm) is the oldest VBT observed 657 * in the wild with the bits correctly populated. Version 658 * 108 (on i85x) does not have the bits correctly populated. 659 */ 660 if (bdb->version >= 134 && 661 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 662 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 663 dev_priv->vbt.int_lvds_support = 0; 664 } 665 666 if (bdb->version < 228) { 667 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); 668 /* 669 * If DRRS is not supported, drrs_type has to be set to 0. 670 * This is because, VBT is configured in such a way that 671 * static DRRS is 0 and DRRS not supported is represented by 672 * driver->drrs_enabled=false 673 */ 674 if (!driver->drrs_enabled) 675 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 676 677 dev_priv->vbt.psr.enable = driver->psr_enabled; 678 } 679 } 680 681 static void 682 parse_power_conservation_features(struct drm_i915_private *dev_priv, 683 const struct bdb_header *bdb) 684 { 685 const struct bdb_lfp_power *power; 686 u8 panel_type = dev_priv->vbt.panel_type; 687 688 if (bdb->version < 228) 689 return; 690 691 power = find_section(bdb, BDB_LVDS_POWER); 692 if (!power) 693 return; 694 695 dev_priv->vbt.psr.enable = power->psr & BIT(panel_type); 696 697 /* 698 * If DRRS is not supported, drrs_type has to be set to 0. 699 * This is because, VBT is configured in such a way that 700 * static DRRS is 0 and DRRS not supported is represented by 701 * power->drrs & BIT(panel_type)=false 702 */ 703 if (!(power->drrs & BIT(panel_type))) 704 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 705 } 706 707 static void 708 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 709 { 710 const struct bdb_edp *edp; 711 const struct edp_power_seq *edp_pps; 712 const struct edp_fast_link_params *edp_link_params; 713 int panel_type = dev_priv->vbt.panel_type; 714 715 edp = find_section(bdb, BDB_EDP); 716 if (!edp) 717 return; 718 719 switch ((edp->color_depth >> (panel_type * 2)) & 3) { 720 case EDP_18BPP: 721 dev_priv->vbt.edp.bpp = 18; 722 break; 723 case EDP_24BPP: 724 dev_priv->vbt.edp.bpp = 24; 725 break; 726 case EDP_30BPP: 727 dev_priv->vbt.edp.bpp = 30; 728 break; 729 } 730 731 /* Get the eDP sequencing and link info */ 732 edp_pps = &edp->power_seqs[panel_type]; 733 edp_link_params = &edp->fast_link_params[panel_type]; 734 735 dev_priv->vbt.edp.pps = *edp_pps; 736 737 switch (edp_link_params->rate) { 738 case EDP_RATE_1_62: 739 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62; 740 break; 741 case EDP_RATE_2_7: 742 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7; 743 break; 744 default: 745 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n", 746 edp_link_params->rate); 747 break; 748 } 749 750 switch (edp_link_params->lanes) { 751 case EDP_LANE_1: 752 dev_priv->vbt.edp.lanes = 1; 753 break; 754 case EDP_LANE_2: 755 dev_priv->vbt.edp.lanes = 2; 756 break; 757 case EDP_LANE_4: 758 dev_priv->vbt.edp.lanes = 4; 759 break; 760 default: 761 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n", 762 edp_link_params->lanes); 763 break; 764 } 765 766 switch (edp_link_params->preemphasis) { 767 case EDP_PREEMPHASIS_NONE: 768 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 769 break; 770 case EDP_PREEMPHASIS_3_5dB: 771 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 772 break; 773 case EDP_PREEMPHASIS_6dB: 774 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 775 break; 776 case EDP_PREEMPHASIS_9_5dB: 777 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 778 break; 779 default: 780 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n", 781 edp_link_params->preemphasis); 782 break; 783 } 784 785 switch (edp_link_params->vswing) { 786 case EDP_VSWING_0_4V: 787 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 788 break; 789 case EDP_VSWING_0_6V: 790 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 791 break; 792 case EDP_VSWING_0_8V: 793 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 794 break; 795 case EDP_VSWING_1_2V: 796 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 797 break; 798 default: 799 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n", 800 edp_link_params->vswing); 801 break; 802 } 803 804 if (bdb->version >= 173) { 805 u8 vswing; 806 807 /* Don't read from VBT if module parameter has valid value*/ 808 if (i915_modparams.edp_vswing) { 809 dev_priv->vbt.edp.low_vswing = 810 i915_modparams.edp_vswing == 1; 811 } else { 812 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 813 dev_priv->vbt.edp.low_vswing = vswing == 0; 814 } 815 } 816 } 817 818 static void 819 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 820 { 821 const struct bdb_psr *psr; 822 const struct psr_table *psr_table; 823 int panel_type = dev_priv->vbt.panel_type; 824 825 psr = find_section(bdb, BDB_PSR); 826 if (!psr) { 827 DRM_DEBUG_KMS("No PSR BDB found.\n"); 828 return; 829 } 830 831 psr_table = &psr->psr_table[panel_type]; 832 833 dev_priv->vbt.psr.full_link = psr_table->full_link; 834 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 835 836 /* Allowed VBT values goes from 0 to 15 */ 837 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 838 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 839 840 switch (psr_table->lines_to_wait) { 841 case 0: 842 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT; 843 break; 844 case 1: 845 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT; 846 break; 847 case 2: 848 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT; 849 break; 850 case 3: 851 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT; 852 break; 853 default: 854 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n", 855 psr_table->lines_to_wait); 856 break; 857 } 858 859 /* 860 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 861 * Old decimal value is wake up time in multiples of 100 us. 862 */ 863 if (bdb->version >= 205 && 864 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) || 865 INTEL_GEN(dev_priv) >= 10)) { 866 switch (psr_table->tp1_wakeup_time) { 867 case 0: 868 dev_priv->vbt.psr.tp1_wakeup_time_us = 500; 869 break; 870 case 1: 871 dev_priv->vbt.psr.tp1_wakeup_time_us = 100; 872 break; 873 case 3: 874 dev_priv->vbt.psr.tp1_wakeup_time_us = 0; 875 break; 876 default: 877 DRM_DEBUG_KMS("VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 878 psr_table->tp1_wakeup_time); 879 /* fallthrough */ 880 case 2: 881 dev_priv->vbt.psr.tp1_wakeup_time_us = 2500; 882 break; 883 } 884 885 switch (psr_table->tp2_tp3_wakeup_time) { 886 case 0: 887 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500; 888 break; 889 case 1: 890 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100; 891 break; 892 case 3: 893 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0; 894 break; 895 default: 896 DRM_DEBUG_KMS("VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 897 psr_table->tp2_tp3_wakeup_time); 898 /* fallthrough */ 899 case 2: 900 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 901 break; 902 } 903 } else { 904 dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 905 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 906 } 907 908 if (bdb->version >= 226) { 909 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 910 911 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3; 912 switch (wakeup_time) { 913 case 0: 914 wakeup_time = 500; 915 break; 916 case 1: 917 wakeup_time = 100; 918 break; 919 case 3: 920 wakeup_time = 50; 921 break; 922 default: 923 case 2: 924 wakeup_time = 2500; 925 break; 926 } 927 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 928 } else { 929 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 930 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us; 931 } 932 } 933 934 static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv, 935 u16 version, enum port port) 936 { 937 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) { 938 dev_priv->vbt.dsi.bl_ports = BIT(port); 939 if (dev_priv->vbt.dsi.config->cabc_supported) 940 dev_priv->vbt.dsi.cabc_ports = BIT(port); 941 942 return; 943 } 944 945 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) { 946 case DL_DCS_PORT_A: 947 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A); 948 break; 949 case DL_DCS_PORT_C: 950 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C); 951 break; 952 default: 953 case DL_DCS_PORT_A_AND_C: 954 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C); 955 break; 956 } 957 958 if (!dev_priv->vbt.dsi.config->cabc_supported) 959 return; 960 961 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) { 962 case DL_DCS_PORT_A: 963 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A); 964 break; 965 case DL_DCS_PORT_C: 966 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C); 967 break; 968 default: 969 case DL_DCS_PORT_A_AND_C: 970 dev_priv->vbt.dsi.cabc_ports = 971 BIT(PORT_A) | BIT(PORT_C); 972 break; 973 } 974 } 975 976 static void 977 parse_mipi_config(struct drm_i915_private *dev_priv, 978 const struct bdb_header *bdb) 979 { 980 const struct bdb_mipi_config *start; 981 const struct mipi_config *config; 982 const struct mipi_pps_data *pps; 983 int panel_type = dev_priv->vbt.panel_type; 984 enum port port; 985 986 /* parse MIPI blocks only if LFP type is MIPI */ 987 if (!intel_bios_is_dsi_present(dev_priv, &port)) 988 return; 989 990 /* Initialize this to undefined indicating no generic MIPI support */ 991 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 992 993 /* Block #40 is already parsed and panel_fixed_mode is 994 * stored in dev_priv->lfp_lvds_vbt_mode 995 * resuse this when needed 996 */ 997 998 /* Parse #52 for panel index used from panel_type already 999 * parsed 1000 */ 1001 start = find_section(bdb, BDB_MIPI_CONFIG); 1002 if (!start) { 1003 DRM_DEBUG_KMS("No MIPI config BDB found"); 1004 return; 1005 } 1006 1007 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n", 1008 panel_type); 1009 1010 /* 1011 * get hold of the correct configuration block and pps data as per 1012 * the panel_type as index 1013 */ 1014 config = &start->config[panel_type]; 1015 pps = &start->pps[panel_type]; 1016 1017 /* store as of now full data. Trim when we realise all is not needed */ 1018 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1019 if (!dev_priv->vbt.dsi.config) 1020 return; 1021 1022 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1023 if (!dev_priv->vbt.dsi.pps) { 1024 kfree(dev_priv->vbt.dsi.config); 1025 return; 1026 } 1027 1028 parse_dsi_backlight_ports(dev_priv, bdb->version, port); 1029 1030 /* FIXME is the 90 vs. 270 correct? */ 1031 switch (config->rotation) { 1032 case ENABLE_ROTATION_0: 1033 /* 1034 * Most (all?) VBTs claim 0 degrees despite having 1035 * an upside down panel, thus we do not trust this. 1036 */ 1037 dev_priv->vbt.dsi.orientation = 1038 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1039 break; 1040 case ENABLE_ROTATION_90: 1041 dev_priv->vbt.dsi.orientation = 1042 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1043 break; 1044 case ENABLE_ROTATION_180: 1045 dev_priv->vbt.dsi.orientation = 1046 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1047 break; 1048 case ENABLE_ROTATION_270: 1049 dev_priv->vbt.dsi.orientation = 1050 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1051 break; 1052 } 1053 1054 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1055 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1056 } 1057 1058 /* Find the sequence block and size for the given panel. */ 1059 static const u8 * 1060 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 1061 u16 panel_id, u32 *seq_size) 1062 { 1063 u32 total = get_blocksize(sequence); 1064 const u8 *data = &sequence->data[0]; 1065 u8 current_id; 1066 u32 current_size; 1067 int header_size = sequence->version >= 3 ? 5 : 3; 1068 int index = 0; 1069 int i; 1070 1071 /* skip new block size */ 1072 if (sequence->version >= 3) 1073 data += 4; 1074 1075 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1076 if (index + header_size > total) { 1077 DRM_ERROR("Invalid sequence block (header)\n"); 1078 return NULL; 1079 } 1080 1081 current_id = *(data + index); 1082 if (sequence->version >= 3) 1083 current_size = *((const u32 *)(data + index + 1)); 1084 else 1085 current_size = *((const u16 *)(data + index + 1)); 1086 1087 index += header_size; 1088 1089 if (index + current_size > total) { 1090 DRM_ERROR("Invalid sequence block\n"); 1091 return NULL; 1092 } 1093 1094 if (current_id == panel_id) { 1095 *seq_size = current_size; 1096 return data + index; 1097 } 1098 1099 index += current_size; 1100 } 1101 1102 DRM_ERROR("Sequence block detected but no valid configuration\n"); 1103 1104 return NULL; 1105 } 1106 1107 static int goto_next_sequence(const u8 *data, int index, int total) 1108 { 1109 u16 len; 1110 1111 /* Skip Sequence Byte. */ 1112 for (index = index + 1; index < total; index += len) { 1113 u8 operation_byte = *(data + index); 1114 index++; 1115 1116 switch (operation_byte) { 1117 case MIPI_SEQ_ELEM_END: 1118 return index; 1119 case MIPI_SEQ_ELEM_SEND_PKT: 1120 if (index + 4 > total) 1121 return 0; 1122 1123 len = *((const u16 *)(data + index + 2)) + 4; 1124 break; 1125 case MIPI_SEQ_ELEM_DELAY: 1126 len = 4; 1127 break; 1128 case MIPI_SEQ_ELEM_GPIO: 1129 len = 2; 1130 break; 1131 case MIPI_SEQ_ELEM_I2C: 1132 if (index + 7 > total) 1133 return 0; 1134 len = *(data + index + 6) + 7; 1135 break; 1136 default: 1137 DRM_ERROR("Unknown operation byte\n"); 1138 return 0; 1139 } 1140 } 1141 1142 return 0; 1143 } 1144 1145 static int goto_next_sequence_v3(const u8 *data, int index, int total) 1146 { 1147 int seq_end; 1148 u16 len; 1149 u32 size_of_sequence; 1150 1151 /* 1152 * Could skip sequence based on Size of Sequence alone, but also do some 1153 * checking on the structure. 1154 */ 1155 if (total < 5) { 1156 DRM_ERROR("Too small sequence size\n"); 1157 return 0; 1158 } 1159 1160 /* Skip Sequence Byte. */ 1161 index++; 1162 1163 /* 1164 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1165 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1166 * byte. 1167 */ 1168 size_of_sequence = *((const u32 *)(data + index)); 1169 index += 4; 1170 1171 seq_end = index + size_of_sequence; 1172 if (seq_end > total) { 1173 DRM_ERROR("Invalid sequence size\n"); 1174 return 0; 1175 } 1176 1177 for (; index < total; index += len) { 1178 u8 operation_byte = *(data + index); 1179 index++; 1180 1181 if (operation_byte == MIPI_SEQ_ELEM_END) { 1182 if (index != seq_end) { 1183 DRM_ERROR("Invalid element structure\n"); 1184 return 0; 1185 } 1186 return index; 1187 } 1188 1189 len = *(data + index); 1190 index++; 1191 1192 /* 1193 * FIXME: Would be nice to check elements like for v1/v2 in 1194 * goto_next_sequence() above. 1195 */ 1196 switch (operation_byte) { 1197 case MIPI_SEQ_ELEM_SEND_PKT: 1198 case MIPI_SEQ_ELEM_DELAY: 1199 case MIPI_SEQ_ELEM_GPIO: 1200 case MIPI_SEQ_ELEM_I2C: 1201 case MIPI_SEQ_ELEM_SPI: 1202 case MIPI_SEQ_ELEM_PMIC: 1203 break; 1204 default: 1205 DRM_ERROR("Unknown operation byte %u\n", 1206 operation_byte); 1207 break; 1208 } 1209 } 1210 1211 return 0; 1212 } 1213 1214 /* 1215 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1216 * skip all delay + gpio operands and stop at the first DSI packet op. 1217 */ 1218 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv) 1219 { 1220 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1221 int index, len; 1222 1223 if (WARN_ON(!data || dev_priv->vbt.dsi.seq_version != 1)) 1224 return 0; 1225 1226 /* index = 1 to skip sequence byte */ 1227 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1228 switch (data[index]) { 1229 case MIPI_SEQ_ELEM_SEND_PKT: 1230 return index == 1 ? 0 : index; 1231 case MIPI_SEQ_ELEM_DELAY: 1232 len = 5; /* 1 byte for operand + uint32 */ 1233 break; 1234 case MIPI_SEQ_ELEM_GPIO: 1235 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1236 break; 1237 default: 1238 return 0; 1239 } 1240 } 1241 1242 return 0; 1243 } 1244 1245 /* 1246 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1247 * The deassert must be done before calling intel_dsi_device_ready, so for 1248 * these devices we split the init OTP sequence into a deassert sequence and 1249 * the actual init OTP part. 1250 */ 1251 static void fixup_mipi_sequences(struct drm_i915_private *dev_priv) 1252 { 1253 u8 *init_otp; 1254 int len; 1255 1256 /* Limit this to VLV for now. */ 1257 if (!IS_VALLEYVIEW(dev_priv)) 1258 return; 1259 1260 /* Limit this to v1 vid-mode sequences */ 1261 if (dev_priv->vbt.dsi.config->is_cmd_mode || 1262 dev_priv->vbt.dsi.seq_version != 1) 1263 return; 1264 1265 /* Only do this if there are otp and assert seqs and no deassert seq */ 1266 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1267 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1268 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1269 return; 1270 1271 /* The deassert-sequence ends at the first DSI packet */ 1272 len = get_init_otp_deassert_fragment_len(dev_priv); 1273 if (!len) 1274 return; 1275 1276 DRM_DEBUG_KMS("Using init OTP fragment to deassert reset\n"); 1277 1278 /* Copy the fragment, update seq byte and terminate it */ 1279 init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1280 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1281 if (!dev_priv->vbt.dsi.deassert_seq) 1282 return; 1283 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1284 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1285 /* Use the copy for deassert */ 1286 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1287 dev_priv->vbt.dsi.deassert_seq; 1288 /* Replace the last byte of the fragment with init OTP seq byte */ 1289 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1290 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1291 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1292 } 1293 1294 static void 1295 parse_mipi_sequence(struct drm_i915_private *dev_priv, 1296 const struct bdb_header *bdb) 1297 { 1298 int panel_type = dev_priv->vbt.panel_type; 1299 const struct bdb_mipi_sequence *sequence; 1300 const u8 *seq_data; 1301 u32 seq_size; 1302 u8 *data; 1303 int index = 0; 1304 1305 /* Only our generic panel driver uses the sequence block. */ 1306 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 1307 return; 1308 1309 sequence = find_section(bdb, BDB_MIPI_SEQUENCE); 1310 if (!sequence) { 1311 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n"); 1312 return; 1313 } 1314 1315 /* Fail gracefully for forward incompatible sequence block. */ 1316 if (sequence->version >= 4) { 1317 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n", 1318 sequence->version); 1319 return; 1320 } 1321 1322 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version); 1323 1324 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 1325 if (!seq_data) 1326 return; 1327 1328 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 1329 if (!data) 1330 return; 1331 1332 /* Parse the sequences, store pointers to each sequence. */ 1333 for (;;) { 1334 u8 seq_id = *(data + index); 1335 if (seq_id == MIPI_SEQ_END) 1336 break; 1337 1338 if (seq_id >= MIPI_SEQ_MAX) { 1339 DRM_ERROR("Unknown sequence %u\n", seq_id); 1340 goto err; 1341 } 1342 1343 /* Log about presence of sequences we won't run. */ 1344 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 1345 DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id); 1346 1347 dev_priv->vbt.dsi.sequence[seq_id] = data + index; 1348 1349 if (sequence->version >= 3) 1350 index = goto_next_sequence_v3(data, index, seq_size); 1351 else 1352 index = goto_next_sequence(data, index, seq_size); 1353 if (!index) { 1354 DRM_ERROR("Invalid sequence %u\n", seq_id); 1355 goto err; 1356 } 1357 } 1358 1359 dev_priv->vbt.dsi.data = data; 1360 dev_priv->vbt.dsi.size = seq_size; 1361 dev_priv->vbt.dsi.seq_version = sequence->version; 1362 1363 fixup_mipi_sequences(dev_priv); 1364 1365 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n"); 1366 return; 1367 1368 err: 1369 kfree(data); 1370 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence)); 1371 } 1372 1373 static void 1374 parse_compression_parameters(struct drm_i915_private *i915, 1375 const struct bdb_header *bdb) 1376 { 1377 const struct bdb_compression_parameters *params; 1378 struct display_device_data *devdata; 1379 const struct child_device_config *child; 1380 u16 block_size; 1381 int index; 1382 1383 if (bdb->version < 198) 1384 return; 1385 1386 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS); 1387 if (params) { 1388 /* Sanity checks */ 1389 if (params->entry_size != sizeof(params->data[0])) { 1390 DRM_DEBUG_KMS("VBT: unsupported compression param entry size\n"); 1391 return; 1392 } 1393 1394 block_size = get_blocksize(params); 1395 if (block_size < sizeof(*params)) { 1396 DRM_DEBUG_KMS("VBT: expected 16 compression param entries\n"); 1397 return; 1398 } 1399 } 1400 1401 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 1402 child = &devdata->child; 1403 1404 if (!child->compression_enable) 1405 continue; 1406 1407 if (!params) { 1408 DRM_DEBUG_KMS("VBT: compression params not available\n"); 1409 continue; 1410 } 1411 1412 if (child->compression_method_cps) { 1413 DRM_DEBUG_KMS("VBT: CPS compression not supported\n"); 1414 continue; 1415 } 1416 1417 index = child->compression_structure_index; 1418 1419 devdata->dsc = kmemdup(¶ms->data[index], 1420 sizeof(*devdata->dsc), GFP_KERNEL); 1421 } 1422 } 1423 1424 static u8 translate_iboost(u8 val) 1425 { 1426 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 1427 1428 if (val >= ARRAY_SIZE(mapping)) { 1429 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 1430 return 0; 1431 } 1432 return mapping[val]; 1433 } 1434 1435 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin) 1436 { 1437 const struct ddi_vbt_port_info *info; 1438 enum port port; 1439 1440 for_each_port(port) { 1441 info = &i915->vbt.ddi_port_info[port]; 1442 1443 if (info->child && ddc_pin == info->alternate_ddc_pin) 1444 return port; 1445 } 1446 1447 return PORT_NONE; 1448 } 1449 1450 static void sanitize_ddc_pin(struct drm_i915_private *dev_priv, 1451 enum port port) 1452 { 1453 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1454 enum port p; 1455 1456 if (!info->alternate_ddc_pin) 1457 return; 1458 1459 p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin); 1460 if (p != PORT_NONE) { 1461 DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, " 1462 "disabling port %c DVI/HDMI support\n", 1463 port_name(port), info->alternate_ddc_pin, 1464 port_name(p), port_name(p)); 1465 1466 /* 1467 * If we have multiple ports supposedly sharing the 1468 * pin, then dvi/hdmi couldn't exist on the shared 1469 * port. Otherwise they share the same ddc bin and 1470 * system couldn't communicate with them separately. 1471 * 1472 * Give inverse child device order the priority, 1473 * last one wins. Yes, there are real machines 1474 * (eg. Asrock B250M-HDV) where VBT has both 1475 * port A and port E with the same AUX ch and 1476 * we must pick port E :( 1477 */ 1478 info = &dev_priv->vbt.ddi_port_info[p]; 1479 1480 info->supports_dvi = false; 1481 info->supports_hdmi = false; 1482 info->alternate_ddc_pin = 0; 1483 } 1484 } 1485 1486 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch) 1487 { 1488 const struct ddi_vbt_port_info *info; 1489 enum port port; 1490 1491 for_each_port(port) { 1492 info = &i915->vbt.ddi_port_info[port]; 1493 1494 if (info->child && aux_ch == info->alternate_aux_channel) 1495 return port; 1496 } 1497 1498 return PORT_NONE; 1499 } 1500 1501 static void sanitize_aux_ch(struct drm_i915_private *dev_priv, 1502 enum port port) 1503 { 1504 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1505 enum port p; 1506 1507 if (!info->alternate_aux_channel) 1508 return; 1509 1510 p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel); 1511 if (p != PORT_NONE) { 1512 DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, " 1513 "disabling port %c DP support\n", 1514 port_name(port), info->alternate_aux_channel, 1515 port_name(p), port_name(p)); 1516 1517 /* 1518 * If we have multiple ports supposedlt sharing the 1519 * aux channel, then DP couldn't exist on the shared 1520 * port. Otherwise they share the same aux channel 1521 * and system couldn't communicate with them separately. 1522 * 1523 * Give inverse child device order the priority, 1524 * last one wins. Yes, there are real machines 1525 * (eg. Asrock B250M-HDV) where VBT has both 1526 * port A and port E with the same AUX ch and 1527 * we must pick port E :( 1528 */ 1529 info = &dev_priv->vbt.ddi_port_info[p]; 1530 1531 info->supports_dp = false; 1532 info->alternate_aux_channel = 0; 1533 } 1534 } 1535 1536 static const u8 cnp_ddc_pin_map[] = { 1537 [0] = 0, /* N/A */ 1538 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT, 1539 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT, 1540 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */ 1541 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */ 1542 }; 1543 1544 static const u8 icp_ddc_pin_map[] = { 1545 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1546 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1547 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT, 1548 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP, 1549 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP, 1550 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP, 1551 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP, 1552 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP, 1553 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, 1554 }; 1555 1556 static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin) 1557 { 1558 const u8 *ddc_pin_map; 1559 int n_entries; 1560 1561 if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) { 1562 ddc_pin_map = icp_ddc_pin_map; 1563 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 1564 } else if (HAS_PCH_CNP(dev_priv)) { 1565 ddc_pin_map = cnp_ddc_pin_map; 1566 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 1567 } else { 1568 /* Assuming direct map */ 1569 return vbt_pin; 1570 } 1571 1572 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0) 1573 return ddc_pin_map[vbt_pin]; 1574 1575 DRM_DEBUG_KMS("Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 1576 vbt_pin); 1577 return 0; 1578 } 1579 1580 static enum port dvo_port_to_port(u8 dvo_port) 1581 { 1582 /* 1583 * Each DDI port can have more than one value on the "DVO Port" field, 1584 * so look for all the possible values for each port. 1585 */ 1586 static const int dvo_ports[][3] = { 1587 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1}, 1588 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1}, 1589 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1}, 1590 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1}, 1591 [PORT_E] = { DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE}, 1592 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1}, 1593 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1}, 1594 }; 1595 enum port port; 1596 int i; 1597 1598 for (port = PORT_A; port < ARRAY_SIZE(dvo_ports); port++) { 1599 for (i = 0; i < ARRAY_SIZE(dvo_ports[port]); i++) { 1600 if (dvo_ports[port][i] == -1) 1601 break; 1602 1603 if (dvo_port == dvo_ports[port][i]) 1604 return port; 1605 } 1606 } 1607 1608 return PORT_NONE; 1609 } 1610 1611 static void parse_ddi_port(struct drm_i915_private *dev_priv, 1612 struct display_device_data *devdata, 1613 u8 bdb_version) 1614 { 1615 const struct child_device_config *child = &devdata->child; 1616 struct ddi_vbt_port_info *info; 1617 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; 1618 enum port port; 1619 1620 port = dvo_port_to_port(child->dvo_port); 1621 if (port == PORT_NONE) 1622 return; 1623 1624 info = &dev_priv->vbt.ddi_port_info[port]; 1625 1626 if (info->child) { 1627 DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n", 1628 port_name(port)); 1629 return; 1630 } 1631 1632 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 1633 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 1634 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT; 1635 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 1636 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); 1637 1638 if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) { 1639 DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n", 1640 is_hdmi ? "/HDMI" : ""); 1641 is_dvi = false; 1642 is_hdmi = false; 1643 } 1644 1645 info->supports_dvi = is_dvi; 1646 info->supports_hdmi = is_hdmi; 1647 info->supports_dp = is_dp; 1648 info->supports_edp = is_edp; 1649 1650 if (bdb_version >= 195) 1651 info->supports_typec_usb = child->dp_usb_type_c; 1652 1653 if (bdb_version >= 209) 1654 info->supports_tbt = child->tbt; 1655 1656 DRM_DEBUG_KMS("Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 1657 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, 1658 HAS_LSPCON(dev_priv) && child->lspcon, 1659 info->supports_typec_usb, info->supports_tbt, 1660 devdata->dsc != NULL); 1661 1662 if (is_dvi) { 1663 u8 ddc_pin; 1664 1665 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin); 1666 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) { 1667 info->alternate_ddc_pin = ddc_pin; 1668 sanitize_ddc_pin(dev_priv, port); 1669 } else { 1670 DRM_DEBUG_KMS("Port %c has invalid DDC pin %d, " 1671 "sticking to defaults\n", 1672 port_name(port), ddc_pin); 1673 } 1674 } 1675 1676 if (is_dp) { 1677 info->alternate_aux_channel = child->aux_channel; 1678 1679 sanitize_aux_ch(dev_priv, port); 1680 } 1681 1682 if (bdb_version >= 158) { 1683 /* The VBT HDMI level shift values match the table we have. */ 1684 u8 hdmi_level_shift = child->hdmi_level_shifter_value; 1685 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n", 1686 port_name(port), 1687 hdmi_level_shift); 1688 info->hdmi_level_shift = hdmi_level_shift; 1689 info->hdmi_level_shift_set = true; 1690 } 1691 1692 if (bdb_version >= 204) { 1693 int max_tmds_clock; 1694 1695 switch (child->hdmi_max_data_rate) { 1696 default: 1697 MISSING_CASE(child->hdmi_max_data_rate); 1698 /* fall through */ 1699 case HDMI_MAX_DATA_RATE_PLATFORM: 1700 max_tmds_clock = 0; 1701 break; 1702 case HDMI_MAX_DATA_RATE_297: 1703 max_tmds_clock = 297000; 1704 break; 1705 case HDMI_MAX_DATA_RATE_165: 1706 max_tmds_clock = 165000; 1707 break; 1708 } 1709 1710 if (max_tmds_clock) 1711 DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n", 1712 port_name(port), max_tmds_clock); 1713 info->max_tmds_clock = max_tmds_clock; 1714 } 1715 1716 /* Parse the I_boost config for SKL and above */ 1717 if (bdb_version >= 196 && child->iboost) { 1718 info->dp_boost_level = translate_iboost(child->dp_iboost_level); 1719 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n", 1720 port_name(port), info->dp_boost_level); 1721 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level); 1722 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n", 1723 port_name(port), info->hdmi_boost_level); 1724 } 1725 1726 /* DP max link rate for CNL+ */ 1727 if (bdb_version >= 216) { 1728 switch (child->dp_max_link_rate) { 1729 default: 1730 case VBT_DP_MAX_LINK_RATE_HBR3: 1731 info->dp_max_link_rate = 810000; 1732 break; 1733 case VBT_DP_MAX_LINK_RATE_HBR2: 1734 info->dp_max_link_rate = 540000; 1735 break; 1736 case VBT_DP_MAX_LINK_RATE_HBR: 1737 info->dp_max_link_rate = 270000; 1738 break; 1739 case VBT_DP_MAX_LINK_RATE_LBR: 1740 info->dp_max_link_rate = 162000; 1741 break; 1742 } 1743 DRM_DEBUG_KMS("VBT DP max link rate for port %c: %d\n", 1744 port_name(port), info->dp_max_link_rate); 1745 } 1746 1747 info->child = child; 1748 } 1749 1750 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version) 1751 { 1752 struct display_device_data *devdata; 1753 1754 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv)) 1755 return; 1756 1757 if (bdb_version < 155) 1758 return; 1759 1760 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) 1761 parse_ddi_port(dev_priv, devdata, bdb_version); 1762 } 1763 1764 static void 1765 parse_general_definitions(struct drm_i915_private *dev_priv, 1766 const struct bdb_header *bdb) 1767 { 1768 const struct bdb_general_definitions *defs; 1769 struct display_device_data *devdata; 1770 const struct child_device_config *child; 1771 int i, child_device_num; 1772 u8 expected_size; 1773 u16 block_size; 1774 int bus_pin; 1775 1776 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); 1777 if (!defs) { 1778 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); 1779 return; 1780 } 1781 1782 block_size = get_blocksize(defs); 1783 if (block_size < sizeof(*defs)) { 1784 DRM_DEBUG_KMS("General definitions block too small (%u)\n", 1785 block_size); 1786 return; 1787 } 1788 1789 bus_pin = defs->crt_ddc_gmbus_pin; 1790 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); 1791 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin)) 1792 dev_priv->vbt.crt_ddc_pin = bus_pin; 1793 1794 if (bdb->version < 106) { 1795 expected_size = 22; 1796 } else if (bdb->version < 111) { 1797 expected_size = 27; 1798 } else if (bdb->version < 195) { 1799 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 1800 } else if (bdb->version == 195) { 1801 expected_size = 37; 1802 } else if (bdb->version <= 215) { 1803 expected_size = 38; 1804 } else if (bdb->version <= 229) { 1805 expected_size = 39; 1806 } else { 1807 expected_size = sizeof(*child); 1808 BUILD_BUG_ON(sizeof(*child) < 39); 1809 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n", 1810 bdb->version, expected_size); 1811 } 1812 1813 /* Flag an error for unexpected size, but continue anyway. */ 1814 if (defs->child_dev_size != expected_size) 1815 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n", 1816 defs->child_dev_size, expected_size, bdb->version); 1817 1818 /* The legacy sized child device config is the minimum we need. */ 1819 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 1820 DRM_DEBUG_KMS("Child device config size %u is too small.\n", 1821 defs->child_dev_size); 1822 return; 1823 } 1824 1825 /* get the number of child device */ 1826 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 1827 1828 for (i = 0; i < child_device_num; i++) { 1829 child = child_device_ptr(defs, i); 1830 if (!child->device_type) 1831 continue; 1832 1833 DRM_DEBUG_KMS("Found VBT child device with type 0x%x\n", 1834 child->device_type); 1835 1836 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 1837 if (!devdata) 1838 break; 1839 1840 /* 1841 * Copy as much as we know (sizeof) and is available 1842 * (child_dev_size) of the child device config. Accessing the 1843 * data must depend on VBT version. 1844 */ 1845 memcpy(&devdata->child, child, 1846 min_t(size_t, defs->child_dev_size, sizeof(*child))); 1847 1848 list_add_tail(&devdata->node, &dev_priv->vbt.display_devices); 1849 } 1850 1851 if (list_empty(&dev_priv->vbt.display_devices)) 1852 DRM_DEBUG_KMS("no child dev is parsed from VBT\n"); 1853 } 1854 1855 /* Common defaults which may be overridden by VBT. */ 1856 static void 1857 init_vbt_defaults(struct drm_i915_private *dev_priv) 1858 { 1859 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 1860 1861 /* Default to having backlight */ 1862 dev_priv->vbt.backlight.present = true; 1863 1864 /* LFP panel data */ 1865 dev_priv->vbt.lvds_dither = 1; 1866 1867 /* SDVO panel data */ 1868 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 1869 1870 /* general features */ 1871 dev_priv->vbt.int_tv_support = 1; 1872 dev_priv->vbt.int_crt_support = 1; 1873 1874 /* driver features */ 1875 dev_priv->vbt.int_lvds_support = 1; 1876 1877 /* Default to using SSC */ 1878 dev_priv->vbt.lvds_use_ssc = 1; 1879 /* 1880 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 1881 * clock for LVDS. 1882 */ 1883 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv, 1884 !HAS_PCH_SPLIT(dev_priv)); 1885 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq); 1886 } 1887 1888 /* Defaults to initialize only if there is no VBT. */ 1889 static void 1890 init_vbt_missing_defaults(struct drm_i915_private *dev_priv) 1891 { 1892 enum port port; 1893 1894 for_each_port(port) { 1895 struct ddi_vbt_port_info *info = 1896 &dev_priv->vbt.ddi_port_info[port]; 1897 enum phy phy = intel_port_to_phy(dev_priv, port); 1898 1899 /* 1900 * VBT has the TypeC mode (native,TBT/USB) and we don't want 1901 * to detect it. 1902 */ 1903 if (intel_phy_is_tc(dev_priv, phy)) 1904 continue; 1905 1906 info->supports_dvi = (port != PORT_A && port != PORT_E); 1907 info->supports_hdmi = info->supports_dvi; 1908 info->supports_dp = (port != PORT_E); 1909 info->supports_edp = (port == PORT_A); 1910 } 1911 } 1912 1913 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 1914 { 1915 const void *_vbt = vbt; 1916 1917 return _vbt + vbt->bdb_offset; 1918 } 1919 1920 /** 1921 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 1922 * @buf: pointer to a buffer to validate 1923 * @size: size of the buffer 1924 * 1925 * Returns true on valid VBT. 1926 */ 1927 bool intel_bios_is_valid_vbt(const void *buf, size_t size) 1928 { 1929 const struct vbt_header *vbt = buf; 1930 const struct bdb_header *bdb; 1931 1932 if (!vbt) 1933 return false; 1934 1935 if (sizeof(struct vbt_header) > size) { 1936 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 1937 return false; 1938 } 1939 1940 if (memcmp(vbt->signature, "$VBT", 4)) { 1941 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 1942 return false; 1943 } 1944 1945 if (vbt->vbt_size > size) { 1946 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 1947 return false; 1948 } 1949 1950 size = vbt->vbt_size; 1951 1952 if (range_overflows_t(size_t, 1953 vbt->bdb_offset, 1954 sizeof(struct bdb_header), 1955 size)) { 1956 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 1957 return false; 1958 } 1959 1960 bdb = get_bdb_header(vbt); 1961 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 1962 DRM_DEBUG_DRIVER("BDB incomplete\n"); 1963 return false; 1964 } 1965 1966 return vbt; 1967 } 1968 1969 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv) 1970 { 1971 struct pci_dev *pdev = dev_priv->drm.pdev; 1972 void __iomem *p = NULL, *oprom; 1973 struct vbt_header *vbt; 1974 u16 vbt_size; 1975 size_t i, size; 1976 1977 oprom = pci_map_rom(pdev, &size); 1978 if (!oprom) 1979 return NULL; 1980 1981 /* Scour memory looking for the VBT signature. */ 1982 for (i = 0; i + 4 < size; i += 4) { 1983 if (ioread32(oprom + i) != *((const u32 *)"$VBT")) 1984 continue; 1985 1986 p = oprom + i; 1987 size -= i; 1988 break; 1989 } 1990 1991 if (!p) 1992 goto err_unmap_oprom; 1993 1994 if (sizeof(struct vbt_header) > size) { 1995 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 1996 goto err_unmap_oprom; 1997 } 1998 1999 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size)); 2000 if (vbt_size > size) { 2001 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 2002 goto err_unmap_oprom; 2003 } 2004 2005 /* The rest will be validated by intel_bios_is_valid_vbt() */ 2006 vbt = kmalloc(vbt_size, GFP_KERNEL); 2007 if (!vbt) 2008 goto err_unmap_oprom; 2009 2010 memcpy_fromio(vbt, p, vbt_size); 2011 2012 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2013 goto err_free_vbt; 2014 2015 pci_unmap_rom(pdev, oprom); 2016 2017 return vbt; 2018 2019 err_free_vbt: 2020 kfree(vbt); 2021 err_unmap_oprom: 2022 pci_unmap_rom(pdev, oprom); 2023 2024 return NULL; 2025 } 2026 2027 /** 2028 * intel_bios_init - find VBT and initialize settings from the BIOS 2029 * @dev_priv: i915 device instance 2030 * 2031 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 2032 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 2033 * initialize some defaults if the VBT is not present at all. 2034 */ 2035 void intel_bios_init(struct drm_i915_private *dev_priv) 2036 { 2037 const struct vbt_header *vbt = dev_priv->opregion.vbt; 2038 struct vbt_header *oprom_vbt = NULL; 2039 const struct bdb_header *bdb; 2040 2041 INIT_LIST_HEAD(&dev_priv->vbt.display_devices); 2042 2043 if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) { 2044 DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n"); 2045 return; 2046 } 2047 2048 init_vbt_defaults(dev_priv); 2049 2050 /* If the OpRegion does not have VBT, look in PCI ROM. */ 2051 if (!vbt) { 2052 oprom_vbt = oprom_get_vbt(dev_priv); 2053 if (!oprom_vbt) 2054 goto out; 2055 2056 vbt = oprom_vbt; 2057 2058 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n"); 2059 } 2060 2061 bdb = get_bdb_header(vbt); 2062 2063 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n", 2064 (int)sizeof(vbt->signature), vbt->signature, bdb->version); 2065 2066 /* Grab useful general definitions */ 2067 parse_general_features(dev_priv, bdb); 2068 parse_general_definitions(dev_priv, bdb); 2069 parse_panel_options(dev_priv, bdb); 2070 parse_panel_dtd(dev_priv, bdb); 2071 parse_lfp_backlight(dev_priv, bdb); 2072 parse_sdvo_panel_data(dev_priv, bdb); 2073 parse_driver_features(dev_priv, bdb); 2074 parse_power_conservation_features(dev_priv, bdb); 2075 parse_edp(dev_priv, bdb); 2076 parse_psr(dev_priv, bdb); 2077 parse_mipi_config(dev_priv, bdb); 2078 parse_mipi_sequence(dev_priv, bdb); 2079 2080 /* Depends on child device list */ 2081 parse_compression_parameters(dev_priv, bdb); 2082 2083 /* Further processing on pre-parsed data */ 2084 parse_sdvo_device_mapping(dev_priv, bdb->version); 2085 parse_ddi_ports(dev_priv, bdb->version); 2086 2087 out: 2088 if (!vbt) { 2089 DRM_INFO("Failed to find VBIOS tables (VBT)\n"); 2090 init_vbt_missing_defaults(dev_priv); 2091 } 2092 2093 kfree(oprom_vbt); 2094 } 2095 2096 /** 2097 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 2098 * @dev_priv: i915 device instance 2099 */ 2100 void intel_bios_driver_remove(struct drm_i915_private *dev_priv) 2101 { 2102 struct display_device_data *devdata, *n; 2103 2104 list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) { 2105 list_del(&devdata->node); 2106 kfree(devdata->dsc); 2107 kfree(devdata); 2108 } 2109 2110 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode); 2111 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 2112 kfree(dev_priv->vbt.lfp_lvds_vbt_mode); 2113 dev_priv->vbt.lfp_lvds_vbt_mode = NULL; 2114 kfree(dev_priv->vbt.dsi.data); 2115 dev_priv->vbt.dsi.data = NULL; 2116 kfree(dev_priv->vbt.dsi.pps); 2117 dev_priv->vbt.dsi.pps = NULL; 2118 kfree(dev_priv->vbt.dsi.config); 2119 dev_priv->vbt.dsi.config = NULL; 2120 kfree(dev_priv->vbt.dsi.deassert_seq); 2121 dev_priv->vbt.dsi.deassert_seq = NULL; 2122 } 2123 2124 /** 2125 * intel_bios_is_tv_present - is integrated TV present in VBT 2126 * @dev_priv: i915 device instance 2127 * 2128 * Return true if TV is present. If no child devices were parsed from VBT, 2129 * assume TV is present. 2130 */ 2131 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv) 2132 { 2133 const struct display_device_data *devdata; 2134 const struct child_device_config *child; 2135 2136 if (!dev_priv->vbt.int_tv_support) 2137 return false; 2138 2139 if (list_empty(&dev_priv->vbt.display_devices)) 2140 return true; 2141 2142 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2143 child = &devdata->child; 2144 2145 /* 2146 * If the device type is not TV, continue. 2147 */ 2148 switch (child->device_type) { 2149 case DEVICE_TYPE_INT_TV: 2150 case DEVICE_TYPE_TV: 2151 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 2152 break; 2153 default: 2154 continue; 2155 } 2156 /* Only when the addin_offset is non-zero, it is regarded 2157 * as present. 2158 */ 2159 if (child->addin_offset) 2160 return true; 2161 } 2162 2163 return false; 2164 } 2165 2166 /** 2167 * intel_bios_is_lvds_present - is LVDS present in VBT 2168 * @dev_priv: i915 device instance 2169 * @i2c_pin: i2c pin for LVDS if present 2170 * 2171 * Return true if LVDS is present. If no child devices were parsed from VBT, 2172 * assume LVDS is present. 2173 */ 2174 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin) 2175 { 2176 const struct display_device_data *devdata; 2177 const struct child_device_config *child; 2178 2179 if (list_empty(&dev_priv->vbt.display_devices)) 2180 return true; 2181 2182 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2183 child = &devdata->child; 2184 2185 /* If the device type is not LFP, continue. 2186 * We have to check both the new identifiers as well as the 2187 * old for compatibility with some BIOSes. 2188 */ 2189 if (child->device_type != DEVICE_TYPE_INT_LFP && 2190 child->device_type != DEVICE_TYPE_LFP) 2191 continue; 2192 2193 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin)) 2194 *i2c_pin = child->i2c_pin; 2195 2196 /* However, we cannot trust the BIOS writers to populate 2197 * the VBT correctly. Since LVDS requires additional 2198 * information from AIM blocks, a non-zero addin offset is 2199 * a good indicator that the LVDS is actually present. 2200 */ 2201 if (child->addin_offset) 2202 return true; 2203 2204 /* But even then some BIOS writers perform some black magic 2205 * and instantiate the device without reference to any 2206 * additional data. Trust that if the VBT was written into 2207 * the OpRegion then they have validated the LVDS's existence. 2208 */ 2209 if (dev_priv->opregion.vbt) 2210 return true; 2211 } 2212 2213 return false; 2214 } 2215 2216 /** 2217 * intel_bios_is_port_present - is the specified digital port present 2218 * @dev_priv: i915 device instance 2219 * @port: port to check 2220 * 2221 * Return true if the device in %port is present. 2222 */ 2223 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port) 2224 { 2225 const struct display_device_data *devdata; 2226 const struct child_device_config *child; 2227 static const struct { 2228 u16 dp, hdmi; 2229 } port_mapping[] = { 2230 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2231 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2232 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2233 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2234 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2235 }; 2236 2237 if (HAS_DDI(dev_priv)) { 2238 const struct ddi_vbt_port_info *port_info = 2239 &dev_priv->vbt.ddi_port_info[port]; 2240 2241 return port_info->supports_dp || 2242 port_info->supports_dvi || 2243 port_info->supports_hdmi; 2244 } 2245 2246 /* FIXME maybe deal with port A as well? */ 2247 if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping)) 2248 return false; 2249 2250 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2251 child = &devdata->child; 2252 2253 if ((child->dvo_port == port_mapping[port].dp || 2254 child->dvo_port == port_mapping[port].hdmi) && 2255 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING | 2256 DEVICE_TYPE_DISPLAYPORT_OUTPUT))) 2257 return true; 2258 } 2259 2260 return false; 2261 } 2262 2263 /** 2264 * intel_bios_is_port_edp - is the device in given port eDP 2265 * @dev_priv: i915 device instance 2266 * @port: port to check 2267 * 2268 * Return true if the device in %port is eDP. 2269 */ 2270 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port) 2271 { 2272 const struct display_device_data *devdata; 2273 const struct child_device_config *child; 2274 static const short port_mapping[] = { 2275 [PORT_B] = DVO_PORT_DPB, 2276 [PORT_C] = DVO_PORT_DPC, 2277 [PORT_D] = DVO_PORT_DPD, 2278 [PORT_E] = DVO_PORT_DPE, 2279 [PORT_F] = DVO_PORT_DPF, 2280 }; 2281 2282 if (HAS_DDI(dev_priv)) 2283 return dev_priv->vbt.ddi_port_info[port].supports_edp; 2284 2285 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2286 child = &devdata->child; 2287 2288 if (child->dvo_port == port_mapping[port] && 2289 (child->device_type & DEVICE_TYPE_eDP_BITS) == 2290 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS)) 2291 return true; 2292 } 2293 2294 return false; 2295 } 2296 2297 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child, 2298 enum port port) 2299 { 2300 static const struct { 2301 u16 dp, hdmi; 2302 } port_mapping[] = { 2303 /* 2304 * Buggy VBTs may declare DP ports as having 2305 * HDMI type dvo_port :( So let's check both. 2306 */ 2307 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2308 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2309 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2310 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2311 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2312 }; 2313 2314 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping)) 2315 return false; 2316 2317 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) != 2318 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS)) 2319 return false; 2320 2321 if (child->dvo_port == port_mapping[port].dp) 2322 return true; 2323 2324 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 2325 if (child->dvo_port == port_mapping[port].hdmi && 2326 child->aux_channel != 0) 2327 return true; 2328 2329 return false; 2330 } 2331 2332 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, 2333 enum port port) 2334 { 2335 const struct display_device_data *devdata; 2336 2337 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2338 if (child_dev_is_dp_dual_mode(&devdata->child, port)) 2339 return true; 2340 } 2341 2342 return false; 2343 } 2344 2345 /** 2346 * intel_bios_is_dsi_present - is DSI present in VBT 2347 * @dev_priv: i915 device instance 2348 * @port: port for DSI if present 2349 * 2350 * Return true if DSI is present, and return the port in %port. 2351 */ 2352 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, 2353 enum port *port) 2354 { 2355 const struct display_device_data *devdata; 2356 const struct child_device_config *child; 2357 u8 dvo_port; 2358 2359 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2360 child = &devdata->child; 2361 2362 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2363 continue; 2364 2365 dvo_port = child->dvo_port; 2366 2367 if (dvo_port == DVO_PORT_MIPIA || 2368 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) || 2369 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) { 2370 if (port) 2371 *port = dvo_port - DVO_PORT_MIPIA; 2372 return true; 2373 } else if (dvo_port == DVO_PORT_MIPIB || 2374 dvo_port == DVO_PORT_MIPIC || 2375 dvo_port == DVO_PORT_MIPID) { 2376 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n", 2377 port_name(dvo_port - DVO_PORT_MIPIA)); 2378 } 2379 } 2380 2381 return false; 2382 } 2383 2384 static void fill_dsc(struct intel_crtc_state *crtc_state, 2385 struct dsc_compression_parameters_entry *dsc, 2386 int dsc_max_bpc) 2387 { 2388 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 2389 int bpc = 8; 2390 2391 vdsc_cfg->dsc_version_major = dsc->version_major; 2392 vdsc_cfg->dsc_version_minor = dsc->version_minor; 2393 2394 if (dsc->support_12bpc && dsc_max_bpc >= 12) 2395 bpc = 12; 2396 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 2397 bpc = 10; 2398 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 2399 bpc = 8; 2400 else 2401 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n", 2402 dsc_max_bpc); 2403 2404 crtc_state->pipe_bpp = bpc * 3; 2405 2406 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp, 2407 VBT_DSC_MAX_BPP(dsc->max_bpp)); 2408 2409 /* 2410 * FIXME: This is ugly, and slice count should take DSC engine 2411 * throughput etc. into account. 2412 * 2413 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 2414 */ 2415 if (dsc->slices_per_line & BIT(2)) { 2416 crtc_state->dsc.slice_count = 4; 2417 } else if (dsc->slices_per_line & BIT(1)) { 2418 crtc_state->dsc.slice_count = 2; 2419 } else { 2420 /* FIXME */ 2421 if (!(dsc->slices_per_line & BIT(0))) 2422 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n"); 2423 2424 crtc_state->dsc.slice_count = 1; 2425 } 2426 2427 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 2428 crtc_state->dsc.slice_count != 0) 2429 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n", 2430 crtc_state->hw.adjusted_mode.crtc_hdisplay, 2431 crtc_state->dsc.slice_count); 2432 2433 /* 2434 * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the 2435 * implementation specific physical rate buffer size. Currently we use 2436 * the required rate buffer model size calculated in 2437 * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E. 2438 * 2439 * The VBT rc_buffer_block_size and rc_buffer_size definitions 2440 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC 2441 * implementation should also use the DPCD (or perhaps VBT for eDP) 2442 * provided value for the buffer size. 2443 */ 2444 2445 /* FIXME: DSI spec says bpc + 1 for this one */ 2446 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 2447 2448 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 2449 2450 vdsc_cfg->slice_height = dsc->slice_height; 2451 } 2452 2453 /* FIXME: initially DSI specific */ 2454 bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 2455 struct intel_crtc_state *crtc_state, 2456 int dsc_max_bpc) 2457 { 2458 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2459 const struct display_device_data *devdata; 2460 const struct child_device_config *child; 2461 2462 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2463 child = &devdata->child; 2464 2465 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2466 continue; 2467 2468 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) { 2469 if (!devdata->dsc) 2470 return false; 2471 2472 if (crtc_state) 2473 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 2474 2475 return true; 2476 } 2477 } 2478 2479 return false; 2480 } 2481 2482 /** 2483 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port 2484 * @i915: i915 device instance 2485 * @port: port to check 2486 * 2487 * Return true if HPD should be inverted for %port. 2488 */ 2489 bool 2490 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, 2491 enum port port) 2492 { 2493 const struct child_device_config *child = 2494 i915->vbt.ddi_port_info[port].child; 2495 2496 if (WARN_ON_ONCE(!IS_GEN9_LP(i915))) 2497 return false; 2498 2499 return child && child->hpd_invert; 2500 } 2501 2502 /** 2503 * intel_bios_is_lspcon_present - if LSPCON is attached on %port 2504 * @i915: i915 device instance 2505 * @port: port to check 2506 * 2507 * Return true if LSPCON is present on this port 2508 */ 2509 bool 2510 intel_bios_is_lspcon_present(const struct drm_i915_private *i915, 2511 enum port port) 2512 { 2513 const struct child_device_config *child = 2514 i915->vbt.ddi_port_info[port].child; 2515 2516 return HAS_LSPCON(i915) && child && child->lspcon; 2517 } 2518 2519 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, 2520 enum port port) 2521 { 2522 const struct ddi_vbt_port_info *info = 2523 &dev_priv->vbt.ddi_port_info[port]; 2524 enum aux_ch aux_ch; 2525 2526 if (!info->alternate_aux_channel) { 2527 aux_ch = (enum aux_ch)port; 2528 2529 DRM_DEBUG_KMS("using AUX %c for port %c (platform default)\n", 2530 aux_ch_name(aux_ch), port_name(port)); 2531 return aux_ch; 2532 } 2533 2534 switch (info->alternate_aux_channel) { 2535 case DP_AUX_A: 2536 aux_ch = AUX_CH_A; 2537 break; 2538 case DP_AUX_B: 2539 aux_ch = AUX_CH_B; 2540 break; 2541 case DP_AUX_C: 2542 aux_ch = AUX_CH_C; 2543 break; 2544 case DP_AUX_D: 2545 aux_ch = AUX_CH_D; 2546 break; 2547 case DP_AUX_E: 2548 aux_ch = AUX_CH_E; 2549 break; 2550 case DP_AUX_F: 2551 aux_ch = AUX_CH_F; 2552 break; 2553 case DP_AUX_G: 2554 aux_ch = AUX_CH_G; 2555 break; 2556 default: 2557 MISSING_CASE(info->alternate_aux_channel); 2558 aux_ch = AUX_CH_A; 2559 break; 2560 } 2561 2562 DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n", 2563 aux_ch_name(aux_ch), port_name(port)); 2564 2565 return aux_ch; 2566 } 2567