1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <drm/drm_dp_helper.h> 29 #include <drm/i915_drm.h> 30 31 #include "display/intel_display.h" 32 #include "display/intel_display_types.h" 33 #include "display/intel_gmbus.h" 34 35 #include "i915_drv.h" 36 37 #define _INTEL_BIOS_PRIVATE 38 #include "intel_vbt_defs.h" 39 40 /** 41 * DOC: Video BIOS Table (VBT) 42 * 43 * The Video BIOS Table, or VBT, provides platform and board specific 44 * configuration information to the driver that is not discoverable or available 45 * through other means. The configuration is mostly related to display 46 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 47 * the PCI ROM. 48 * 49 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 50 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 51 * contain the actual configuration information. The VBT Header, and thus the 52 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 53 * BDB Header. The data blocks are concatenated after the BDB Header. The data 54 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 55 * data. (Block 53, the MIPI Sequence Block is an exception.) 56 * 57 * The driver parses the VBT during load. The relevant information is stored in 58 * driver private data for ease of use, and the actual VBT is not read after 59 * that. 60 */ 61 62 /* Wrapper for VBT child device config */ 63 struct display_device_data { 64 struct child_device_config child; 65 struct dsc_compression_parameters_entry *dsc; 66 struct list_head node; 67 }; 68 69 #define SLAVE_ADDR1 0x70 70 #define SLAVE_ADDR2 0x72 71 72 /* Get BDB block size given a pointer to Block ID. */ 73 static u32 _get_blocksize(const u8 *block_base) 74 { 75 /* The MIPI Sequence Block v3+ has a separate size field. */ 76 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 77 return *((const u32 *)(block_base + 4)); 78 else 79 return *((const u16 *)(block_base + 1)); 80 } 81 82 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 83 static u32 get_blocksize(const void *block_data) 84 { 85 return _get_blocksize(block_data - 3); 86 } 87 88 static const void * 89 find_section(const void *_bdb, enum bdb_block_id section_id) 90 { 91 const struct bdb_header *bdb = _bdb; 92 const u8 *base = _bdb; 93 int index = 0; 94 u32 total, current_size; 95 enum bdb_block_id current_id; 96 97 /* skip to first section */ 98 index += bdb->header_size; 99 total = bdb->bdb_size; 100 101 /* walk the sections looking for section_id */ 102 while (index + 3 < total) { 103 current_id = *(base + index); 104 current_size = _get_blocksize(base + index); 105 index += 3; 106 107 if (index + current_size > total) 108 return NULL; 109 110 if (current_id == section_id) 111 return base + index; 112 113 index += current_size; 114 } 115 116 return NULL; 117 } 118 119 static void 120 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 121 const struct lvds_dvo_timing *dvo_timing) 122 { 123 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 124 dvo_timing->hactive_lo; 125 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 126 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 127 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 128 ((dvo_timing->hsync_pulse_width_hi << 8) | 129 dvo_timing->hsync_pulse_width_lo); 130 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 131 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 132 133 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 134 dvo_timing->vactive_lo; 135 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 136 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 137 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 138 ((dvo_timing->vsync_pulse_width_hi << 4) | 139 dvo_timing->vsync_pulse_width_lo); 140 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 141 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 142 panel_fixed_mode->clock = dvo_timing->clock * 10; 143 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 144 145 if (dvo_timing->hsync_positive) 146 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 147 else 148 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 149 150 if (dvo_timing->vsync_positive) 151 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 152 else 153 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 154 155 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 156 dvo_timing->himage_lo; 157 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 158 dvo_timing->vimage_lo; 159 160 /* Some VBTs have bogus h/vtotal values */ 161 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 162 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 163 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 164 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 165 166 drm_mode_set_name(panel_fixed_mode); 167 } 168 169 static const struct lvds_dvo_timing * 170 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, 171 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, 172 int index) 173 { 174 /* 175 * the size of fp_timing varies on the different platform. 176 * So calculate the DVO timing relative offset in LVDS data 177 * entry to get the DVO timing entry 178 */ 179 180 int lfp_data_size = 181 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - 182 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; 183 int dvo_timing_offset = 184 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - 185 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; 186 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; 187 188 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); 189 } 190 191 /* get lvds_fp_timing entry 192 * this function may return NULL if the corresponding entry is invalid 193 */ 194 static const struct lvds_fp_timing * 195 get_lvds_fp_timing(const struct bdb_header *bdb, 196 const struct bdb_lvds_lfp_data *data, 197 const struct bdb_lvds_lfp_data_ptrs *ptrs, 198 int index) 199 { 200 size_t data_ofs = (const u8 *)data - (const u8 *)bdb; 201 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ 202 size_t ofs; 203 204 if (index >= ARRAY_SIZE(ptrs->ptr)) 205 return NULL; 206 ofs = ptrs->ptr[index].fp_timing_offset; 207 if (ofs < data_ofs || 208 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) 209 return NULL; 210 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); 211 } 212 213 /* Parse general panel options */ 214 static void 215 parse_panel_options(struct drm_i915_private *dev_priv, 216 const struct bdb_header *bdb) 217 { 218 const struct bdb_lvds_options *lvds_options; 219 int panel_type; 220 int drrs_mode; 221 int ret; 222 223 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); 224 if (!lvds_options) 225 return; 226 227 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; 228 229 ret = intel_opregion_get_panel_type(dev_priv); 230 if (ret >= 0) { 231 WARN_ON(ret > 0xf); 232 panel_type = ret; 233 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type); 234 } else { 235 if (lvds_options->panel_type > 0xf) { 236 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n", 237 lvds_options->panel_type); 238 return; 239 } 240 panel_type = lvds_options->panel_type; 241 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type); 242 } 243 244 dev_priv->vbt.panel_type = panel_type; 245 246 drrs_mode = (lvds_options->dps_panel_type_bits 247 >> (panel_type * 2)) & MODE_MASK; 248 /* 249 * VBT has static DRRS = 0 and seamless DRRS = 2. 250 * The below piece of code is required to adjust vbt.drrs_type 251 * to match the enum drrs_support_type. 252 */ 253 switch (drrs_mode) { 254 case 0: 255 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; 256 DRM_DEBUG_KMS("DRRS supported mode is static\n"); 257 break; 258 case 2: 259 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; 260 DRM_DEBUG_KMS("DRRS supported mode is seamless\n"); 261 break; 262 default: 263 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 264 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n"); 265 break; 266 } 267 } 268 269 /* Try to find integrated panel timing data */ 270 static void 271 parse_lfp_panel_dtd(struct drm_i915_private *dev_priv, 272 const struct bdb_header *bdb) 273 { 274 const struct bdb_lvds_lfp_data *lvds_lfp_data; 275 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; 276 const struct lvds_dvo_timing *panel_dvo_timing; 277 const struct lvds_fp_timing *fp_timing; 278 struct drm_display_mode *panel_fixed_mode; 279 int panel_type = dev_priv->vbt.panel_type; 280 281 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); 282 if (!lvds_lfp_data) 283 return; 284 285 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); 286 if (!lvds_lfp_data_ptrs) 287 return; 288 289 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 290 lvds_lfp_data_ptrs, 291 panel_type); 292 293 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 294 if (!panel_fixed_mode) 295 return; 296 297 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 298 299 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 300 301 DRM_DEBUG_KMS("Found panel mode in BIOS VBT legacy lfp table:\n"); 302 drm_mode_debug_printmodeline(panel_fixed_mode); 303 304 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, 305 lvds_lfp_data_ptrs, 306 panel_type); 307 if (fp_timing) { 308 /* check the resolution, just to be sure */ 309 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 310 fp_timing->y_res == panel_fixed_mode->vdisplay) { 311 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 312 DRM_DEBUG_KMS("VBT initial LVDS value %x\n", 313 dev_priv->vbt.bios_lvds_val); 314 } 315 } 316 } 317 318 static void 319 parse_generic_dtd(struct drm_i915_private *dev_priv, 320 const struct bdb_header *bdb) 321 { 322 const struct bdb_generic_dtd *generic_dtd; 323 const struct generic_dtd_entry *dtd; 324 struct drm_display_mode *panel_fixed_mode; 325 int num_dtd; 326 327 generic_dtd = find_section(bdb, BDB_GENERIC_DTD); 328 if (!generic_dtd) 329 return; 330 331 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 332 DRM_ERROR("GDTD size %u is too small.\n", 333 generic_dtd->gdtd_size); 334 return; 335 } else if (generic_dtd->gdtd_size != 336 sizeof(struct generic_dtd_entry)) { 337 DRM_ERROR("Unexpected GDTD size %u\n", generic_dtd->gdtd_size); 338 /* DTD has unknown fields, but keep going */ 339 } 340 341 num_dtd = (get_blocksize(generic_dtd) - 342 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 343 if (dev_priv->vbt.panel_type >= num_dtd) { 344 DRM_ERROR("Panel type %d not found in table of %d DTD's\n", 345 dev_priv->vbt.panel_type, num_dtd); 346 return; 347 } 348 349 dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type]; 350 351 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 352 if (!panel_fixed_mode) 353 return; 354 355 panel_fixed_mode->hdisplay = dtd->hactive; 356 panel_fixed_mode->hsync_start = 357 panel_fixed_mode->hdisplay + dtd->hfront_porch; 358 panel_fixed_mode->hsync_end = 359 panel_fixed_mode->hsync_start + dtd->hsync; 360 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end; 361 362 panel_fixed_mode->vdisplay = dtd->vactive; 363 panel_fixed_mode->vsync_start = 364 panel_fixed_mode->vdisplay + dtd->vfront_porch; 365 panel_fixed_mode->vsync_end = 366 panel_fixed_mode->vsync_start + dtd->vsync; 367 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end; 368 369 panel_fixed_mode->clock = dtd->pixel_clock; 370 panel_fixed_mode->width_mm = dtd->width_mm; 371 panel_fixed_mode->height_mm = dtd->height_mm; 372 373 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 374 drm_mode_set_name(panel_fixed_mode); 375 376 if (dtd->hsync_positive_polarity) 377 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 378 else 379 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 380 381 if (dtd->vsync_positive_polarity) 382 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 383 else 384 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 385 386 DRM_DEBUG_KMS("Found panel mode in BIOS VBT generic dtd table:\n"); 387 drm_mode_debug_printmodeline(panel_fixed_mode); 388 389 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 390 } 391 392 static void 393 parse_panel_dtd(struct drm_i915_private *dev_priv, 394 const struct bdb_header *bdb) 395 { 396 /* 397 * Older VBTs provided provided DTD information for internal displays 398 * through the "LFP panel DTD" block (42). As of VBT revision 229, 399 * that block is now deprecated and DTD information should be provided 400 * via a newer "generic DTD" block (58). Just to be safe, we'll 401 * try the new generic DTD block first on VBT >= 229, but still fall 402 * back to trying the old LFP block if that fails. 403 */ 404 if (bdb->version >= 229) 405 parse_generic_dtd(dev_priv, bdb); 406 if (!dev_priv->vbt.lfp_lvds_vbt_mode) 407 parse_lfp_panel_dtd(dev_priv, bdb); 408 } 409 410 static void 411 parse_lfp_backlight(struct drm_i915_private *dev_priv, 412 const struct bdb_header *bdb) 413 { 414 const struct bdb_lfp_backlight_data *backlight_data; 415 const struct lfp_backlight_data_entry *entry; 416 int panel_type = dev_priv->vbt.panel_type; 417 418 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); 419 if (!backlight_data) 420 return; 421 422 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 423 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n", 424 backlight_data->entry_size); 425 return; 426 } 427 428 entry = &backlight_data->data[panel_type]; 429 430 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 431 if (!dev_priv->vbt.backlight.present) { 432 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n", 433 entry->type); 434 return; 435 } 436 437 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 438 if (bdb->version >= 191 && 439 get_blocksize(backlight_data) >= sizeof(*backlight_data)) { 440 const struct lfp_backlight_control_method *method; 441 442 method = &backlight_data->backlight_control[panel_type]; 443 dev_priv->vbt.backlight.type = method->type; 444 dev_priv->vbt.backlight.controller = method->controller; 445 } 446 447 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 448 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; 449 dev_priv->vbt.backlight.min_brightness = entry->min_brightness; 450 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, " 451 "active %s, min brightness %u, level %u, controller %u\n", 452 dev_priv->vbt.backlight.pwm_freq_hz, 453 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", 454 dev_priv->vbt.backlight.min_brightness, 455 backlight_data->level[panel_type], 456 dev_priv->vbt.backlight.controller); 457 } 458 459 /* Try to find sdvo panel data */ 460 static void 461 parse_sdvo_panel_data(struct drm_i915_private *dev_priv, 462 const struct bdb_header *bdb) 463 { 464 const struct bdb_sdvo_panel_dtds *dtds; 465 struct drm_display_mode *panel_fixed_mode; 466 int index; 467 468 index = i915_modparams.vbt_sdvo_panel_type; 469 if (index == -2) { 470 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n"); 471 return; 472 } 473 474 if (index == -1) { 475 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 476 477 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); 478 if (!sdvo_lvds_options) 479 return; 480 481 index = sdvo_lvds_options->panel_type; 482 } 483 484 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS); 485 if (!dtds) 486 return; 487 488 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 489 if (!panel_fixed_mode) 490 return; 491 492 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 493 494 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 495 496 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n"); 497 drm_mode_debug_printmodeline(panel_fixed_mode); 498 } 499 500 static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv, 501 bool alternate) 502 { 503 switch (INTEL_GEN(dev_priv)) { 504 case 2: 505 return alternate ? 66667 : 48000; 506 case 3: 507 case 4: 508 return alternate ? 100000 : 96000; 509 default: 510 return alternate ? 100000 : 120000; 511 } 512 } 513 514 static void 515 parse_general_features(struct drm_i915_private *dev_priv, 516 const struct bdb_header *bdb) 517 { 518 const struct bdb_general_features *general; 519 520 general = find_section(bdb, BDB_GENERAL_FEATURES); 521 if (!general) 522 return; 523 524 dev_priv->vbt.int_tv_support = general->int_tv_support; 525 /* int_crt_support can't be trusted on earlier platforms */ 526 if (bdb->version >= 155 && 527 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv))) 528 dev_priv->vbt.int_crt_support = general->int_crt_support; 529 dev_priv->vbt.lvds_use_ssc = general->enable_ssc; 530 dev_priv->vbt.lvds_ssc_freq = 531 intel_bios_ssc_frequency(dev_priv, general->ssc_freq); 532 dev_priv->vbt.display_clock_mode = general->display_clock_mode; 533 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 534 if (bdb->version >= 181) { 535 dev_priv->vbt.orientation = general->rotate_180 ? 536 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 537 DRM_MODE_PANEL_ORIENTATION_NORMAL; 538 } else { 539 dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 540 } 541 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 542 dev_priv->vbt.int_tv_support, 543 dev_priv->vbt.int_crt_support, 544 dev_priv->vbt.lvds_use_ssc, 545 dev_priv->vbt.lvds_ssc_freq, 546 dev_priv->vbt.display_clock_mode, 547 dev_priv->vbt.fdi_rx_polarity_inverted); 548 } 549 550 static const struct child_device_config * 551 child_device_ptr(const struct bdb_general_definitions *defs, int i) 552 { 553 return (const void *) &defs->devices[i * defs->child_dev_size]; 554 } 555 556 static void 557 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version) 558 { 559 struct sdvo_device_mapping *mapping; 560 const struct display_device_data *devdata; 561 const struct child_device_config *child; 562 int count = 0; 563 564 /* 565 * Only parse SDVO mappings on gens that could have SDVO. This isn't 566 * accurate and doesn't have to be, as long as it's not too strict. 567 */ 568 if (!IS_GEN_RANGE(dev_priv, 3, 7)) { 569 DRM_DEBUG_KMS("Skipping SDVO device mapping\n"); 570 return; 571 } 572 573 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 574 child = &devdata->child; 575 576 if (child->slave_addr != SLAVE_ADDR1 && 577 child->slave_addr != SLAVE_ADDR2) { 578 /* 579 * If the slave address is neither 0x70 nor 0x72, 580 * it is not a SDVO device. Skip it. 581 */ 582 continue; 583 } 584 if (child->dvo_port != DEVICE_PORT_DVOB && 585 child->dvo_port != DEVICE_PORT_DVOC) { 586 /* skip the incorrect SDVO port */ 587 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); 588 continue; 589 } 590 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" 591 " %s port\n", 592 child->slave_addr, 593 (child->dvo_port == DEVICE_PORT_DVOB) ? 594 "SDVOB" : "SDVOC"); 595 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1]; 596 if (!mapping->initialized) { 597 mapping->dvo_port = child->dvo_port; 598 mapping->slave_addr = child->slave_addr; 599 mapping->dvo_wiring = child->dvo_wiring; 600 mapping->ddc_pin = child->ddc_pin; 601 mapping->i2c_pin = child->i2c_pin; 602 mapping->initialized = 1; 603 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 604 mapping->dvo_port, 605 mapping->slave_addr, 606 mapping->dvo_wiring, 607 mapping->ddc_pin, 608 mapping->i2c_pin); 609 } else { 610 DRM_DEBUG_KMS("Maybe one SDVO port is shared by " 611 "two SDVO device.\n"); 612 } 613 if (child->slave2_addr) { 614 /* Maybe this is a SDVO device with multiple inputs */ 615 /* And the mapping info is not added */ 616 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" 617 " is a SDVO device with multiple inputs.\n"); 618 } 619 count++; 620 } 621 622 if (!count) { 623 /* No SDVO device info is found */ 624 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n"); 625 } 626 } 627 628 static void 629 parse_driver_features(struct drm_i915_private *dev_priv, 630 const struct bdb_header *bdb) 631 { 632 const struct bdb_driver_features *driver; 633 634 driver = find_section(bdb, BDB_DRIVER_FEATURES); 635 if (!driver) 636 return; 637 638 if (INTEL_GEN(dev_priv) >= 5) { 639 /* 640 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 641 * to mean "eDP". The VBT spec doesn't agree with that 642 * interpretation, but real world VBTs seem to. 643 */ 644 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 645 dev_priv->vbt.int_lvds_support = 0; 646 } else { 647 /* 648 * FIXME it's not clear which BDB version has the LVDS config 649 * bits defined. Revision history in the VBT spec says: 650 * "0.92 | Add two definitions for VBT value of LVDS Active 651 * Config (00b and 11b values defined) | 06/13/2005" 652 * but does not the specify the BDB version. 653 * 654 * So far version 134 (on i945gm) is the oldest VBT observed 655 * in the wild with the bits correctly populated. Version 656 * 108 (on i85x) does not have the bits correctly populated. 657 */ 658 if (bdb->version >= 134 && 659 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 660 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 661 dev_priv->vbt.int_lvds_support = 0; 662 } 663 664 if (bdb->version < 228) { 665 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); 666 /* 667 * If DRRS is not supported, drrs_type has to be set to 0. 668 * This is because, VBT is configured in such a way that 669 * static DRRS is 0 and DRRS not supported is represented by 670 * driver->drrs_enabled=false 671 */ 672 if (!driver->drrs_enabled) 673 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 674 675 dev_priv->vbt.psr.enable = driver->psr_enabled; 676 } 677 } 678 679 static void 680 parse_power_conservation_features(struct drm_i915_private *dev_priv, 681 const struct bdb_header *bdb) 682 { 683 const struct bdb_lfp_power *power; 684 u8 panel_type = dev_priv->vbt.panel_type; 685 686 if (bdb->version < 228) 687 return; 688 689 power = find_section(bdb, BDB_LVDS_POWER); 690 if (!power) 691 return; 692 693 dev_priv->vbt.psr.enable = power->psr & BIT(panel_type); 694 695 /* 696 * If DRRS is not supported, drrs_type has to be set to 0. 697 * This is because, VBT is configured in such a way that 698 * static DRRS is 0 and DRRS not supported is represented by 699 * power->drrs & BIT(panel_type)=false 700 */ 701 if (!(power->drrs & BIT(panel_type))) 702 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 703 } 704 705 static void 706 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 707 { 708 const struct bdb_edp *edp; 709 const struct edp_power_seq *edp_pps; 710 const struct edp_fast_link_params *edp_link_params; 711 int panel_type = dev_priv->vbt.panel_type; 712 713 edp = find_section(bdb, BDB_EDP); 714 if (!edp) 715 return; 716 717 switch ((edp->color_depth >> (panel_type * 2)) & 3) { 718 case EDP_18BPP: 719 dev_priv->vbt.edp.bpp = 18; 720 break; 721 case EDP_24BPP: 722 dev_priv->vbt.edp.bpp = 24; 723 break; 724 case EDP_30BPP: 725 dev_priv->vbt.edp.bpp = 30; 726 break; 727 } 728 729 /* Get the eDP sequencing and link info */ 730 edp_pps = &edp->power_seqs[panel_type]; 731 edp_link_params = &edp->fast_link_params[panel_type]; 732 733 dev_priv->vbt.edp.pps = *edp_pps; 734 735 switch (edp_link_params->rate) { 736 case EDP_RATE_1_62: 737 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62; 738 break; 739 case EDP_RATE_2_7: 740 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7; 741 break; 742 default: 743 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n", 744 edp_link_params->rate); 745 break; 746 } 747 748 switch (edp_link_params->lanes) { 749 case EDP_LANE_1: 750 dev_priv->vbt.edp.lanes = 1; 751 break; 752 case EDP_LANE_2: 753 dev_priv->vbt.edp.lanes = 2; 754 break; 755 case EDP_LANE_4: 756 dev_priv->vbt.edp.lanes = 4; 757 break; 758 default: 759 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n", 760 edp_link_params->lanes); 761 break; 762 } 763 764 switch (edp_link_params->preemphasis) { 765 case EDP_PREEMPHASIS_NONE: 766 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 767 break; 768 case EDP_PREEMPHASIS_3_5dB: 769 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 770 break; 771 case EDP_PREEMPHASIS_6dB: 772 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 773 break; 774 case EDP_PREEMPHASIS_9_5dB: 775 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 776 break; 777 default: 778 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n", 779 edp_link_params->preemphasis); 780 break; 781 } 782 783 switch (edp_link_params->vswing) { 784 case EDP_VSWING_0_4V: 785 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 786 break; 787 case EDP_VSWING_0_6V: 788 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 789 break; 790 case EDP_VSWING_0_8V: 791 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 792 break; 793 case EDP_VSWING_1_2V: 794 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 795 break; 796 default: 797 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n", 798 edp_link_params->vswing); 799 break; 800 } 801 802 if (bdb->version >= 173) { 803 u8 vswing; 804 805 /* Don't read from VBT if module parameter has valid value*/ 806 if (i915_modparams.edp_vswing) { 807 dev_priv->vbt.edp.low_vswing = 808 i915_modparams.edp_vswing == 1; 809 } else { 810 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 811 dev_priv->vbt.edp.low_vswing = vswing == 0; 812 } 813 } 814 } 815 816 static void 817 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 818 { 819 const struct bdb_psr *psr; 820 const struct psr_table *psr_table; 821 int panel_type = dev_priv->vbt.panel_type; 822 823 psr = find_section(bdb, BDB_PSR); 824 if (!psr) { 825 DRM_DEBUG_KMS("No PSR BDB found.\n"); 826 return; 827 } 828 829 psr_table = &psr->psr_table[panel_type]; 830 831 dev_priv->vbt.psr.full_link = psr_table->full_link; 832 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 833 834 /* Allowed VBT values goes from 0 to 15 */ 835 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 836 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 837 838 switch (psr_table->lines_to_wait) { 839 case 0: 840 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT; 841 break; 842 case 1: 843 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT; 844 break; 845 case 2: 846 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT; 847 break; 848 case 3: 849 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT; 850 break; 851 default: 852 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n", 853 psr_table->lines_to_wait); 854 break; 855 } 856 857 /* 858 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 859 * Old decimal value is wake up time in multiples of 100 us. 860 */ 861 if (bdb->version >= 205 && 862 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) || 863 INTEL_GEN(dev_priv) >= 10)) { 864 switch (psr_table->tp1_wakeup_time) { 865 case 0: 866 dev_priv->vbt.psr.tp1_wakeup_time_us = 500; 867 break; 868 case 1: 869 dev_priv->vbt.psr.tp1_wakeup_time_us = 100; 870 break; 871 case 3: 872 dev_priv->vbt.psr.tp1_wakeup_time_us = 0; 873 break; 874 default: 875 DRM_DEBUG_KMS("VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 876 psr_table->tp1_wakeup_time); 877 /* fallthrough */ 878 case 2: 879 dev_priv->vbt.psr.tp1_wakeup_time_us = 2500; 880 break; 881 } 882 883 switch (psr_table->tp2_tp3_wakeup_time) { 884 case 0: 885 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500; 886 break; 887 case 1: 888 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100; 889 break; 890 case 3: 891 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0; 892 break; 893 default: 894 DRM_DEBUG_KMS("VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 895 psr_table->tp2_tp3_wakeup_time); 896 /* fallthrough */ 897 case 2: 898 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 899 break; 900 } 901 } else { 902 dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 903 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 904 } 905 906 if (bdb->version >= 226) { 907 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 908 909 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3; 910 switch (wakeup_time) { 911 case 0: 912 wakeup_time = 500; 913 break; 914 case 1: 915 wakeup_time = 100; 916 break; 917 case 3: 918 wakeup_time = 50; 919 break; 920 default: 921 case 2: 922 wakeup_time = 2500; 923 break; 924 } 925 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 926 } else { 927 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 928 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us; 929 } 930 } 931 932 static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv, 933 u16 version, enum port port) 934 { 935 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) { 936 dev_priv->vbt.dsi.bl_ports = BIT(port); 937 if (dev_priv->vbt.dsi.config->cabc_supported) 938 dev_priv->vbt.dsi.cabc_ports = BIT(port); 939 940 return; 941 } 942 943 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) { 944 case DL_DCS_PORT_A: 945 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A); 946 break; 947 case DL_DCS_PORT_C: 948 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C); 949 break; 950 default: 951 case DL_DCS_PORT_A_AND_C: 952 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C); 953 break; 954 } 955 956 if (!dev_priv->vbt.dsi.config->cabc_supported) 957 return; 958 959 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) { 960 case DL_DCS_PORT_A: 961 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A); 962 break; 963 case DL_DCS_PORT_C: 964 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C); 965 break; 966 default: 967 case DL_DCS_PORT_A_AND_C: 968 dev_priv->vbt.dsi.cabc_ports = 969 BIT(PORT_A) | BIT(PORT_C); 970 break; 971 } 972 } 973 974 static void 975 parse_mipi_config(struct drm_i915_private *dev_priv, 976 const struct bdb_header *bdb) 977 { 978 const struct bdb_mipi_config *start; 979 const struct mipi_config *config; 980 const struct mipi_pps_data *pps; 981 int panel_type = dev_priv->vbt.panel_type; 982 enum port port; 983 984 /* parse MIPI blocks only if LFP type is MIPI */ 985 if (!intel_bios_is_dsi_present(dev_priv, &port)) 986 return; 987 988 /* Initialize this to undefined indicating no generic MIPI support */ 989 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 990 991 /* Block #40 is already parsed and panel_fixed_mode is 992 * stored in dev_priv->lfp_lvds_vbt_mode 993 * resuse this when needed 994 */ 995 996 /* Parse #52 for panel index used from panel_type already 997 * parsed 998 */ 999 start = find_section(bdb, BDB_MIPI_CONFIG); 1000 if (!start) { 1001 DRM_DEBUG_KMS("No MIPI config BDB found"); 1002 return; 1003 } 1004 1005 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n", 1006 panel_type); 1007 1008 /* 1009 * get hold of the correct configuration block and pps data as per 1010 * the panel_type as index 1011 */ 1012 config = &start->config[panel_type]; 1013 pps = &start->pps[panel_type]; 1014 1015 /* store as of now full data. Trim when we realise all is not needed */ 1016 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1017 if (!dev_priv->vbt.dsi.config) 1018 return; 1019 1020 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1021 if (!dev_priv->vbt.dsi.pps) { 1022 kfree(dev_priv->vbt.dsi.config); 1023 return; 1024 } 1025 1026 parse_dsi_backlight_ports(dev_priv, bdb->version, port); 1027 1028 /* FIXME is the 90 vs. 270 correct? */ 1029 switch (config->rotation) { 1030 case ENABLE_ROTATION_0: 1031 /* 1032 * Most (all?) VBTs claim 0 degrees despite having 1033 * an upside down panel, thus we do not trust this. 1034 */ 1035 dev_priv->vbt.dsi.orientation = 1036 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1037 break; 1038 case ENABLE_ROTATION_90: 1039 dev_priv->vbt.dsi.orientation = 1040 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1041 break; 1042 case ENABLE_ROTATION_180: 1043 dev_priv->vbt.dsi.orientation = 1044 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1045 break; 1046 case ENABLE_ROTATION_270: 1047 dev_priv->vbt.dsi.orientation = 1048 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1049 break; 1050 } 1051 1052 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1053 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1054 } 1055 1056 /* Find the sequence block and size for the given panel. */ 1057 static const u8 * 1058 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 1059 u16 panel_id, u32 *seq_size) 1060 { 1061 u32 total = get_blocksize(sequence); 1062 const u8 *data = &sequence->data[0]; 1063 u8 current_id; 1064 u32 current_size; 1065 int header_size = sequence->version >= 3 ? 5 : 3; 1066 int index = 0; 1067 int i; 1068 1069 /* skip new block size */ 1070 if (sequence->version >= 3) 1071 data += 4; 1072 1073 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1074 if (index + header_size > total) { 1075 DRM_ERROR("Invalid sequence block (header)\n"); 1076 return NULL; 1077 } 1078 1079 current_id = *(data + index); 1080 if (sequence->version >= 3) 1081 current_size = *((const u32 *)(data + index + 1)); 1082 else 1083 current_size = *((const u16 *)(data + index + 1)); 1084 1085 index += header_size; 1086 1087 if (index + current_size > total) { 1088 DRM_ERROR("Invalid sequence block\n"); 1089 return NULL; 1090 } 1091 1092 if (current_id == panel_id) { 1093 *seq_size = current_size; 1094 return data + index; 1095 } 1096 1097 index += current_size; 1098 } 1099 1100 DRM_ERROR("Sequence block detected but no valid configuration\n"); 1101 1102 return NULL; 1103 } 1104 1105 static int goto_next_sequence(const u8 *data, int index, int total) 1106 { 1107 u16 len; 1108 1109 /* Skip Sequence Byte. */ 1110 for (index = index + 1; index < total; index += len) { 1111 u8 operation_byte = *(data + index); 1112 index++; 1113 1114 switch (operation_byte) { 1115 case MIPI_SEQ_ELEM_END: 1116 return index; 1117 case MIPI_SEQ_ELEM_SEND_PKT: 1118 if (index + 4 > total) 1119 return 0; 1120 1121 len = *((const u16 *)(data + index + 2)) + 4; 1122 break; 1123 case MIPI_SEQ_ELEM_DELAY: 1124 len = 4; 1125 break; 1126 case MIPI_SEQ_ELEM_GPIO: 1127 len = 2; 1128 break; 1129 case MIPI_SEQ_ELEM_I2C: 1130 if (index + 7 > total) 1131 return 0; 1132 len = *(data + index + 6) + 7; 1133 break; 1134 default: 1135 DRM_ERROR("Unknown operation byte\n"); 1136 return 0; 1137 } 1138 } 1139 1140 return 0; 1141 } 1142 1143 static int goto_next_sequence_v3(const u8 *data, int index, int total) 1144 { 1145 int seq_end; 1146 u16 len; 1147 u32 size_of_sequence; 1148 1149 /* 1150 * Could skip sequence based on Size of Sequence alone, but also do some 1151 * checking on the structure. 1152 */ 1153 if (total < 5) { 1154 DRM_ERROR("Too small sequence size\n"); 1155 return 0; 1156 } 1157 1158 /* Skip Sequence Byte. */ 1159 index++; 1160 1161 /* 1162 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1163 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1164 * byte. 1165 */ 1166 size_of_sequence = *((const u32 *)(data + index)); 1167 index += 4; 1168 1169 seq_end = index + size_of_sequence; 1170 if (seq_end > total) { 1171 DRM_ERROR("Invalid sequence size\n"); 1172 return 0; 1173 } 1174 1175 for (; index < total; index += len) { 1176 u8 operation_byte = *(data + index); 1177 index++; 1178 1179 if (operation_byte == MIPI_SEQ_ELEM_END) { 1180 if (index != seq_end) { 1181 DRM_ERROR("Invalid element structure\n"); 1182 return 0; 1183 } 1184 return index; 1185 } 1186 1187 len = *(data + index); 1188 index++; 1189 1190 /* 1191 * FIXME: Would be nice to check elements like for v1/v2 in 1192 * goto_next_sequence() above. 1193 */ 1194 switch (operation_byte) { 1195 case MIPI_SEQ_ELEM_SEND_PKT: 1196 case MIPI_SEQ_ELEM_DELAY: 1197 case MIPI_SEQ_ELEM_GPIO: 1198 case MIPI_SEQ_ELEM_I2C: 1199 case MIPI_SEQ_ELEM_SPI: 1200 case MIPI_SEQ_ELEM_PMIC: 1201 break; 1202 default: 1203 DRM_ERROR("Unknown operation byte %u\n", 1204 operation_byte); 1205 break; 1206 } 1207 } 1208 1209 return 0; 1210 } 1211 1212 /* 1213 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1214 * skip all delay + gpio operands and stop at the first DSI packet op. 1215 */ 1216 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv) 1217 { 1218 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1219 int index, len; 1220 1221 if (WARN_ON(!data || dev_priv->vbt.dsi.seq_version != 1)) 1222 return 0; 1223 1224 /* index = 1 to skip sequence byte */ 1225 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1226 switch (data[index]) { 1227 case MIPI_SEQ_ELEM_SEND_PKT: 1228 return index == 1 ? 0 : index; 1229 case MIPI_SEQ_ELEM_DELAY: 1230 len = 5; /* 1 byte for operand + uint32 */ 1231 break; 1232 case MIPI_SEQ_ELEM_GPIO: 1233 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1234 break; 1235 default: 1236 return 0; 1237 } 1238 } 1239 1240 return 0; 1241 } 1242 1243 /* 1244 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1245 * The deassert must be done before calling intel_dsi_device_ready, so for 1246 * these devices we split the init OTP sequence into a deassert sequence and 1247 * the actual init OTP part. 1248 */ 1249 static void fixup_mipi_sequences(struct drm_i915_private *dev_priv) 1250 { 1251 u8 *init_otp; 1252 int len; 1253 1254 /* Limit this to VLV for now. */ 1255 if (!IS_VALLEYVIEW(dev_priv)) 1256 return; 1257 1258 /* Limit this to v1 vid-mode sequences */ 1259 if (dev_priv->vbt.dsi.config->is_cmd_mode || 1260 dev_priv->vbt.dsi.seq_version != 1) 1261 return; 1262 1263 /* Only do this if there are otp and assert seqs and no deassert seq */ 1264 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1265 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1266 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1267 return; 1268 1269 /* The deassert-sequence ends at the first DSI packet */ 1270 len = get_init_otp_deassert_fragment_len(dev_priv); 1271 if (!len) 1272 return; 1273 1274 DRM_DEBUG_KMS("Using init OTP fragment to deassert reset\n"); 1275 1276 /* Copy the fragment, update seq byte and terminate it */ 1277 init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1278 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1279 if (!dev_priv->vbt.dsi.deassert_seq) 1280 return; 1281 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1282 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1283 /* Use the copy for deassert */ 1284 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1285 dev_priv->vbt.dsi.deassert_seq; 1286 /* Replace the last byte of the fragment with init OTP seq byte */ 1287 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1288 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1289 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1290 } 1291 1292 static void 1293 parse_mipi_sequence(struct drm_i915_private *dev_priv, 1294 const struct bdb_header *bdb) 1295 { 1296 int panel_type = dev_priv->vbt.panel_type; 1297 const struct bdb_mipi_sequence *sequence; 1298 const u8 *seq_data; 1299 u32 seq_size; 1300 u8 *data; 1301 int index = 0; 1302 1303 /* Only our generic panel driver uses the sequence block. */ 1304 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 1305 return; 1306 1307 sequence = find_section(bdb, BDB_MIPI_SEQUENCE); 1308 if (!sequence) { 1309 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n"); 1310 return; 1311 } 1312 1313 /* Fail gracefully for forward incompatible sequence block. */ 1314 if (sequence->version >= 4) { 1315 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n", 1316 sequence->version); 1317 return; 1318 } 1319 1320 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version); 1321 1322 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 1323 if (!seq_data) 1324 return; 1325 1326 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 1327 if (!data) 1328 return; 1329 1330 /* Parse the sequences, store pointers to each sequence. */ 1331 for (;;) { 1332 u8 seq_id = *(data + index); 1333 if (seq_id == MIPI_SEQ_END) 1334 break; 1335 1336 if (seq_id >= MIPI_SEQ_MAX) { 1337 DRM_ERROR("Unknown sequence %u\n", seq_id); 1338 goto err; 1339 } 1340 1341 /* Log about presence of sequences we won't run. */ 1342 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 1343 DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id); 1344 1345 dev_priv->vbt.dsi.sequence[seq_id] = data + index; 1346 1347 if (sequence->version >= 3) 1348 index = goto_next_sequence_v3(data, index, seq_size); 1349 else 1350 index = goto_next_sequence(data, index, seq_size); 1351 if (!index) { 1352 DRM_ERROR("Invalid sequence %u\n", seq_id); 1353 goto err; 1354 } 1355 } 1356 1357 dev_priv->vbt.dsi.data = data; 1358 dev_priv->vbt.dsi.size = seq_size; 1359 dev_priv->vbt.dsi.seq_version = sequence->version; 1360 1361 fixup_mipi_sequences(dev_priv); 1362 1363 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n"); 1364 return; 1365 1366 err: 1367 kfree(data); 1368 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence)); 1369 } 1370 1371 static void 1372 parse_compression_parameters(struct drm_i915_private *i915, 1373 const struct bdb_header *bdb) 1374 { 1375 const struct bdb_compression_parameters *params; 1376 struct display_device_data *devdata; 1377 const struct child_device_config *child; 1378 u16 block_size; 1379 int index; 1380 1381 if (bdb->version < 198) 1382 return; 1383 1384 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS); 1385 if (params) { 1386 /* Sanity checks */ 1387 if (params->entry_size != sizeof(params->data[0])) { 1388 DRM_DEBUG_KMS("VBT: unsupported compression param entry size\n"); 1389 return; 1390 } 1391 1392 block_size = get_blocksize(params); 1393 if (block_size < sizeof(*params)) { 1394 DRM_DEBUG_KMS("VBT: expected 16 compression param entries\n"); 1395 return; 1396 } 1397 } 1398 1399 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 1400 child = &devdata->child; 1401 1402 if (!child->compression_enable) 1403 continue; 1404 1405 if (!params) { 1406 DRM_DEBUG_KMS("VBT: compression params not available\n"); 1407 continue; 1408 } 1409 1410 if (child->compression_method_cps) { 1411 DRM_DEBUG_KMS("VBT: CPS compression not supported\n"); 1412 continue; 1413 } 1414 1415 index = child->compression_structure_index; 1416 1417 devdata->dsc = kmemdup(¶ms->data[index], 1418 sizeof(*devdata->dsc), GFP_KERNEL); 1419 } 1420 } 1421 1422 static u8 translate_iboost(u8 val) 1423 { 1424 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 1425 1426 if (val >= ARRAY_SIZE(mapping)) { 1427 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 1428 return 0; 1429 } 1430 return mapping[val]; 1431 } 1432 1433 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin) 1434 { 1435 const struct ddi_vbt_port_info *info; 1436 enum port port; 1437 1438 for_each_port(port) { 1439 info = &i915->vbt.ddi_port_info[port]; 1440 1441 if (info->child && ddc_pin == info->alternate_ddc_pin) 1442 return port; 1443 } 1444 1445 return PORT_NONE; 1446 } 1447 1448 static void sanitize_ddc_pin(struct drm_i915_private *dev_priv, 1449 enum port port) 1450 { 1451 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1452 enum port p; 1453 1454 if (!info->alternate_ddc_pin) 1455 return; 1456 1457 p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin); 1458 if (p != PORT_NONE) { 1459 DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, " 1460 "disabling port %c DVI/HDMI support\n", 1461 port_name(port), info->alternate_ddc_pin, 1462 port_name(p), port_name(p)); 1463 1464 /* 1465 * If we have multiple ports supposedly sharing the 1466 * pin, then dvi/hdmi couldn't exist on the shared 1467 * port. Otherwise they share the same ddc bin and 1468 * system couldn't communicate with them separately. 1469 * 1470 * Give inverse child device order the priority, 1471 * last one wins. Yes, there are real machines 1472 * (eg. Asrock B250M-HDV) where VBT has both 1473 * port A and port E with the same AUX ch and 1474 * we must pick port E :( 1475 */ 1476 info = &dev_priv->vbt.ddi_port_info[p]; 1477 1478 info->supports_dvi = false; 1479 info->supports_hdmi = false; 1480 info->alternate_ddc_pin = 0; 1481 } 1482 } 1483 1484 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch) 1485 { 1486 const struct ddi_vbt_port_info *info; 1487 enum port port; 1488 1489 for_each_port(port) { 1490 info = &i915->vbt.ddi_port_info[port]; 1491 1492 if (info->child && aux_ch == info->alternate_aux_channel) 1493 return port; 1494 } 1495 1496 return PORT_NONE; 1497 } 1498 1499 static void sanitize_aux_ch(struct drm_i915_private *dev_priv, 1500 enum port port) 1501 { 1502 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1503 enum port p; 1504 1505 if (!info->alternate_aux_channel) 1506 return; 1507 1508 p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel); 1509 if (p != PORT_NONE) { 1510 DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, " 1511 "disabling port %c DP support\n", 1512 port_name(port), info->alternate_aux_channel, 1513 port_name(p), port_name(p)); 1514 1515 /* 1516 * If we have multiple ports supposedlt sharing the 1517 * aux channel, then DP couldn't exist on the shared 1518 * port. Otherwise they share the same aux channel 1519 * and system couldn't communicate with them separately. 1520 * 1521 * Give inverse child device order the priority, 1522 * last one wins. Yes, there are real machines 1523 * (eg. Asrock B250M-HDV) where VBT has both 1524 * port A and port E with the same AUX ch and 1525 * we must pick port E :( 1526 */ 1527 info = &dev_priv->vbt.ddi_port_info[p]; 1528 1529 info->supports_dp = false; 1530 info->alternate_aux_channel = 0; 1531 } 1532 } 1533 1534 static const u8 cnp_ddc_pin_map[] = { 1535 [0] = 0, /* N/A */ 1536 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT, 1537 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT, 1538 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */ 1539 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */ 1540 }; 1541 1542 static const u8 icp_ddc_pin_map[] = { 1543 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1544 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1545 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT, 1546 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP, 1547 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP, 1548 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP, 1549 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP, 1550 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP, 1551 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, 1552 }; 1553 1554 static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin) 1555 { 1556 const u8 *ddc_pin_map; 1557 int n_entries; 1558 1559 if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) { 1560 ddc_pin_map = icp_ddc_pin_map; 1561 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 1562 } else if (HAS_PCH_CNP(dev_priv)) { 1563 ddc_pin_map = cnp_ddc_pin_map; 1564 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 1565 } else { 1566 /* Assuming direct map */ 1567 return vbt_pin; 1568 } 1569 1570 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0) 1571 return ddc_pin_map[vbt_pin]; 1572 1573 DRM_DEBUG_KMS("Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 1574 vbt_pin); 1575 return 0; 1576 } 1577 1578 static enum port dvo_port_to_port(u8 dvo_port) 1579 { 1580 /* 1581 * Each DDI port can have more than one value on the "DVO Port" field, 1582 * so look for all the possible values for each port. 1583 */ 1584 static const int dvo_ports[][3] = { 1585 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1}, 1586 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1}, 1587 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1}, 1588 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1}, 1589 [PORT_E] = { DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE}, 1590 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1}, 1591 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1}, 1592 }; 1593 enum port port; 1594 int i; 1595 1596 for (port = PORT_A; port < ARRAY_SIZE(dvo_ports); port++) { 1597 for (i = 0; i < ARRAY_SIZE(dvo_ports[port]); i++) { 1598 if (dvo_ports[port][i] == -1) 1599 break; 1600 1601 if (dvo_port == dvo_ports[port][i]) 1602 return port; 1603 } 1604 } 1605 1606 return PORT_NONE; 1607 } 1608 1609 static void parse_ddi_port(struct drm_i915_private *dev_priv, 1610 struct display_device_data *devdata, 1611 u8 bdb_version) 1612 { 1613 const struct child_device_config *child = &devdata->child; 1614 struct ddi_vbt_port_info *info; 1615 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; 1616 enum port port; 1617 1618 port = dvo_port_to_port(child->dvo_port); 1619 if (port == PORT_NONE) 1620 return; 1621 1622 info = &dev_priv->vbt.ddi_port_info[port]; 1623 1624 if (info->child) { 1625 DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n", 1626 port_name(port)); 1627 return; 1628 } 1629 1630 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 1631 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 1632 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT; 1633 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 1634 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); 1635 1636 if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) { 1637 DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n", 1638 is_hdmi ? "/HDMI" : ""); 1639 is_dvi = false; 1640 is_hdmi = false; 1641 } 1642 1643 info->supports_dvi = is_dvi; 1644 info->supports_hdmi = is_hdmi; 1645 info->supports_dp = is_dp; 1646 info->supports_edp = is_edp; 1647 1648 if (bdb_version >= 195) 1649 info->supports_typec_usb = child->dp_usb_type_c; 1650 1651 if (bdb_version >= 209) 1652 info->supports_tbt = child->tbt; 1653 1654 DRM_DEBUG_KMS("Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 1655 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, 1656 HAS_LSPCON(dev_priv) && child->lspcon, 1657 info->supports_typec_usb, info->supports_tbt, 1658 devdata->dsc != NULL); 1659 1660 if (is_dvi) { 1661 u8 ddc_pin; 1662 1663 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin); 1664 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) { 1665 info->alternate_ddc_pin = ddc_pin; 1666 sanitize_ddc_pin(dev_priv, port); 1667 } else { 1668 DRM_DEBUG_KMS("Port %c has invalid DDC pin %d, " 1669 "sticking to defaults\n", 1670 port_name(port), ddc_pin); 1671 } 1672 } 1673 1674 if (is_dp) { 1675 info->alternate_aux_channel = child->aux_channel; 1676 1677 sanitize_aux_ch(dev_priv, port); 1678 } 1679 1680 if (bdb_version >= 158) { 1681 /* The VBT HDMI level shift values match the table we have. */ 1682 u8 hdmi_level_shift = child->hdmi_level_shifter_value; 1683 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n", 1684 port_name(port), 1685 hdmi_level_shift); 1686 info->hdmi_level_shift = hdmi_level_shift; 1687 info->hdmi_level_shift_set = true; 1688 } 1689 1690 if (bdb_version >= 204) { 1691 int max_tmds_clock; 1692 1693 switch (child->hdmi_max_data_rate) { 1694 default: 1695 MISSING_CASE(child->hdmi_max_data_rate); 1696 /* fall through */ 1697 case HDMI_MAX_DATA_RATE_PLATFORM: 1698 max_tmds_clock = 0; 1699 break; 1700 case HDMI_MAX_DATA_RATE_297: 1701 max_tmds_clock = 297000; 1702 break; 1703 case HDMI_MAX_DATA_RATE_165: 1704 max_tmds_clock = 165000; 1705 break; 1706 } 1707 1708 if (max_tmds_clock) 1709 DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n", 1710 port_name(port), max_tmds_clock); 1711 info->max_tmds_clock = max_tmds_clock; 1712 } 1713 1714 /* Parse the I_boost config for SKL and above */ 1715 if (bdb_version >= 196 && child->iboost) { 1716 info->dp_boost_level = translate_iboost(child->dp_iboost_level); 1717 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n", 1718 port_name(port), info->dp_boost_level); 1719 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level); 1720 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n", 1721 port_name(port), info->hdmi_boost_level); 1722 } 1723 1724 /* DP max link rate for CNL+ */ 1725 if (bdb_version >= 216) { 1726 switch (child->dp_max_link_rate) { 1727 default: 1728 case VBT_DP_MAX_LINK_RATE_HBR3: 1729 info->dp_max_link_rate = 810000; 1730 break; 1731 case VBT_DP_MAX_LINK_RATE_HBR2: 1732 info->dp_max_link_rate = 540000; 1733 break; 1734 case VBT_DP_MAX_LINK_RATE_HBR: 1735 info->dp_max_link_rate = 270000; 1736 break; 1737 case VBT_DP_MAX_LINK_RATE_LBR: 1738 info->dp_max_link_rate = 162000; 1739 break; 1740 } 1741 DRM_DEBUG_KMS("VBT DP max link rate for port %c: %d\n", 1742 port_name(port), info->dp_max_link_rate); 1743 } 1744 1745 info->child = child; 1746 } 1747 1748 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version) 1749 { 1750 struct display_device_data *devdata; 1751 1752 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv)) 1753 return; 1754 1755 if (bdb_version < 155) 1756 return; 1757 1758 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) 1759 parse_ddi_port(dev_priv, devdata, bdb_version); 1760 } 1761 1762 static void 1763 parse_general_definitions(struct drm_i915_private *dev_priv, 1764 const struct bdb_header *bdb) 1765 { 1766 const struct bdb_general_definitions *defs; 1767 struct display_device_data *devdata; 1768 const struct child_device_config *child; 1769 int i, child_device_num; 1770 u8 expected_size; 1771 u16 block_size; 1772 int bus_pin; 1773 1774 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); 1775 if (!defs) { 1776 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); 1777 return; 1778 } 1779 1780 block_size = get_blocksize(defs); 1781 if (block_size < sizeof(*defs)) { 1782 DRM_DEBUG_KMS("General definitions block too small (%u)\n", 1783 block_size); 1784 return; 1785 } 1786 1787 bus_pin = defs->crt_ddc_gmbus_pin; 1788 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); 1789 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin)) 1790 dev_priv->vbt.crt_ddc_pin = bus_pin; 1791 1792 if (bdb->version < 106) { 1793 expected_size = 22; 1794 } else if (bdb->version < 111) { 1795 expected_size = 27; 1796 } else if (bdb->version < 195) { 1797 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 1798 } else if (bdb->version == 195) { 1799 expected_size = 37; 1800 } else if (bdb->version <= 215) { 1801 expected_size = 38; 1802 } else if (bdb->version <= 229) { 1803 expected_size = 39; 1804 } else { 1805 expected_size = sizeof(*child); 1806 BUILD_BUG_ON(sizeof(*child) < 39); 1807 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n", 1808 bdb->version, expected_size); 1809 } 1810 1811 /* Flag an error for unexpected size, but continue anyway. */ 1812 if (defs->child_dev_size != expected_size) 1813 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n", 1814 defs->child_dev_size, expected_size, bdb->version); 1815 1816 /* The legacy sized child device config is the minimum we need. */ 1817 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 1818 DRM_DEBUG_KMS("Child device config size %u is too small.\n", 1819 defs->child_dev_size); 1820 return; 1821 } 1822 1823 /* get the number of child device */ 1824 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 1825 1826 for (i = 0; i < child_device_num; i++) { 1827 child = child_device_ptr(defs, i); 1828 if (!child->device_type) 1829 continue; 1830 1831 DRM_DEBUG_KMS("Found VBT child device with type 0x%x\n", 1832 child->device_type); 1833 1834 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 1835 if (!devdata) 1836 break; 1837 1838 /* 1839 * Copy as much as we know (sizeof) and is available 1840 * (child_dev_size) of the child device config. Accessing the 1841 * data must depend on VBT version. 1842 */ 1843 memcpy(&devdata->child, child, 1844 min_t(size_t, defs->child_dev_size, sizeof(*child))); 1845 1846 list_add_tail(&devdata->node, &dev_priv->vbt.display_devices); 1847 } 1848 1849 if (list_empty(&dev_priv->vbt.display_devices)) 1850 DRM_DEBUG_KMS("no child dev is parsed from VBT\n"); 1851 } 1852 1853 /* Common defaults which may be overridden by VBT. */ 1854 static void 1855 init_vbt_defaults(struct drm_i915_private *dev_priv) 1856 { 1857 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 1858 1859 /* Default to having backlight */ 1860 dev_priv->vbt.backlight.present = true; 1861 1862 /* LFP panel data */ 1863 dev_priv->vbt.lvds_dither = 1; 1864 1865 /* SDVO panel data */ 1866 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 1867 1868 /* general features */ 1869 dev_priv->vbt.int_tv_support = 1; 1870 dev_priv->vbt.int_crt_support = 1; 1871 1872 /* driver features */ 1873 dev_priv->vbt.int_lvds_support = 1; 1874 1875 /* Default to using SSC */ 1876 dev_priv->vbt.lvds_use_ssc = 1; 1877 /* 1878 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 1879 * clock for LVDS. 1880 */ 1881 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv, 1882 !HAS_PCH_SPLIT(dev_priv)); 1883 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq); 1884 } 1885 1886 /* Defaults to initialize only if there is no VBT. */ 1887 static void 1888 init_vbt_missing_defaults(struct drm_i915_private *dev_priv) 1889 { 1890 enum port port; 1891 1892 for_each_port(port) { 1893 struct ddi_vbt_port_info *info = 1894 &dev_priv->vbt.ddi_port_info[port]; 1895 enum phy phy = intel_port_to_phy(dev_priv, port); 1896 1897 /* 1898 * VBT has the TypeC mode (native,TBT/USB) and we don't want 1899 * to detect it. 1900 */ 1901 if (intel_phy_is_tc(dev_priv, phy)) 1902 continue; 1903 1904 info->supports_dvi = (port != PORT_A && port != PORT_E); 1905 info->supports_hdmi = info->supports_dvi; 1906 info->supports_dp = (port != PORT_E); 1907 info->supports_edp = (port == PORT_A); 1908 } 1909 } 1910 1911 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 1912 { 1913 const void *_vbt = vbt; 1914 1915 return _vbt + vbt->bdb_offset; 1916 } 1917 1918 /** 1919 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 1920 * @buf: pointer to a buffer to validate 1921 * @size: size of the buffer 1922 * 1923 * Returns true on valid VBT. 1924 */ 1925 bool intel_bios_is_valid_vbt(const void *buf, size_t size) 1926 { 1927 const struct vbt_header *vbt = buf; 1928 const struct bdb_header *bdb; 1929 1930 if (!vbt) 1931 return false; 1932 1933 if (sizeof(struct vbt_header) > size) { 1934 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 1935 return false; 1936 } 1937 1938 if (memcmp(vbt->signature, "$VBT", 4)) { 1939 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 1940 return false; 1941 } 1942 1943 if (vbt->vbt_size > size) { 1944 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 1945 return false; 1946 } 1947 1948 size = vbt->vbt_size; 1949 1950 if (range_overflows_t(size_t, 1951 vbt->bdb_offset, 1952 sizeof(struct bdb_header), 1953 size)) { 1954 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 1955 return false; 1956 } 1957 1958 bdb = get_bdb_header(vbt); 1959 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 1960 DRM_DEBUG_DRIVER("BDB incomplete\n"); 1961 return false; 1962 } 1963 1964 return vbt; 1965 } 1966 1967 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv) 1968 { 1969 struct pci_dev *pdev = dev_priv->drm.pdev; 1970 void __iomem *p = NULL, *oprom; 1971 struct vbt_header *vbt; 1972 u16 vbt_size; 1973 size_t i, size; 1974 1975 oprom = pci_map_rom(pdev, &size); 1976 if (!oprom) 1977 return NULL; 1978 1979 /* Scour memory looking for the VBT signature. */ 1980 for (i = 0; i + 4 < size; i += 4) { 1981 if (ioread32(oprom + i) != *((const u32 *)"$VBT")) 1982 continue; 1983 1984 p = oprom + i; 1985 size -= i; 1986 break; 1987 } 1988 1989 if (!p) 1990 goto err_unmap_oprom; 1991 1992 if (sizeof(struct vbt_header) > size) { 1993 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 1994 goto err_unmap_oprom; 1995 } 1996 1997 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size)); 1998 if (vbt_size > size) { 1999 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 2000 goto err_unmap_oprom; 2001 } 2002 2003 /* The rest will be validated by intel_bios_is_valid_vbt() */ 2004 vbt = kmalloc(vbt_size, GFP_KERNEL); 2005 if (!vbt) 2006 goto err_unmap_oprom; 2007 2008 memcpy_fromio(vbt, p, vbt_size); 2009 2010 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2011 goto err_free_vbt; 2012 2013 pci_unmap_rom(pdev, oprom); 2014 2015 return vbt; 2016 2017 err_free_vbt: 2018 kfree(vbt); 2019 err_unmap_oprom: 2020 pci_unmap_rom(pdev, oprom); 2021 2022 return NULL; 2023 } 2024 2025 /** 2026 * intel_bios_init - find VBT and initialize settings from the BIOS 2027 * @dev_priv: i915 device instance 2028 * 2029 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 2030 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 2031 * initialize some defaults if the VBT is not present at all. 2032 */ 2033 void intel_bios_init(struct drm_i915_private *dev_priv) 2034 { 2035 const struct vbt_header *vbt = dev_priv->opregion.vbt; 2036 struct vbt_header *oprom_vbt = NULL; 2037 const struct bdb_header *bdb; 2038 2039 INIT_LIST_HEAD(&dev_priv->vbt.display_devices); 2040 2041 if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) { 2042 DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n"); 2043 return; 2044 } 2045 2046 init_vbt_defaults(dev_priv); 2047 2048 /* If the OpRegion does not have VBT, look in PCI ROM. */ 2049 if (!vbt) { 2050 oprom_vbt = oprom_get_vbt(dev_priv); 2051 if (!oprom_vbt) 2052 goto out; 2053 2054 vbt = oprom_vbt; 2055 2056 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n"); 2057 } 2058 2059 bdb = get_bdb_header(vbt); 2060 2061 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n", 2062 (int)sizeof(vbt->signature), vbt->signature, bdb->version); 2063 2064 /* Grab useful general definitions */ 2065 parse_general_features(dev_priv, bdb); 2066 parse_general_definitions(dev_priv, bdb); 2067 parse_panel_options(dev_priv, bdb); 2068 parse_panel_dtd(dev_priv, bdb); 2069 parse_lfp_backlight(dev_priv, bdb); 2070 parse_sdvo_panel_data(dev_priv, bdb); 2071 parse_driver_features(dev_priv, bdb); 2072 parse_power_conservation_features(dev_priv, bdb); 2073 parse_edp(dev_priv, bdb); 2074 parse_psr(dev_priv, bdb); 2075 parse_mipi_config(dev_priv, bdb); 2076 parse_mipi_sequence(dev_priv, bdb); 2077 2078 /* Depends on child device list */ 2079 parse_compression_parameters(dev_priv, bdb); 2080 2081 /* Further processing on pre-parsed data */ 2082 parse_sdvo_device_mapping(dev_priv, bdb->version); 2083 parse_ddi_ports(dev_priv, bdb->version); 2084 2085 out: 2086 if (!vbt) { 2087 DRM_INFO("Failed to find VBIOS tables (VBT)\n"); 2088 init_vbt_missing_defaults(dev_priv); 2089 } 2090 2091 kfree(oprom_vbt); 2092 } 2093 2094 /** 2095 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 2096 * @dev_priv: i915 device instance 2097 */ 2098 void intel_bios_driver_remove(struct drm_i915_private *dev_priv) 2099 { 2100 struct display_device_data *devdata, *n; 2101 2102 list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) { 2103 list_del(&devdata->node); 2104 kfree(devdata->dsc); 2105 kfree(devdata); 2106 } 2107 2108 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode); 2109 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 2110 kfree(dev_priv->vbt.lfp_lvds_vbt_mode); 2111 dev_priv->vbt.lfp_lvds_vbt_mode = NULL; 2112 kfree(dev_priv->vbt.dsi.data); 2113 dev_priv->vbt.dsi.data = NULL; 2114 kfree(dev_priv->vbt.dsi.pps); 2115 dev_priv->vbt.dsi.pps = NULL; 2116 kfree(dev_priv->vbt.dsi.config); 2117 dev_priv->vbt.dsi.config = NULL; 2118 kfree(dev_priv->vbt.dsi.deassert_seq); 2119 dev_priv->vbt.dsi.deassert_seq = NULL; 2120 } 2121 2122 /** 2123 * intel_bios_is_tv_present - is integrated TV present in VBT 2124 * @dev_priv: i915 device instance 2125 * 2126 * Return true if TV is present. If no child devices were parsed from VBT, 2127 * assume TV is present. 2128 */ 2129 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv) 2130 { 2131 const struct display_device_data *devdata; 2132 const struct child_device_config *child; 2133 2134 if (!dev_priv->vbt.int_tv_support) 2135 return false; 2136 2137 if (list_empty(&dev_priv->vbt.display_devices)) 2138 return true; 2139 2140 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2141 child = &devdata->child; 2142 2143 /* 2144 * If the device type is not TV, continue. 2145 */ 2146 switch (child->device_type) { 2147 case DEVICE_TYPE_INT_TV: 2148 case DEVICE_TYPE_TV: 2149 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 2150 break; 2151 default: 2152 continue; 2153 } 2154 /* Only when the addin_offset is non-zero, it is regarded 2155 * as present. 2156 */ 2157 if (child->addin_offset) 2158 return true; 2159 } 2160 2161 return false; 2162 } 2163 2164 /** 2165 * intel_bios_is_lvds_present - is LVDS present in VBT 2166 * @dev_priv: i915 device instance 2167 * @i2c_pin: i2c pin for LVDS if present 2168 * 2169 * Return true if LVDS is present. If no child devices were parsed from VBT, 2170 * assume LVDS is present. 2171 */ 2172 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin) 2173 { 2174 const struct display_device_data *devdata; 2175 const struct child_device_config *child; 2176 2177 if (list_empty(&dev_priv->vbt.display_devices)) 2178 return true; 2179 2180 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2181 child = &devdata->child; 2182 2183 /* If the device type is not LFP, continue. 2184 * We have to check both the new identifiers as well as the 2185 * old for compatibility with some BIOSes. 2186 */ 2187 if (child->device_type != DEVICE_TYPE_INT_LFP && 2188 child->device_type != DEVICE_TYPE_LFP) 2189 continue; 2190 2191 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin)) 2192 *i2c_pin = child->i2c_pin; 2193 2194 /* However, we cannot trust the BIOS writers to populate 2195 * the VBT correctly. Since LVDS requires additional 2196 * information from AIM blocks, a non-zero addin offset is 2197 * a good indicator that the LVDS is actually present. 2198 */ 2199 if (child->addin_offset) 2200 return true; 2201 2202 /* But even then some BIOS writers perform some black magic 2203 * and instantiate the device without reference to any 2204 * additional data. Trust that if the VBT was written into 2205 * the OpRegion then they have validated the LVDS's existence. 2206 */ 2207 if (dev_priv->opregion.vbt) 2208 return true; 2209 } 2210 2211 return false; 2212 } 2213 2214 /** 2215 * intel_bios_is_port_present - is the specified digital port present 2216 * @dev_priv: i915 device instance 2217 * @port: port to check 2218 * 2219 * Return true if the device in %port is present. 2220 */ 2221 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port) 2222 { 2223 const struct display_device_data *devdata; 2224 const struct child_device_config *child; 2225 static const struct { 2226 u16 dp, hdmi; 2227 } port_mapping[] = { 2228 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2229 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2230 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2231 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2232 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2233 }; 2234 2235 if (HAS_DDI(dev_priv)) { 2236 const struct ddi_vbt_port_info *port_info = 2237 &dev_priv->vbt.ddi_port_info[port]; 2238 2239 return port_info->supports_dp || 2240 port_info->supports_dvi || 2241 port_info->supports_hdmi; 2242 } 2243 2244 /* FIXME maybe deal with port A as well? */ 2245 if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping)) 2246 return false; 2247 2248 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2249 child = &devdata->child; 2250 2251 if ((child->dvo_port == port_mapping[port].dp || 2252 child->dvo_port == port_mapping[port].hdmi) && 2253 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING | 2254 DEVICE_TYPE_DISPLAYPORT_OUTPUT))) 2255 return true; 2256 } 2257 2258 return false; 2259 } 2260 2261 /** 2262 * intel_bios_is_port_edp - is the device in given port eDP 2263 * @dev_priv: i915 device instance 2264 * @port: port to check 2265 * 2266 * Return true if the device in %port is eDP. 2267 */ 2268 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port) 2269 { 2270 const struct display_device_data *devdata; 2271 const struct child_device_config *child; 2272 static const short port_mapping[] = { 2273 [PORT_B] = DVO_PORT_DPB, 2274 [PORT_C] = DVO_PORT_DPC, 2275 [PORT_D] = DVO_PORT_DPD, 2276 [PORT_E] = DVO_PORT_DPE, 2277 [PORT_F] = DVO_PORT_DPF, 2278 }; 2279 2280 if (HAS_DDI(dev_priv)) 2281 return dev_priv->vbt.ddi_port_info[port].supports_edp; 2282 2283 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2284 child = &devdata->child; 2285 2286 if (child->dvo_port == port_mapping[port] && 2287 (child->device_type & DEVICE_TYPE_eDP_BITS) == 2288 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS)) 2289 return true; 2290 } 2291 2292 return false; 2293 } 2294 2295 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child, 2296 enum port port) 2297 { 2298 static const struct { 2299 u16 dp, hdmi; 2300 } port_mapping[] = { 2301 /* 2302 * Buggy VBTs may declare DP ports as having 2303 * HDMI type dvo_port :( So let's check both. 2304 */ 2305 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2306 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2307 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2308 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2309 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2310 }; 2311 2312 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping)) 2313 return false; 2314 2315 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) != 2316 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS)) 2317 return false; 2318 2319 if (child->dvo_port == port_mapping[port].dp) 2320 return true; 2321 2322 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 2323 if (child->dvo_port == port_mapping[port].hdmi && 2324 child->aux_channel != 0) 2325 return true; 2326 2327 return false; 2328 } 2329 2330 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, 2331 enum port port) 2332 { 2333 const struct display_device_data *devdata; 2334 2335 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2336 if (child_dev_is_dp_dual_mode(&devdata->child, port)) 2337 return true; 2338 } 2339 2340 return false; 2341 } 2342 2343 /** 2344 * intel_bios_is_dsi_present - is DSI present in VBT 2345 * @dev_priv: i915 device instance 2346 * @port: port for DSI if present 2347 * 2348 * Return true if DSI is present, and return the port in %port. 2349 */ 2350 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, 2351 enum port *port) 2352 { 2353 const struct display_device_data *devdata; 2354 const struct child_device_config *child; 2355 u8 dvo_port; 2356 2357 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2358 child = &devdata->child; 2359 2360 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2361 continue; 2362 2363 dvo_port = child->dvo_port; 2364 2365 if (dvo_port == DVO_PORT_MIPIA || 2366 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) || 2367 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) { 2368 if (port) 2369 *port = dvo_port - DVO_PORT_MIPIA; 2370 return true; 2371 } else if (dvo_port == DVO_PORT_MIPIB || 2372 dvo_port == DVO_PORT_MIPIC || 2373 dvo_port == DVO_PORT_MIPID) { 2374 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n", 2375 port_name(dvo_port - DVO_PORT_MIPIA)); 2376 } 2377 } 2378 2379 return false; 2380 } 2381 2382 static void fill_dsc(struct intel_crtc_state *crtc_state, 2383 struct dsc_compression_parameters_entry *dsc, 2384 int dsc_max_bpc) 2385 { 2386 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 2387 int bpc = 8; 2388 2389 vdsc_cfg->dsc_version_major = dsc->version_major; 2390 vdsc_cfg->dsc_version_minor = dsc->version_minor; 2391 2392 if (dsc->support_12bpc && dsc_max_bpc >= 12) 2393 bpc = 12; 2394 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 2395 bpc = 10; 2396 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 2397 bpc = 8; 2398 else 2399 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n", 2400 dsc_max_bpc); 2401 2402 crtc_state->pipe_bpp = bpc * 3; 2403 2404 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp, 2405 VBT_DSC_MAX_BPP(dsc->max_bpp)); 2406 2407 /* 2408 * FIXME: This is ugly, and slice count should take DSC engine 2409 * throughput etc. into account. 2410 * 2411 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 2412 */ 2413 if (dsc->slices_per_line & BIT(2)) { 2414 crtc_state->dsc.slice_count = 4; 2415 } else if (dsc->slices_per_line & BIT(1)) { 2416 crtc_state->dsc.slice_count = 2; 2417 } else { 2418 /* FIXME */ 2419 if (!(dsc->slices_per_line & BIT(0))) 2420 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n"); 2421 2422 crtc_state->dsc.slice_count = 1; 2423 } 2424 2425 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 2426 crtc_state->dsc.slice_count != 0) 2427 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n", 2428 crtc_state->hw.adjusted_mode.crtc_hdisplay, 2429 crtc_state->dsc.slice_count); 2430 2431 /* 2432 * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the 2433 * implementation specific physical rate buffer size. Currently we use 2434 * the required rate buffer model size calculated in 2435 * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E. 2436 * 2437 * The VBT rc_buffer_block_size and rc_buffer_size definitions 2438 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC 2439 * implementation should also use the DPCD (or perhaps VBT for eDP) 2440 * provided value for the buffer size. 2441 */ 2442 2443 /* FIXME: DSI spec says bpc + 1 for this one */ 2444 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 2445 2446 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 2447 2448 vdsc_cfg->slice_height = dsc->slice_height; 2449 } 2450 2451 /* FIXME: initially DSI specific */ 2452 bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 2453 struct intel_crtc_state *crtc_state, 2454 int dsc_max_bpc) 2455 { 2456 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2457 const struct display_device_data *devdata; 2458 const struct child_device_config *child; 2459 2460 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2461 child = &devdata->child; 2462 2463 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2464 continue; 2465 2466 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) { 2467 if (!devdata->dsc) 2468 return false; 2469 2470 if (crtc_state) 2471 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 2472 2473 return true; 2474 } 2475 } 2476 2477 return false; 2478 } 2479 2480 /** 2481 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port 2482 * @i915: i915 device instance 2483 * @port: port to check 2484 * 2485 * Return true if HPD should be inverted for %port. 2486 */ 2487 bool 2488 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, 2489 enum port port) 2490 { 2491 const struct child_device_config *child = 2492 i915->vbt.ddi_port_info[port].child; 2493 2494 if (WARN_ON_ONCE(!IS_GEN9_LP(i915))) 2495 return false; 2496 2497 return child && child->hpd_invert; 2498 } 2499 2500 /** 2501 * intel_bios_is_lspcon_present - if LSPCON is attached on %port 2502 * @i915: i915 device instance 2503 * @port: port to check 2504 * 2505 * Return true if LSPCON is present on this port 2506 */ 2507 bool 2508 intel_bios_is_lspcon_present(const struct drm_i915_private *i915, 2509 enum port port) 2510 { 2511 const struct child_device_config *child = 2512 i915->vbt.ddi_port_info[port].child; 2513 2514 return HAS_LSPCON(i915) && child && child->lspcon; 2515 } 2516 2517 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, 2518 enum port port) 2519 { 2520 const struct ddi_vbt_port_info *info = 2521 &dev_priv->vbt.ddi_port_info[port]; 2522 enum aux_ch aux_ch; 2523 2524 if (!info->alternate_aux_channel) { 2525 aux_ch = (enum aux_ch)port; 2526 2527 DRM_DEBUG_KMS("using AUX %c for port %c (platform default)\n", 2528 aux_ch_name(aux_ch), port_name(port)); 2529 return aux_ch; 2530 } 2531 2532 switch (info->alternate_aux_channel) { 2533 case DP_AUX_A: 2534 aux_ch = AUX_CH_A; 2535 break; 2536 case DP_AUX_B: 2537 aux_ch = AUX_CH_B; 2538 break; 2539 case DP_AUX_C: 2540 aux_ch = AUX_CH_C; 2541 break; 2542 case DP_AUX_D: 2543 aux_ch = AUX_CH_D; 2544 break; 2545 case DP_AUX_E: 2546 aux_ch = AUX_CH_E; 2547 break; 2548 case DP_AUX_F: 2549 aux_ch = AUX_CH_F; 2550 break; 2551 case DP_AUX_G: 2552 aux_ch = AUX_CH_G; 2553 break; 2554 default: 2555 MISSING_CASE(info->alternate_aux_channel); 2556 aux_ch = AUX_CH_A; 2557 break; 2558 } 2559 2560 DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n", 2561 aux_ch_name(aux_ch), port_name(port)); 2562 2563 return aux_ch; 2564 } 2565