1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <drm/drm_dp_helper.h> 29 #include <drm/i915_drm.h> 30 31 #include "display/intel_gmbus.h" 32 33 #include "i915_drv.h" 34 35 #define _INTEL_BIOS_PRIVATE 36 #include "intel_vbt_defs.h" 37 38 /** 39 * DOC: Video BIOS Table (VBT) 40 * 41 * The Video BIOS Table, or VBT, provides platform and board specific 42 * configuration information to the driver that is not discoverable or available 43 * through other means. The configuration is mostly related to display 44 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 45 * the PCI ROM. 46 * 47 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 48 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 49 * contain the actual configuration information. The VBT Header, and thus the 50 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 51 * BDB Header. The data blocks are concatenated after the BDB Header. The data 52 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 53 * data. (Block 53, the MIPI Sequence Block is an exception.) 54 * 55 * The driver parses the VBT during load. The relevant information is stored in 56 * driver private data for ease of use, and the actual VBT is not read after 57 * that. 58 */ 59 60 #define SLAVE_ADDR1 0x70 61 #define SLAVE_ADDR2 0x72 62 63 /* Get BDB block size given a pointer to Block ID. */ 64 static u32 _get_blocksize(const u8 *block_base) 65 { 66 /* The MIPI Sequence Block v3+ has a separate size field. */ 67 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 68 return *((const u32 *)(block_base + 4)); 69 else 70 return *((const u16 *)(block_base + 1)); 71 } 72 73 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 74 static u32 get_blocksize(const void *block_data) 75 { 76 return _get_blocksize(block_data - 3); 77 } 78 79 static const void * 80 find_section(const void *_bdb, enum bdb_block_id section_id) 81 { 82 const struct bdb_header *bdb = _bdb; 83 const u8 *base = _bdb; 84 int index = 0; 85 u32 total, current_size; 86 enum bdb_block_id current_id; 87 88 /* skip to first section */ 89 index += bdb->header_size; 90 total = bdb->bdb_size; 91 92 /* walk the sections looking for section_id */ 93 while (index + 3 < total) { 94 current_id = *(base + index); 95 current_size = _get_blocksize(base + index); 96 index += 3; 97 98 if (index + current_size > total) 99 return NULL; 100 101 if (current_id == section_id) 102 return base + index; 103 104 index += current_size; 105 } 106 107 return NULL; 108 } 109 110 static void 111 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 112 const struct lvds_dvo_timing *dvo_timing) 113 { 114 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 115 dvo_timing->hactive_lo; 116 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 117 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 118 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 119 ((dvo_timing->hsync_pulse_width_hi << 8) | 120 dvo_timing->hsync_pulse_width_lo); 121 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 122 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 123 124 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 125 dvo_timing->vactive_lo; 126 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 127 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 128 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 129 ((dvo_timing->vsync_pulse_width_hi << 4) | 130 dvo_timing->vsync_pulse_width_lo); 131 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 132 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 133 panel_fixed_mode->clock = dvo_timing->clock * 10; 134 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 135 136 if (dvo_timing->hsync_positive) 137 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 138 else 139 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 140 141 if (dvo_timing->vsync_positive) 142 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 143 else 144 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 145 146 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 147 dvo_timing->himage_lo; 148 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 149 dvo_timing->vimage_lo; 150 151 /* Some VBTs have bogus h/vtotal values */ 152 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 153 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 154 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 155 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 156 157 drm_mode_set_name(panel_fixed_mode); 158 } 159 160 static const struct lvds_dvo_timing * 161 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, 162 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, 163 int index) 164 { 165 /* 166 * the size of fp_timing varies on the different platform. 167 * So calculate the DVO timing relative offset in LVDS data 168 * entry to get the DVO timing entry 169 */ 170 171 int lfp_data_size = 172 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - 173 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; 174 int dvo_timing_offset = 175 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - 176 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; 177 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; 178 179 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); 180 } 181 182 /* get lvds_fp_timing entry 183 * this function may return NULL if the corresponding entry is invalid 184 */ 185 static const struct lvds_fp_timing * 186 get_lvds_fp_timing(const struct bdb_header *bdb, 187 const struct bdb_lvds_lfp_data *data, 188 const struct bdb_lvds_lfp_data_ptrs *ptrs, 189 int index) 190 { 191 size_t data_ofs = (const u8 *)data - (const u8 *)bdb; 192 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ 193 size_t ofs; 194 195 if (index >= ARRAY_SIZE(ptrs->ptr)) 196 return NULL; 197 ofs = ptrs->ptr[index].fp_timing_offset; 198 if (ofs < data_ofs || 199 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) 200 return NULL; 201 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); 202 } 203 204 /* Try to find integrated panel data */ 205 static void 206 parse_lfp_panel_data(struct drm_i915_private *dev_priv, 207 const struct bdb_header *bdb) 208 { 209 const struct bdb_lvds_options *lvds_options; 210 const struct bdb_lvds_lfp_data *lvds_lfp_data; 211 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; 212 const struct lvds_dvo_timing *panel_dvo_timing; 213 const struct lvds_fp_timing *fp_timing; 214 struct drm_display_mode *panel_fixed_mode; 215 int panel_type; 216 int drrs_mode; 217 int ret; 218 219 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); 220 if (!lvds_options) 221 return; 222 223 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; 224 225 ret = intel_opregion_get_panel_type(dev_priv); 226 if (ret >= 0) { 227 WARN_ON(ret > 0xf); 228 panel_type = ret; 229 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type); 230 } else { 231 if (lvds_options->panel_type > 0xf) { 232 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n", 233 lvds_options->panel_type); 234 return; 235 } 236 panel_type = lvds_options->panel_type; 237 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type); 238 } 239 240 dev_priv->vbt.panel_type = panel_type; 241 242 drrs_mode = (lvds_options->dps_panel_type_bits 243 >> (panel_type * 2)) & MODE_MASK; 244 /* 245 * VBT has static DRRS = 0 and seamless DRRS = 2. 246 * The below piece of code is required to adjust vbt.drrs_type 247 * to match the enum drrs_support_type. 248 */ 249 switch (drrs_mode) { 250 case 0: 251 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; 252 DRM_DEBUG_KMS("DRRS supported mode is static\n"); 253 break; 254 case 2: 255 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; 256 DRM_DEBUG_KMS("DRRS supported mode is seamless\n"); 257 break; 258 default: 259 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 260 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n"); 261 break; 262 } 263 264 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); 265 if (!lvds_lfp_data) 266 return; 267 268 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); 269 if (!lvds_lfp_data_ptrs) 270 return; 271 272 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 273 lvds_lfp_data_ptrs, 274 panel_type); 275 276 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 277 if (!panel_fixed_mode) 278 return; 279 280 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 281 282 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 283 284 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n"); 285 drm_mode_debug_printmodeline(panel_fixed_mode); 286 287 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, 288 lvds_lfp_data_ptrs, 289 panel_type); 290 if (fp_timing) { 291 /* check the resolution, just to be sure */ 292 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 293 fp_timing->y_res == panel_fixed_mode->vdisplay) { 294 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 295 DRM_DEBUG_KMS("VBT initial LVDS value %x\n", 296 dev_priv->vbt.bios_lvds_val); 297 } 298 } 299 } 300 301 static void 302 parse_lfp_backlight(struct drm_i915_private *dev_priv, 303 const struct bdb_header *bdb) 304 { 305 const struct bdb_lfp_backlight_data *backlight_data; 306 const struct lfp_backlight_data_entry *entry; 307 int panel_type = dev_priv->vbt.panel_type; 308 309 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); 310 if (!backlight_data) 311 return; 312 313 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 314 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n", 315 backlight_data->entry_size); 316 return; 317 } 318 319 entry = &backlight_data->data[panel_type]; 320 321 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 322 if (!dev_priv->vbt.backlight.present) { 323 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n", 324 entry->type); 325 return; 326 } 327 328 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 329 if (bdb->version >= 191 && 330 get_blocksize(backlight_data) >= sizeof(*backlight_data)) { 331 const struct lfp_backlight_control_method *method; 332 333 method = &backlight_data->backlight_control[panel_type]; 334 dev_priv->vbt.backlight.type = method->type; 335 dev_priv->vbt.backlight.controller = method->controller; 336 } 337 338 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 339 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; 340 dev_priv->vbt.backlight.min_brightness = entry->min_brightness; 341 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, " 342 "active %s, min brightness %u, level %u, controller %u\n", 343 dev_priv->vbt.backlight.pwm_freq_hz, 344 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", 345 dev_priv->vbt.backlight.min_brightness, 346 backlight_data->level[panel_type], 347 dev_priv->vbt.backlight.controller); 348 } 349 350 /* Try to find sdvo panel data */ 351 static void 352 parse_sdvo_panel_data(struct drm_i915_private *dev_priv, 353 const struct bdb_header *bdb) 354 { 355 const struct bdb_sdvo_panel_dtds *dtds; 356 struct drm_display_mode *panel_fixed_mode; 357 int index; 358 359 index = i915_modparams.vbt_sdvo_panel_type; 360 if (index == -2) { 361 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n"); 362 return; 363 } 364 365 if (index == -1) { 366 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 367 368 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); 369 if (!sdvo_lvds_options) 370 return; 371 372 index = sdvo_lvds_options->panel_type; 373 } 374 375 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS); 376 if (!dtds) 377 return; 378 379 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 380 if (!panel_fixed_mode) 381 return; 382 383 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 384 385 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 386 387 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n"); 388 drm_mode_debug_printmodeline(panel_fixed_mode); 389 } 390 391 static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv, 392 bool alternate) 393 { 394 switch (INTEL_GEN(dev_priv)) { 395 case 2: 396 return alternate ? 66667 : 48000; 397 case 3: 398 case 4: 399 return alternate ? 100000 : 96000; 400 default: 401 return alternate ? 100000 : 120000; 402 } 403 } 404 405 static void 406 parse_general_features(struct drm_i915_private *dev_priv, 407 const struct bdb_header *bdb) 408 { 409 const struct bdb_general_features *general; 410 411 general = find_section(bdb, BDB_GENERAL_FEATURES); 412 if (!general) 413 return; 414 415 dev_priv->vbt.int_tv_support = general->int_tv_support; 416 /* int_crt_support can't be trusted on earlier platforms */ 417 if (bdb->version >= 155 && 418 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv))) 419 dev_priv->vbt.int_crt_support = general->int_crt_support; 420 dev_priv->vbt.lvds_use_ssc = general->enable_ssc; 421 dev_priv->vbt.lvds_ssc_freq = 422 intel_bios_ssc_frequency(dev_priv, general->ssc_freq); 423 dev_priv->vbt.display_clock_mode = general->display_clock_mode; 424 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 425 if (bdb->version >= 181) { 426 dev_priv->vbt.orientation = general->rotate_180 ? 427 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 428 DRM_MODE_PANEL_ORIENTATION_NORMAL; 429 } else { 430 dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 431 } 432 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 433 dev_priv->vbt.int_tv_support, 434 dev_priv->vbt.int_crt_support, 435 dev_priv->vbt.lvds_use_ssc, 436 dev_priv->vbt.lvds_ssc_freq, 437 dev_priv->vbt.display_clock_mode, 438 dev_priv->vbt.fdi_rx_polarity_inverted); 439 } 440 441 static const struct child_device_config * 442 child_device_ptr(const struct bdb_general_definitions *defs, int i) 443 { 444 return (const void *) &defs->devices[i * defs->child_dev_size]; 445 } 446 447 static void 448 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version) 449 { 450 struct sdvo_device_mapping *mapping; 451 const struct child_device_config *child; 452 int i, count = 0; 453 454 /* 455 * Only parse SDVO mappings on gens that could have SDVO. This isn't 456 * accurate and doesn't have to be, as long as it's not too strict. 457 */ 458 if (!IS_GEN_RANGE(dev_priv, 3, 7)) { 459 DRM_DEBUG_KMS("Skipping SDVO device mapping\n"); 460 return; 461 } 462 463 for (i = 0, count = 0; i < dev_priv->vbt.child_dev_num; i++) { 464 child = dev_priv->vbt.child_dev + i; 465 466 if (child->slave_addr != SLAVE_ADDR1 && 467 child->slave_addr != SLAVE_ADDR2) { 468 /* 469 * If the slave address is neither 0x70 nor 0x72, 470 * it is not a SDVO device. Skip it. 471 */ 472 continue; 473 } 474 if (child->dvo_port != DEVICE_PORT_DVOB && 475 child->dvo_port != DEVICE_PORT_DVOC) { 476 /* skip the incorrect SDVO port */ 477 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); 478 continue; 479 } 480 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" 481 " %s port\n", 482 child->slave_addr, 483 (child->dvo_port == DEVICE_PORT_DVOB) ? 484 "SDVOB" : "SDVOC"); 485 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1]; 486 if (!mapping->initialized) { 487 mapping->dvo_port = child->dvo_port; 488 mapping->slave_addr = child->slave_addr; 489 mapping->dvo_wiring = child->dvo_wiring; 490 mapping->ddc_pin = child->ddc_pin; 491 mapping->i2c_pin = child->i2c_pin; 492 mapping->initialized = 1; 493 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 494 mapping->dvo_port, 495 mapping->slave_addr, 496 mapping->dvo_wiring, 497 mapping->ddc_pin, 498 mapping->i2c_pin); 499 } else { 500 DRM_DEBUG_KMS("Maybe one SDVO port is shared by " 501 "two SDVO device.\n"); 502 } 503 if (child->slave2_addr) { 504 /* Maybe this is a SDVO device with multiple inputs */ 505 /* And the mapping info is not added */ 506 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" 507 " is a SDVO device with multiple inputs.\n"); 508 } 509 count++; 510 } 511 512 if (!count) { 513 /* No SDVO device info is found */ 514 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n"); 515 } 516 } 517 518 static void 519 parse_driver_features(struct drm_i915_private *dev_priv, 520 const struct bdb_header *bdb) 521 { 522 const struct bdb_driver_features *driver; 523 524 driver = find_section(bdb, BDB_DRIVER_FEATURES); 525 if (!driver) 526 return; 527 528 if (INTEL_GEN(dev_priv) >= 5) { 529 /* 530 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 531 * to mean "eDP". The VBT spec doesn't agree with that 532 * interpretation, but real world VBTs seem to. 533 */ 534 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 535 dev_priv->vbt.int_lvds_support = 0; 536 } else { 537 /* 538 * FIXME it's not clear which BDB version has the LVDS config 539 * bits defined. Revision history in the VBT spec says: 540 * "0.92 | Add two definitions for VBT value of LVDS Active 541 * Config (00b and 11b values defined) | 06/13/2005" 542 * but does not the specify the BDB version. 543 * 544 * So far version 134 (on i945gm) is the oldest VBT observed 545 * in the wild with the bits correctly populated. Version 546 * 108 (on i85x) does not have the bits correctly populated. 547 */ 548 if (bdb->version >= 134 && 549 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 550 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 551 dev_priv->vbt.int_lvds_support = 0; 552 } 553 554 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); 555 /* 556 * If DRRS is not supported, drrs_type has to be set to 0. 557 * This is because, VBT is configured in such a way that 558 * static DRRS is 0 and DRRS not supported is represented by 559 * driver->drrs_enabled=false 560 */ 561 if (!driver->drrs_enabled) 562 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 563 dev_priv->vbt.psr.enable = driver->psr_enabled; 564 } 565 566 static void 567 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 568 { 569 const struct bdb_edp *edp; 570 const struct edp_power_seq *edp_pps; 571 const struct edp_fast_link_params *edp_link_params; 572 int panel_type = dev_priv->vbt.panel_type; 573 574 edp = find_section(bdb, BDB_EDP); 575 if (!edp) 576 return; 577 578 switch ((edp->color_depth >> (panel_type * 2)) & 3) { 579 case EDP_18BPP: 580 dev_priv->vbt.edp.bpp = 18; 581 break; 582 case EDP_24BPP: 583 dev_priv->vbt.edp.bpp = 24; 584 break; 585 case EDP_30BPP: 586 dev_priv->vbt.edp.bpp = 30; 587 break; 588 } 589 590 /* Get the eDP sequencing and link info */ 591 edp_pps = &edp->power_seqs[panel_type]; 592 edp_link_params = &edp->fast_link_params[panel_type]; 593 594 dev_priv->vbt.edp.pps = *edp_pps; 595 596 switch (edp_link_params->rate) { 597 case EDP_RATE_1_62: 598 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62; 599 break; 600 case EDP_RATE_2_7: 601 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7; 602 break; 603 default: 604 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n", 605 edp_link_params->rate); 606 break; 607 } 608 609 switch (edp_link_params->lanes) { 610 case EDP_LANE_1: 611 dev_priv->vbt.edp.lanes = 1; 612 break; 613 case EDP_LANE_2: 614 dev_priv->vbt.edp.lanes = 2; 615 break; 616 case EDP_LANE_4: 617 dev_priv->vbt.edp.lanes = 4; 618 break; 619 default: 620 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n", 621 edp_link_params->lanes); 622 break; 623 } 624 625 switch (edp_link_params->preemphasis) { 626 case EDP_PREEMPHASIS_NONE: 627 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 628 break; 629 case EDP_PREEMPHASIS_3_5dB: 630 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 631 break; 632 case EDP_PREEMPHASIS_6dB: 633 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 634 break; 635 case EDP_PREEMPHASIS_9_5dB: 636 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 637 break; 638 default: 639 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n", 640 edp_link_params->preemphasis); 641 break; 642 } 643 644 switch (edp_link_params->vswing) { 645 case EDP_VSWING_0_4V: 646 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 647 break; 648 case EDP_VSWING_0_6V: 649 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 650 break; 651 case EDP_VSWING_0_8V: 652 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 653 break; 654 case EDP_VSWING_1_2V: 655 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 656 break; 657 default: 658 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n", 659 edp_link_params->vswing); 660 break; 661 } 662 663 if (bdb->version >= 173) { 664 u8 vswing; 665 666 /* Don't read from VBT if module parameter has valid value*/ 667 if (i915_modparams.edp_vswing) { 668 dev_priv->vbt.edp.low_vswing = 669 i915_modparams.edp_vswing == 1; 670 } else { 671 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 672 dev_priv->vbt.edp.low_vswing = vswing == 0; 673 } 674 } 675 } 676 677 static void 678 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 679 { 680 const struct bdb_psr *psr; 681 const struct psr_table *psr_table; 682 int panel_type = dev_priv->vbt.panel_type; 683 684 psr = find_section(bdb, BDB_PSR); 685 if (!psr) { 686 DRM_DEBUG_KMS("No PSR BDB found.\n"); 687 return; 688 } 689 690 psr_table = &psr->psr_table[panel_type]; 691 692 dev_priv->vbt.psr.full_link = psr_table->full_link; 693 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 694 695 /* Allowed VBT values goes from 0 to 15 */ 696 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 697 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 698 699 switch (psr_table->lines_to_wait) { 700 case 0: 701 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT; 702 break; 703 case 1: 704 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT; 705 break; 706 case 2: 707 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT; 708 break; 709 case 3: 710 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT; 711 break; 712 default: 713 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n", 714 psr_table->lines_to_wait); 715 break; 716 } 717 718 /* 719 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 720 * Old decimal value is wake up time in multiples of 100 us. 721 */ 722 if (bdb->version >= 205 && 723 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) || 724 INTEL_GEN(dev_priv) >= 10)) { 725 switch (psr_table->tp1_wakeup_time) { 726 case 0: 727 dev_priv->vbt.psr.tp1_wakeup_time_us = 500; 728 break; 729 case 1: 730 dev_priv->vbt.psr.tp1_wakeup_time_us = 100; 731 break; 732 case 3: 733 dev_priv->vbt.psr.tp1_wakeup_time_us = 0; 734 break; 735 default: 736 DRM_DEBUG_KMS("VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 737 psr_table->tp1_wakeup_time); 738 /* fallthrough */ 739 case 2: 740 dev_priv->vbt.psr.tp1_wakeup_time_us = 2500; 741 break; 742 } 743 744 switch (psr_table->tp2_tp3_wakeup_time) { 745 case 0: 746 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500; 747 break; 748 case 1: 749 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100; 750 break; 751 case 3: 752 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0; 753 break; 754 default: 755 DRM_DEBUG_KMS("VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 756 psr_table->tp2_tp3_wakeup_time); 757 /* fallthrough */ 758 case 2: 759 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 760 break; 761 } 762 } else { 763 dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 764 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 765 } 766 767 if (bdb->version >= 226) { 768 u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time; 769 770 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3; 771 switch (wakeup_time) { 772 case 0: 773 wakeup_time = 500; 774 break; 775 case 1: 776 wakeup_time = 100; 777 break; 778 case 3: 779 wakeup_time = 50; 780 break; 781 default: 782 case 2: 783 wakeup_time = 2500; 784 break; 785 } 786 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 787 } else { 788 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 789 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us; 790 } 791 } 792 793 static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv, 794 u16 version, enum port port) 795 { 796 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) { 797 dev_priv->vbt.dsi.bl_ports = BIT(port); 798 if (dev_priv->vbt.dsi.config->cabc_supported) 799 dev_priv->vbt.dsi.cabc_ports = BIT(port); 800 801 return; 802 } 803 804 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) { 805 case DL_DCS_PORT_A: 806 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A); 807 break; 808 case DL_DCS_PORT_C: 809 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C); 810 break; 811 default: 812 case DL_DCS_PORT_A_AND_C: 813 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C); 814 break; 815 } 816 817 if (!dev_priv->vbt.dsi.config->cabc_supported) 818 return; 819 820 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) { 821 case DL_DCS_PORT_A: 822 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A); 823 break; 824 case DL_DCS_PORT_C: 825 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C); 826 break; 827 default: 828 case DL_DCS_PORT_A_AND_C: 829 dev_priv->vbt.dsi.cabc_ports = 830 BIT(PORT_A) | BIT(PORT_C); 831 break; 832 } 833 } 834 835 static void 836 parse_mipi_config(struct drm_i915_private *dev_priv, 837 const struct bdb_header *bdb) 838 { 839 const struct bdb_mipi_config *start; 840 const struct mipi_config *config; 841 const struct mipi_pps_data *pps; 842 int panel_type = dev_priv->vbt.panel_type; 843 enum port port; 844 845 /* parse MIPI blocks only if LFP type is MIPI */ 846 if (!intel_bios_is_dsi_present(dev_priv, &port)) 847 return; 848 849 /* Initialize this to undefined indicating no generic MIPI support */ 850 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 851 852 /* Block #40 is already parsed and panel_fixed_mode is 853 * stored in dev_priv->lfp_lvds_vbt_mode 854 * resuse this when needed 855 */ 856 857 /* Parse #52 for panel index used from panel_type already 858 * parsed 859 */ 860 start = find_section(bdb, BDB_MIPI_CONFIG); 861 if (!start) { 862 DRM_DEBUG_KMS("No MIPI config BDB found"); 863 return; 864 } 865 866 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n", 867 panel_type); 868 869 /* 870 * get hold of the correct configuration block and pps data as per 871 * the panel_type as index 872 */ 873 config = &start->config[panel_type]; 874 pps = &start->pps[panel_type]; 875 876 /* store as of now full data. Trim when we realise all is not needed */ 877 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 878 if (!dev_priv->vbt.dsi.config) 879 return; 880 881 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 882 if (!dev_priv->vbt.dsi.pps) { 883 kfree(dev_priv->vbt.dsi.config); 884 return; 885 } 886 887 parse_dsi_backlight_ports(dev_priv, bdb->version, port); 888 889 /* FIXME is the 90 vs. 270 correct? */ 890 switch (config->rotation) { 891 case ENABLE_ROTATION_0: 892 /* 893 * Most (all?) VBTs claim 0 degrees despite having 894 * an upside down panel, thus we do not trust this. 895 */ 896 dev_priv->vbt.dsi.orientation = 897 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 898 break; 899 case ENABLE_ROTATION_90: 900 dev_priv->vbt.dsi.orientation = 901 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 902 break; 903 case ENABLE_ROTATION_180: 904 dev_priv->vbt.dsi.orientation = 905 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 906 break; 907 case ENABLE_ROTATION_270: 908 dev_priv->vbt.dsi.orientation = 909 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 910 break; 911 } 912 913 /* We have mandatory mipi config blocks. Initialize as generic panel */ 914 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 915 } 916 917 /* Find the sequence block and size for the given panel. */ 918 static const u8 * 919 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 920 u16 panel_id, u32 *seq_size) 921 { 922 u32 total = get_blocksize(sequence); 923 const u8 *data = &sequence->data[0]; 924 u8 current_id; 925 u32 current_size; 926 int header_size = sequence->version >= 3 ? 5 : 3; 927 int index = 0; 928 int i; 929 930 /* skip new block size */ 931 if (sequence->version >= 3) 932 data += 4; 933 934 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 935 if (index + header_size > total) { 936 DRM_ERROR("Invalid sequence block (header)\n"); 937 return NULL; 938 } 939 940 current_id = *(data + index); 941 if (sequence->version >= 3) 942 current_size = *((const u32 *)(data + index + 1)); 943 else 944 current_size = *((const u16 *)(data + index + 1)); 945 946 index += header_size; 947 948 if (index + current_size > total) { 949 DRM_ERROR("Invalid sequence block\n"); 950 return NULL; 951 } 952 953 if (current_id == panel_id) { 954 *seq_size = current_size; 955 return data + index; 956 } 957 958 index += current_size; 959 } 960 961 DRM_ERROR("Sequence block detected but no valid configuration\n"); 962 963 return NULL; 964 } 965 966 static int goto_next_sequence(const u8 *data, int index, int total) 967 { 968 u16 len; 969 970 /* Skip Sequence Byte. */ 971 for (index = index + 1; index < total; index += len) { 972 u8 operation_byte = *(data + index); 973 index++; 974 975 switch (operation_byte) { 976 case MIPI_SEQ_ELEM_END: 977 return index; 978 case MIPI_SEQ_ELEM_SEND_PKT: 979 if (index + 4 > total) 980 return 0; 981 982 len = *((const u16 *)(data + index + 2)) + 4; 983 break; 984 case MIPI_SEQ_ELEM_DELAY: 985 len = 4; 986 break; 987 case MIPI_SEQ_ELEM_GPIO: 988 len = 2; 989 break; 990 case MIPI_SEQ_ELEM_I2C: 991 if (index + 7 > total) 992 return 0; 993 len = *(data + index + 6) + 7; 994 break; 995 default: 996 DRM_ERROR("Unknown operation byte\n"); 997 return 0; 998 } 999 } 1000 1001 return 0; 1002 } 1003 1004 static int goto_next_sequence_v3(const u8 *data, int index, int total) 1005 { 1006 int seq_end; 1007 u16 len; 1008 u32 size_of_sequence; 1009 1010 /* 1011 * Could skip sequence based on Size of Sequence alone, but also do some 1012 * checking on the structure. 1013 */ 1014 if (total < 5) { 1015 DRM_ERROR("Too small sequence size\n"); 1016 return 0; 1017 } 1018 1019 /* Skip Sequence Byte. */ 1020 index++; 1021 1022 /* 1023 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1024 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1025 * byte. 1026 */ 1027 size_of_sequence = *((const u32 *)(data + index)); 1028 index += 4; 1029 1030 seq_end = index + size_of_sequence; 1031 if (seq_end > total) { 1032 DRM_ERROR("Invalid sequence size\n"); 1033 return 0; 1034 } 1035 1036 for (; index < total; index += len) { 1037 u8 operation_byte = *(data + index); 1038 index++; 1039 1040 if (operation_byte == MIPI_SEQ_ELEM_END) { 1041 if (index != seq_end) { 1042 DRM_ERROR("Invalid element structure\n"); 1043 return 0; 1044 } 1045 return index; 1046 } 1047 1048 len = *(data + index); 1049 index++; 1050 1051 /* 1052 * FIXME: Would be nice to check elements like for v1/v2 in 1053 * goto_next_sequence() above. 1054 */ 1055 switch (operation_byte) { 1056 case MIPI_SEQ_ELEM_SEND_PKT: 1057 case MIPI_SEQ_ELEM_DELAY: 1058 case MIPI_SEQ_ELEM_GPIO: 1059 case MIPI_SEQ_ELEM_I2C: 1060 case MIPI_SEQ_ELEM_SPI: 1061 case MIPI_SEQ_ELEM_PMIC: 1062 break; 1063 default: 1064 DRM_ERROR("Unknown operation byte %u\n", 1065 operation_byte); 1066 break; 1067 } 1068 } 1069 1070 return 0; 1071 } 1072 1073 /* 1074 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1075 * skip all delay + gpio operands and stop at the first DSI packet op. 1076 */ 1077 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv) 1078 { 1079 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1080 int index, len; 1081 1082 if (WARN_ON(!data || dev_priv->vbt.dsi.seq_version != 1)) 1083 return 0; 1084 1085 /* index = 1 to skip sequence byte */ 1086 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1087 switch (data[index]) { 1088 case MIPI_SEQ_ELEM_SEND_PKT: 1089 return index == 1 ? 0 : index; 1090 case MIPI_SEQ_ELEM_DELAY: 1091 len = 5; /* 1 byte for operand + uint32 */ 1092 break; 1093 case MIPI_SEQ_ELEM_GPIO: 1094 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1095 break; 1096 default: 1097 return 0; 1098 } 1099 } 1100 1101 return 0; 1102 } 1103 1104 /* 1105 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1106 * The deassert must be done before calling intel_dsi_device_ready, so for 1107 * these devices we split the init OTP sequence into a deassert sequence and 1108 * the actual init OTP part. 1109 */ 1110 static void fixup_mipi_sequences(struct drm_i915_private *dev_priv) 1111 { 1112 u8 *init_otp; 1113 int len; 1114 1115 /* Limit this to VLV for now. */ 1116 if (!IS_VALLEYVIEW(dev_priv)) 1117 return; 1118 1119 /* Limit this to v1 vid-mode sequences */ 1120 if (dev_priv->vbt.dsi.config->is_cmd_mode || 1121 dev_priv->vbt.dsi.seq_version != 1) 1122 return; 1123 1124 /* Only do this if there are otp and assert seqs and no deassert seq */ 1125 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1126 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1127 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1128 return; 1129 1130 /* The deassert-sequence ends at the first DSI packet */ 1131 len = get_init_otp_deassert_fragment_len(dev_priv); 1132 if (!len) 1133 return; 1134 1135 DRM_DEBUG_KMS("Using init OTP fragment to deassert reset\n"); 1136 1137 /* Copy the fragment, update seq byte and terminate it */ 1138 init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1139 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1140 if (!dev_priv->vbt.dsi.deassert_seq) 1141 return; 1142 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1143 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1144 /* Use the copy for deassert */ 1145 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1146 dev_priv->vbt.dsi.deassert_seq; 1147 /* Replace the last byte of the fragment with init OTP seq byte */ 1148 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1149 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1150 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1151 } 1152 1153 static void 1154 parse_mipi_sequence(struct drm_i915_private *dev_priv, 1155 const struct bdb_header *bdb) 1156 { 1157 int panel_type = dev_priv->vbt.panel_type; 1158 const struct bdb_mipi_sequence *sequence; 1159 const u8 *seq_data; 1160 u32 seq_size; 1161 u8 *data; 1162 int index = 0; 1163 1164 /* Only our generic panel driver uses the sequence block. */ 1165 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 1166 return; 1167 1168 sequence = find_section(bdb, BDB_MIPI_SEQUENCE); 1169 if (!sequence) { 1170 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n"); 1171 return; 1172 } 1173 1174 /* Fail gracefully for forward incompatible sequence block. */ 1175 if (sequence->version >= 4) { 1176 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n", 1177 sequence->version); 1178 return; 1179 } 1180 1181 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version); 1182 1183 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 1184 if (!seq_data) 1185 return; 1186 1187 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 1188 if (!data) 1189 return; 1190 1191 /* Parse the sequences, store pointers to each sequence. */ 1192 for (;;) { 1193 u8 seq_id = *(data + index); 1194 if (seq_id == MIPI_SEQ_END) 1195 break; 1196 1197 if (seq_id >= MIPI_SEQ_MAX) { 1198 DRM_ERROR("Unknown sequence %u\n", seq_id); 1199 goto err; 1200 } 1201 1202 /* Log about presence of sequences we won't run. */ 1203 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 1204 DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id); 1205 1206 dev_priv->vbt.dsi.sequence[seq_id] = data + index; 1207 1208 if (sequence->version >= 3) 1209 index = goto_next_sequence_v3(data, index, seq_size); 1210 else 1211 index = goto_next_sequence(data, index, seq_size); 1212 if (!index) { 1213 DRM_ERROR("Invalid sequence %u\n", seq_id); 1214 goto err; 1215 } 1216 } 1217 1218 dev_priv->vbt.dsi.data = data; 1219 dev_priv->vbt.dsi.size = seq_size; 1220 dev_priv->vbt.dsi.seq_version = sequence->version; 1221 1222 fixup_mipi_sequences(dev_priv); 1223 1224 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n"); 1225 return; 1226 1227 err: 1228 kfree(data); 1229 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence)); 1230 } 1231 1232 static u8 translate_iboost(u8 val) 1233 { 1234 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 1235 1236 if (val >= ARRAY_SIZE(mapping)) { 1237 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 1238 return 0; 1239 } 1240 return mapping[val]; 1241 } 1242 1243 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin) 1244 { 1245 const struct ddi_vbt_port_info *info; 1246 enum port port; 1247 1248 for (port = PORT_A; port < I915_MAX_PORTS; port++) { 1249 info = &i915->vbt.ddi_port_info[port]; 1250 1251 if (info->child && ddc_pin == info->alternate_ddc_pin) 1252 return port; 1253 } 1254 1255 return PORT_NONE; 1256 } 1257 1258 static void sanitize_ddc_pin(struct drm_i915_private *dev_priv, 1259 enum port port) 1260 { 1261 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1262 enum port p; 1263 1264 if (!info->alternate_ddc_pin) 1265 return; 1266 1267 p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin); 1268 if (p != PORT_NONE) { 1269 DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, " 1270 "disabling port %c DVI/HDMI support\n", 1271 port_name(port), info->alternate_ddc_pin, 1272 port_name(p), port_name(port)); 1273 1274 /* 1275 * If we have multiple ports supposedly sharing the 1276 * pin, then dvi/hdmi couldn't exist on the shared 1277 * port. Otherwise they share the same ddc bin and 1278 * system couldn't communicate with them separately. 1279 * 1280 * Give child device order the priority, first come first 1281 * served. 1282 */ 1283 info->supports_dvi = false; 1284 info->supports_hdmi = false; 1285 info->alternate_ddc_pin = 0; 1286 } 1287 } 1288 1289 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch) 1290 { 1291 const struct ddi_vbt_port_info *info; 1292 enum port port; 1293 1294 for (port = PORT_A; port < I915_MAX_PORTS; port++) { 1295 info = &i915->vbt.ddi_port_info[port]; 1296 1297 if (info->child && aux_ch == info->alternate_aux_channel) 1298 return port; 1299 } 1300 1301 return PORT_NONE; 1302 } 1303 1304 static void sanitize_aux_ch(struct drm_i915_private *dev_priv, 1305 enum port port) 1306 { 1307 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1308 enum port p; 1309 1310 if (!info->alternate_aux_channel) 1311 return; 1312 1313 p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel); 1314 if (p != PORT_NONE) { 1315 DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, " 1316 "disabling port %c DP support\n", 1317 port_name(port), info->alternate_aux_channel, 1318 port_name(p), port_name(port)); 1319 1320 /* 1321 * If we have multiple ports supposedlt sharing the 1322 * aux channel, then DP couldn't exist on the shared 1323 * port. Otherwise they share the same aux channel 1324 * and system couldn't communicate with them separately. 1325 * 1326 * Give child device order the priority, first come first 1327 * served. 1328 */ 1329 info->supports_dp = false; 1330 info->alternate_aux_channel = 0; 1331 } 1332 } 1333 1334 static const u8 cnp_ddc_pin_map[] = { 1335 [0] = 0, /* N/A */ 1336 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT, 1337 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT, 1338 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */ 1339 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */ 1340 }; 1341 1342 static const u8 icp_ddc_pin_map[] = { 1343 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1344 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1345 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP, 1346 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP, 1347 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP, 1348 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP, 1349 }; 1350 1351 static const u8 mcc_ddc_pin_map[] = { 1352 [MCC_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1353 [MCC_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1354 [MCC_DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP, 1355 }; 1356 1357 static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin) 1358 { 1359 const u8 *ddc_pin_map; 1360 int n_entries; 1361 1362 if (HAS_PCH_MCC(dev_priv)) { 1363 ddc_pin_map = mcc_ddc_pin_map; 1364 n_entries = ARRAY_SIZE(mcc_ddc_pin_map); 1365 } else if (HAS_PCH_ICP(dev_priv)) { 1366 ddc_pin_map = icp_ddc_pin_map; 1367 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 1368 } else if (HAS_PCH_CNP(dev_priv)) { 1369 ddc_pin_map = cnp_ddc_pin_map; 1370 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 1371 } else { 1372 /* Assuming direct map */ 1373 return vbt_pin; 1374 } 1375 1376 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0) 1377 return ddc_pin_map[vbt_pin]; 1378 1379 DRM_DEBUG_KMS("Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 1380 vbt_pin); 1381 return 0; 1382 } 1383 1384 static enum port dvo_port_to_port(u8 dvo_port) 1385 { 1386 /* 1387 * Each DDI port can have more than one value on the "DVO Port" field, 1388 * so look for all the possible values for each port. 1389 */ 1390 static const int dvo_ports[][3] = { 1391 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1}, 1392 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1}, 1393 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1}, 1394 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1}, 1395 [PORT_E] = { DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE}, 1396 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1}, 1397 }; 1398 enum port port; 1399 int i; 1400 1401 for (port = PORT_A; port < ARRAY_SIZE(dvo_ports); port++) { 1402 for (i = 0; i < ARRAY_SIZE(dvo_ports[port]); i++) { 1403 if (dvo_ports[port][i] == -1) 1404 break; 1405 1406 if (dvo_port == dvo_ports[port][i]) 1407 return port; 1408 } 1409 } 1410 1411 return PORT_NONE; 1412 } 1413 1414 static void parse_ddi_port(struct drm_i915_private *dev_priv, 1415 const struct child_device_config *child, 1416 u8 bdb_version) 1417 { 1418 struct ddi_vbt_port_info *info; 1419 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; 1420 enum port port; 1421 1422 port = dvo_port_to_port(child->dvo_port); 1423 if (port == PORT_NONE) 1424 return; 1425 1426 info = &dev_priv->vbt.ddi_port_info[port]; 1427 1428 if (info->child) { 1429 DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n", 1430 port_name(port)); 1431 return; 1432 } 1433 1434 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 1435 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 1436 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT; 1437 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 1438 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); 1439 1440 if (port == PORT_A && is_dvi) { 1441 DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n", 1442 is_hdmi ? "/HDMI" : ""); 1443 is_dvi = false; 1444 is_hdmi = false; 1445 } 1446 1447 info->supports_dvi = is_dvi; 1448 info->supports_hdmi = is_hdmi; 1449 info->supports_dp = is_dp; 1450 info->supports_edp = is_edp; 1451 1452 if (bdb_version >= 195) 1453 info->supports_typec_usb = child->dp_usb_type_c; 1454 1455 if (bdb_version >= 209) 1456 info->supports_tbt = child->tbt; 1457 1458 DRM_DEBUG_KMS("Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d\n", 1459 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, 1460 HAS_LSPCON(dev_priv) && child->lspcon, 1461 info->supports_typec_usb, info->supports_tbt); 1462 1463 if (is_edp && is_dvi) 1464 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n", 1465 port_name(port)); 1466 if (is_crt && port != PORT_E) 1467 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port)); 1468 if (is_crt && (is_dvi || is_dp)) 1469 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n", 1470 port_name(port)); 1471 if (is_dvi && (port == PORT_A || port == PORT_E)) 1472 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port)); 1473 if (!is_dvi && !is_dp && !is_crt) 1474 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n", 1475 port_name(port)); 1476 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E)) 1477 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); 1478 1479 if (is_dvi) { 1480 u8 ddc_pin; 1481 1482 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin); 1483 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) { 1484 info->alternate_ddc_pin = ddc_pin; 1485 sanitize_ddc_pin(dev_priv, port); 1486 } else { 1487 DRM_DEBUG_KMS("Port %c has invalid DDC pin %d, " 1488 "sticking to defaults\n", 1489 port_name(port), ddc_pin); 1490 } 1491 } 1492 1493 if (is_dp) { 1494 info->alternate_aux_channel = child->aux_channel; 1495 1496 sanitize_aux_ch(dev_priv, port); 1497 } 1498 1499 if (bdb_version >= 158) { 1500 /* The VBT HDMI level shift values match the table we have. */ 1501 u8 hdmi_level_shift = child->hdmi_level_shifter_value; 1502 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n", 1503 port_name(port), 1504 hdmi_level_shift); 1505 info->hdmi_level_shift = hdmi_level_shift; 1506 } 1507 1508 if (bdb_version >= 204) { 1509 int max_tmds_clock; 1510 1511 switch (child->hdmi_max_data_rate) { 1512 default: 1513 MISSING_CASE(child->hdmi_max_data_rate); 1514 /* fall through */ 1515 case HDMI_MAX_DATA_RATE_PLATFORM: 1516 max_tmds_clock = 0; 1517 break; 1518 case HDMI_MAX_DATA_RATE_297: 1519 max_tmds_clock = 297000; 1520 break; 1521 case HDMI_MAX_DATA_RATE_165: 1522 max_tmds_clock = 165000; 1523 break; 1524 } 1525 1526 if (max_tmds_clock) 1527 DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n", 1528 port_name(port), max_tmds_clock); 1529 info->max_tmds_clock = max_tmds_clock; 1530 } 1531 1532 /* Parse the I_boost config for SKL and above */ 1533 if (bdb_version >= 196 && child->iboost) { 1534 info->dp_boost_level = translate_iboost(child->dp_iboost_level); 1535 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n", 1536 port_name(port), info->dp_boost_level); 1537 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level); 1538 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n", 1539 port_name(port), info->hdmi_boost_level); 1540 } 1541 1542 /* DP max link rate for CNL+ */ 1543 if (bdb_version >= 216) { 1544 switch (child->dp_max_link_rate) { 1545 default: 1546 case VBT_DP_MAX_LINK_RATE_HBR3: 1547 info->dp_max_link_rate = 810000; 1548 break; 1549 case VBT_DP_MAX_LINK_RATE_HBR2: 1550 info->dp_max_link_rate = 540000; 1551 break; 1552 case VBT_DP_MAX_LINK_RATE_HBR: 1553 info->dp_max_link_rate = 270000; 1554 break; 1555 case VBT_DP_MAX_LINK_RATE_LBR: 1556 info->dp_max_link_rate = 162000; 1557 break; 1558 } 1559 DRM_DEBUG_KMS("VBT DP max link rate for port %c: %d\n", 1560 port_name(port), info->dp_max_link_rate); 1561 } 1562 1563 info->child = child; 1564 } 1565 1566 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version) 1567 { 1568 const struct child_device_config *child; 1569 int i; 1570 1571 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv)) 1572 return; 1573 1574 if (bdb_version < 155) 1575 return; 1576 1577 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { 1578 child = dev_priv->vbt.child_dev + i; 1579 1580 parse_ddi_port(dev_priv, child, bdb_version); 1581 } 1582 } 1583 1584 static void 1585 parse_general_definitions(struct drm_i915_private *dev_priv, 1586 const struct bdb_header *bdb) 1587 { 1588 const struct bdb_general_definitions *defs; 1589 const struct child_device_config *child; 1590 int i, child_device_num, count; 1591 u8 expected_size; 1592 u16 block_size; 1593 int bus_pin; 1594 1595 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); 1596 if (!defs) { 1597 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); 1598 return; 1599 } 1600 1601 block_size = get_blocksize(defs); 1602 if (block_size < sizeof(*defs)) { 1603 DRM_DEBUG_KMS("General definitions block too small (%u)\n", 1604 block_size); 1605 return; 1606 } 1607 1608 bus_pin = defs->crt_ddc_gmbus_pin; 1609 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); 1610 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin)) 1611 dev_priv->vbt.crt_ddc_pin = bus_pin; 1612 1613 if (bdb->version < 106) { 1614 expected_size = 22; 1615 } else if (bdb->version < 111) { 1616 expected_size = 27; 1617 } else if (bdb->version < 195) { 1618 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 1619 } else if (bdb->version == 195) { 1620 expected_size = 37; 1621 } else if (bdb->version <= 215) { 1622 expected_size = 38; 1623 } else if (bdb->version <= 216) { 1624 expected_size = 39; 1625 } else { 1626 expected_size = sizeof(*child); 1627 BUILD_BUG_ON(sizeof(*child) < 39); 1628 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n", 1629 bdb->version, expected_size); 1630 } 1631 1632 /* Flag an error for unexpected size, but continue anyway. */ 1633 if (defs->child_dev_size != expected_size) 1634 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n", 1635 defs->child_dev_size, expected_size, bdb->version); 1636 1637 /* The legacy sized child device config is the minimum we need. */ 1638 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 1639 DRM_DEBUG_KMS("Child device config size %u is too small.\n", 1640 defs->child_dev_size); 1641 return; 1642 } 1643 1644 /* get the number of child device */ 1645 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 1646 count = 0; 1647 /* get the number of child device that is present */ 1648 for (i = 0; i < child_device_num; i++) { 1649 child = child_device_ptr(defs, i); 1650 if (!child->device_type) 1651 continue; 1652 count++; 1653 } 1654 if (!count) { 1655 DRM_DEBUG_KMS("no child dev is parsed from VBT\n"); 1656 return; 1657 } 1658 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*child), GFP_KERNEL); 1659 if (!dev_priv->vbt.child_dev) { 1660 DRM_DEBUG_KMS("No memory space for child device\n"); 1661 return; 1662 } 1663 1664 dev_priv->vbt.child_dev_num = count; 1665 count = 0; 1666 for (i = 0; i < child_device_num; i++) { 1667 child = child_device_ptr(defs, i); 1668 if (!child->device_type) 1669 continue; 1670 1671 /* 1672 * Copy as much as we know (sizeof) and is available 1673 * (child_dev_size) of the child device. Accessing the data must 1674 * depend on VBT version. 1675 */ 1676 memcpy(dev_priv->vbt.child_dev + count, child, 1677 min_t(size_t, defs->child_dev_size, sizeof(*child))); 1678 count++; 1679 } 1680 } 1681 1682 /* Common defaults which may be overridden by VBT. */ 1683 static void 1684 init_vbt_defaults(struct drm_i915_private *dev_priv) 1685 { 1686 enum port port; 1687 1688 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 1689 1690 /* Default to having backlight */ 1691 dev_priv->vbt.backlight.present = true; 1692 1693 /* LFP panel data */ 1694 dev_priv->vbt.lvds_dither = 1; 1695 1696 /* SDVO panel data */ 1697 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 1698 1699 /* general features */ 1700 dev_priv->vbt.int_tv_support = 1; 1701 dev_priv->vbt.int_crt_support = 1; 1702 1703 /* driver features */ 1704 dev_priv->vbt.int_lvds_support = 1; 1705 1706 /* Default to using SSC */ 1707 dev_priv->vbt.lvds_use_ssc = 1; 1708 /* 1709 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 1710 * clock for LVDS. 1711 */ 1712 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv, 1713 !HAS_PCH_SPLIT(dev_priv)); 1714 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq); 1715 1716 for (port = PORT_A; port < I915_MAX_PORTS; port++) { 1717 struct ddi_vbt_port_info *info = 1718 &dev_priv->vbt.ddi_port_info[port]; 1719 1720 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN; 1721 } 1722 } 1723 1724 /* Defaults to initialize only if there is no VBT. */ 1725 static void 1726 init_vbt_missing_defaults(struct drm_i915_private *dev_priv) 1727 { 1728 enum port port; 1729 1730 for (port = PORT_A; port < I915_MAX_PORTS; port++) { 1731 struct ddi_vbt_port_info *info = 1732 &dev_priv->vbt.ddi_port_info[port]; 1733 1734 /* 1735 * VBT has the TypeC mode (native,TBT/USB) and we don't want 1736 * to detect it. 1737 */ 1738 if (intel_port_is_tc(dev_priv, port)) 1739 continue; 1740 1741 info->supports_dvi = (port != PORT_A && port != PORT_E); 1742 info->supports_hdmi = info->supports_dvi; 1743 info->supports_dp = (port != PORT_E); 1744 info->supports_edp = (port == PORT_A); 1745 } 1746 } 1747 1748 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 1749 { 1750 const void *_vbt = vbt; 1751 1752 return _vbt + vbt->bdb_offset; 1753 } 1754 1755 /** 1756 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 1757 * @buf: pointer to a buffer to validate 1758 * @size: size of the buffer 1759 * 1760 * Returns true on valid VBT. 1761 */ 1762 bool intel_bios_is_valid_vbt(const void *buf, size_t size) 1763 { 1764 const struct vbt_header *vbt = buf; 1765 const struct bdb_header *bdb; 1766 1767 if (!vbt) 1768 return false; 1769 1770 if (sizeof(struct vbt_header) > size) { 1771 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 1772 return false; 1773 } 1774 1775 if (memcmp(vbt->signature, "$VBT", 4)) { 1776 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 1777 return false; 1778 } 1779 1780 if (range_overflows_t(size_t, 1781 vbt->bdb_offset, 1782 sizeof(struct bdb_header), 1783 size)) { 1784 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 1785 return false; 1786 } 1787 1788 bdb = get_bdb_header(vbt); 1789 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 1790 DRM_DEBUG_DRIVER("BDB incomplete\n"); 1791 return false; 1792 } 1793 1794 return vbt; 1795 } 1796 1797 static const struct vbt_header *find_vbt(void __iomem *bios, size_t size) 1798 { 1799 size_t i; 1800 1801 /* Scour memory looking for the VBT signature. */ 1802 for (i = 0; i + 4 < size; i++) { 1803 void *vbt; 1804 1805 if (ioread32(bios + i) != *((const u32 *) "$VBT")) 1806 continue; 1807 1808 /* 1809 * This is the one place where we explicitly discard the address 1810 * space (__iomem) of the BIOS/VBT. 1811 */ 1812 vbt = (void __force *) bios + i; 1813 if (intel_bios_is_valid_vbt(vbt, size - i)) 1814 return vbt; 1815 1816 break; 1817 } 1818 1819 return NULL; 1820 } 1821 1822 /** 1823 * intel_bios_init - find VBT and initialize settings from the BIOS 1824 * @dev_priv: i915 device instance 1825 * 1826 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 1827 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 1828 * initialize some defaults if the VBT is not present at all. 1829 */ 1830 void intel_bios_init(struct drm_i915_private *dev_priv) 1831 { 1832 struct pci_dev *pdev = dev_priv->drm.pdev; 1833 const struct vbt_header *vbt = dev_priv->opregion.vbt; 1834 const struct bdb_header *bdb; 1835 u8 __iomem *bios = NULL; 1836 1837 if (!HAS_DISPLAY(dev_priv)) { 1838 DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n"); 1839 return; 1840 } 1841 1842 init_vbt_defaults(dev_priv); 1843 1844 /* If the OpRegion does not have VBT, look in PCI ROM. */ 1845 if (!vbt) { 1846 size_t size; 1847 1848 bios = pci_map_rom(pdev, &size); 1849 if (!bios) 1850 goto out; 1851 1852 vbt = find_vbt(bios, size); 1853 if (!vbt) 1854 goto out; 1855 1856 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n"); 1857 } 1858 1859 bdb = get_bdb_header(vbt); 1860 1861 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n", 1862 (int)sizeof(vbt->signature), vbt->signature, bdb->version); 1863 1864 /* Grab useful general definitions */ 1865 parse_general_features(dev_priv, bdb); 1866 parse_general_definitions(dev_priv, bdb); 1867 parse_lfp_panel_data(dev_priv, bdb); 1868 parse_lfp_backlight(dev_priv, bdb); 1869 parse_sdvo_panel_data(dev_priv, bdb); 1870 parse_driver_features(dev_priv, bdb); 1871 parse_edp(dev_priv, bdb); 1872 parse_psr(dev_priv, bdb); 1873 parse_mipi_config(dev_priv, bdb); 1874 parse_mipi_sequence(dev_priv, bdb); 1875 1876 /* Further processing on pre-parsed data */ 1877 parse_sdvo_device_mapping(dev_priv, bdb->version); 1878 parse_ddi_ports(dev_priv, bdb->version); 1879 1880 out: 1881 if (!vbt) { 1882 DRM_INFO("Failed to find VBIOS tables (VBT)\n"); 1883 init_vbt_missing_defaults(dev_priv); 1884 } 1885 1886 if (bios) 1887 pci_unmap_rom(pdev, bios); 1888 } 1889 1890 /** 1891 * intel_bios_cleanup - Free any resources allocated by intel_bios_init() 1892 * @dev_priv: i915 device instance 1893 */ 1894 void intel_bios_cleanup(struct drm_i915_private *dev_priv) 1895 { 1896 kfree(dev_priv->vbt.child_dev); 1897 dev_priv->vbt.child_dev = NULL; 1898 dev_priv->vbt.child_dev_num = 0; 1899 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode); 1900 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 1901 kfree(dev_priv->vbt.lfp_lvds_vbt_mode); 1902 dev_priv->vbt.lfp_lvds_vbt_mode = NULL; 1903 kfree(dev_priv->vbt.dsi.data); 1904 dev_priv->vbt.dsi.data = NULL; 1905 kfree(dev_priv->vbt.dsi.pps); 1906 dev_priv->vbt.dsi.pps = NULL; 1907 kfree(dev_priv->vbt.dsi.config); 1908 dev_priv->vbt.dsi.config = NULL; 1909 kfree(dev_priv->vbt.dsi.deassert_seq); 1910 dev_priv->vbt.dsi.deassert_seq = NULL; 1911 } 1912 1913 /** 1914 * intel_bios_is_tv_present - is integrated TV present in VBT 1915 * @dev_priv: i915 device instance 1916 * 1917 * Return true if TV is present. If no child devices were parsed from VBT, 1918 * assume TV is present. 1919 */ 1920 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv) 1921 { 1922 const struct child_device_config *child; 1923 int i; 1924 1925 if (!dev_priv->vbt.int_tv_support) 1926 return false; 1927 1928 if (!dev_priv->vbt.child_dev_num) 1929 return true; 1930 1931 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { 1932 child = dev_priv->vbt.child_dev + i; 1933 /* 1934 * If the device type is not TV, continue. 1935 */ 1936 switch (child->device_type) { 1937 case DEVICE_TYPE_INT_TV: 1938 case DEVICE_TYPE_TV: 1939 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 1940 break; 1941 default: 1942 continue; 1943 } 1944 /* Only when the addin_offset is non-zero, it is regarded 1945 * as present. 1946 */ 1947 if (child->addin_offset) 1948 return true; 1949 } 1950 1951 return false; 1952 } 1953 1954 /** 1955 * intel_bios_is_lvds_present - is LVDS present in VBT 1956 * @dev_priv: i915 device instance 1957 * @i2c_pin: i2c pin for LVDS if present 1958 * 1959 * Return true if LVDS is present. If no child devices were parsed from VBT, 1960 * assume LVDS is present. 1961 */ 1962 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin) 1963 { 1964 const struct child_device_config *child; 1965 int i; 1966 1967 if (!dev_priv->vbt.child_dev_num) 1968 return true; 1969 1970 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { 1971 child = dev_priv->vbt.child_dev + i; 1972 1973 /* If the device type is not LFP, continue. 1974 * We have to check both the new identifiers as well as the 1975 * old for compatibility with some BIOSes. 1976 */ 1977 if (child->device_type != DEVICE_TYPE_INT_LFP && 1978 child->device_type != DEVICE_TYPE_LFP) 1979 continue; 1980 1981 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin)) 1982 *i2c_pin = child->i2c_pin; 1983 1984 /* However, we cannot trust the BIOS writers to populate 1985 * the VBT correctly. Since LVDS requires additional 1986 * information from AIM blocks, a non-zero addin offset is 1987 * a good indicator that the LVDS is actually present. 1988 */ 1989 if (child->addin_offset) 1990 return true; 1991 1992 /* But even then some BIOS writers perform some black magic 1993 * and instantiate the device without reference to any 1994 * additional data. Trust that if the VBT was written into 1995 * the OpRegion then they have validated the LVDS's existence. 1996 */ 1997 if (dev_priv->opregion.vbt) 1998 return true; 1999 } 2000 2001 return false; 2002 } 2003 2004 /** 2005 * intel_bios_is_port_present - is the specified digital port present 2006 * @dev_priv: i915 device instance 2007 * @port: port to check 2008 * 2009 * Return true if the device in %port is present. 2010 */ 2011 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port) 2012 { 2013 const struct child_device_config *child; 2014 static const struct { 2015 u16 dp, hdmi; 2016 } port_mapping[] = { 2017 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2018 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2019 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2020 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2021 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2022 }; 2023 int i; 2024 2025 if (HAS_DDI(dev_priv)) { 2026 const struct ddi_vbt_port_info *port_info = 2027 &dev_priv->vbt.ddi_port_info[port]; 2028 2029 return port_info->supports_dp || 2030 port_info->supports_dvi || 2031 port_info->supports_hdmi; 2032 } 2033 2034 /* FIXME maybe deal with port A as well? */ 2035 if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping)) 2036 return false; 2037 2038 if (!dev_priv->vbt.child_dev_num) 2039 return false; 2040 2041 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { 2042 child = dev_priv->vbt.child_dev + i; 2043 2044 if ((child->dvo_port == port_mapping[port].dp || 2045 child->dvo_port == port_mapping[port].hdmi) && 2046 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING | 2047 DEVICE_TYPE_DISPLAYPORT_OUTPUT))) 2048 return true; 2049 } 2050 2051 return false; 2052 } 2053 2054 /** 2055 * intel_bios_is_port_edp - is the device in given port eDP 2056 * @dev_priv: i915 device instance 2057 * @port: port to check 2058 * 2059 * Return true if the device in %port is eDP. 2060 */ 2061 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port) 2062 { 2063 const struct child_device_config *child; 2064 static const short port_mapping[] = { 2065 [PORT_B] = DVO_PORT_DPB, 2066 [PORT_C] = DVO_PORT_DPC, 2067 [PORT_D] = DVO_PORT_DPD, 2068 [PORT_E] = DVO_PORT_DPE, 2069 [PORT_F] = DVO_PORT_DPF, 2070 }; 2071 int i; 2072 2073 if (HAS_DDI(dev_priv)) 2074 return dev_priv->vbt.ddi_port_info[port].supports_edp; 2075 2076 if (!dev_priv->vbt.child_dev_num) 2077 return false; 2078 2079 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { 2080 child = dev_priv->vbt.child_dev + i; 2081 2082 if (child->dvo_port == port_mapping[port] && 2083 (child->device_type & DEVICE_TYPE_eDP_BITS) == 2084 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS)) 2085 return true; 2086 } 2087 2088 return false; 2089 } 2090 2091 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child, 2092 enum port port) 2093 { 2094 static const struct { 2095 u16 dp, hdmi; 2096 } port_mapping[] = { 2097 /* 2098 * Buggy VBTs may declare DP ports as having 2099 * HDMI type dvo_port :( So let's check both. 2100 */ 2101 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2102 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2103 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2104 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2105 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2106 }; 2107 2108 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping)) 2109 return false; 2110 2111 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) != 2112 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS)) 2113 return false; 2114 2115 if (child->dvo_port == port_mapping[port].dp) 2116 return true; 2117 2118 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 2119 if (child->dvo_port == port_mapping[port].hdmi && 2120 child->aux_channel != 0) 2121 return true; 2122 2123 return false; 2124 } 2125 2126 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, 2127 enum port port) 2128 { 2129 const struct child_device_config *child; 2130 int i; 2131 2132 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { 2133 child = dev_priv->vbt.child_dev + i; 2134 2135 if (child_dev_is_dp_dual_mode(child, port)) 2136 return true; 2137 } 2138 2139 return false; 2140 } 2141 2142 /** 2143 * intel_bios_is_dsi_present - is DSI present in VBT 2144 * @dev_priv: i915 device instance 2145 * @port: port for DSI if present 2146 * 2147 * Return true if DSI is present, and return the port in %port. 2148 */ 2149 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, 2150 enum port *port) 2151 { 2152 const struct child_device_config *child; 2153 u8 dvo_port; 2154 int i; 2155 2156 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { 2157 child = dev_priv->vbt.child_dev + i; 2158 2159 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2160 continue; 2161 2162 dvo_port = child->dvo_port; 2163 2164 if (dvo_port == DVO_PORT_MIPIA || 2165 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) || 2166 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) { 2167 if (port) 2168 *port = dvo_port - DVO_PORT_MIPIA; 2169 return true; 2170 } else if (dvo_port == DVO_PORT_MIPIB || 2171 dvo_port == DVO_PORT_MIPIC || 2172 dvo_port == DVO_PORT_MIPID) { 2173 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n", 2174 port_name(dvo_port - DVO_PORT_MIPIA)); 2175 } 2176 } 2177 2178 return false; 2179 } 2180 2181 /** 2182 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port 2183 * @i915: i915 device instance 2184 * @port: port to check 2185 * 2186 * Return true if HPD should be inverted for %port. 2187 */ 2188 bool 2189 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, 2190 enum port port) 2191 { 2192 const struct child_device_config *child = 2193 i915->vbt.ddi_port_info[port].child; 2194 2195 if (WARN_ON_ONCE(!IS_GEN9_LP(i915))) 2196 return false; 2197 2198 return child && child->hpd_invert; 2199 } 2200 2201 /** 2202 * intel_bios_is_lspcon_present - if LSPCON is attached on %port 2203 * @i915: i915 device instance 2204 * @port: port to check 2205 * 2206 * Return true if LSPCON is present on this port 2207 */ 2208 bool 2209 intel_bios_is_lspcon_present(const struct drm_i915_private *i915, 2210 enum port port) 2211 { 2212 const struct child_device_config *child = 2213 i915->vbt.ddi_port_info[port].child; 2214 2215 return HAS_LSPCON(i915) && child && child->lspcon; 2216 } 2217 2218 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, 2219 enum port port) 2220 { 2221 const struct ddi_vbt_port_info *info = 2222 &dev_priv->vbt.ddi_port_info[port]; 2223 enum aux_ch aux_ch; 2224 2225 if (!info->alternate_aux_channel) { 2226 aux_ch = (enum aux_ch)port; 2227 2228 DRM_DEBUG_KMS("using AUX %c for port %c (platform default)\n", 2229 aux_ch_name(aux_ch), port_name(port)); 2230 return aux_ch; 2231 } 2232 2233 switch (info->alternate_aux_channel) { 2234 case DP_AUX_A: 2235 aux_ch = AUX_CH_A; 2236 break; 2237 case DP_AUX_B: 2238 aux_ch = AUX_CH_B; 2239 break; 2240 case DP_AUX_C: 2241 aux_ch = AUX_CH_C; 2242 break; 2243 case DP_AUX_D: 2244 aux_ch = AUX_CH_D; 2245 break; 2246 case DP_AUX_E: 2247 aux_ch = AUX_CH_E; 2248 break; 2249 case DP_AUX_F: 2250 aux_ch = AUX_CH_F; 2251 break; 2252 default: 2253 MISSING_CASE(info->alternate_aux_channel); 2254 aux_ch = AUX_CH_A; 2255 break; 2256 } 2257 2258 DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n", 2259 aux_ch_name(aux_ch), port_name(port)); 2260 2261 return aux_ch; 2262 } 2263