1 /*
2  * Copyright © 2006 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Authors:
24  *    Eric Anholt <eric@anholt.net>
25  *
26  */
27 
28 #include <drm/drm_dp_helper.h>
29 
30 #include "display/intel_display.h"
31 #include "display/intel_display_types.h"
32 #include "display/intel_gmbus.h"
33 
34 #include "i915_drv.h"
35 
36 #define _INTEL_BIOS_PRIVATE
37 #include "intel_vbt_defs.h"
38 
39 /**
40  * DOC: Video BIOS Table (VBT)
41  *
42  * The Video BIOS Table, or VBT, provides platform and board specific
43  * configuration information to the driver that is not discoverable or available
44  * through other means. The configuration is mostly related to display
45  * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
46  * the PCI ROM.
47  *
48  * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
49  * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
50  * contain the actual configuration information. The VBT Header, and thus the
51  * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
52  * BDB Header. The data blocks are concatenated after the BDB Header. The data
53  * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
54  * data. (Block 53, the MIPI Sequence Block is an exception.)
55  *
56  * The driver parses the VBT during load. The relevant information is stored in
57  * driver private data for ease of use, and the actual VBT is not read after
58  * that.
59  */
60 
61 /* Wrapper for VBT child device config */
62 struct intel_bios_encoder_data {
63 	struct drm_i915_private *i915;
64 
65 	struct child_device_config child;
66 	struct dsc_compression_parameters_entry *dsc;
67 	struct list_head node;
68 };
69 
70 #define	SLAVE_ADDR1	0x70
71 #define	SLAVE_ADDR2	0x72
72 
73 /* Get BDB block size given a pointer to Block ID. */
74 static u32 _get_blocksize(const u8 *block_base)
75 {
76 	/* The MIPI Sequence Block v3+ has a separate size field. */
77 	if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
78 		return *((const u32 *)(block_base + 4));
79 	else
80 		return *((const u16 *)(block_base + 1));
81 }
82 
83 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
84 static u32 get_blocksize(const void *block_data)
85 {
86 	return _get_blocksize(block_data - 3);
87 }
88 
89 static const void *
90 find_section(const void *_bdb, enum bdb_block_id section_id)
91 {
92 	const struct bdb_header *bdb = _bdb;
93 	const u8 *base = _bdb;
94 	int index = 0;
95 	u32 total, current_size;
96 	enum bdb_block_id current_id;
97 
98 	/* skip to first section */
99 	index += bdb->header_size;
100 	total = bdb->bdb_size;
101 
102 	/* walk the sections looking for section_id */
103 	while (index + 3 < total) {
104 		current_id = *(base + index);
105 		current_size = _get_blocksize(base + index);
106 		index += 3;
107 
108 		if (index + current_size > total)
109 			return NULL;
110 
111 		if (current_id == section_id)
112 			return base + index;
113 
114 		index += current_size;
115 	}
116 
117 	return NULL;
118 }
119 
120 static void
121 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
122 			const struct lvds_dvo_timing *dvo_timing)
123 {
124 	panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
125 		dvo_timing->hactive_lo;
126 	panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
127 		((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
128 	panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
129 		((dvo_timing->hsync_pulse_width_hi << 8) |
130 			dvo_timing->hsync_pulse_width_lo);
131 	panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
132 		((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
133 
134 	panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
135 		dvo_timing->vactive_lo;
136 	panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
137 		((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
138 	panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
139 		((dvo_timing->vsync_pulse_width_hi << 4) |
140 			dvo_timing->vsync_pulse_width_lo);
141 	panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
142 		((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
143 	panel_fixed_mode->clock = dvo_timing->clock * 10;
144 	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
145 
146 	if (dvo_timing->hsync_positive)
147 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
148 	else
149 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
150 
151 	if (dvo_timing->vsync_positive)
152 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
153 	else
154 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
155 
156 	panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
157 		dvo_timing->himage_lo;
158 	panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
159 		dvo_timing->vimage_lo;
160 
161 	/* Some VBTs have bogus h/vtotal values */
162 	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
163 		panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
164 	if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
165 		panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
166 
167 	drm_mode_set_name(panel_fixed_mode);
168 }
169 
170 static const struct lvds_dvo_timing *
171 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
172 		    const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
173 		    int index)
174 {
175 	/*
176 	 * the size of fp_timing varies on the different platform.
177 	 * So calculate the DVO timing relative offset in LVDS data
178 	 * entry to get the DVO timing entry
179 	 */
180 
181 	int lfp_data_size =
182 		lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
183 		lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
184 	int dvo_timing_offset =
185 		lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
186 		lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
187 	char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
188 
189 	return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
190 }
191 
192 /* get lvds_fp_timing entry
193  * this function may return NULL if the corresponding entry is invalid
194  */
195 static const struct lvds_fp_timing *
196 get_lvds_fp_timing(const struct bdb_header *bdb,
197 		   const struct bdb_lvds_lfp_data *data,
198 		   const struct bdb_lvds_lfp_data_ptrs *ptrs,
199 		   int index)
200 {
201 	size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
202 	u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
203 	size_t ofs;
204 
205 	if (index >= ARRAY_SIZE(ptrs->ptr))
206 		return NULL;
207 	ofs = ptrs->ptr[index].fp_timing_offset;
208 	if (ofs < data_ofs ||
209 	    ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
210 		return NULL;
211 	return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
212 }
213 
214 /* Parse general panel options */
215 static void
216 parse_panel_options(struct drm_i915_private *i915,
217 		    const struct bdb_header *bdb)
218 {
219 	const struct bdb_lvds_options *lvds_options;
220 	int panel_type;
221 	int drrs_mode;
222 	int ret;
223 
224 	lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
225 	if (!lvds_options)
226 		return;
227 
228 	i915->vbt.lvds_dither = lvds_options->pixel_dither;
229 
230 	ret = intel_opregion_get_panel_type(i915);
231 	if (ret >= 0) {
232 		drm_WARN_ON(&i915->drm, ret > 0xf);
233 		panel_type = ret;
234 		drm_dbg_kms(&i915->drm, "Panel type: %d (OpRegion)\n",
235 			    panel_type);
236 	} else {
237 		if (lvds_options->panel_type > 0xf) {
238 			drm_dbg_kms(&i915->drm,
239 				    "Invalid VBT panel type 0x%x\n",
240 				    lvds_options->panel_type);
241 			return;
242 		}
243 		panel_type = lvds_options->panel_type;
244 		drm_dbg_kms(&i915->drm, "Panel type: %d (VBT)\n",
245 			    panel_type);
246 	}
247 
248 	i915->vbt.panel_type = panel_type;
249 
250 	drrs_mode = (lvds_options->dps_panel_type_bits
251 				>> (panel_type * 2)) & MODE_MASK;
252 	/*
253 	 * VBT has static DRRS = 0 and seamless DRRS = 2.
254 	 * The below piece of code is required to adjust vbt.drrs_type
255 	 * to match the enum drrs_support_type.
256 	 */
257 	switch (drrs_mode) {
258 	case 0:
259 		i915->vbt.drrs_type = STATIC_DRRS_SUPPORT;
260 		drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
261 		break;
262 	case 2:
263 		i915->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
264 		drm_dbg_kms(&i915->drm,
265 			    "DRRS supported mode is seamless\n");
266 		break;
267 	default:
268 		i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
269 		drm_dbg_kms(&i915->drm,
270 			    "DRRS not supported (VBT input)\n");
271 		break;
272 	}
273 }
274 
275 /* Try to find integrated panel timing data */
276 static void
277 parse_lfp_panel_dtd(struct drm_i915_private *i915,
278 		    const struct bdb_header *bdb)
279 {
280 	const struct bdb_lvds_lfp_data *lvds_lfp_data;
281 	const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
282 	const struct lvds_dvo_timing *panel_dvo_timing;
283 	const struct lvds_fp_timing *fp_timing;
284 	struct drm_display_mode *panel_fixed_mode;
285 	int panel_type = i915->vbt.panel_type;
286 
287 	lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
288 	if (!lvds_lfp_data)
289 		return;
290 
291 	lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
292 	if (!lvds_lfp_data_ptrs)
293 		return;
294 
295 	panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
296 					       lvds_lfp_data_ptrs,
297 					       panel_type);
298 
299 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
300 	if (!panel_fixed_mode)
301 		return;
302 
303 	fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
304 
305 	i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
306 
307 	drm_dbg_kms(&i915->drm,
308 		    "Found panel mode in BIOS VBT legacy lfp table:\n");
309 	drm_mode_debug_printmodeline(panel_fixed_mode);
310 
311 	fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
312 				       lvds_lfp_data_ptrs,
313 				       panel_type);
314 	if (fp_timing) {
315 		/* check the resolution, just to be sure */
316 		if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
317 		    fp_timing->y_res == panel_fixed_mode->vdisplay) {
318 			i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
319 			drm_dbg_kms(&i915->drm,
320 				    "VBT initial LVDS value %x\n",
321 				    i915->vbt.bios_lvds_val);
322 		}
323 	}
324 }
325 
326 static void
327 parse_generic_dtd(struct drm_i915_private *i915,
328 		  const struct bdb_header *bdb)
329 {
330 	const struct bdb_generic_dtd *generic_dtd;
331 	const struct generic_dtd_entry *dtd;
332 	struct drm_display_mode *panel_fixed_mode;
333 	int num_dtd;
334 
335 	generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
336 	if (!generic_dtd)
337 		return;
338 
339 	if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
340 		drm_err(&i915->drm, "GDTD size %u is too small.\n",
341 			generic_dtd->gdtd_size);
342 		return;
343 	} else if (generic_dtd->gdtd_size !=
344 		   sizeof(struct generic_dtd_entry)) {
345 		drm_err(&i915->drm, "Unexpected GDTD size %u\n",
346 			generic_dtd->gdtd_size);
347 		/* DTD has unknown fields, but keep going */
348 	}
349 
350 	num_dtd = (get_blocksize(generic_dtd) -
351 		   sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
352 	if (i915->vbt.panel_type >= num_dtd) {
353 		drm_err(&i915->drm,
354 			"Panel type %d not found in table of %d DTD's\n",
355 			i915->vbt.panel_type, num_dtd);
356 		return;
357 	}
358 
359 	dtd = &generic_dtd->dtd[i915->vbt.panel_type];
360 
361 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
362 	if (!panel_fixed_mode)
363 		return;
364 
365 	panel_fixed_mode->hdisplay = dtd->hactive;
366 	panel_fixed_mode->hsync_start =
367 		panel_fixed_mode->hdisplay + dtd->hfront_porch;
368 	panel_fixed_mode->hsync_end =
369 		panel_fixed_mode->hsync_start + dtd->hsync;
370 	panel_fixed_mode->htotal =
371 		panel_fixed_mode->hdisplay + dtd->hblank;
372 
373 	panel_fixed_mode->vdisplay = dtd->vactive;
374 	panel_fixed_mode->vsync_start =
375 		panel_fixed_mode->vdisplay + dtd->vfront_porch;
376 	panel_fixed_mode->vsync_end =
377 		panel_fixed_mode->vsync_start + dtd->vsync;
378 	panel_fixed_mode->vtotal =
379 		panel_fixed_mode->vdisplay + dtd->vblank;
380 
381 	panel_fixed_mode->clock = dtd->pixel_clock;
382 	panel_fixed_mode->width_mm = dtd->width_mm;
383 	panel_fixed_mode->height_mm = dtd->height_mm;
384 
385 	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
386 	drm_mode_set_name(panel_fixed_mode);
387 
388 	if (dtd->hsync_positive_polarity)
389 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
390 	else
391 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
392 
393 	if (dtd->vsync_positive_polarity)
394 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
395 	else
396 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
397 
398 	drm_dbg_kms(&i915->drm,
399 		    "Found panel mode in BIOS VBT generic dtd table:\n");
400 	drm_mode_debug_printmodeline(panel_fixed_mode);
401 
402 	i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
403 }
404 
405 static void
406 parse_panel_dtd(struct drm_i915_private *i915,
407 		const struct bdb_header *bdb)
408 {
409 	/*
410 	 * Older VBTs provided provided DTD information for internal displays
411 	 * through the "LFP panel DTD" block (42).  As of VBT revision 229,
412 	 * that block is now deprecated and DTD information should be provided
413 	 * via a newer "generic DTD" block (58).  Just to be safe, we'll
414 	 * try the new generic DTD block first on VBT >= 229, but still fall
415 	 * back to trying the old LFP block if that fails.
416 	 */
417 	if (bdb->version >= 229)
418 		parse_generic_dtd(i915, bdb);
419 	if (!i915->vbt.lfp_lvds_vbt_mode)
420 		parse_lfp_panel_dtd(i915, bdb);
421 }
422 
423 static void
424 parse_lfp_backlight(struct drm_i915_private *i915,
425 		    const struct bdb_header *bdb)
426 {
427 	const struct bdb_lfp_backlight_data *backlight_data;
428 	const struct lfp_backlight_data_entry *entry;
429 	int panel_type = i915->vbt.panel_type;
430 	u16 level;
431 
432 	backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
433 	if (!backlight_data)
434 		return;
435 
436 	if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
437 		drm_dbg_kms(&i915->drm,
438 			    "Unsupported backlight data entry size %u\n",
439 			    backlight_data->entry_size);
440 		return;
441 	}
442 
443 	entry = &backlight_data->data[panel_type];
444 
445 	i915->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
446 	if (!i915->vbt.backlight.present) {
447 		drm_dbg_kms(&i915->drm,
448 			    "PWM backlight not present in VBT (type %u)\n",
449 			    entry->type);
450 		return;
451 	}
452 
453 	i915->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
454 	if (bdb->version >= 191 &&
455 	    get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
456 		const struct lfp_backlight_control_method *method;
457 
458 		method = &backlight_data->backlight_control[panel_type];
459 		i915->vbt.backlight.type = method->type;
460 		i915->vbt.backlight.controller = method->controller;
461 	}
462 
463 	i915->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
464 	i915->vbt.backlight.active_low_pwm = entry->active_low_pwm;
465 
466 	if (bdb->version >= 234) {
467 		u16 min_level;
468 		bool scale;
469 
470 		level = backlight_data->brightness_level[panel_type].level;
471 		min_level = backlight_data->brightness_min_level[panel_type].level;
472 
473 		if (bdb->version >= 236)
474 			scale = backlight_data->brightness_precision_bits[panel_type] == 16;
475 		else
476 			scale = level > 255;
477 
478 		if (scale)
479 			min_level = min_level / 255;
480 
481 		if (min_level > 255) {
482 			drm_warn(&i915->drm, "Brightness min level > 255\n");
483 			level = 255;
484 		}
485 		i915->vbt.backlight.min_brightness = min_level;
486 	} else {
487 		level = backlight_data->level[panel_type];
488 		i915->vbt.backlight.min_brightness = entry->min_brightness;
489 	}
490 
491 	drm_dbg_kms(&i915->drm,
492 		    "VBT backlight PWM modulation frequency %u Hz, "
493 		    "active %s, min brightness %u, level %u, controller %u\n",
494 		    i915->vbt.backlight.pwm_freq_hz,
495 		    i915->vbt.backlight.active_low_pwm ? "low" : "high",
496 		    i915->vbt.backlight.min_brightness,
497 		    level,
498 		    i915->vbt.backlight.controller);
499 }
500 
501 /* Try to find sdvo panel data */
502 static void
503 parse_sdvo_panel_data(struct drm_i915_private *i915,
504 		      const struct bdb_header *bdb)
505 {
506 	const struct bdb_sdvo_panel_dtds *dtds;
507 	struct drm_display_mode *panel_fixed_mode;
508 	int index;
509 
510 	index = i915->params.vbt_sdvo_panel_type;
511 	if (index == -2) {
512 		drm_dbg_kms(&i915->drm,
513 			    "Ignore SDVO panel mode from BIOS VBT tables.\n");
514 		return;
515 	}
516 
517 	if (index == -1) {
518 		const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
519 
520 		sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
521 		if (!sdvo_lvds_options)
522 			return;
523 
524 		index = sdvo_lvds_options->panel_type;
525 	}
526 
527 	dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
528 	if (!dtds)
529 		return;
530 
531 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
532 	if (!panel_fixed_mode)
533 		return;
534 
535 	fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
536 
537 	i915->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
538 
539 	drm_dbg_kms(&i915->drm,
540 		    "Found SDVO panel mode in BIOS VBT tables:\n");
541 	drm_mode_debug_printmodeline(panel_fixed_mode);
542 }
543 
544 static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
545 				    bool alternate)
546 {
547 	switch (DISPLAY_VER(i915)) {
548 	case 2:
549 		return alternate ? 66667 : 48000;
550 	case 3:
551 	case 4:
552 		return alternate ? 100000 : 96000;
553 	default:
554 		return alternate ? 100000 : 120000;
555 	}
556 }
557 
558 static void
559 parse_general_features(struct drm_i915_private *i915,
560 		       const struct bdb_header *bdb)
561 {
562 	const struct bdb_general_features *general;
563 
564 	general = find_section(bdb, BDB_GENERAL_FEATURES);
565 	if (!general)
566 		return;
567 
568 	i915->vbt.int_tv_support = general->int_tv_support;
569 	/* int_crt_support can't be trusted on earlier platforms */
570 	if (bdb->version >= 155 &&
571 	    (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
572 		i915->vbt.int_crt_support = general->int_crt_support;
573 	i915->vbt.lvds_use_ssc = general->enable_ssc;
574 	i915->vbt.lvds_ssc_freq =
575 		intel_bios_ssc_frequency(i915, general->ssc_freq);
576 	i915->vbt.display_clock_mode = general->display_clock_mode;
577 	i915->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
578 	if (bdb->version >= 181) {
579 		i915->vbt.orientation = general->rotate_180 ?
580 			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
581 			DRM_MODE_PANEL_ORIENTATION_NORMAL;
582 	} else {
583 		i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
584 	}
585 	drm_dbg_kms(&i915->drm,
586 		    "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
587 		    i915->vbt.int_tv_support,
588 		    i915->vbt.int_crt_support,
589 		    i915->vbt.lvds_use_ssc,
590 		    i915->vbt.lvds_ssc_freq,
591 		    i915->vbt.display_clock_mode,
592 		    i915->vbt.fdi_rx_polarity_inverted);
593 }
594 
595 static const struct child_device_config *
596 child_device_ptr(const struct bdb_general_definitions *defs, int i)
597 {
598 	return (const void *) &defs->devices[i * defs->child_dev_size];
599 }
600 
601 static void
602 parse_sdvo_device_mapping(struct drm_i915_private *i915)
603 {
604 	struct sdvo_device_mapping *mapping;
605 	const struct intel_bios_encoder_data *devdata;
606 	const struct child_device_config *child;
607 	int count = 0;
608 
609 	/*
610 	 * Only parse SDVO mappings on gens that could have SDVO. This isn't
611 	 * accurate and doesn't have to be, as long as it's not too strict.
612 	 */
613 	if (!IS_DISPLAY_VER(i915, 3, 7)) {
614 		drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
615 		return;
616 	}
617 
618 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
619 		child = &devdata->child;
620 
621 		if (child->slave_addr != SLAVE_ADDR1 &&
622 		    child->slave_addr != SLAVE_ADDR2) {
623 			/*
624 			 * If the slave address is neither 0x70 nor 0x72,
625 			 * it is not a SDVO device. Skip it.
626 			 */
627 			continue;
628 		}
629 		if (child->dvo_port != DEVICE_PORT_DVOB &&
630 		    child->dvo_port != DEVICE_PORT_DVOC) {
631 			/* skip the incorrect SDVO port */
632 			drm_dbg_kms(&i915->drm,
633 				    "Incorrect SDVO port. Skip it\n");
634 			continue;
635 		}
636 		drm_dbg_kms(&i915->drm,
637 			    "the SDVO device with slave addr %2x is found on"
638 			    " %s port\n",
639 			    child->slave_addr,
640 			    (child->dvo_port == DEVICE_PORT_DVOB) ?
641 			    "SDVOB" : "SDVOC");
642 		mapping = &i915->vbt.sdvo_mappings[child->dvo_port - 1];
643 		if (!mapping->initialized) {
644 			mapping->dvo_port = child->dvo_port;
645 			mapping->slave_addr = child->slave_addr;
646 			mapping->dvo_wiring = child->dvo_wiring;
647 			mapping->ddc_pin = child->ddc_pin;
648 			mapping->i2c_pin = child->i2c_pin;
649 			mapping->initialized = 1;
650 			drm_dbg_kms(&i915->drm,
651 				    "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
652 				    mapping->dvo_port, mapping->slave_addr,
653 				    mapping->dvo_wiring, mapping->ddc_pin,
654 				    mapping->i2c_pin);
655 		} else {
656 			drm_dbg_kms(&i915->drm,
657 				    "Maybe one SDVO port is shared by "
658 				    "two SDVO device.\n");
659 		}
660 		if (child->slave2_addr) {
661 			/* Maybe this is a SDVO device with multiple inputs */
662 			/* And the mapping info is not added */
663 			drm_dbg_kms(&i915->drm,
664 				    "there exists the slave2_addr. Maybe this"
665 				    " is a SDVO device with multiple inputs.\n");
666 		}
667 		count++;
668 	}
669 
670 	if (!count) {
671 		/* No SDVO device info is found */
672 		drm_dbg_kms(&i915->drm,
673 			    "No SDVO device info is found in VBT\n");
674 	}
675 }
676 
677 static void
678 parse_driver_features(struct drm_i915_private *i915,
679 		      const struct bdb_header *bdb)
680 {
681 	const struct bdb_driver_features *driver;
682 
683 	driver = find_section(bdb, BDB_DRIVER_FEATURES);
684 	if (!driver)
685 		return;
686 
687 	if (DISPLAY_VER(i915) >= 5) {
688 		/*
689 		 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
690 		 * to mean "eDP". The VBT spec doesn't agree with that
691 		 * interpretation, but real world VBTs seem to.
692 		 */
693 		if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
694 			i915->vbt.int_lvds_support = 0;
695 	} else {
696 		/*
697 		 * FIXME it's not clear which BDB version has the LVDS config
698 		 * bits defined. Revision history in the VBT spec says:
699 		 * "0.92 | Add two definitions for VBT value of LVDS Active
700 		 *  Config (00b and 11b values defined) | 06/13/2005"
701 		 * but does not the specify the BDB version.
702 		 *
703 		 * So far version 134 (on i945gm) is the oldest VBT observed
704 		 * in the wild with the bits correctly populated. Version
705 		 * 108 (on i85x) does not have the bits correctly populated.
706 		 */
707 		if (bdb->version >= 134 &&
708 		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
709 		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
710 			i915->vbt.int_lvds_support = 0;
711 	}
712 
713 	if (bdb->version < 228) {
714 		drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
715 			    driver->drrs_enabled);
716 		/*
717 		 * If DRRS is not supported, drrs_type has to be set to 0.
718 		 * This is because, VBT is configured in such a way that
719 		 * static DRRS is 0 and DRRS not supported is represented by
720 		 * driver->drrs_enabled=false
721 		 */
722 		if (!driver->drrs_enabled)
723 			i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
724 
725 		i915->vbt.psr.enable = driver->psr_enabled;
726 	}
727 }
728 
729 static void
730 parse_power_conservation_features(struct drm_i915_private *i915,
731 				  const struct bdb_header *bdb)
732 {
733 	const struct bdb_lfp_power *power;
734 	u8 panel_type = i915->vbt.panel_type;
735 
736 	if (bdb->version < 228)
737 		return;
738 
739 	power = find_section(bdb, BDB_LFP_POWER);
740 	if (!power)
741 		return;
742 
743 	i915->vbt.psr.enable = power->psr & BIT(panel_type);
744 
745 	/*
746 	 * If DRRS is not supported, drrs_type has to be set to 0.
747 	 * This is because, VBT is configured in such a way that
748 	 * static DRRS is 0 and DRRS not supported is represented by
749 	 * power->drrs & BIT(panel_type)=false
750 	 */
751 	if (!(power->drrs & BIT(panel_type)))
752 		i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
753 
754 	if (bdb->version >= 232)
755 		i915->vbt.edp.hobl = power->hobl & BIT(panel_type);
756 }
757 
758 static void
759 parse_edp(struct drm_i915_private *i915, const struct bdb_header *bdb)
760 {
761 	const struct bdb_edp *edp;
762 	const struct edp_power_seq *edp_pps;
763 	const struct edp_fast_link_params *edp_link_params;
764 	int panel_type = i915->vbt.panel_type;
765 
766 	edp = find_section(bdb, BDB_EDP);
767 	if (!edp)
768 		return;
769 
770 	switch ((edp->color_depth >> (panel_type * 2)) & 3) {
771 	case EDP_18BPP:
772 		i915->vbt.edp.bpp = 18;
773 		break;
774 	case EDP_24BPP:
775 		i915->vbt.edp.bpp = 24;
776 		break;
777 	case EDP_30BPP:
778 		i915->vbt.edp.bpp = 30;
779 		break;
780 	}
781 
782 	/* Get the eDP sequencing and link info */
783 	edp_pps = &edp->power_seqs[panel_type];
784 	edp_link_params = &edp->fast_link_params[panel_type];
785 
786 	i915->vbt.edp.pps = *edp_pps;
787 
788 	switch (edp_link_params->rate) {
789 	case EDP_RATE_1_62:
790 		i915->vbt.edp.rate = DP_LINK_BW_1_62;
791 		break;
792 	case EDP_RATE_2_7:
793 		i915->vbt.edp.rate = DP_LINK_BW_2_7;
794 		break;
795 	default:
796 		drm_dbg_kms(&i915->drm,
797 			    "VBT has unknown eDP link rate value %u\n",
798 			     edp_link_params->rate);
799 		break;
800 	}
801 
802 	switch (edp_link_params->lanes) {
803 	case EDP_LANE_1:
804 		i915->vbt.edp.lanes = 1;
805 		break;
806 	case EDP_LANE_2:
807 		i915->vbt.edp.lanes = 2;
808 		break;
809 	case EDP_LANE_4:
810 		i915->vbt.edp.lanes = 4;
811 		break;
812 	default:
813 		drm_dbg_kms(&i915->drm,
814 			    "VBT has unknown eDP lane count value %u\n",
815 			    edp_link_params->lanes);
816 		break;
817 	}
818 
819 	switch (edp_link_params->preemphasis) {
820 	case EDP_PREEMPHASIS_NONE:
821 		i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
822 		break;
823 	case EDP_PREEMPHASIS_3_5dB:
824 		i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
825 		break;
826 	case EDP_PREEMPHASIS_6dB:
827 		i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
828 		break;
829 	case EDP_PREEMPHASIS_9_5dB:
830 		i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
831 		break;
832 	default:
833 		drm_dbg_kms(&i915->drm,
834 			    "VBT has unknown eDP pre-emphasis value %u\n",
835 			    edp_link_params->preemphasis);
836 		break;
837 	}
838 
839 	switch (edp_link_params->vswing) {
840 	case EDP_VSWING_0_4V:
841 		i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
842 		break;
843 	case EDP_VSWING_0_6V:
844 		i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
845 		break;
846 	case EDP_VSWING_0_8V:
847 		i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
848 		break;
849 	case EDP_VSWING_1_2V:
850 		i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
851 		break;
852 	default:
853 		drm_dbg_kms(&i915->drm,
854 			    "VBT has unknown eDP voltage swing value %u\n",
855 			    edp_link_params->vswing);
856 		break;
857 	}
858 
859 	if (bdb->version >= 173) {
860 		u8 vswing;
861 
862 		/* Don't read from VBT if module parameter has valid value*/
863 		if (i915->params.edp_vswing) {
864 			i915->vbt.edp.low_vswing =
865 				i915->params.edp_vswing == 1;
866 		} else {
867 			vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
868 			i915->vbt.edp.low_vswing = vswing == 0;
869 		}
870 	}
871 }
872 
873 static void
874 parse_psr(struct drm_i915_private *i915, const struct bdb_header *bdb)
875 {
876 	const struct bdb_psr *psr;
877 	const struct psr_table *psr_table;
878 	int panel_type = i915->vbt.panel_type;
879 
880 	psr = find_section(bdb, BDB_PSR);
881 	if (!psr) {
882 		drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
883 		return;
884 	}
885 
886 	psr_table = &psr->psr_table[panel_type];
887 
888 	i915->vbt.psr.full_link = psr_table->full_link;
889 	i915->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
890 
891 	/* Allowed VBT values goes from 0 to 15 */
892 	i915->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
893 		psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
894 
895 	switch (psr_table->lines_to_wait) {
896 	case 0:
897 		i915->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
898 		break;
899 	case 1:
900 		i915->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
901 		break;
902 	case 2:
903 		i915->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
904 		break;
905 	case 3:
906 		i915->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
907 		break;
908 	default:
909 		drm_dbg_kms(&i915->drm,
910 			    "VBT has unknown PSR lines to wait %u\n",
911 			    psr_table->lines_to_wait);
912 		break;
913 	}
914 
915 	/*
916 	 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
917 	 * Old decimal value is wake up time in multiples of 100 us.
918 	 */
919 	if (bdb->version >= 205 &&
920 	    (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
921 		switch (psr_table->tp1_wakeup_time) {
922 		case 0:
923 			i915->vbt.psr.tp1_wakeup_time_us = 500;
924 			break;
925 		case 1:
926 			i915->vbt.psr.tp1_wakeup_time_us = 100;
927 			break;
928 		case 3:
929 			i915->vbt.psr.tp1_wakeup_time_us = 0;
930 			break;
931 		default:
932 			drm_dbg_kms(&i915->drm,
933 				    "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
934 				    psr_table->tp1_wakeup_time);
935 			fallthrough;
936 		case 2:
937 			i915->vbt.psr.tp1_wakeup_time_us = 2500;
938 			break;
939 		}
940 
941 		switch (psr_table->tp2_tp3_wakeup_time) {
942 		case 0:
943 			i915->vbt.psr.tp2_tp3_wakeup_time_us = 500;
944 			break;
945 		case 1:
946 			i915->vbt.psr.tp2_tp3_wakeup_time_us = 100;
947 			break;
948 		case 3:
949 			i915->vbt.psr.tp2_tp3_wakeup_time_us = 0;
950 			break;
951 		default:
952 			drm_dbg_kms(&i915->drm,
953 				    "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
954 				    psr_table->tp2_tp3_wakeup_time);
955 			fallthrough;
956 		case 2:
957 			i915->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
958 		break;
959 		}
960 	} else {
961 		i915->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
962 		i915->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
963 	}
964 
965 	if (bdb->version >= 226) {
966 		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
967 
968 		wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
969 		switch (wakeup_time) {
970 		case 0:
971 			wakeup_time = 500;
972 			break;
973 		case 1:
974 			wakeup_time = 100;
975 			break;
976 		case 3:
977 			wakeup_time = 50;
978 			break;
979 		default:
980 		case 2:
981 			wakeup_time = 2500;
982 			break;
983 		}
984 		i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
985 	} else {
986 		/* Reusing PSR1 wakeup time for PSR2 in older VBTs */
987 		i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = i915->vbt.psr.tp2_tp3_wakeup_time_us;
988 	}
989 }
990 
991 static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
992 				      u16 version, enum port port)
993 {
994 	if (!i915->vbt.dsi.config->dual_link || version < 197) {
995 		i915->vbt.dsi.bl_ports = BIT(port);
996 		if (i915->vbt.dsi.config->cabc_supported)
997 			i915->vbt.dsi.cabc_ports = BIT(port);
998 
999 		return;
1000 	}
1001 
1002 	switch (i915->vbt.dsi.config->dl_dcs_backlight_ports) {
1003 	case DL_DCS_PORT_A:
1004 		i915->vbt.dsi.bl_ports = BIT(PORT_A);
1005 		break;
1006 	case DL_DCS_PORT_C:
1007 		i915->vbt.dsi.bl_ports = BIT(PORT_C);
1008 		break;
1009 	default:
1010 	case DL_DCS_PORT_A_AND_C:
1011 		i915->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
1012 		break;
1013 	}
1014 
1015 	if (!i915->vbt.dsi.config->cabc_supported)
1016 		return;
1017 
1018 	switch (i915->vbt.dsi.config->dl_dcs_cabc_ports) {
1019 	case DL_DCS_PORT_A:
1020 		i915->vbt.dsi.cabc_ports = BIT(PORT_A);
1021 		break;
1022 	case DL_DCS_PORT_C:
1023 		i915->vbt.dsi.cabc_ports = BIT(PORT_C);
1024 		break;
1025 	default:
1026 	case DL_DCS_PORT_A_AND_C:
1027 		i915->vbt.dsi.cabc_ports =
1028 					BIT(PORT_A) | BIT(PORT_C);
1029 		break;
1030 	}
1031 }
1032 
1033 static void
1034 parse_mipi_config(struct drm_i915_private *i915,
1035 		  const struct bdb_header *bdb)
1036 {
1037 	const struct bdb_mipi_config *start;
1038 	const struct mipi_config *config;
1039 	const struct mipi_pps_data *pps;
1040 	int panel_type = i915->vbt.panel_type;
1041 	enum port port;
1042 
1043 	/* parse MIPI blocks only if LFP type is MIPI */
1044 	if (!intel_bios_is_dsi_present(i915, &port))
1045 		return;
1046 
1047 	/* Initialize this to undefined indicating no generic MIPI support */
1048 	i915->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1049 
1050 	/* Block #40 is already parsed and panel_fixed_mode is
1051 	 * stored in i915->lfp_lvds_vbt_mode
1052 	 * resuse this when needed
1053 	 */
1054 
1055 	/* Parse #52 for panel index used from panel_type already
1056 	 * parsed
1057 	 */
1058 	start = find_section(bdb, BDB_MIPI_CONFIG);
1059 	if (!start) {
1060 		drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1061 		return;
1062 	}
1063 
1064 	drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1065 		panel_type);
1066 
1067 	/*
1068 	 * get hold of the correct configuration block and pps data as per
1069 	 * the panel_type as index
1070 	 */
1071 	config = &start->config[panel_type];
1072 	pps = &start->pps[panel_type];
1073 
1074 	/* store as of now full data. Trim when we realise all is not needed */
1075 	i915->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1076 	if (!i915->vbt.dsi.config)
1077 		return;
1078 
1079 	i915->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1080 	if (!i915->vbt.dsi.pps) {
1081 		kfree(i915->vbt.dsi.config);
1082 		return;
1083 	}
1084 
1085 	parse_dsi_backlight_ports(i915, bdb->version, port);
1086 
1087 	/* FIXME is the 90 vs. 270 correct? */
1088 	switch (config->rotation) {
1089 	case ENABLE_ROTATION_0:
1090 		/*
1091 		 * Most (all?) VBTs claim 0 degrees despite having
1092 		 * an upside down panel, thus we do not trust this.
1093 		 */
1094 		i915->vbt.dsi.orientation =
1095 			DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1096 		break;
1097 	case ENABLE_ROTATION_90:
1098 		i915->vbt.dsi.orientation =
1099 			DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1100 		break;
1101 	case ENABLE_ROTATION_180:
1102 		i915->vbt.dsi.orientation =
1103 			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1104 		break;
1105 	case ENABLE_ROTATION_270:
1106 		i915->vbt.dsi.orientation =
1107 			DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1108 		break;
1109 	}
1110 
1111 	/* We have mandatory mipi config blocks. Initialize as generic panel */
1112 	i915->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1113 }
1114 
1115 /* Find the sequence block and size for the given panel. */
1116 static const u8 *
1117 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1118 			  u16 panel_id, u32 *seq_size)
1119 {
1120 	u32 total = get_blocksize(sequence);
1121 	const u8 *data = &sequence->data[0];
1122 	u8 current_id;
1123 	u32 current_size;
1124 	int header_size = sequence->version >= 3 ? 5 : 3;
1125 	int index = 0;
1126 	int i;
1127 
1128 	/* skip new block size */
1129 	if (sequence->version >= 3)
1130 		data += 4;
1131 
1132 	for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1133 		if (index + header_size > total) {
1134 			DRM_ERROR("Invalid sequence block (header)\n");
1135 			return NULL;
1136 		}
1137 
1138 		current_id = *(data + index);
1139 		if (sequence->version >= 3)
1140 			current_size = *((const u32 *)(data + index + 1));
1141 		else
1142 			current_size = *((const u16 *)(data + index + 1));
1143 
1144 		index += header_size;
1145 
1146 		if (index + current_size > total) {
1147 			DRM_ERROR("Invalid sequence block\n");
1148 			return NULL;
1149 		}
1150 
1151 		if (current_id == panel_id) {
1152 			*seq_size = current_size;
1153 			return data + index;
1154 		}
1155 
1156 		index += current_size;
1157 	}
1158 
1159 	DRM_ERROR("Sequence block detected but no valid configuration\n");
1160 
1161 	return NULL;
1162 }
1163 
1164 static int goto_next_sequence(const u8 *data, int index, int total)
1165 {
1166 	u16 len;
1167 
1168 	/* Skip Sequence Byte. */
1169 	for (index = index + 1; index < total; index += len) {
1170 		u8 operation_byte = *(data + index);
1171 		index++;
1172 
1173 		switch (operation_byte) {
1174 		case MIPI_SEQ_ELEM_END:
1175 			return index;
1176 		case MIPI_SEQ_ELEM_SEND_PKT:
1177 			if (index + 4 > total)
1178 				return 0;
1179 
1180 			len = *((const u16 *)(data + index + 2)) + 4;
1181 			break;
1182 		case MIPI_SEQ_ELEM_DELAY:
1183 			len = 4;
1184 			break;
1185 		case MIPI_SEQ_ELEM_GPIO:
1186 			len = 2;
1187 			break;
1188 		case MIPI_SEQ_ELEM_I2C:
1189 			if (index + 7 > total)
1190 				return 0;
1191 			len = *(data + index + 6) + 7;
1192 			break;
1193 		default:
1194 			DRM_ERROR("Unknown operation byte\n");
1195 			return 0;
1196 		}
1197 	}
1198 
1199 	return 0;
1200 }
1201 
1202 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1203 {
1204 	int seq_end;
1205 	u16 len;
1206 	u32 size_of_sequence;
1207 
1208 	/*
1209 	 * Could skip sequence based on Size of Sequence alone, but also do some
1210 	 * checking on the structure.
1211 	 */
1212 	if (total < 5) {
1213 		DRM_ERROR("Too small sequence size\n");
1214 		return 0;
1215 	}
1216 
1217 	/* Skip Sequence Byte. */
1218 	index++;
1219 
1220 	/*
1221 	 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1222 	 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1223 	 * byte.
1224 	 */
1225 	size_of_sequence = *((const u32 *)(data + index));
1226 	index += 4;
1227 
1228 	seq_end = index + size_of_sequence;
1229 	if (seq_end > total) {
1230 		DRM_ERROR("Invalid sequence size\n");
1231 		return 0;
1232 	}
1233 
1234 	for (; index < total; index += len) {
1235 		u8 operation_byte = *(data + index);
1236 		index++;
1237 
1238 		if (operation_byte == MIPI_SEQ_ELEM_END) {
1239 			if (index != seq_end) {
1240 				DRM_ERROR("Invalid element structure\n");
1241 				return 0;
1242 			}
1243 			return index;
1244 		}
1245 
1246 		len = *(data + index);
1247 		index++;
1248 
1249 		/*
1250 		 * FIXME: Would be nice to check elements like for v1/v2 in
1251 		 * goto_next_sequence() above.
1252 		 */
1253 		switch (operation_byte) {
1254 		case MIPI_SEQ_ELEM_SEND_PKT:
1255 		case MIPI_SEQ_ELEM_DELAY:
1256 		case MIPI_SEQ_ELEM_GPIO:
1257 		case MIPI_SEQ_ELEM_I2C:
1258 		case MIPI_SEQ_ELEM_SPI:
1259 		case MIPI_SEQ_ELEM_PMIC:
1260 			break;
1261 		default:
1262 			DRM_ERROR("Unknown operation byte %u\n",
1263 				  operation_byte);
1264 			break;
1265 		}
1266 	}
1267 
1268 	return 0;
1269 }
1270 
1271 /*
1272  * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1273  * skip all delay + gpio operands and stop at the first DSI packet op.
1274  */
1275 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915)
1276 {
1277 	const u8 *data = i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1278 	int index, len;
1279 
1280 	if (drm_WARN_ON(&i915->drm,
1281 			!data || i915->vbt.dsi.seq_version != 1))
1282 		return 0;
1283 
1284 	/* index = 1 to skip sequence byte */
1285 	for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1286 		switch (data[index]) {
1287 		case MIPI_SEQ_ELEM_SEND_PKT:
1288 			return index == 1 ? 0 : index;
1289 		case MIPI_SEQ_ELEM_DELAY:
1290 			len = 5; /* 1 byte for operand + uint32 */
1291 			break;
1292 		case MIPI_SEQ_ELEM_GPIO:
1293 			len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1294 			break;
1295 		default:
1296 			return 0;
1297 		}
1298 	}
1299 
1300 	return 0;
1301 }
1302 
1303 /*
1304  * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1305  * The deassert must be done before calling intel_dsi_device_ready, so for
1306  * these devices we split the init OTP sequence into a deassert sequence and
1307  * the actual init OTP part.
1308  */
1309 static void fixup_mipi_sequences(struct drm_i915_private *i915)
1310 {
1311 	u8 *init_otp;
1312 	int len;
1313 
1314 	/* Limit this to VLV for now. */
1315 	if (!IS_VALLEYVIEW(i915))
1316 		return;
1317 
1318 	/* Limit this to v1 vid-mode sequences */
1319 	if (i915->vbt.dsi.config->is_cmd_mode ||
1320 	    i915->vbt.dsi.seq_version != 1)
1321 		return;
1322 
1323 	/* Only do this if there are otp and assert seqs and no deassert seq */
1324 	if (!i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1325 	    !i915->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1326 	    i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1327 		return;
1328 
1329 	/* The deassert-sequence ends at the first DSI packet */
1330 	len = get_init_otp_deassert_fragment_len(i915);
1331 	if (!len)
1332 		return;
1333 
1334 	drm_dbg_kms(&i915->drm,
1335 		    "Using init OTP fragment to deassert reset\n");
1336 
1337 	/* Copy the fragment, update seq byte and terminate it */
1338 	init_otp = (u8 *)i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1339 	i915->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1340 	if (!i915->vbt.dsi.deassert_seq)
1341 		return;
1342 	i915->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1343 	i915->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1344 	/* Use the copy for deassert */
1345 	i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1346 		i915->vbt.dsi.deassert_seq;
1347 	/* Replace the last byte of the fragment with init OTP seq byte */
1348 	init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1349 	/* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1350 	i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1351 }
1352 
1353 static void
1354 parse_mipi_sequence(struct drm_i915_private *i915,
1355 		    const struct bdb_header *bdb)
1356 {
1357 	int panel_type = i915->vbt.panel_type;
1358 	const struct bdb_mipi_sequence *sequence;
1359 	const u8 *seq_data;
1360 	u32 seq_size;
1361 	u8 *data;
1362 	int index = 0;
1363 
1364 	/* Only our generic panel driver uses the sequence block. */
1365 	if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1366 		return;
1367 
1368 	sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1369 	if (!sequence) {
1370 		drm_dbg_kms(&i915->drm,
1371 			    "No MIPI Sequence found, parsing complete\n");
1372 		return;
1373 	}
1374 
1375 	/* Fail gracefully for forward incompatible sequence block. */
1376 	if (sequence->version >= 4) {
1377 		drm_err(&i915->drm,
1378 			"Unable to parse MIPI Sequence Block v%u\n",
1379 			sequence->version);
1380 		return;
1381 	}
1382 
1383 	drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
1384 		sequence->version);
1385 
1386 	seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1387 	if (!seq_data)
1388 		return;
1389 
1390 	data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1391 	if (!data)
1392 		return;
1393 
1394 	/* Parse the sequences, store pointers to each sequence. */
1395 	for (;;) {
1396 		u8 seq_id = *(data + index);
1397 		if (seq_id == MIPI_SEQ_END)
1398 			break;
1399 
1400 		if (seq_id >= MIPI_SEQ_MAX) {
1401 			drm_err(&i915->drm, "Unknown sequence %u\n",
1402 				seq_id);
1403 			goto err;
1404 		}
1405 
1406 		/* Log about presence of sequences we won't run. */
1407 		if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1408 			drm_dbg_kms(&i915->drm,
1409 				    "Unsupported sequence %u\n", seq_id);
1410 
1411 		i915->vbt.dsi.sequence[seq_id] = data + index;
1412 
1413 		if (sequence->version >= 3)
1414 			index = goto_next_sequence_v3(data, index, seq_size);
1415 		else
1416 			index = goto_next_sequence(data, index, seq_size);
1417 		if (!index) {
1418 			drm_err(&i915->drm, "Invalid sequence %u\n",
1419 				seq_id);
1420 			goto err;
1421 		}
1422 	}
1423 
1424 	i915->vbt.dsi.data = data;
1425 	i915->vbt.dsi.size = seq_size;
1426 	i915->vbt.dsi.seq_version = sequence->version;
1427 
1428 	fixup_mipi_sequences(i915);
1429 
1430 	drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
1431 	return;
1432 
1433 err:
1434 	kfree(data);
1435 	memset(i915->vbt.dsi.sequence, 0, sizeof(i915->vbt.dsi.sequence));
1436 }
1437 
1438 static void
1439 parse_compression_parameters(struct drm_i915_private *i915,
1440 			     const struct bdb_header *bdb)
1441 {
1442 	const struct bdb_compression_parameters *params;
1443 	struct intel_bios_encoder_data *devdata;
1444 	const struct child_device_config *child;
1445 	u16 block_size;
1446 	int index;
1447 
1448 	if (bdb->version < 198)
1449 		return;
1450 
1451 	params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1452 	if (params) {
1453 		/* Sanity checks */
1454 		if (params->entry_size != sizeof(params->data[0])) {
1455 			drm_dbg_kms(&i915->drm,
1456 				    "VBT: unsupported compression param entry size\n");
1457 			return;
1458 		}
1459 
1460 		block_size = get_blocksize(params);
1461 		if (block_size < sizeof(*params)) {
1462 			drm_dbg_kms(&i915->drm,
1463 				    "VBT: expected 16 compression param entries\n");
1464 			return;
1465 		}
1466 	}
1467 
1468 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1469 		child = &devdata->child;
1470 
1471 		if (!child->compression_enable)
1472 			continue;
1473 
1474 		if (!params) {
1475 			drm_dbg_kms(&i915->drm,
1476 				    "VBT: compression params not available\n");
1477 			continue;
1478 		}
1479 
1480 		if (child->compression_method_cps) {
1481 			drm_dbg_kms(&i915->drm,
1482 				    "VBT: CPS compression not supported\n");
1483 			continue;
1484 		}
1485 
1486 		index = child->compression_structure_index;
1487 
1488 		devdata->dsc = kmemdup(&params->data[index],
1489 				       sizeof(*devdata->dsc), GFP_KERNEL);
1490 	}
1491 }
1492 
1493 static u8 translate_iboost(u8 val)
1494 {
1495 	static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1496 
1497 	if (val >= ARRAY_SIZE(mapping)) {
1498 		DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1499 		return 0;
1500 	}
1501 	return mapping[val];
1502 }
1503 
1504 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1505 {
1506 	const struct ddi_vbt_port_info *info;
1507 	enum port port;
1508 
1509 	if (!ddc_pin)
1510 		return PORT_NONE;
1511 
1512 	for_each_port(port) {
1513 		info = &i915->vbt.ddi_port_info[port];
1514 
1515 		if (info->devdata && ddc_pin == info->alternate_ddc_pin)
1516 			return port;
1517 	}
1518 
1519 	return PORT_NONE;
1520 }
1521 
1522 static void sanitize_ddc_pin(struct drm_i915_private *i915,
1523 			     enum port port)
1524 {
1525 	struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
1526 	struct child_device_config *child;
1527 	enum port p;
1528 
1529 	p = get_port_by_ddc_pin(i915, info->alternate_ddc_pin);
1530 	if (p == PORT_NONE)
1531 		return;
1532 
1533 	drm_dbg_kms(&i915->drm,
1534 		    "port %c trying to use the same DDC pin (0x%x) as port %c, "
1535 		    "disabling port %c DVI/HDMI support\n",
1536 		    port_name(port), info->alternate_ddc_pin,
1537 		    port_name(p), port_name(p));
1538 
1539 	/*
1540 	 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
1541 	 * couldn't exist on the shared port. Otherwise they share the same ddc
1542 	 * pin and system couldn't communicate with them separately.
1543 	 *
1544 	 * Give inverse child device order the priority, last one wins. Yes,
1545 	 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
1546 	 * port A and port E with the same AUX ch and we must pick port E :(
1547 	 */
1548 	info = &i915->vbt.ddi_port_info[p];
1549 	child = &info->devdata->child;
1550 
1551 	child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
1552 	child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
1553 
1554 	info->alternate_ddc_pin = 0;
1555 }
1556 
1557 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1558 {
1559 	const struct ddi_vbt_port_info *info;
1560 	enum port port;
1561 
1562 	if (!aux_ch)
1563 		return PORT_NONE;
1564 
1565 	for_each_port(port) {
1566 		info = &i915->vbt.ddi_port_info[port];
1567 
1568 		if (info->devdata && aux_ch == info->alternate_aux_channel)
1569 			return port;
1570 	}
1571 
1572 	return PORT_NONE;
1573 }
1574 
1575 static void sanitize_aux_ch(struct drm_i915_private *i915,
1576 			    enum port port)
1577 {
1578 	struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
1579 	struct child_device_config *child;
1580 	enum port p;
1581 
1582 	p = get_port_by_aux_ch(i915, info->alternate_aux_channel);
1583 	if (p == PORT_NONE)
1584 		return;
1585 
1586 	drm_dbg_kms(&i915->drm,
1587 		    "port %c trying to use the same AUX CH (0x%x) as port %c, "
1588 		    "disabling port %c DP support\n",
1589 		    port_name(port), info->alternate_aux_channel,
1590 		    port_name(p), port_name(p));
1591 
1592 	/*
1593 	 * If we have multiple ports supposedly sharing the aux channel, then DP
1594 	 * couldn't exist on the shared port. Otherwise they share the same aux
1595 	 * channel and system couldn't communicate with them separately.
1596 	 *
1597 	 * Give inverse child device order the priority, last one wins. Yes,
1598 	 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
1599 	 * port A and port E with the same AUX ch and we must pick port E :(
1600 	 */
1601 	info = &i915->vbt.ddi_port_info[p];
1602 	child = &info->devdata->child;
1603 
1604 	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1605 	info->alternate_aux_channel = 0;
1606 }
1607 
1608 static const u8 cnp_ddc_pin_map[] = {
1609 	[0] = 0, /* N/A */
1610 	[DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1611 	[DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1612 	[DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1613 	[DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1614 };
1615 
1616 static const u8 icp_ddc_pin_map[] = {
1617 	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1618 	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1619 	[TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1620 	[ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1621 	[ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1622 	[ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1623 	[ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1624 	[TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1625 	[TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1626 };
1627 
1628 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
1629 	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1630 	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1631 	[RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
1632 	[RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
1633 };
1634 
1635 static const u8 adls_ddc_pin_map[] = {
1636 	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1637 	[ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
1638 	[ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
1639 	[ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
1640 	[ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
1641 };
1642 
1643 static const u8 gen9bc_tgp_ddc_pin_map[] = {
1644 	[DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1645 	[DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
1646 	[DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
1647 };
1648 
1649 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
1650 {
1651 	const u8 *ddc_pin_map;
1652 	int n_entries;
1653 
1654 	if (IS_ALDERLAKE_S(i915)) {
1655 		ddc_pin_map = adls_ddc_pin_map;
1656 		n_entries = ARRAY_SIZE(adls_ddc_pin_map);
1657 	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
1658 		return vbt_pin;
1659 	} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
1660 		ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
1661 		n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
1662 	} else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
1663 		ddc_pin_map = gen9bc_tgp_ddc_pin_map;
1664 		n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
1665 	} else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
1666 		ddc_pin_map = icp_ddc_pin_map;
1667 		n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1668 	} else if (HAS_PCH_CNP(i915)) {
1669 		ddc_pin_map = cnp_ddc_pin_map;
1670 		n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1671 	} else {
1672 		/* Assuming direct map */
1673 		return vbt_pin;
1674 	}
1675 
1676 	if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1677 		return ddc_pin_map[vbt_pin];
1678 
1679 	drm_dbg_kms(&i915->drm,
1680 		    "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1681 		    vbt_pin);
1682 	return 0;
1683 }
1684 
1685 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
1686 				    const int port_mapping[][3], u8 dvo_port)
1687 {
1688 	enum port port;
1689 	int i;
1690 
1691 	for (port = PORT_A; port < n_ports; port++) {
1692 		for (i = 0; i < n_dvo; i++) {
1693 			if (port_mapping[port][i] == -1)
1694 				break;
1695 
1696 			if (dvo_port == port_mapping[port][i])
1697 				return port;
1698 		}
1699 	}
1700 
1701 	return PORT_NONE;
1702 }
1703 
1704 static enum port dvo_port_to_port(struct drm_i915_private *i915,
1705 				  u8 dvo_port)
1706 {
1707 	/*
1708 	 * Each DDI port can have more than one value on the "DVO Port" field,
1709 	 * so look for all the possible values for each port.
1710 	 */
1711 	static const int port_mapping[][3] = {
1712 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1713 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1714 		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1715 		[PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1716 		[PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
1717 		[PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1718 		[PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1719 		[PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1720 		[PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1721 	};
1722 	/*
1723 	 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
1724 	 * map to DDI A,B,TC1,TC2 respectively.
1725 	 */
1726 	static const int rkl_port_mapping[][3] = {
1727 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1728 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1729 		[PORT_C] = { -1 },
1730 		[PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1731 		[PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1732 	};
1733 	/*
1734 	 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
1735 	 * PORT_F and PORT_G, we need to map that to correct VBT sections.
1736 	 */
1737 	static const int adls_port_mapping[][3] = {
1738 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1739 		[PORT_B] = { -1 },
1740 		[PORT_C] = { -1 },
1741 		[PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1742 		[PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1743 		[PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1744 		[PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
1745 	};
1746 	static const int xelpd_port_mapping[][3] = {
1747 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1748 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1749 		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1750 		[PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1751 		[PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
1752 		[PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1753 		[PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1754 		[PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1755 		[PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1756 	};
1757 
1758 	if (DISPLAY_VER(i915) == 13)
1759 		return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
1760 					  ARRAY_SIZE(xelpd_port_mapping[0]),
1761 					  xelpd_port_mapping,
1762 					  dvo_port);
1763 	else if (IS_ALDERLAKE_S(i915))
1764 		return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
1765 					  ARRAY_SIZE(adls_port_mapping[0]),
1766 					  adls_port_mapping,
1767 					  dvo_port);
1768 	else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
1769 		return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
1770 					  ARRAY_SIZE(rkl_port_mapping[0]),
1771 					  rkl_port_mapping,
1772 					  dvo_port);
1773 	else
1774 		return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
1775 					  ARRAY_SIZE(port_mapping[0]),
1776 					  port_mapping,
1777 					  dvo_port);
1778 }
1779 
1780 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
1781 {
1782 	switch (vbt_max_link_rate) {
1783 	default:
1784 	case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
1785 		return 0;
1786 	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
1787 		return 2000000;
1788 	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
1789 		return 1350000;
1790 	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
1791 		return 1000000;
1792 	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
1793 		return 810000;
1794 	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
1795 		return 540000;
1796 	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
1797 		return 270000;
1798 	case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
1799 		return 162000;
1800 	}
1801 }
1802 
1803 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
1804 {
1805 	switch (vbt_max_link_rate) {
1806 	default:
1807 	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
1808 		return 810000;
1809 	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
1810 		return 540000;
1811 	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
1812 		return 270000;
1813 	case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
1814 		return 162000;
1815 	}
1816 }
1817 
1818 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
1819 				 enum port port)
1820 {
1821 	struct drm_i915_private *i915 = devdata->i915;
1822 	bool is_hdmi;
1823 
1824 	if (port != PORT_A || DISPLAY_VER(i915) >= 12)
1825 		return;
1826 
1827 	if (!(devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING))
1828 		return;
1829 
1830 	is_hdmi = !(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT);
1831 
1832 	drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
1833 		    is_hdmi ? "/HDMI" : "");
1834 
1835 	devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
1836 	devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
1837 }
1838 
1839 static bool
1840 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
1841 {
1842 	return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1843 }
1844 
1845 bool
1846 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
1847 {
1848 	return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1849 }
1850 
1851 bool
1852 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
1853 {
1854 	return intel_bios_encoder_supports_dvi(devdata) &&
1855 		(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1856 }
1857 
1858 bool
1859 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
1860 {
1861 	return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1862 }
1863 
1864 static bool
1865 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
1866 {
1867 	return intel_bios_encoder_supports_dp(devdata) &&
1868 		devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
1869 }
1870 
1871 static bool is_port_valid(struct drm_i915_private *i915, enum port port)
1872 {
1873 	/*
1874 	 * On some ICL/CNL SKUs port F is not present, but broken VBTs mark
1875 	 * the port as present. Only try to initialize port F for the
1876 	 * SKUs that may actually have it.
1877 	 */
1878 	if (port == PORT_F && (IS_ICELAKE(i915) || IS_CANNONLAKE(i915)))
1879 		return IS_ICL_WITH_PORT_F(i915) || IS_CNL_WITH_PORT_F(i915);
1880 
1881 	return true;
1882 }
1883 
1884 static void parse_ddi_port(struct drm_i915_private *i915,
1885 			   struct intel_bios_encoder_data *devdata)
1886 {
1887 	const struct child_device_config *child = &devdata->child;
1888 	struct ddi_vbt_port_info *info;
1889 	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
1890 	int dp_boost_level, hdmi_boost_level;
1891 	enum port port;
1892 
1893 	port = dvo_port_to_port(i915, child->dvo_port);
1894 	if (port == PORT_NONE)
1895 		return;
1896 
1897 	if (!is_port_valid(i915, port)) {
1898 		drm_dbg_kms(&i915->drm,
1899 			    "VBT reports port %c as supported, but that can't be true: skipping\n",
1900 			    port_name(port));
1901 		return;
1902 	}
1903 
1904 	info = &i915->vbt.ddi_port_info[port];
1905 
1906 	if (info->devdata) {
1907 		drm_dbg_kms(&i915->drm,
1908 			    "More than one child device for port %c in VBT, using the first.\n",
1909 			    port_name(port));
1910 		return;
1911 	}
1912 
1913 	sanitize_device_type(devdata, port);
1914 
1915 	is_dvi = intel_bios_encoder_supports_dvi(devdata);
1916 	is_dp = intel_bios_encoder_supports_dp(devdata);
1917 	is_crt = intel_bios_encoder_supports_crt(devdata);
1918 	is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
1919 	is_edp = intel_bios_encoder_supports_edp(devdata);
1920 
1921 	supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
1922 	supports_tbt = intel_bios_encoder_supports_tbt(devdata);
1923 
1924 	drm_dbg_kms(&i915->drm,
1925 		    "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1926 		    port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1927 		    HAS_LSPCON(i915) && child->lspcon,
1928 		    supports_typec_usb, supports_tbt,
1929 		    devdata->dsc != NULL);
1930 
1931 	if (is_dvi) {
1932 		u8 ddc_pin;
1933 
1934 		ddc_pin = map_ddc_pin(i915, child->ddc_pin);
1935 		if (intel_gmbus_is_valid_pin(i915, ddc_pin)) {
1936 			info->alternate_ddc_pin = ddc_pin;
1937 			sanitize_ddc_pin(i915, port);
1938 		} else {
1939 			drm_dbg_kms(&i915->drm,
1940 				    "Port %c has invalid DDC pin %d, "
1941 				    "sticking to defaults\n",
1942 				    port_name(port), ddc_pin);
1943 		}
1944 	}
1945 
1946 	if (is_dp) {
1947 		info->alternate_aux_channel = child->aux_channel;
1948 
1949 		sanitize_aux_ch(i915, port);
1950 	}
1951 
1952 	if (i915->vbt.version >= 158) {
1953 		/* The VBT HDMI level shift values match the table we have. */
1954 		u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1955 		drm_dbg_kms(&i915->drm,
1956 			    "Port %c VBT HDMI level shift: %d\n",
1957 			    port_name(port),
1958 			    hdmi_level_shift);
1959 		info->hdmi_level_shift = hdmi_level_shift;
1960 		info->hdmi_level_shift_set = true;
1961 	}
1962 
1963 	if (i915->vbt.version >= 204) {
1964 		int max_tmds_clock;
1965 
1966 		switch (child->hdmi_max_data_rate) {
1967 		default:
1968 			MISSING_CASE(child->hdmi_max_data_rate);
1969 			fallthrough;
1970 		case HDMI_MAX_DATA_RATE_PLATFORM:
1971 			max_tmds_clock = 0;
1972 			break;
1973 		case HDMI_MAX_DATA_RATE_297:
1974 			max_tmds_clock = 297000;
1975 			break;
1976 		case HDMI_MAX_DATA_RATE_165:
1977 			max_tmds_clock = 165000;
1978 			break;
1979 		}
1980 
1981 		if (max_tmds_clock)
1982 			drm_dbg_kms(&i915->drm,
1983 				    "Port %c VBT HDMI max TMDS clock: %d kHz\n",
1984 				    port_name(port), max_tmds_clock);
1985 		info->max_tmds_clock = max_tmds_clock;
1986 	}
1987 
1988 	/* I_boost config for SKL and above */
1989 	dp_boost_level = intel_bios_encoder_dp_boost_level(devdata);
1990 	if (dp_boost_level)
1991 		drm_dbg_kms(&i915->drm,
1992 			    "Port %c VBT (e)DP boost level: %d\n",
1993 			    port_name(port), dp_boost_level);
1994 
1995 	hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata);
1996 	if (hdmi_boost_level)
1997 		drm_dbg_kms(&i915->drm,
1998 			    "Port %c VBT HDMI boost level: %d\n",
1999 			    port_name(port), hdmi_boost_level);
2000 
2001 	/* DP max link rate for CNL+ */
2002 	if (i915->vbt.version >= 216) {
2003 		if (i915->vbt.version >= 230)
2004 			info->dp_max_link_rate = parse_bdb_230_dp_max_link_rate(child->dp_max_link_rate);
2005 		else
2006 			info->dp_max_link_rate = parse_bdb_216_dp_max_link_rate(child->dp_max_link_rate);
2007 
2008 		drm_dbg_kms(&i915->drm,
2009 			    "Port %c VBT DP max link rate: %d\n",
2010 			    port_name(port), info->dp_max_link_rate);
2011 	}
2012 
2013 	info->devdata = devdata;
2014 }
2015 
2016 static void parse_ddi_ports(struct drm_i915_private *i915)
2017 {
2018 	struct intel_bios_encoder_data *devdata;
2019 
2020 	if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2021 		return;
2022 
2023 	if (i915->vbt.version < 155)
2024 		return;
2025 
2026 	list_for_each_entry(devdata, &i915->vbt.display_devices, node)
2027 		parse_ddi_port(i915, devdata);
2028 }
2029 
2030 static void
2031 parse_general_definitions(struct drm_i915_private *i915,
2032 			  const struct bdb_header *bdb)
2033 {
2034 	const struct bdb_general_definitions *defs;
2035 	struct intel_bios_encoder_data *devdata;
2036 	const struct child_device_config *child;
2037 	int i, child_device_num;
2038 	u8 expected_size;
2039 	u16 block_size;
2040 	int bus_pin;
2041 
2042 	defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
2043 	if (!defs) {
2044 		drm_dbg_kms(&i915->drm,
2045 			    "No general definition block is found, no devices defined.\n");
2046 		return;
2047 	}
2048 
2049 	block_size = get_blocksize(defs);
2050 	if (block_size < sizeof(*defs)) {
2051 		drm_dbg_kms(&i915->drm,
2052 			    "General definitions block too small (%u)\n",
2053 			    block_size);
2054 		return;
2055 	}
2056 
2057 	bus_pin = defs->crt_ddc_gmbus_pin;
2058 	drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2059 	if (intel_gmbus_is_valid_pin(i915, bus_pin))
2060 		i915->vbt.crt_ddc_pin = bus_pin;
2061 
2062 	if (bdb->version < 106) {
2063 		expected_size = 22;
2064 	} else if (bdb->version < 111) {
2065 		expected_size = 27;
2066 	} else if (bdb->version < 195) {
2067 		expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2068 	} else if (bdb->version == 195) {
2069 		expected_size = 37;
2070 	} else if (bdb->version <= 215) {
2071 		expected_size = 38;
2072 	} else if (bdb->version <= 237) {
2073 		expected_size = 39;
2074 	} else {
2075 		expected_size = sizeof(*child);
2076 		BUILD_BUG_ON(sizeof(*child) < 39);
2077 		drm_dbg(&i915->drm,
2078 			"Expected child device config size for VBT version %u not known; assuming %u\n",
2079 			bdb->version, expected_size);
2080 	}
2081 
2082 	/* Flag an error for unexpected size, but continue anyway. */
2083 	if (defs->child_dev_size != expected_size)
2084 		drm_err(&i915->drm,
2085 			"Unexpected child device config size %u (expected %u for VBT version %u)\n",
2086 			defs->child_dev_size, expected_size, bdb->version);
2087 
2088 	/* The legacy sized child device config is the minimum we need. */
2089 	if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2090 		drm_dbg_kms(&i915->drm,
2091 			    "Child device config size %u is too small.\n",
2092 			    defs->child_dev_size);
2093 		return;
2094 	}
2095 
2096 	/* get the number of child device */
2097 	child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2098 
2099 	for (i = 0; i < child_device_num; i++) {
2100 		child = child_device_ptr(defs, i);
2101 		if (!child->device_type)
2102 			continue;
2103 
2104 		drm_dbg_kms(&i915->drm,
2105 			    "Found VBT child device with type 0x%x\n",
2106 			    child->device_type);
2107 
2108 		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2109 		if (!devdata)
2110 			break;
2111 
2112 		devdata->i915 = i915;
2113 
2114 		/*
2115 		 * Copy as much as we know (sizeof) and is available
2116 		 * (child_dev_size) of the child device config. Accessing the
2117 		 * data must depend on VBT version.
2118 		 */
2119 		memcpy(&devdata->child, child,
2120 		       min_t(size_t, defs->child_dev_size, sizeof(*child)));
2121 
2122 		list_add_tail(&devdata->node, &i915->vbt.display_devices);
2123 	}
2124 
2125 	if (list_empty(&i915->vbt.display_devices))
2126 		drm_dbg_kms(&i915->drm,
2127 			    "no child dev is parsed from VBT\n");
2128 }
2129 
2130 /* Common defaults which may be overridden by VBT. */
2131 static void
2132 init_vbt_defaults(struct drm_i915_private *i915)
2133 {
2134 	i915->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2135 
2136 	/* Default to having backlight */
2137 	i915->vbt.backlight.present = true;
2138 
2139 	/* LFP panel data */
2140 	i915->vbt.lvds_dither = 1;
2141 
2142 	/* SDVO panel data */
2143 	i915->vbt.sdvo_lvds_vbt_mode = NULL;
2144 
2145 	/* general features */
2146 	i915->vbt.int_tv_support = 1;
2147 	i915->vbt.int_crt_support = 1;
2148 
2149 	/* driver features */
2150 	i915->vbt.int_lvds_support = 1;
2151 
2152 	/* Default to using SSC */
2153 	i915->vbt.lvds_use_ssc = 1;
2154 	/*
2155 	 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2156 	 * clock for LVDS.
2157 	 */
2158 	i915->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2159 							   !HAS_PCH_SPLIT(i915));
2160 	drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2161 		    i915->vbt.lvds_ssc_freq);
2162 }
2163 
2164 /* Defaults to initialize only if there is no VBT. */
2165 static void
2166 init_vbt_missing_defaults(struct drm_i915_private *i915)
2167 {
2168 	enum port port;
2169 	int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2170 		    BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2171 
2172 	if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2173 		return;
2174 
2175 	for_each_port_masked(port, ports) {
2176 		struct intel_bios_encoder_data *devdata;
2177 		struct child_device_config *child;
2178 		enum phy phy = intel_port_to_phy(i915, port);
2179 
2180 		/*
2181 		 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2182 		 * to detect it.
2183 		 */
2184 		if (intel_phy_is_tc(i915, phy))
2185 			continue;
2186 
2187 		/* Create fake child device config */
2188 		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2189 		if (!devdata)
2190 			break;
2191 
2192 		devdata->i915 = i915;
2193 		child = &devdata->child;
2194 
2195 		if (port == PORT_F)
2196 			child->dvo_port = DVO_PORT_HDMIF;
2197 		else if (port == PORT_E)
2198 			child->dvo_port = DVO_PORT_HDMIE;
2199 		else
2200 			child->dvo_port = DVO_PORT_HDMIA + port;
2201 
2202 		if (port != PORT_A && port != PORT_E)
2203 			child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2204 
2205 		if (port != PORT_E)
2206 			child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2207 
2208 		if (port == PORT_A)
2209 			child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2210 
2211 		list_add_tail(&devdata->node, &i915->vbt.display_devices);
2212 
2213 		drm_dbg_kms(&i915->drm,
2214 			    "Generating default VBT child device with type 0x04%x on port %c\n",
2215 			    child->device_type, port_name(port));
2216 	}
2217 
2218 	/* Bypass some minimum baseline VBT version checks */
2219 	i915->vbt.version = 155;
2220 }
2221 
2222 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2223 {
2224 	const void *_vbt = vbt;
2225 
2226 	return _vbt + vbt->bdb_offset;
2227 }
2228 
2229 /**
2230  * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2231  * @buf:	pointer to a buffer to validate
2232  * @size:	size of the buffer
2233  *
2234  * Returns true on valid VBT.
2235  */
2236 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2237 {
2238 	const struct vbt_header *vbt = buf;
2239 	const struct bdb_header *bdb;
2240 
2241 	if (!vbt)
2242 		return false;
2243 
2244 	if (sizeof(struct vbt_header) > size) {
2245 		DRM_DEBUG_DRIVER("VBT header incomplete\n");
2246 		return false;
2247 	}
2248 
2249 	if (memcmp(vbt->signature, "$VBT", 4)) {
2250 		DRM_DEBUG_DRIVER("VBT invalid signature\n");
2251 		return false;
2252 	}
2253 
2254 	if (vbt->vbt_size > size) {
2255 		DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2256 		return false;
2257 	}
2258 
2259 	size = vbt->vbt_size;
2260 
2261 	if (range_overflows_t(size_t,
2262 			      vbt->bdb_offset,
2263 			      sizeof(struct bdb_header),
2264 			      size)) {
2265 		DRM_DEBUG_DRIVER("BDB header incomplete\n");
2266 		return false;
2267 	}
2268 
2269 	bdb = get_bdb_header(vbt);
2270 	if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2271 		DRM_DEBUG_DRIVER("BDB incomplete\n");
2272 		return false;
2273 	}
2274 
2275 	return vbt;
2276 }
2277 
2278 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
2279 {
2280 	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
2281 	void __iomem *p = NULL, *oprom;
2282 	struct vbt_header *vbt;
2283 	u16 vbt_size;
2284 	size_t i, size;
2285 
2286 	oprom = pci_map_rom(pdev, &size);
2287 	if (!oprom)
2288 		return NULL;
2289 
2290 	/* Scour memory looking for the VBT signature. */
2291 	for (i = 0; i + 4 < size; i += 4) {
2292 		if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2293 			continue;
2294 
2295 		p = oprom + i;
2296 		size -= i;
2297 		break;
2298 	}
2299 
2300 	if (!p)
2301 		goto err_unmap_oprom;
2302 
2303 	if (sizeof(struct vbt_header) > size) {
2304 		drm_dbg(&i915->drm, "VBT header incomplete\n");
2305 		goto err_unmap_oprom;
2306 	}
2307 
2308 	vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2309 	if (vbt_size > size) {
2310 		drm_dbg(&i915->drm,
2311 			"VBT incomplete (vbt_size overflows)\n");
2312 		goto err_unmap_oprom;
2313 	}
2314 
2315 	/* The rest will be validated by intel_bios_is_valid_vbt() */
2316 	vbt = kmalloc(vbt_size, GFP_KERNEL);
2317 	if (!vbt)
2318 		goto err_unmap_oprom;
2319 
2320 	memcpy_fromio(vbt, p, vbt_size);
2321 
2322 	if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2323 		goto err_free_vbt;
2324 
2325 	pci_unmap_rom(pdev, oprom);
2326 
2327 	return vbt;
2328 
2329 err_free_vbt:
2330 	kfree(vbt);
2331 err_unmap_oprom:
2332 	pci_unmap_rom(pdev, oprom);
2333 
2334 	return NULL;
2335 }
2336 
2337 /**
2338  * intel_bios_init - find VBT and initialize settings from the BIOS
2339  * @i915: i915 device instance
2340  *
2341  * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2342  * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2343  * initialize some defaults if the VBT is not present at all.
2344  */
2345 void intel_bios_init(struct drm_i915_private *i915)
2346 {
2347 	const struct vbt_header *vbt = i915->opregion.vbt;
2348 	struct vbt_header *oprom_vbt = NULL;
2349 	const struct bdb_header *bdb;
2350 
2351 	INIT_LIST_HEAD(&i915->vbt.display_devices);
2352 
2353 	if (!HAS_DISPLAY(i915)) {
2354 		drm_dbg_kms(&i915->drm,
2355 			    "Skipping VBT init due to disabled display.\n");
2356 		return;
2357 	}
2358 
2359 	init_vbt_defaults(i915);
2360 
2361 	/* If the OpRegion does not have VBT, look in PCI ROM. */
2362 	if (!vbt) {
2363 		oprom_vbt = oprom_get_vbt(i915);
2364 		if (!oprom_vbt)
2365 			goto out;
2366 
2367 		vbt = oprom_vbt;
2368 
2369 		drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
2370 	}
2371 
2372 	bdb = get_bdb_header(vbt);
2373 	i915->vbt.version = bdb->version;
2374 
2375 	drm_dbg_kms(&i915->drm,
2376 		    "VBT signature \"%.*s\", BDB version %d\n",
2377 		    (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2378 
2379 	/* Grab useful general definitions */
2380 	parse_general_features(i915, bdb);
2381 	parse_general_definitions(i915, bdb);
2382 	parse_panel_options(i915, bdb);
2383 	parse_panel_dtd(i915, bdb);
2384 	parse_lfp_backlight(i915, bdb);
2385 	parse_sdvo_panel_data(i915, bdb);
2386 	parse_driver_features(i915, bdb);
2387 	parse_power_conservation_features(i915, bdb);
2388 	parse_edp(i915, bdb);
2389 	parse_psr(i915, bdb);
2390 	parse_mipi_config(i915, bdb);
2391 	parse_mipi_sequence(i915, bdb);
2392 
2393 	/* Depends on child device list */
2394 	parse_compression_parameters(i915, bdb);
2395 
2396 out:
2397 	if (!vbt) {
2398 		drm_info(&i915->drm,
2399 			 "Failed to find VBIOS tables (VBT)\n");
2400 		init_vbt_missing_defaults(i915);
2401 	}
2402 
2403 	/* Further processing on pre-parsed or generated child device data */
2404 	parse_sdvo_device_mapping(i915);
2405 	parse_ddi_ports(i915);
2406 
2407 	kfree(oprom_vbt);
2408 }
2409 
2410 /**
2411  * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2412  * @i915: i915 device instance
2413  */
2414 void intel_bios_driver_remove(struct drm_i915_private *i915)
2415 {
2416 	struct intel_bios_encoder_data *devdata, *n;
2417 
2418 	list_for_each_entry_safe(devdata, n, &i915->vbt.display_devices, node) {
2419 		list_del(&devdata->node);
2420 		kfree(devdata->dsc);
2421 		kfree(devdata);
2422 	}
2423 
2424 	kfree(i915->vbt.sdvo_lvds_vbt_mode);
2425 	i915->vbt.sdvo_lvds_vbt_mode = NULL;
2426 	kfree(i915->vbt.lfp_lvds_vbt_mode);
2427 	i915->vbt.lfp_lvds_vbt_mode = NULL;
2428 	kfree(i915->vbt.dsi.data);
2429 	i915->vbt.dsi.data = NULL;
2430 	kfree(i915->vbt.dsi.pps);
2431 	i915->vbt.dsi.pps = NULL;
2432 	kfree(i915->vbt.dsi.config);
2433 	i915->vbt.dsi.config = NULL;
2434 	kfree(i915->vbt.dsi.deassert_seq);
2435 	i915->vbt.dsi.deassert_seq = NULL;
2436 }
2437 
2438 /**
2439  * intel_bios_is_tv_present - is integrated TV present in VBT
2440  * @i915: i915 device instance
2441  *
2442  * Return true if TV is present. If no child devices were parsed from VBT,
2443  * assume TV is present.
2444  */
2445 bool intel_bios_is_tv_present(struct drm_i915_private *i915)
2446 {
2447 	const struct intel_bios_encoder_data *devdata;
2448 	const struct child_device_config *child;
2449 
2450 	if (!i915->vbt.int_tv_support)
2451 		return false;
2452 
2453 	if (list_empty(&i915->vbt.display_devices))
2454 		return true;
2455 
2456 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2457 		child = &devdata->child;
2458 
2459 		/*
2460 		 * If the device type is not TV, continue.
2461 		 */
2462 		switch (child->device_type) {
2463 		case DEVICE_TYPE_INT_TV:
2464 		case DEVICE_TYPE_TV:
2465 		case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2466 			break;
2467 		default:
2468 			continue;
2469 		}
2470 		/* Only when the addin_offset is non-zero, it is regarded
2471 		 * as present.
2472 		 */
2473 		if (child->addin_offset)
2474 			return true;
2475 	}
2476 
2477 	return false;
2478 }
2479 
2480 /**
2481  * intel_bios_is_lvds_present - is LVDS present in VBT
2482  * @i915:	i915 device instance
2483  * @i2c_pin:	i2c pin for LVDS if present
2484  *
2485  * Return true if LVDS is present. If no child devices were parsed from VBT,
2486  * assume LVDS is present.
2487  */
2488 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
2489 {
2490 	const struct intel_bios_encoder_data *devdata;
2491 	const struct child_device_config *child;
2492 
2493 	if (list_empty(&i915->vbt.display_devices))
2494 		return true;
2495 
2496 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2497 		child = &devdata->child;
2498 
2499 		/* If the device type is not LFP, continue.
2500 		 * We have to check both the new identifiers as well as the
2501 		 * old for compatibility with some BIOSes.
2502 		 */
2503 		if (child->device_type != DEVICE_TYPE_INT_LFP &&
2504 		    child->device_type != DEVICE_TYPE_LFP)
2505 			continue;
2506 
2507 		if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
2508 			*i2c_pin = child->i2c_pin;
2509 
2510 		/* However, we cannot trust the BIOS writers to populate
2511 		 * the VBT correctly.  Since LVDS requires additional
2512 		 * information from AIM blocks, a non-zero addin offset is
2513 		 * a good indicator that the LVDS is actually present.
2514 		 */
2515 		if (child->addin_offset)
2516 			return true;
2517 
2518 		/* But even then some BIOS writers perform some black magic
2519 		 * and instantiate the device without reference to any
2520 		 * additional data.  Trust that if the VBT was written into
2521 		 * the OpRegion then they have validated the LVDS's existence.
2522 		 */
2523 		if (i915->opregion.vbt)
2524 			return true;
2525 	}
2526 
2527 	return false;
2528 }
2529 
2530 /**
2531  * intel_bios_is_port_present - is the specified digital port present
2532  * @i915:	i915 device instance
2533  * @port:	port to check
2534  *
2535  * Return true if the device in %port is present.
2536  */
2537 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
2538 {
2539 	const struct intel_bios_encoder_data *devdata;
2540 	const struct child_device_config *child;
2541 	static const struct {
2542 		u16 dp, hdmi;
2543 	} port_mapping[] = {
2544 		[PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2545 		[PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2546 		[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2547 		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2548 		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2549 	};
2550 
2551 	if (HAS_DDI(i915)) {
2552 		const struct ddi_vbt_port_info *port_info =
2553 			&i915->vbt.ddi_port_info[port];
2554 
2555 		return port_info->devdata;
2556 	}
2557 
2558 	/* FIXME maybe deal with port A as well? */
2559 	if (drm_WARN_ON(&i915->drm,
2560 			port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2561 		return false;
2562 
2563 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2564 		child = &devdata->child;
2565 
2566 		if ((child->dvo_port == port_mapping[port].dp ||
2567 		     child->dvo_port == port_mapping[port].hdmi) &&
2568 		    (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2569 					   DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2570 			return true;
2571 	}
2572 
2573 	return false;
2574 }
2575 
2576 /**
2577  * intel_bios_is_port_edp - is the device in given port eDP
2578  * @i915:	i915 device instance
2579  * @port:	port to check
2580  *
2581  * Return true if the device in %port is eDP.
2582  */
2583 bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port)
2584 {
2585 	const struct intel_bios_encoder_data *devdata;
2586 	const struct child_device_config *child;
2587 	static const short port_mapping[] = {
2588 		[PORT_B] = DVO_PORT_DPB,
2589 		[PORT_C] = DVO_PORT_DPC,
2590 		[PORT_D] = DVO_PORT_DPD,
2591 		[PORT_E] = DVO_PORT_DPE,
2592 		[PORT_F] = DVO_PORT_DPF,
2593 	};
2594 
2595 	if (HAS_DDI(i915)) {
2596 		const struct intel_bios_encoder_data *devdata;
2597 
2598 		devdata = intel_bios_encoder_data_lookup(i915, port);
2599 
2600 		return devdata && intel_bios_encoder_supports_edp(devdata);
2601 	}
2602 
2603 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2604 		child = &devdata->child;
2605 
2606 		if (child->dvo_port == port_mapping[port] &&
2607 		    (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2608 		    (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2609 			return true;
2610 	}
2611 
2612 	return false;
2613 }
2614 
2615 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2616 				      enum port port)
2617 {
2618 	static const struct {
2619 		u16 dp, hdmi;
2620 	} port_mapping[] = {
2621 		/*
2622 		 * Buggy VBTs may declare DP ports as having
2623 		 * HDMI type dvo_port :( So let's check both.
2624 		 */
2625 		[PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2626 		[PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2627 		[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2628 		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2629 		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2630 	};
2631 
2632 	if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2633 		return false;
2634 
2635 	if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2636 	    (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2637 		return false;
2638 
2639 	if (child->dvo_port == port_mapping[port].dp)
2640 		return true;
2641 
2642 	/* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2643 	if (child->dvo_port == port_mapping[port].hdmi &&
2644 	    child->aux_channel != 0)
2645 		return true;
2646 
2647 	return false;
2648 }
2649 
2650 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
2651 				     enum port port)
2652 {
2653 	const struct intel_bios_encoder_data *devdata;
2654 
2655 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2656 		if (child_dev_is_dp_dual_mode(&devdata->child, port))
2657 			return true;
2658 	}
2659 
2660 	return false;
2661 }
2662 
2663 /**
2664  * intel_bios_is_dsi_present - is DSI present in VBT
2665  * @i915:	i915 device instance
2666  * @port:	port for DSI if present
2667  *
2668  * Return true if DSI is present, and return the port in %port.
2669  */
2670 bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
2671 			       enum port *port)
2672 {
2673 	const struct intel_bios_encoder_data *devdata;
2674 	const struct child_device_config *child;
2675 	u8 dvo_port;
2676 
2677 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2678 		child = &devdata->child;
2679 
2680 		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2681 			continue;
2682 
2683 		dvo_port = child->dvo_port;
2684 
2685 		if (dvo_port == DVO_PORT_MIPIA ||
2686 		    (dvo_port == DVO_PORT_MIPIB && DISPLAY_VER(i915) >= 11) ||
2687 		    (dvo_port == DVO_PORT_MIPIC && DISPLAY_VER(i915) < 11)) {
2688 			if (port)
2689 				*port = dvo_port - DVO_PORT_MIPIA;
2690 			return true;
2691 		} else if (dvo_port == DVO_PORT_MIPIB ||
2692 			   dvo_port == DVO_PORT_MIPIC ||
2693 			   dvo_port == DVO_PORT_MIPID) {
2694 			drm_dbg_kms(&i915->drm,
2695 				    "VBT has unsupported DSI port %c\n",
2696 				    port_name(dvo_port - DVO_PORT_MIPIA));
2697 		}
2698 	}
2699 
2700 	return false;
2701 }
2702 
2703 static void fill_dsc(struct intel_crtc_state *crtc_state,
2704 		     struct dsc_compression_parameters_entry *dsc,
2705 		     int dsc_max_bpc)
2706 {
2707 	struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2708 	int bpc = 8;
2709 
2710 	vdsc_cfg->dsc_version_major = dsc->version_major;
2711 	vdsc_cfg->dsc_version_minor = dsc->version_minor;
2712 
2713 	if (dsc->support_12bpc && dsc_max_bpc >= 12)
2714 		bpc = 12;
2715 	else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2716 		bpc = 10;
2717 	else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2718 		bpc = 8;
2719 	else
2720 		DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2721 			      dsc_max_bpc);
2722 
2723 	crtc_state->pipe_bpp = bpc * 3;
2724 
2725 	crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2726 					     VBT_DSC_MAX_BPP(dsc->max_bpp));
2727 
2728 	/*
2729 	 * FIXME: This is ugly, and slice count should take DSC engine
2730 	 * throughput etc. into account.
2731 	 *
2732 	 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2733 	 */
2734 	if (dsc->slices_per_line & BIT(2)) {
2735 		crtc_state->dsc.slice_count = 4;
2736 	} else if (dsc->slices_per_line & BIT(1)) {
2737 		crtc_state->dsc.slice_count = 2;
2738 	} else {
2739 		/* FIXME */
2740 		if (!(dsc->slices_per_line & BIT(0)))
2741 			DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2742 
2743 		crtc_state->dsc.slice_count = 1;
2744 	}
2745 
2746 	if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2747 	    crtc_state->dsc.slice_count != 0)
2748 		DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2749 			      crtc_state->hw.adjusted_mode.crtc_hdisplay,
2750 			      crtc_state->dsc.slice_count);
2751 
2752 	/*
2753 	 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2754 	 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
2755 	 */
2756 	vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
2757 							    dsc->rc_buffer_size);
2758 
2759 	/* FIXME: DSI spec says bpc + 1 for this one */
2760 	vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2761 
2762 	vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2763 
2764 	vdsc_cfg->slice_height = dsc->slice_height;
2765 }
2766 
2767 /* FIXME: initially DSI specific */
2768 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2769 			       struct intel_crtc_state *crtc_state,
2770 			       int dsc_max_bpc)
2771 {
2772 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2773 	const struct intel_bios_encoder_data *devdata;
2774 	const struct child_device_config *child;
2775 
2776 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2777 		child = &devdata->child;
2778 
2779 		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2780 			continue;
2781 
2782 		if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
2783 			if (!devdata->dsc)
2784 				return false;
2785 
2786 			if (crtc_state)
2787 				fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2788 
2789 			return true;
2790 		}
2791 	}
2792 
2793 	return false;
2794 }
2795 
2796 /**
2797  * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2798  * @i915:	i915 device instance
2799  * @port:	port to check
2800  *
2801  * Return true if HPD should be inverted for %port.
2802  */
2803 bool
2804 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2805 				enum port port)
2806 {
2807 	const struct intel_bios_encoder_data *devdata =
2808 		i915->vbt.ddi_port_info[port].devdata;
2809 
2810 	if (drm_WARN_ON_ONCE(&i915->drm,
2811 			     !IS_GEMINILAKE(i915) && !IS_BROXTON(i915)))
2812 		return false;
2813 
2814 	return devdata && devdata->child.hpd_invert;
2815 }
2816 
2817 /**
2818  * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2819  * @i915:	i915 device instance
2820  * @port:	port to check
2821  *
2822  * Return true if LSPCON is present on this port
2823  */
2824 bool
2825 intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2826 			     enum port port)
2827 {
2828 	const struct intel_bios_encoder_data *devdata =
2829 		i915->vbt.ddi_port_info[port].devdata;
2830 
2831 	return HAS_LSPCON(i915) && devdata && devdata->child.lspcon;
2832 }
2833 
2834 /**
2835  * intel_bios_is_lane_reversal_needed - if lane reversal needed on port
2836  * @i915:       i915 device instance
2837  * @port:       port to check
2838  *
2839  * Return true if port requires lane reversal
2840  */
2841 bool
2842 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
2843 				   enum port port)
2844 {
2845 	const struct intel_bios_encoder_data *devdata =
2846 		i915->vbt.ddi_port_info[port].devdata;
2847 
2848 	return devdata && devdata->child.lane_reversal;
2849 }
2850 
2851 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
2852 				   enum port port)
2853 {
2854 	const struct ddi_vbt_port_info *info =
2855 		&i915->vbt.ddi_port_info[port];
2856 	enum aux_ch aux_ch;
2857 
2858 	if (!info->alternate_aux_channel) {
2859 		aux_ch = (enum aux_ch)port;
2860 
2861 		drm_dbg_kms(&i915->drm,
2862 			    "using AUX %c for port %c (platform default)\n",
2863 			    aux_ch_name(aux_ch), port_name(port));
2864 		return aux_ch;
2865 	}
2866 
2867 	/*
2868 	 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
2869 	 * map to DDI A,B,TC1,TC2 respectively.
2870 	 *
2871 	 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
2872 	 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
2873 	 */
2874 	switch (info->alternate_aux_channel) {
2875 	case DP_AUX_A:
2876 		aux_ch = AUX_CH_A;
2877 		break;
2878 	case DP_AUX_B:
2879 		if (IS_ALDERLAKE_S(i915))
2880 			aux_ch = AUX_CH_USBC1;
2881 		else
2882 			aux_ch = AUX_CH_B;
2883 		break;
2884 	case DP_AUX_C:
2885 		if (IS_ALDERLAKE_S(i915))
2886 			aux_ch = AUX_CH_USBC2;
2887 		else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2888 			aux_ch = AUX_CH_USBC1;
2889 		else
2890 			aux_ch = AUX_CH_C;
2891 		break;
2892 	case DP_AUX_D:
2893 		if (DISPLAY_VER(i915) == 13)
2894 			aux_ch = AUX_CH_D_XELPD;
2895 		else if (IS_ALDERLAKE_S(i915))
2896 			aux_ch = AUX_CH_USBC3;
2897 		else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2898 			aux_ch = AUX_CH_USBC2;
2899 		else
2900 			aux_ch = AUX_CH_D;
2901 		break;
2902 	case DP_AUX_E:
2903 		if (DISPLAY_VER(i915) == 13)
2904 			aux_ch = AUX_CH_E_XELPD;
2905 		else if (IS_ALDERLAKE_S(i915))
2906 			aux_ch = AUX_CH_USBC4;
2907 		else
2908 			aux_ch = AUX_CH_E;
2909 		break;
2910 	case DP_AUX_F:
2911 		if (DISPLAY_VER(i915) == 13)
2912 			aux_ch = AUX_CH_USBC1;
2913 		else
2914 			aux_ch = AUX_CH_F;
2915 		break;
2916 	case DP_AUX_G:
2917 		if (DISPLAY_VER(i915) == 13)
2918 			aux_ch = AUX_CH_USBC2;
2919 		else
2920 			aux_ch = AUX_CH_G;
2921 		break;
2922 	case DP_AUX_H:
2923 		if (DISPLAY_VER(i915) == 13)
2924 			aux_ch = AUX_CH_USBC3;
2925 		else
2926 			aux_ch = AUX_CH_H;
2927 		break;
2928 	case DP_AUX_I:
2929 		if (DISPLAY_VER(i915) == 13)
2930 			aux_ch = AUX_CH_USBC4;
2931 		else
2932 			aux_ch = AUX_CH_I;
2933 		break;
2934 	default:
2935 		MISSING_CASE(info->alternate_aux_channel);
2936 		aux_ch = AUX_CH_A;
2937 		break;
2938 	}
2939 
2940 	drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n",
2941 		    aux_ch_name(aux_ch), port_name(port));
2942 
2943 	return aux_ch;
2944 }
2945 
2946 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
2947 {
2948 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2949 
2950 	return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
2951 }
2952 
2953 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
2954 {
2955 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2956 	const struct ddi_vbt_port_info *info =
2957 		&i915->vbt.ddi_port_info[encoder->port];
2958 
2959 	return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
2960 }
2961 
2962 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata)
2963 {
2964 	if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
2965 		return 0;
2966 
2967 	return translate_iboost(devdata->child.dp_iboost_level);
2968 }
2969 
2970 int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
2971 {
2972 	if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
2973 		return 0;
2974 
2975 	return translate_iboost(devdata->child.hdmi_iboost_level);
2976 }
2977 
2978 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
2979 {
2980 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2981 
2982 	return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
2983 }
2984 
2985 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
2986 {
2987 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2988 
2989 	return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
2990 }
2991 
2992 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
2993 {
2994 	return devdata->i915->vbt.version >= 195 && devdata->child.dp_usb_type_c;
2995 }
2996 
2997 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
2998 {
2999 	return devdata->i915->vbt.version >= 209 && devdata->child.tbt;
3000 }
3001 
3002 const struct intel_bios_encoder_data *
3003 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3004 {
3005 	return i915->vbt.ddi_port_info[port].devdata;
3006 }
3007