1 /*
2  * Copyright © 2006 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Authors:
24  *    Eric Anholt <eric@anholt.net>
25  *
26  */
27 
28 #include <drm/display/drm_dp_helper.h>
29 #include <drm/display/drm_dsc_helper.h>
30 #include <drm/drm_edid.h>
31 
32 #include "i915_drv.h"
33 #include "i915_reg.h"
34 #include "intel_display.h"
35 #include "intel_display_types.h"
36 #include "intel_gmbus.h"
37 
38 #define _INTEL_BIOS_PRIVATE
39 #include "intel_vbt_defs.h"
40 
41 /**
42  * DOC: Video BIOS Table (VBT)
43  *
44  * The Video BIOS Table, or VBT, provides platform and board specific
45  * configuration information to the driver that is not discoverable or available
46  * through other means. The configuration is mostly related to display
47  * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
48  * the PCI ROM.
49  *
50  * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
51  * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
52  * contain the actual configuration information. The VBT Header, and thus the
53  * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
54  * BDB Header. The data blocks are concatenated after the BDB Header. The data
55  * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
56  * data. (Block 53, the MIPI Sequence Block is an exception.)
57  *
58  * The driver parses the VBT during load. The relevant information is stored in
59  * driver private data for ease of use, and the actual VBT is not read after
60  * that.
61  */
62 
63 /* Wrapper for VBT child device config */
64 struct intel_bios_encoder_data {
65 	struct drm_i915_private *i915;
66 
67 	struct child_device_config child;
68 	struct dsc_compression_parameters_entry *dsc;
69 	struct list_head node;
70 };
71 
72 #define	SLAVE_ADDR1	0x70
73 #define	SLAVE_ADDR2	0x72
74 
75 /* Get BDB block size given a pointer to Block ID. */
76 static u32 _get_blocksize(const u8 *block_base)
77 {
78 	/* The MIPI Sequence Block v3+ has a separate size field. */
79 	if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
80 		return *((const u32 *)(block_base + 4));
81 	else
82 		return *((const u16 *)(block_base + 1));
83 }
84 
85 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
86 static u32 get_blocksize(const void *block_data)
87 {
88 	return _get_blocksize(block_data - 3);
89 }
90 
91 static const void *
92 find_raw_section(const void *_bdb, enum bdb_block_id section_id)
93 {
94 	const struct bdb_header *bdb = _bdb;
95 	const u8 *base = _bdb;
96 	int index = 0;
97 	u32 total, current_size;
98 	enum bdb_block_id current_id;
99 
100 	/* skip to first section */
101 	index += bdb->header_size;
102 	total = bdb->bdb_size;
103 
104 	/* walk the sections looking for section_id */
105 	while (index + 3 < total) {
106 		current_id = *(base + index);
107 		current_size = _get_blocksize(base + index);
108 		index += 3;
109 
110 		if (index + current_size > total)
111 			return NULL;
112 
113 		if (current_id == section_id)
114 			return base + index;
115 
116 		index += current_size;
117 	}
118 
119 	return NULL;
120 }
121 
122 /*
123  * Offset from the start of BDB to the start of the
124  * block data (just past the block header).
125  */
126 static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id)
127 {
128 	const void *block;
129 
130 	block = find_raw_section(bdb, section_id);
131 	if (!block)
132 		return 0;
133 
134 	return block - bdb;
135 }
136 
137 struct bdb_block_entry {
138 	struct list_head node;
139 	enum bdb_block_id section_id;
140 	u8 data[];
141 };
142 
143 static const void *
144 bdb_find_section(struct drm_i915_private *i915,
145 		 enum bdb_block_id section_id)
146 {
147 	struct bdb_block_entry *entry;
148 
149 	list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) {
150 		if (entry->section_id == section_id)
151 			return entry->data + 3;
152 	}
153 
154 	return NULL;
155 }
156 
157 static const struct {
158 	enum bdb_block_id section_id;
159 	size_t min_size;
160 } bdb_blocks[] = {
161 	{ .section_id = BDB_GENERAL_FEATURES,
162 	  .min_size = sizeof(struct bdb_general_features), },
163 	{ .section_id = BDB_GENERAL_DEFINITIONS,
164 	  .min_size = sizeof(struct bdb_general_definitions), },
165 	{ .section_id = BDB_PSR,
166 	  .min_size = sizeof(struct bdb_psr), },
167 	{ .section_id = BDB_DRIVER_FEATURES,
168 	  .min_size = sizeof(struct bdb_driver_features), },
169 	{ .section_id = BDB_SDVO_LVDS_OPTIONS,
170 	  .min_size = sizeof(struct bdb_sdvo_lvds_options), },
171 	{ .section_id = BDB_SDVO_PANEL_DTDS,
172 	  .min_size = sizeof(struct bdb_sdvo_panel_dtds), },
173 	{ .section_id = BDB_EDP,
174 	  .min_size = sizeof(struct bdb_edp), },
175 	{ .section_id = BDB_LVDS_OPTIONS,
176 	  .min_size = sizeof(struct bdb_lvds_options), },
177 	/*
178 	 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS,
179 	 * so keep the two ordered.
180 	 */
181 	{ .section_id = BDB_LVDS_LFP_DATA_PTRS,
182 	  .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), },
183 	{ .section_id = BDB_LVDS_LFP_DATA,
184 	  .min_size = 0, /* special case */ },
185 	{ .section_id = BDB_LVDS_BACKLIGHT,
186 	  .min_size = sizeof(struct bdb_lfp_backlight_data), },
187 	{ .section_id = BDB_LFP_POWER,
188 	  .min_size = sizeof(struct bdb_lfp_power), },
189 	{ .section_id = BDB_MIPI_CONFIG,
190 	  .min_size = sizeof(struct bdb_mipi_config), },
191 	{ .section_id = BDB_MIPI_SEQUENCE,
192 	  .min_size = sizeof(struct bdb_mipi_sequence) },
193 	{ .section_id = BDB_COMPRESSION_PARAMETERS,
194 	  .min_size = sizeof(struct bdb_compression_parameters), },
195 	{ .section_id = BDB_GENERIC_DTD,
196 	  .min_size = sizeof(struct bdb_generic_dtd), },
197 };
198 
199 static size_t lfp_data_min_size(struct drm_i915_private *i915)
200 {
201 	const struct bdb_lvds_lfp_data_ptrs *ptrs;
202 	size_t size;
203 
204 	ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
205 	if (!ptrs)
206 		return 0;
207 
208 	size = sizeof(struct bdb_lvds_lfp_data);
209 	if (ptrs->panel_name.table_size)
210 		size = max(size, ptrs->panel_name.offset +
211 			   sizeof(struct bdb_lvds_lfp_data_tail));
212 
213 	return size;
214 }
215 
216 static bool validate_lfp_data_ptrs(const void *bdb,
217 				   const struct bdb_lvds_lfp_data_ptrs *ptrs)
218 {
219 	int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
220 	int data_block_size, lfp_data_size;
221 	const void *data_block;
222 	int i;
223 
224 	data_block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
225 	if (!data_block)
226 		return false;
227 
228 	data_block_size = get_blocksize(data_block);
229 	if (data_block_size == 0)
230 		return false;
231 
232 	/* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
233 	if (ptrs->lvds_entries != 3)
234 		return false;
235 
236 	fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
237 	dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
238 	panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
239 	panel_name_size = ptrs->panel_name.table_size;
240 
241 	/* fp_timing has variable size */
242 	if (fp_timing_size < 32 ||
243 	    dvo_timing_size != sizeof(struct lvds_dvo_timing) ||
244 	    panel_pnp_id_size != sizeof(struct lvds_pnp_id))
245 		return false;
246 
247 	/* panel_name is not present in old VBTs */
248 	if (panel_name_size != 0 &&
249 	    panel_name_size != sizeof(struct lvds_lfp_panel_name))
250 		return false;
251 
252 	lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
253 	if (16 * lfp_data_size > data_block_size)
254 		return false;
255 
256 	/* make sure the table entries have uniform size */
257 	for (i = 1; i < 16; i++) {
258 		if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
259 		    ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
260 		    ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
261 			return false;
262 
263 		if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
264 		    ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
265 		    ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
266 			return false;
267 	}
268 
269 	/*
270 	 * Except for vlv/chv machines all real VBTs seem to have 6
271 	 * unaccounted bytes in the fp_timing table. And it doesn't
272 	 * appear to be a really intentional hole as the fp_timing
273 	 * 0xffff terminator is always within those 6 missing bytes.
274 	 */
275 	if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size)
276 		fp_timing_size += 6;
277 
278 	if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
279 		return false;
280 
281 	if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset ||
282 	    ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
283 	    ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
284 		return false;
285 
286 	/* make sure the tables fit inside the data block */
287 	for (i = 0; i < 16; i++) {
288 		if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
289 		    ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
290 		    ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
291 			return false;
292 	}
293 
294 	if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
295 		return false;
296 
297 	/* make sure fp_timing terminators are present at expected locations */
298 	for (i = 0; i < 16; i++) {
299 		const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset +
300 			fp_timing_size - 2;
301 
302 		if (*t != 0xffff)
303 			return false;
304 	}
305 
306 	return true;
307 }
308 
309 /* make the data table offsets relative to the data block */
310 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
311 {
312 	struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block;
313 	u32 offset;
314 	int i;
315 
316 	offset = raw_block_offset(bdb, BDB_LVDS_LFP_DATA);
317 
318 	for (i = 0; i < 16; i++) {
319 		if (ptrs->ptr[i].fp_timing.offset < offset ||
320 		    ptrs->ptr[i].dvo_timing.offset < offset ||
321 		    ptrs->ptr[i].panel_pnp_id.offset < offset)
322 			return false;
323 
324 		ptrs->ptr[i].fp_timing.offset -= offset;
325 		ptrs->ptr[i].dvo_timing.offset -= offset;
326 		ptrs->ptr[i].panel_pnp_id.offset -= offset;
327 	}
328 
329 	if (ptrs->panel_name.table_size) {
330 		if (ptrs->panel_name.offset < offset)
331 			return false;
332 
333 		ptrs->panel_name.offset -= offset;
334 	}
335 
336 	return validate_lfp_data_ptrs(bdb, ptrs);
337 }
338 
339 static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table,
340 			     int table_size, int total_size)
341 {
342 	if (total_size < table_size)
343 		return total_size;
344 
345 	table->table_size = table_size;
346 	table->offset = total_size - table_size;
347 
348 	return total_size - table_size;
349 }
350 
351 static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next,
352 			      const struct lvds_lfp_data_ptr_table *prev,
353 			      int size)
354 {
355 	next->table_size = prev->table_size;
356 	next->offset = prev->offset + size;
357 }
358 
359 static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
360 				    const void *bdb)
361 {
362 	int i, size, table_size, block_size, offset, fp_timing_size;
363 	struct bdb_lvds_lfp_data_ptrs *ptrs;
364 	const void *block;
365 	void *ptrs_block;
366 
367 	/*
368 	 * The hardcoded fp_timing_size is only valid for
369 	 * modernish VBTs. All older VBTs definitely should
370 	 * include block 41 and thus we don't need to
371 	 * generate one.
372 	 */
373 	if (i915->display.vbt.version < 155)
374 		return NULL;
375 
376 	fp_timing_size = 38;
377 
378 	block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
379 	if (!block)
380 		return NULL;
381 
382 	drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n");
383 
384 	block_size = get_blocksize(block);
385 
386 	size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
387 		sizeof(struct lvds_pnp_id);
388 	if (size * 16 > block_size)
389 		return NULL;
390 
391 	ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
392 	if (!ptrs_block)
393 		return NULL;
394 
395 	*(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS;
396 	*(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
397 	ptrs = ptrs_block + 3;
398 
399 	table_size = sizeof(struct lvds_pnp_id);
400 	size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size);
401 
402 	table_size = sizeof(struct lvds_dvo_timing);
403 	size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size);
404 
405 	table_size = fp_timing_size;
406 	size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size);
407 
408 	if (ptrs->ptr[0].fp_timing.table_size)
409 		ptrs->lvds_entries++;
410 	if (ptrs->ptr[0].dvo_timing.table_size)
411 		ptrs->lvds_entries++;
412 	if (ptrs->ptr[0].panel_pnp_id.table_size)
413 		ptrs->lvds_entries++;
414 
415 	if (size != 0 || ptrs->lvds_entries != 3) {
416 		kfree(ptrs_block);
417 		return NULL;
418 	}
419 
420 	size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
421 		sizeof(struct lvds_pnp_id);
422 	for (i = 1; i < 16; i++) {
423 		next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size);
424 		next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size);
425 		next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size);
426 	}
427 
428 	table_size = sizeof(struct lvds_lfp_panel_name);
429 
430 	if (16 * (size + table_size) <= block_size) {
431 		ptrs->panel_name.table_size = table_size;
432 		ptrs->panel_name.offset = size * 16;
433 	}
434 
435 	offset = block - bdb;
436 
437 	for (i = 0; i < 16; i++) {
438 		ptrs->ptr[i].fp_timing.offset += offset;
439 		ptrs->ptr[i].dvo_timing.offset += offset;
440 		ptrs->ptr[i].panel_pnp_id.offset += offset;
441 	}
442 
443 	if (ptrs->panel_name.table_size)
444 		ptrs->panel_name.offset += offset;
445 
446 	return ptrs_block;
447 }
448 
449 static void
450 init_bdb_block(struct drm_i915_private *i915,
451 	       const void *bdb, enum bdb_block_id section_id,
452 	       size_t min_size)
453 {
454 	struct bdb_block_entry *entry;
455 	void *temp_block = NULL;
456 	const void *block;
457 	size_t block_size;
458 
459 	block = find_raw_section(bdb, section_id);
460 
461 	/* Modern VBTs lack the LFP data table pointers block, make one up */
462 	if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) {
463 		temp_block = generate_lfp_data_ptrs(i915, bdb);
464 		if (temp_block)
465 			block = temp_block + 3;
466 	}
467 	if (!block)
468 		return;
469 
470 	drm_WARN(&i915->drm, min_size == 0,
471 		 "Block %d min_size is zero\n", section_id);
472 
473 	block_size = get_blocksize(block);
474 
475 	/*
476 	 * Version number and new block size are considered
477 	 * part of the header for MIPI sequenece block v3+.
478 	 */
479 	if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)
480 		block_size += 5;
481 
482 	entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
483 			GFP_KERNEL);
484 	if (!entry) {
485 		kfree(temp_block);
486 		return;
487 	}
488 
489 	entry->section_id = section_id;
490 	memcpy(entry->data, block - 3, block_size + 3);
491 
492 	kfree(temp_block);
493 
494 	drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n",
495 		    section_id, block_size, min_size);
496 
497 	if (section_id == BDB_LVDS_LFP_DATA_PTRS &&
498 	    !fixup_lfp_data_ptrs(bdb, entry->data + 3)) {
499 		drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n");
500 		kfree(entry);
501 		return;
502 	}
503 
504 	list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks);
505 }
506 
507 static void init_bdb_blocks(struct drm_i915_private *i915,
508 			    const void *bdb)
509 {
510 	int i;
511 
512 	for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
513 		enum bdb_block_id section_id = bdb_blocks[i].section_id;
514 		size_t min_size = bdb_blocks[i].min_size;
515 
516 		if (section_id == BDB_LVDS_LFP_DATA)
517 			min_size = lfp_data_min_size(i915);
518 
519 		init_bdb_block(i915, bdb, section_id, min_size);
520 	}
521 }
522 
523 static void
524 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
525 			const struct lvds_dvo_timing *dvo_timing)
526 {
527 	panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
528 		dvo_timing->hactive_lo;
529 	panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
530 		((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
531 	panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
532 		((dvo_timing->hsync_pulse_width_hi << 8) |
533 			dvo_timing->hsync_pulse_width_lo);
534 	panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
535 		((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
536 
537 	panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
538 		dvo_timing->vactive_lo;
539 	panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
540 		((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
541 	panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
542 		((dvo_timing->vsync_pulse_width_hi << 4) |
543 			dvo_timing->vsync_pulse_width_lo);
544 	panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
545 		((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
546 	panel_fixed_mode->clock = dvo_timing->clock * 10;
547 	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
548 
549 	if (dvo_timing->hsync_positive)
550 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
551 	else
552 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
553 
554 	if (dvo_timing->vsync_positive)
555 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
556 	else
557 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
558 
559 	panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
560 		dvo_timing->himage_lo;
561 	panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
562 		dvo_timing->vimage_lo;
563 
564 	/* Some VBTs have bogus h/vtotal values */
565 	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
566 		panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
567 	if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
568 		panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
569 
570 	drm_mode_set_name(panel_fixed_mode);
571 }
572 
573 static const struct lvds_dvo_timing *
574 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data,
575 		    const struct bdb_lvds_lfp_data_ptrs *ptrs,
576 		    int index)
577 {
578 	return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
579 }
580 
581 static const struct lvds_fp_timing *
582 get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
583 		   const struct bdb_lvds_lfp_data_ptrs *ptrs,
584 		   int index)
585 {
586 	return (const void *)data + ptrs->ptr[index].fp_timing.offset;
587 }
588 
589 static const struct lvds_pnp_id *
590 get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data,
591 		const struct bdb_lvds_lfp_data_ptrs *ptrs,
592 		int index)
593 {
594 	return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
595 }
596 
597 static const struct bdb_lvds_lfp_data_tail *
598 get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
599 		  const struct bdb_lvds_lfp_data_ptrs *ptrs)
600 {
601 	if (ptrs->panel_name.table_size)
602 		return (const void *)data + ptrs->panel_name.offset;
603 	else
604 		return NULL;
605 }
606 
607 static void dump_pnp_id(struct drm_i915_private *i915,
608 			const struct lvds_pnp_id *pnp_id,
609 			const char *name)
610 {
611 	u16 mfg_name = be16_to_cpu((__force __be16)pnp_id->mfg_name);
612 	char vend[4];
613 
614 	drm_dbg_kms(&i915->drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n",
615 		    name, drm_edid_decode_mfg_id(mfg_name, vend),
616 		    pnp_id->mfg_name, pnp_id->product_code, pnp_id->serial,
617 		    pnp_id->mfg_week, pnp_id->mfg_year + 1990);
618 }
619 
620 static int opregion_get_panel_type(struct drm_i915_private *i915,
621 				   const struct intel_bios_encoder_data *devdata,
622 				   const struct drm_edid *drm_edid, bool use_fallback)
623 {
624 	return intel_opregion_get_panel_type(i915);
625 }
626 
627 static int vbt_get_panel_type(struct drm_i915_private *i915,
628 			      const struct intel_bios_encoder_data *devdata,
629 			      const struct drm_edid *drm_edid, bool use_fallback)
630 {
631 	const struct bdb_lvds_options *lvds_options;
632 
633 	lvds_options = bdb_find_section(i915, BDB_LVDS_OPTIONS);
634 	if (!lvds_options)
635 		return -1;
636 
637 	if (lvds_options->panel_type > 0xf &&
638 	    lvds_options->panel_type != 0xff) {
639 		drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n",
640 			    lvds_options->panel_type);
641 		return -1;
642 	}
643 
644 	if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
645 		return lvds_options->panel_type2;
646 
647 	drm_WARN_ON(&i915->drm, devdata && devdata->child.handle != DEVICE_HANDLE_LFP1);
648 
649 	return lvds_options->panel_type;
650 }
651 
652 static int pnpid_get_panel_type(struct drm_i915_private *i915,
653 				const struct intel_bios_encoder_data *devdata,
654 				const struct drm_edid *drm_edid, bool use_fallback)
655 {
656 	const struct bdb_lvds_lfp_data *data;
657 	const struct bdb_lvds_lfp_data_ptrs *ptrs;
658 	const struct lvds_pnp_id *edid_id;
659 	struct lvds_pnp_id edid_id_nodate;
660 	const struct edid *edid = drm_edid_raw(drm_edid); /* FIXME */
661 	int i, best = -1;
662 
663 	if (!edid)
664 		return -1;
665 
666 	edid_id = (const void *)&edid->mfg_id[0];
667 
668 	edid_id_nodate = *edid_id;
669 	edid_id_nodate.mfg_week = 0;
670 	edid_id_nodate.mfg_year = 0;
671 
672 	dump_pnp_id(i915, edid_id, "EDID");
673 
674 	ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
675 	if (!ptrs)
676 		return -1;
677 
678 	data = bdb_find_section(i915, BDB_LVDS_LFP_DATA);
679 	if (!data)
680 		return -1;
681 
682 	for (i = 0; i < 16; i++) {
683 		const struct lvds_pnp_id *vbt_id =
684 			get_lvds_pnp_id(data, ptrs, i);
685 
686 		/* full match? */
687 		if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id)))
688 			return i;
689 
690 		/*
691 		 * Accept a match w/o date if no full match is found,
692 		 * and the VBT entry does not specify a date.
693 		 */
694 		if (best < 0 &&
695 		    !memcmp(vbt_id, &edid_id_nodate, sizeof(*vbt_id)))
696 			best = i;
697 	}
698 
699 	return best;
700 }
701 
702 static int fallback_get_panel_type(struct drm_i915_private *i915,
703 				   const struct intel_bios_encoder_data *devdata,
704 				   const struct drm_edid *drm_edid, bool use_fallback)
705 {
706 	return use_fallback ? 0 : -1;
707 }
708 
709 enum panel_type {
710 	PANEL_TYPE_OPREGION,
711 	PANEL_TYPE_VBT,
712 	PANEL_TYPE_PNPID,
713 	PANEL_TYPE_FALLBACK,
714 };
715 
716 static int get_panel_type(struct drm_i915_private *i915,
717 			  const struct intel_bios_encoder_data *devdata,
718 			  const struct drm_edid *drm_edid, bool use_fallback)
719 {
720 	struct {
721 		const char *name;
722 		int (*get_panel_type)(struct drm_i915_private *i915,
723 				      const struct intel_bios_encoder_data *devdata,
724 				      const struct drm_edid *drm_edid, bool use_fallback);
725 		int panel_type;
726 	} panel_types[] = {
727 		[PANEL_TYPE_OPREGION] = {
728 			.name = "OpRegion",
729 			.get_panel_type = opregion_get_panel_type,
730 		},
731 		[PANEL_TYPE_VBT] = {
732 			.name = "VBT",
733 			.get_panel_type = vbt_get_panel_type,
734 		},
735 		[PANEL_TYPE_PNPID] = {
736 			.name = "PNPID",
737 			.get_panel_type = pnpid_get_panel_type,
738 		},
739 		[PANEL_TYPE_FALLBACK] = {
740 			.name = "fallback",
741 			.get_panel_type = fallback_get_panel_type,
742 		},
743 	};
744 	int i;
745 
746 	for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
747 		panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata,
748 									  drm_edid, use_fallback);
749 
750 		drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf &&
751 			    panel_types[i].panel_type != 0xff);
752 
753 		if (panel_types[i].panel_type >= 0)
754 			drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n",
755 				    panel_types[i].name, panel_types[i].panel_type);
756 	}
757 
758 	if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
759 		i = PANEL_TYPE_OPREGION;
760 	else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff &&
761 		 panel_types[PANEL_TYPE_PNPID].panel_type >= 0)
762 		i = PANEL_TYPE_PNPID;
763 	else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff &&
764 		 panel_types[PANEL_TYPE_VBT].panel_type >= 0)
765 		i = PANEL_TYPE_VBT;
766 	else
767 		i = PANEL_TYPE_FALLBACK;
768 
769 	drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n",
770 		    panel_types[i].name, panel_types[i].panel_type);
771 
772 	return panel_types[i].panel_type;
773 }
774 
775 static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits)
776 {
777 	return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1);
778 }
779 
780 static bool panel_bool(unsigned int value, int panel_type)
781 {
782 	return panel_bits(value, panel_type, 1);
783 }
784 
785 /* Parse general panel options */
786 static void
787 parse_panel_options(struct drm_i915_private *i915,
788 		    struct intel_panel *panel)
789 {
790 	const struct bdb_lvds_options *lvds_options;
791 	int panel_type = panel->vbt.panel_type;
792 	int drrs_mode;
793 
794 	lvds_options = bdb_find_section(i915, BDB_LVDS_OPTIONS);
795 	if (!lvds_options)
796 		return;
797 
798 	panel->vbt.lvds_dither = lvds_options->pixel_dither;
799 
800 	/*
801 	 * Empirical evidence indicates the block size can be
802 	 * either 4,14,16,24+ bytes. For older VBTs no clear
803 	 * relationship between the block size vs. BDB version.
804 	 */
805 	if (get_blocksize(lvds_options) < 16)
806 		return;
807 
808 	drrs_mode = panel_bits(lvds_options->dps_panel_type_bits,
809 			       panel_type, 2);
810 	/*
811 	 * VBT has static DRRS = 0 and seamless DRRS = 2.
812 	 * The below piece of code is required to adjust vbt.drrs_type
813 	 * to match the enum drrs_support_type.
814 	 */
815 	switch (drrs_mode) {
816 	case 0:
817 		panel->vbt.drrs_type = DRRS_TYPE_STATIC;
818 		drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
819 		break;
820 	case 2:
821 		panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
822 		drm_dbg_kms(&i915->drm,
823 			    "DRRS supported mode is seamless\n");
824 		break;
825 	default:
826 		panel->vbt.drrs_type = DRRS_TYPE_NONE;
827 		drm_dbg_kms(&i915->drm,
828 			    "DRRS not supported (VBT input)\n");
829 		break;
830 	}
831 }
832 
833 static void
834 parse_lfp_panel_dtd(struct drm_i915_private *i915,
835 		    struct intel_panel *panel,
836 		    const struct bdb_lvds_lfp_data *lvds_lfp_data,
837 		    const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs)
838 {
839 	const struct lvds_dvo_timing *panel_dvo_timing;
840 	const struct lvds_fp_timing *fp_timing;
841 	struct drm_display_mode *panel_fixed_mode;
842 	int panel_type = panel->vbt.panel_type;
843 
844 	panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
845 					       lvds_lfp_data_ptrs,
846 					       panel_type);
847 
848 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
849 	if (!panel_fixed_mode)
850 		return;
851 
852 	fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
853 
854 	panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
855 
856 	drm_dbg_kms(&i915->drm,
857 		    "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
858 		    DRM_MODE_ARG(panel_fixed_mode));
859 
860 	fp_timing = get_lvds_fp_timing(lvds_lfp_data,
861 				       lvds_lfp_data_ptrs,
862 				       panel_type);
863 
864 	/* check the resolution, just to be sure */
865 	if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
866 	    fp_timing->y_res == panel_fixed_mode->vdisplay) {
867 		panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
868 		drm_dbg_kms(&i915->drm,
869 			    "VBT initial LVDS value %x\n",
870 			    panel->vbt.bios_lvds_val);
871 	}
872 }
873 
874 static void
875 parse_lfp_data(struct drm_i915_private *i915,
876 	       struct intel_panel *panel)
877 {
878 	const struct bdb_lvds_lfp_data *data;
879 	const struct bdb_lvds_lfp_data_tail *tail;
880 	const struct bdb_lvds_lfp_data_ptrs *ptrs;
881 	const struct lvds_pnp_id *pnp_id;
882 	int panel_type = panel->vbt.panel_type;
883 
884 	ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
885 	if (!ptrs)
886 		return;
887 
888 	data = bdb_find_section(i915, BDB_LVDS_LFP_DATA);
889 	if (!data)
890 		return;
891 
892 	if (!panel->vbt.lfp_lvds_vbt_mode)
893 		parse_lfp_panel_dtd(i915, panel, data, ptrs);
894 
895 	pnp_id = get_lvds_pnp_id(data, ptrs, panel_type);
896 	dump_pnp_id(i915, pnp_id, "Panel");
897 
898 	tail = get_lfp_data_tail(data, ptrs);
899 	if (!tail)
900 		return;
901 
902 	drm_dbg_kms(&i915->drm, "Panel name: %.*s\n",
903 		    (int)sizeof(tail->panel_name[0].name),
904 		    tail->panel_name[panel_type].name);
905 
906 	if (i915->display.vbt.version >= 188) {
907 		panel->vbt.seamless_drrs_min_refresh_rate =
908 			tail->seamless_drrs_min_refresh_rate[panel_type];
909 		drm_dbg_kms(&i915->drm,
910 			    "Seamless DRRS min refresh rate: %d Hz\n",
911 			    panel->vbt.seamless_drrs_min_refresh_rate);
912 	}
913 }
914 
915 static void
916 parse_generic_dtd(struct drm_i915_private *i915,
917 		  struct intel_panel *panel)
918 {
919 	const struct bdb_generic_dtd *generic_dtd;
920 	const struct generic_dtd_entry *dtd;
921 	struct drm_display_mode *panel_fixed_mode;
922 	int num_dtd;
923 
924 	/*
925 	 * Older VBTs provided DTD information for internal displays through
926 	 * the "LFP panel tables" block (42).  As of VBT revision 229 the
927 	 * DTD information should be provided via a newer "generic DTD"
928 	 * block (58).  Just to be safe, we'll try the new generic DTD block
929 	 * first on VBT >= 229, but still fall back to trying the old LFP
930 	 * block if that fails.
931 	 */
932 	if (i915->display.vbt.version < 229)
933 		return;
934 
935 	generic_dtd = bdb_find_section(i915, BDB_GENERIC_DTD);
936 	if (!generic_dtd)
937 		return;
938 
939 	if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
940 		drm_err(&i915->drm, "GDTD size %u is too small.\n",
941 			generic_dtd->gdtd_size);
942 		return;
943 	} else if (generic_dtd->gdtd_size !=
944 		   sizeof(struct generic_dtd_entry)) {
945 		drm_err(&i915->drm, "Unexpected GDTD size %u\n",
946 			generic_dtd->gdtd_size);
947 		/* DTD has unknown fields, but keep going */
948 	}
949 
950 	num_dtd = (get_blocksize(generic_dtd) -
951 		   sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
952 	if (panel->vbt.panel_type >= num_dtd) {
953 		drm_err(&i915->drm,
954 			"Panel type %d not found in table of %d DTD's\n",
955 			panel->vbt.panel_type, num_dtd);
956 		return;
957 	}
958 
959 	dtd = &generic_dtd->dtd[panel->vbt.panel_type];
960 
961 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
962 	if (!panel_fixed_mode)
963 		return;
964 
965 	panel_fixed_mode->hdisplay = dtd->hactive;
966 	panel_fixed_mode->hsync_start =
967 		panel_fixed_mode->hdisplay + dtd->hfront_porch;
968 	panel_fixed_mode->hsync_end =
969 		panel_fixed_mode->hsync_start + dtd->hsync;
970 	panel_fixed_mode->htotal =
971 		panel_fixed_mode->hdisplay + dtd->hblank;
972 
973 	panel_fixed_mode->vdisplay = dtd->vactive;
974 	panel_fixed_mode->vsync_start =
975 		panel_fixed_mode->vdisplay + dtd->vfront_porch;
976 	panel_fixed_mode->vsync_end =
977 		panel_fixed_mode->vsync_start + dtd->vsync;
978 	panel_fixed_mode->vtotal =
979 		panel_fixed_mode->vdisplay + dtd->vblank;
980 
981 	panel_fixed_mode->clock = dtd->pixel_clock;
982 	panel_fixed_mode->width_mm = dtd->width_mm;
983 	panel_fixed_mode->height_mm = dtd->height_mm;
984 
985 	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
986 	drm_mode_set_name(panel_fixed_mode);
987 
988 	if (dtd->hsync_positive_polarity)
989 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
990 	else
991 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
992 
993 	if (dtd->vsync_positive_polarity)
994 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
995 	else
996 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
997 
998 	drm_dbg_kms(&i915->drm,
999 		    "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
1000 		    DRM_MODE_ARG(panel_fixed_mode));
1001 
1002 	panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
1003 }
1004 
1005 static void
1006 parse_lfp_backlight(struct drm_i915_private *i915,
1007 		    struct intel_panel *panel)
1008 {
1009 	const struct bdb_lfp_backlight_data *backlight_data;
1010 	const struct lfp_backlight_data_entry *entry;
1011 	int panel_type = panel->vbt.panel_type;
1012 	u16 level;
1013 
1014 	backlight_data = bdb_find_section(i915, BDB_LVDS_BACKLIGHT);
1015 	if (!backlight_data)
1016 		return;
1017 
1018 	if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
1019 		drm_dbg_kms(&i915->drm,
1020 			    "Unsupported backlight data entry size %u\n",
1021 			    backlight_data->entry_size);
1022 		return;
1023 	}
1024 
1025 	entry = &backlight_data->data[panel_type];
1026 
1027 	panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
1028 	if (!panel->vbt.backlight.present) {
1029 		drm_dbg_kms(&i915->drm,
1030 			    "PWM backlight not present in VBT (type %u)\n",
1031 			    entry->type);
1032 		return;
1033 	}
1034 
1035 	panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
1036 	panel->vbt.backlight.controller = 0;
1037 	if (i915->display.vbt.version >= 191) {
1038 		size_t exp_size;
1039 
1040 		if (i915->display.vbt.version >= 236)
1041 			exp_size = sizeof(struct bdb_lfp_backlight_data);
1042 		else if (i915->display.vbt.version >= 234)
1043 			exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
1044 		else
1045 			exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
1046 
1047 		if (get_blocksize(backlight_data) >= exp_size) {
1048 			const struct lfp_backlight_control_method *method;
1049 
1050 			method = &backlight_data->backlight_control[panel_type];
1051 			panel->vbt.backlight.type = method->type;
1052 			panel->vbt.backlight.controller = method->controller;
1053 		}
1054 	}
1055 
1056 	panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
1057 	panel->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1058 
1059 	if (i915->display.vbt.version >= 234) {
1060 		u16 min_level;
1061 		bool scale;
1062 
1063 		level = backlight_data->brightness_level[panel_type].level;
1064 		min_level = backlight_data->brightness_min_level[panel_type].level;
1065 
1066 		if (i915->display.vbt.version >= 236)
1067 			scale = backlight_data->brightness_precision_bits[panel_type] == 16;
1068 		else
1069 			scale = level > 255;
1070 
1071 		if (scale)
1072 			min_level = min_level / 255;
1073 
1074 		if (min_level > 255) {
1075 			drm_warn(&i915->drm, "Brightness min level > 255\n");
1076 			level = 255;
1077 		}
1078 		panel->vbt.backlight.min_brightness = min_level;
1079 
1080 		panel->vbt.backlight.brightness_precision_bits =
1081 			backlight_data->brightness_precision_bits[panel_type];
1082 	} else {
1083 		level = backlight_data->level[panel_type];
1084 		panel->vbt.backlight.min_brightness = entry->min_brightness;
1085 	}
1086 
1087 	if (i915->display.vbt.version >= 239)
1088 		panel->vbt.backlight.hdr_dpcd_refresh_timeout =
1089 			DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100);
1090 	else
1091 		panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30;
1092 
1093 	drm_dbg_kms(&i915->drm,
1094 		    "VBT backlight PWM modulation frequency %u Hz, "
1095 		    "active %s, min brightness %u, level %u, controller %u\n",
1096 		    panel->vbt.backlight.pwm_freq_hz,
1097 		    panel->vbt.backlight.active_low_pwm ? "low" : "high",
1098 		    panel->vbt.backlight.min_brightness,
1099 		    level,
1100 		    panel->vbt.backlight.controller);
1101 }
1102 
1103 /* Try to find sdvo panel data */
1104 static void
1105 parse_sdvo_panel_data(struct drm_i915_private *i915,
1106 		      struct intel_panel *panel)
1107 {
1108 	const struct bdb_sdvo_panel_dtds *dtds;
1109 	struct drm_display_mode *panel_fixed_mode;
1110 	int index;
1111 
1112 	index = i915->params.vbt_sdvo_panel_type;
1113 	if (index == -2) {
1114 		drm_dbg_kms(&i915->drm,
1115 			    "Ignore SDVO panel mode from BIOS VBT tables.\n");
1116 		return;
1117 	}
1118 
1119 	if (index == -1) {
1120 		const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
1121 
1122 		sdvo_lvds_options = bdb_find_section(i915, BDB_SDVO_LVDS_OPTIONS);
1123 		if (!sdvo_lvds_options)
1124 			return;
1125 
1126 		index = sdvo_lvds_options->panel_type;
1127 	}
1128 
1129 	dtds = bdb_find_section(i915, BDB_SDVO_PANEL_DTDS);
1130 	if (!dtds)
1131 		return;
1132 
1133 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
1134 	if (!panel_fixed_mode)
1135 		return;
1136 
1137 	fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
1138 
1139 	panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
1140 
1141 	drm_dbg_kms(&i915->drm,
1142 		    "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
1143 		    DRM_MODE_ARG(panel_fixed_mode));
1144 }
1145 
1146 static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
1147 				    bool alternate)
1148 {
1149 	switch (DISPLAY_VER(i915)) {
1150 	case 2:
1151 		return alternate ? 66667 : 48000;
1152 	case 3:
1153 	case 4:
1154 		return alternate ? 100000 : 96000;
1155 	default:
1156 		return alternate ? 100000 : 120000;
1157 	}
1158 }
1159 
1160 static void
1161 parse_general_features(struct drm_i915_private *i915)
1162 {
1163 	const struct bdb_general_features *general;
1164 
1165 	general = bdb_find_section(i915, BDB_GENERAL_FEATURES);
1166 	if (!general)
1167 		return;
1168 
1169 	i915->display.vbt.int_tv_support = general->int_tv_support;
1170 	/* int_crt_support can't be trusted on earlier platforms */
1171 	if (i915->display.vbt.version >= 155 &&
1172 	    (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
1173 		i915->display.vbt.int_crt_support = general->int_crt_support;
1174 	i915->display.vbt.lvds_use_ssc = general->enable_ssc;
1175 	i915->display.vbt.lvds_ssc_freq =
1176 		intel_bios_ssc_frequency(i915, general->ssc_freq);
1177 	i915->display.vbt.display_clock_mode = general->display_clock_mode;
1178 	i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
1179 	if (i915->display.vbt.version >= 181) {
1180 		i915->display.vbt.orientation = general->rotate_180 ?
1181 			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
1182 			DRM_MODE_PANEL_ORIENTATION_NORMAL;
1183 	} else {
1184 		i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1185 	}
1186 
1187 	if (i915->display.vbt.version >= 249 && general->afc_startup_config) {
1188 		i915->display.vbt.override_afc_startup = true;
1189 		i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7;
1190 	}
1191 
1192 	drm_dbg_kms(&i915->drm,
1193 		    "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
1194 		    i915->display.vbt.int_tv_support,
1195 		    i915->display.vbt.int_crt_support,
1196 		    i915->display.vbt.lvds_use_ssc,
1197 		    i915->display.vbt.lvds_ssc_freq,
1198 		    i915->display.vbt.display_clock_mode,
1199 		    i915->display.vbt.fdi_rx_polarity_inverted);
1200 }
1201 
1202 static const struct child_device_config *
1203 child_device_ptr(const struct bdb_general_definitions *defs, int i)
1204 {
1205 	return (const void *) &defs->devices[i * defs->child_dev_size];
1206 }
1207 
1208 static void
1209 parse_sdvo_device_mapping(struct drm_i915_private *i915)
1210 {
1211 	const struct intel_bios_encoder_data *devdata;
1212 	int count = 0;
1213 
1214 	/*
1215 	 * Only parse SDVO mappings on gens that could have SDVO. This isn't
1216 	 * accurate and doesn't have to be, as long as it's not too strict.
1217 	 */
1218 	if (!IS_DISPLAY_VER(i915, 3, 7)) {
1219 		drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
1220 		return;
1221 	}
1222 
1223 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
1224 		const struct child_device_config *child = &devdata->child;
1225 		struct sdvo_device_mapping *mapping;
1226 
1227 		if (child->slave_addr != SLAVE_ADDR1 &&
1228 		    child->slave_addr != SLAVE_ADDR2) {
1229 			/*
1230 			 * If the slave address is neither 0x70 nor 0x72,
1231 			 * it is not a SDVO device. Skip it.
1232 			 */
1233 			continue;
1234 		}
1235 		if (child->dvo_port != DEVICE_PORT_DVOB &&
1236 		    child->dvo_port != DEVICE_PORT_DVOC) {
1237 			/* skip the incorrect SDVO port */
1238 			drm_dbg_kms(&i915->drm,
1239 				    "Incorrect SDVO port. Skip it\n");
1240 			continue;
1241 		}
1242 		drm_dbg_kms(&i915->drm,
1243 			    "the SDVO device with slave addr %2x is found on"
1244 			    " %s port\n",
1245 			    child->slave_addr,
1246 			    (child->dvo_port == DEVICE_PORT_DVOB) ?
1247 			    "SDVOB" : "SDVOC");
1248 		mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1];
1249 		if (!mapping->initialized) {
1250 			mapping->dvo_port = child->dvo_port;
1251 			mapping->slave_addr = child->slave_addr;
1252 			mapping->dvo_wiring = child->dvo_wiring;
1253 			mapping->ddc_pin = child->ddc_pin;
1254 			mapping->i2c_pin = child->i2c_pin;
1255 			mapping->initialized = 1;
1256 			drm_dbg_kms(&i915->drm,
1257 				    "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1258 				    mapping->dvo_port, mapping->slave_addr,
1259 				    mapping->dvo_wiring, mapping->ddc_pin,
1260 				    mapping->i2c_pin);
1261 		} else {
1262 			drm_dbg_kms(&i915->drm,
1263 				    "Maybe one SDVO port is shared by "
1264 				    "two SDVO device.\n");
1265 		}
1266 		if (child->slave2_addr) {
1267 			/* Maybe this is a SDVO device with multiple inputs */
1268 			/* And the mapping info is not added */
1269 			drm_dbg_kms(&i915->drm,
1270 				    "there exists the slave2_addr. Maybe this"
1271 				    " is a SDVO device with multiple inputs.\n");
1272 		}
1273 		count++;
1274 	}
1275 
1276 	if (!count) {
1277 		/* No SDVO device info is found */
1278 		drm_dbg_kms(&i915->drm,
1279 			    "No SDVO device info is found in VBT\n");
1280 	}
1281 }
1282 
1283 static void
1284 parse_driver_features(struct drm_i915_private *i915)
1285 {
1286 	const struct bdb_driver_features *driver;
1287 
1288 	driver = bdb_find_section(i915, BDB_DRIVER_FEATURES);
1289 	if (!driver)
1290 		return;
1291 
1292 	if (DISPLAY_VER(i915) >= 5) {
1293 		/*
1294 		 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1295 		 * to mean "eDP". The VBT spec doesn't agree with that
1296 		 * interpretation, but real world VBTs seem to.
1297 		 */
1298 		if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1299 			i915->display.vbt.int_lvds_support = 0;
1300 	} else {
1301 		/*
1302 		 * FIXME it's not clear which BDB version has the LVDS config
1303 		 * bits defined. Revision history in the VBT spec says:
1304 		 * "0.92 | Add two definitions for VBT value of LVDS Active
1305 		 *  Config (00b and 11b values defined) | 06/13/2005"
1306 		 * but does not the specify the BDB version.
1307 		 *
1308 		 * So far version 134 (on i945gm) is the oldest VBT observed
1309 		 * in the wild with the bits correctly populated. Version
1310 		 * 108 (on i85x) does not have the bits correctly populated.
1311 		 */
1312 		if (i915->display.vbt.version >= 134 &&
1313 		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1314 		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1315 			i915->display.vbt.int_lvds_support = 0;
1316 	}
1317 }
1318 
1319 static void
1320 parse_panel_driver_features(struct drm_i915_private *i915,
1321 			    struct intel_panel *panel)
1322 {
1323 	const struct bdb_driver_features *driver;
1324 
1325 	driver = bdb_find_section(i915, BDB_DRIVER_FEATURES);
1326 	if (!driver)
1327 		return;
1328 
1329 	if (i915->display.vbt.version < 228) {
1330 		drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
1331 			    driver->drrs_enabled);
1332 		/*
1333 		 * If DRRS is not supported, drrs_type has to be set to 0.
1334 		 * This is because, VBT is configured in such a way that
1335 		 * static DRRS is 0 and DRRS not supported is represented by
1336 		 * driver->drrs_enabled=false
1337 		 */
1338 		if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1339 			/*
1340 			 * FIXME Should DMRRS perhaps be treated as seamless
1341 			 * but without the automatic downclocking?
1342 			 */
1343 			if (driver->dmrrs_enabled)
1344 				panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1345 			else
1346 				panel->vbt.drrs_type = DRRS_TYPE_NONE;
1347 		}
1348 
1349 		panel->vbt.psr.enable = driver->psr_enabled;
1350 	}
1351 }
1352 
1353 static void
1354 parse_power_conservation_features(struct drm_i915_private *i915,
1355 				  struct intel_panel *panel)
1356 {
1357 	const struct bdb_lfp_power *power;
1358 	u8 panel_type = panel->vbt.panel_type;
1359 
1360 	panel->vbt.vrr = true; /* matches Windows behaviour */
1361 
1362 	if (i915->display.vbt.version < 228)
1363 		return;
1364 
1365 	power = bdb_find_section(i915, BDB_LFP_POWER);
1366 	if (!power)
1367 		return;
1368 
1369 	panel->vbt.psr.enable = panel_bool(power->psr, panel_type);
1370 
1371 	/*
1372 	 * If DRRS is not supported, drrs_type has to be set to 0.
1373 	 * This is because, VBT is configured in such a way that
1374 	 * static DRRS is 0 and DRRS not supported is represented by
1375 	 * power->drrs & BIT(panel_type)=false
1376 	 */
1377 	if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1378 		/*
1379 		 * FIXME Should DMRRS perhaps be treated as seamless
1380 		 * but without the automatic downclocking?
1381 		 */
1382 		if (panel_bool(power->dmrrs, panel_type))
1383 			panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1384 		else
1385 			panel->vbt.drrs_type = DRRS_TYPE_NONE;
1386 	}
1387 
1388 	if (i915->display.vbt.version >= 232)
1389 		panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type);
1390 
1391 	if (i915->display.vbt.version >= 233)
1392 		panel->vbt.vrr = panel_bool(power->vrr_feature_enabled,
1393 					    panel_type);
1394 }
1395 
1396 static void
1397 parse_edp(struct drm_i915_private *i915,
1398 	  struct intel_panel *panel)
1399 {
1400 	const struct bdb_edp *edp;
1401 	const struct edp_power_seq *edp_pps;
1402 	const struct edp_fast_link_params *edp_link_params;
1403 	int panel_type = panel->vbt.panel_type;
1404 
1405 	edp = bdb_find_section(i915, BDB_EDP);
1406 	if (!edp)
1407 		return;
1408 
1409 	switch (panel_bits(edp->color_depth, panel_type, 2)) {
1410 	case EDP_18BPP:
1411 		panel->vbt.edp.bpp = 18;
1412 		break;
1413 	case EDP_24BPP:
1414 		panel->vbt.edp.bpp = 24;
1415 		break;
1416 	case EDP_30BPP:
1417 		panel->vbt.edp.bpp = 30;
1418 		break;
1419 	}
1420 
1421 	/* Get the eDP sequencing and link info */
1422 	edp_pps = &edp->power_seqs[panel_type];
1423 	edp_link_params = &edp->fast_link_params[panel_type];
1424 
1425 	panel->vbt.edp.pps = *edp_pps;
1426 
1427 	if (i915->display.vbt.version >= 224) {
1428 		panel->vbt.edp.rate =
1429 			edp->edp_fast_link_training_rate[panel_type] * 20;
1430 	} else {
1431 		switch (edp_link_params->rate) {
1432 		case EDP_RATE_1_62:
1433 			panel->vbt.edp.rate = 162000;
1434 			break;
1435 		case EDP_RATE_2_7:
1436 			panel->vbt.edp.rate = 270000;
1437 			break;
1438 		case EDP_RATE_5_4:
1439 			panel->vbt.edp.rate = 540000;
1440 			break;
1441 		default:
1442 			drm_dbg_kms(&i915->drm,
1443 				    "VBT has unknown eDP link rate value %u\n",
1444 				    edp_link_params->rate);
1445 			break;
1446 		}
1447 	}
1448 
1449 	switch (edp_link_params->lanes) {
1450 	case EDP_LANE_1:
1451 		panel->vbt.edp.lanes = 1;
1452 		break;
1453 	case EDP_LANE_2:
1454 		panel->vbt.edp.lanes = 2;
1455 		break;
1456 	case EDP_LANE_4:
1457 		panel->vbt.edp.lanes = 4;
1458 		break;
1459 	default:
1460 		drm_dbg_kms(&i915->drm,
1461 			    "VBT has unknown eDP lane count value %u\n",
1462 			    edp_link_params->lanes);
1463 		break;
1464 	}
1465 
1466 	switch (edp_link_params->preemphasis) {
1467 	case EDP_PREEMPHASIS_NONE:
1468 		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1469 		break;
1470 	case EDP_PREEMPHASIS_3_5dB:
1471 		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1472 		break;
1473 	case EDP_PREEMPHASIS_6dB:
1474 		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1475 		break;
1476 	case EDP_PREEMPHASIS_9_5dB:
1477 		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1478 		break;
1479 	default:
1480 		drm_dbg_kms(&i915->drm,
1481 			    "VBT has unknown eDP pre-emphasis value %u\n",
1482 			    edp_link_params->preemphasis);
1483 		break;
1484 	}
1485 
1486 	switch (edp_link_params->vswing) {
1487 	case EDP_VSWING_0_4V:
1488 		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1489 		break;
1490 	case EDP_VSWING_0_6V:
1491 		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1492 		break;
1493 	case EDP_VSWING_0_8V:
1494 		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1495 		break;
1496 	case EDP_VSWING_1_2V:
1497 		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1498 		break;
1499 	default:
1500 		drm_dbg_kms(&i915->drm,
1501 			    "VBT has unknown eDP voltage swing value %u\n",
1502 			    edp_link_params->vswing);
1503 		break;
1504 	}
1505 
1506 	if (i915->display.vbt.version >= 173) {
1507 		u8 vswing;
1508 
1509 		/* Don't read from VBT if module parameter has valid value*/
1510 		if (i915->params.edp_vswing) {
1511 			panel->vbt.edp.low_vswing =
1512 				i915->params.edp_vswing == 1;
1513 		} else {
1514 			vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1515 			panel->vbt.edp.low_vswing = vswing == 0;
1516 		}
1517 	}
1518 
1519 	panel->vbt.edp.drrs_msa_timing_delay =
1520 		panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2);
1521 
1522 	if (i915->display.vbt.version >= 244)
1523 		panel->vbt.edp.max_link_rate =
1524 			edp->edp_max_port_link_rate[panel_type] * 20;
1525 }
1526 
1527 static void
1528 parse_psr(struct drm_i915_private *i915,
1529 	  struct intel_panel *panel)
1530 {
1531 	const struct bdb_psr *psr;
1532 	const struct psr_table *psr_table;
1533 	int panel_type = panel->vbt.panel_type;
1534 
1535 	psr = bdb_find_section(i915, BDB_PSR);
1536 	if (!psr) {
1537 		drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
1538 		return;
1539 	}
1540 
1541 	psr_table = &psr->psr_table[panel_type];
1542 
1543 	panel->vbt.psr.full_link = psr_table->full_link;
1544 	panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1545 
1546 	/* Allowed VBT values goes from 0 to 15 */
1547 	panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1548 		psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1549 
1550 	/*
1551 	 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1552 	 * Old decimal value is wake up time in multiples of 100 us.
1553 	 */
1554 	if (i915->display.vbt.version >= 205 &&
1555 	    (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
1556 		switch (psr_table->tp1_wakeup_time) {
1557 		case 0:
1558 			panel->vbt.psr.tp1_wakeup_time_us = 500;
1559 			break;
1560 		case 1:
1561 			panel->vbt.psr.tp1_wakeup_time_us = 100;
1562 			break;
1563 		case 3:
1564 			panel->vbt.psr.tp1_wakeup_time_us = 0;
1565 			break;
1566 		default:
1567 			drm_dbg_kms(&i915->drm,
1568 				    "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1569 				    psr_table->tp1_wakeup_time);
1570 			fallthrough;
1571 		case 2:
1572 			panel->vbt.psr.tp1_wakeup_time_us = 2500;
1573 			break;
1574 		}
1575 
1576 		switch (psr_table->tp2_tp3_wakeup_time) {
1577 		case 0:
1578 			panel->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1579 			break;
1580 		case 1:
1581 			panel->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1582 			break;
1583 		case 3:
1584 			panel->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1585 			break;
1586 		default:
1587 			drm_dbg_kms(&i915->drm,
1588 				    "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1589 				    psr_table->tp2_tp3_wakeup_time);
1590 			fallthrough;
1591 		case 2:
1592 			panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1593 		break;
1594 		}
1595 	} else {
1596 		panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1597 		panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1598 	}
1599 
1600 	if (i915->display.vbt.version >= 226) {
1601 		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1602 
1603 		wakeup_time = panel_bits(wakeup_time, panel_type, 2);
1604 		switch (wakeup_time) {
1605 		case 0:
1606 			wakeup_time = 500;
1607 			break;
1608 		case 1:
1609 			wakeup_time = 100;
1610 			break;
1611 		case 3:
1612 			wakeup_time = 50;
1613 			break;
1614 		default:
1615 		case 2:
1616 			wakeup_time = 2500;
1617 			break;
1618 		}
1619 		panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1620 	} else {
1621 		/* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1622 		panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us;
1623 	}
1624 }
1625 
1626 static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1627 				      struct intel_panel *panel,
1628 				      enum port port)
1629 {
1630 	enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C;
1631 
1632 	if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) {
1633 		panel->vbt.dsi.bl_ports = BIT(port);
1634 		if (panel->vbt.dsi.config->cabc_supported)
1635 			panel->vbt.dsi.cabc_ports = BIT(port);
1636 
1637 		return;
1638 	}
1639 
1640 	switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) {
1641 	case DL_DCS_PORT_A:
1642 		panel->vbt.dsi.bl_ports = BIT(PORT_A);
1643 		break;
1644 	case DL_DCS_PORT_C:
1645 		panel->vbt.dsi.bl_ports = BIT(port_bc);
1646 		break;
1647 	default:
1648 	case DL_DCS_PORT_A_AND_C:
1649 		panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc);
1650 		break;
1651 	}
1652 
1653 	if (!panel->vbt.dsi.config->cabc_supported)
1654 		return;
1655 
1656 	switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) {
1657 	case DL_DCS_PORT_A:
1658 		panel->vbt.dsi.cabc_ports = BIT(PORT_A);
1659 		break;
1660 	case DL_DCS_PORT_C:
1661 		panel->vbt.dsi.cabc_ports = BIT(port_bc);
1662 		break;
1663 	default:
1664 	case DL_DCS_PORT_A_AND_C:
1665 		panel->vbt.dsi.cabc_ports =
1666 					BIT(PORT_A) | BIT(port_bc);
1667 		break;
1668 	}
1669 }
1670 
1671 static void
1672 parse_mipi_config(struct drm_i915_private *i915,
1673 		  struct intel_panel *panel)
1674 {
1675 	const struct bdb_mipi_config *start;
1676 	const struct mipi_config *config;
1677 	const struct mipi_pps_data *pps;
1678 	int panel_type = panel->vbt.panel_type;
1679 	enum port port;
1680 
1681 	/* parse MIPI blocks only if LFP type is MIPI */
1682 	if (!intel_bios_is_dsi_present(i915, &port))
1683 		return;
1684 
1685 	/* Initialize this to undefined indicating no generic MIPI support */
1686 	panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1687 
1688 	/* Block #40 is already parsed and panel_fixed_mode is
1689 	 * stored in i915->lfp_lvds_vbt_mode
1690 	 * resuse this when needed
1691 	 */
1692 
1693 	/* Parse #52 for panel index used from panel_type already
1694 	 * parsed
1695 	 */
1696 	start = bdb_find_section(i915, BDB_MIPI_CONFIG);
1697 	if (!start) {
1698 		drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1699 		return;
1700 	}
1701 
1702 	drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1703 		panel_type);
1704 
1705 	/*
1706 	 * get hold of the correct configuration block and pps data as per
1707 	 * the panel_type as index
1708 	 */
1709 	config = &start->config[panel_type];
1710 	pps = &start->pps[panel_type];
1711 
1712 	/* store as of now full data. Trim when we realise all is not needed */
1713 	panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1714 	if (!panel->vbt.dsi.config)
1715 		return;
1716 
1717 	panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1718 	if (!panel->vbt.dsi.pps) {
1719 		kfree(panel->vbt.dsi.config);
1720 		return;
1721 	}
1722 
1723 	parse_dsi_backlight_ports(i915, panel, port);
1724 
1725 	/* FIXME is the 90 vs. 270 correct? */
1726 	switch (config->rotation) {
1727 	case ENABLE_ROTATION_0:
1728 		/*
1729 		 * Most (all?) VBTs claim 0 degrees despite having
1730 		 * an upside down panel, thus we do not trust this.
1731 		 */
1732 		panel->vbt.dsi.orientation =
1733 			DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1734 		break;
1735 	case ENABLE_ROTATION_90:
1736 		panel->vbt.dsi.orientation =
1737 			DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1738 		break;
1739 	case ENABLE_ROTATION_180:
1740 		panel->vbt.dsi.orientation =
1741 			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1742 		break;
1743 	case ENABLE_ROTATION_270:
1744 		panel->vbt.dsi.orientation =
1745 			DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1746 		break;
1747 	}
1748 
1749 	/* We have mandatory mipi config blocks. Initialize as generic panel */
1750 	panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1751 }
1752 
1753 /* Find the sequence block and size for the given panel. */
1754 static const u8 *
1755 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1756 			  u16 panel_id, u32 *seq_size)
1757 {
1758 	u32 total = get_blocksize(sequence);
1759 	const u8 *data = &sequence->data[0];
1760 	u8 current_id;
1761 	u32 current_size;
1762 	int header_size = sequence->version >= 3 ? 5 : 3;
1763 	int index = 0;
1764 	int i;
1765 
1766 	/* skip new block size */
1767 	if (sequence->version >= 3)
1768 		data += 4;
1769 
1770 	for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1771 		if (index + header_size > total) {
1772 			DRM_ERROR("Invalid sequence block (header)\n");
1773 			return NULL;
1774 		}
1775 
1776 		current_id = *(data + index);
1777 		if (sequence->version >= 3)
1778 			current_size = *((const u32 *)(data + index + 1));
1779 		else
1780 			current_size = *((const u16 *)(data + index + 1));
1781 
1782 		index += header_size;
1783 
1784 		if (index + current_size > total) {
1785 			DRM_ERROR("Invalid sequence block\n");
1786 			return NULL;
1787 		}
1788 
1789 		if (current_id == panel_id) {
1790 			*seq_size = current_size;
1791 			return data + index;
1792 		}
1793 
1794 		index += current_size;
1795 	}
1796 
1797 	DRM_ERROR("Sequence block detected but no valid configuration\n");
1798 
1799 	return NULL;
1800 }
1801 
1802 static int goto_next_sequence(const u8 *data, int index, int total)
1803 {
1804 	u16 len;
1805 
1806 	/* Skip Sequence Byte. */
1807 	for (index = index + 1; index < total; index += len) {
1808 		u8 operation_byte = *(data + index);
1809 		index++;
1810 
1811 		switch (operation_byte) {
1812 		case MIPI_SEQ_ELEM_END:
1813 			return index;
1814 		case MIPI_SEQ_ELEM_SEND_PKT:
1815 			if (index + 4 > total)
1816 				return 0;
1817 
1818 			len = *((const u16 *)(data + index + 2)) + 4;
1819 			break;
1820 		case MIPI_SEQ_ELEM_DELAY:
1821 			len = 4;
1822 			break;
1823 		case MIPI_SEQ_ELEM_GPIO:
1824 			len = 2;
1825 			break;
1826 		case MIPI_SEQ_ELEM_I2C:
1827 			if (index + 7 > total)
1828 				return 0;
1829 			len = *(data + index + 6) + 7;
1830 			break;
1831 		default:
1832 			DRM_ERROR("Unknown operation byte\n");
1833 			return 0;
1834 		}
1835 	}
1836 
1837 	return 0;
1838 }
1839 
1840 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1841 {
1842 	int seq_end;
1843 	u16 len;
1844 	u32 size_of_sequence;
1845 
1846 	/*
1847 	 * Could skip sequence based on Size of Sequence alone, but also do some
1848 	 * checking on the structure.
1849 	 */
1850 	if (total < 5) {
1851 		DRM_ERROR("Too small sequence size\n");
1852 		return 0;
1853 	}
1854 
1855 	/* Skip Sequence Byte. */
1856 	index++;
1857 
1858 	/*
1859 	 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1860 	 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1861 	 * byte.
1862 	 */
1863 	size_of_sequence = *((const u32 *)(data + index));
1864 	index += 4;
1865 
1866 	seq_end = index + size_of_sequence;
1867 	if (seq_end > total) {
1868 		DRM_ERROR("Invalid sequence size\n");
1869 		return 0;
1870 	}
1871 
1872 	for (; index < total; index += len) {
1873 		u8 operation_byte = *(data + index);
1874 		index++;
1875 
1876 		if (operation_byte == MIPI_SEQ_ELEM_END) {
1877 			if (index != seq_end) {
1878 				DRM_ERROR("Invalid element structure\n");
1879 				return 0;
1880 			}
1881 			return index;
1882 		}
1883 
1884 		len = *(data + index);
1885 		index++;
1886 
1887 		/*
1888 		 * FIXME: Would be nice to check elements like for v1/v2 in
1889 		 * goto_next_sequence() above.
1890 		 */
1891 		switch (operation_byte) {
1892 		case MIPI_SEQ_ELEM_SEND_PKT:
1893 		case MIPI_SEQ_ELEM_DELAY:
1894 		case MIPI_SEQ_ELEM_GPIO:
1895 		case MIPI_SEQ_ELEM_I2C:
1896 		case MIPI_SEQ_ELEM_SPI:
1897 		case MIPI_SEQ_ELEM_PMIC:
1898 			break;
1899 		default:
1900 			DRM_ERROR("Unknown operation byte %u\n",
1901 				  operation_byte);
1902 			break;
1903 		}
1904 	}
1905 
1906 	return 0;
1907 }
1908 
1909 /*
1910  * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1911  * skip all delay + gpio operands and stop at the first DSI packet op.
1912  */
1913 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915,
1914 					      struct intel_panel *panel)
1915 {
1916 	const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1917 	int index, len;
1918 
1919 	if (drm_WARN_ON(&i915->drm,
1920 			!data || panel->vbt.dsi.seq_version != 1))
1921 		return 0;
1922 
1923 	/* index = 1 to skip sequence byte */
1924 	for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1925 		switch (data[index]) {
1926 		case MIPI_SEQ_ELEM_SEND_PKT:
1927 			return index == 1 ? 0 : index;
1928 		case MIPI_SEQ_ELEM_DELAY:
1929 			len = 5; /* 1 byte for operand + uint32 */
1930 			break;
1931 		case MIPI_SEQ_ELEM_GPIO:
1932 			len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1933 			break;
1934 		default:
1935 			return 0;
1936 		}
1937 	}
1938 
1939 	return 0;
1940 }
1941 
1942 /*
1943  * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1944  * The deassert must be done before calling intel_dsi_device_ready, so for
1945  * these devices we split the init OTP sequence into a deassert sequence and
1946  * the actual init OTP part.
1947  */
1948 static void fixup_mipi_sequences(struct drm_i915_private *i915,
1949 				 struct intel_panel *panel)
1950 {
1951 	u8 *init_otp;
1952 	int len;
1953 
1954 	/* Limit this to VLV for now. */
1955 	if (!IS_VALLEYVIEW(i915))
1956 		return;
1957 
1958 	/* Limit this to v1 vid-mode sequences */
1959 	if (panel->vbt.dsi.config->is_cmd_mode ||
1960 	    panel->vbt.dsi.seq_version != 1)
1961 		return;
1962 
1963 	/* Only do this if there are otp and assert seqs and no deassert seq */
1964 	if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1965 	    !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1966 	    panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1967 		return;
1968 
1969 	/* The deassert-sequence ends at the first DSI packet */
1970 	len = get_init_otp_deassert_fragment_len(i915, panel);
1971 	if (!len)
1972 		return;
1973 
1974 	drm_dbg_kms(&i915->drm,
1975 		    "Using init OTP fragment to deassert reset\n");
1976 
1977 	/* Copy the fragment, update seq byte and terminate it */
1978 	init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1979 	panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1980 	if (!panel->vbt.dsi.deassert_seq)
1981 		return;
1982 	panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1983 	panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1984 	/* Use the copy for deassert */
1985 	panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1986 		panel->vbt.dsi.deassert_seq;
1987 	/* Replace the last byte of the fragment with init OTP seq byte */
1988 	init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1989 	/* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1990 	panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1991 }
1992 
1993 static void
1994 parse_mipi_sequence(struct drm_i915_private *i915,
1995 		    struct intel_panel *panel)
1996 {
1997 	int panel_type = panel->vbt.panel_type;
1998 	const struct bdb_mipi_sequence *sequence;
1999 	const u8 *seq_data;
2000 	u32 seq_size;
2001 	u8 *data;
2002 	int index = 0;
2003 
2004 	/* Only our generic panel driver uses the sequence block. */
2005 	if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
2006 		return;
2007 
2008 	sequence = bdb_find_section(i915, BDB_MIPI_SEQUENCE);
2009 	if (!sequence) {
2010 		drm_dbg_kms(&i915->drm,
2011 			    "No MIPI Sequence found, parsing complete\n");
2012 		return;
2013 	}
2014 
2015 	/* Fail gracefully for forward incompatible sequence block. */
2016 	if (sequence->version >= 4) {
2017 		drm_err(&i915->drm,
2018 			"Unable to parse MIPI Sequence Block v%u\n",
2019 			sequence->version);
2020 		return;
2021 	}
2022 
2023 	drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
2024 		sequence->version);
2025 
2026 	seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
2027 	if (!seq_data)
2028 		return;
2029 
2030 	data = kmemdup(seq_data, seq_size, GFP_KERNEL);
2031 	if (!data)
2032 		return;
2033 
2034 	/* Parse the sequences, store pointers to each sequence. */
2035 	for (;;) {
2036 		u8 seq_id = *(data + index);
2037 		if (seq_id == MIPI_SEQ_END)
2038 			break;
2039 
2040 		if (seq_id >= MIPI_SEQ_MAX) {
2041 			drm_err(&i915->drm, "Unknown sequence %u\n",
2042 				seq_id);
2043 			goto err;
2044 		}
2045 
2046 		/* Log about presence of sequences we won't run. */
2047 		if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
2048 			drm_dbg_kms(&i915->drm,
2049 				    "Unsupported sequence %u\n", seq_id);
2050 
2051 		panel->vbt.dsi.sequence[seq_id] = data + index;
2052 
2053 		if (sequence->version >= 3)
2054 			index = goto_next_sequence_v3(data, index, seq_size);
2055 		else
2056 			index = goto_next_sequence(data, index, seq_size);
2057 		if (!index) {
2058 			drm_err(&i915->drm, "Invalid sequence %u\n",
2059 				seq_id);
2060 			goto err;
2061 		}
2062 	}
2063 
2064 	panel->vbt.dsi.data = data;
2065 	panel->vbt.dsi.size = seq_size;
2066 	panel->vbt.dsi.seq_version = sequence->version;
2067 
2068 	fixup_mipi_sequences(i915, panel);
2069 
2070 	drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
2071 	return;
2072 
2073 err:
2074 	kfree(data);
2075 	memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence));
2076 }
2077 
2078 static void
2079 parse_compression_parameters(struct drm_i915_private *i915)
2080 {
2081 	const struct bdb_compression_parameters *params;
2082 	struct intel_bios_encoder_data *devdata;
2083 	u16 block_size;
2084 	int index;
2085 
2086 	if (i915->display.vbt.version < 198)
2087 		return;
2088 
2089 	params = bdb_find_section(i915, BDB_COMPRESSION_PARAMETERS);
2090 	if (params) {
2091 		/* Sanity checks */
2092 		if (params->entry_size != sizeof(params->data[0])) {
2093 			drm_dbg_kms(&i915->drm,
2094 				    "VBT: unsupported compression param entry size\n");
2095 			return;
2096 		}
2097 
2098 		block_size = get_blocksize(params);
2099 		if (block_size < sizeof(*params)) {
2100 			drm_dbg_kms(&i915->drm,
2101 				    "VBT: expected 16 compression param entries\n");
2102 			return;
2103 		}
2104 	}
2105 
2106 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
2107 		const struct child_device_config *child = &devdata->child;
2108 
2109 		if (!child->compression_enable)
2110 			continue;
2111 
2112 		if (!params) {
2113 			drm_dbg_kms(&i915->drm,
2114 				    "VBT: compression params not available\n");
2115 			continue;
2116 		}
2117 
2118 		if (child->compression_method_cps) {
2119 			drm_dbg_kms(&i915->drm,
2120 				    "VBT: CPS compression not supported\n");
2121 			continue;
2122 		}
2123 
2124 		index = child->compression_structure_index;
2125 
2126 		devdata->dsc = kmemdup(&params->data[index],
2127 				       sizeof(*devdata->dsc), GFP_KERNEL);
2128 	}
2129 }
2130 
2131 static u8 translate_iboost(u8 val)
2132 {
2133 	static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
2134 
2135 	if (val >= ARRAY_SIZE(mapping)) {
2136 		DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
2137 		return 0;
2138 	}
2139 	return mapping[val];
2140 }
2141 
2142 static const u8 cnp_ddc_pin_map[] = {
2143 	[0] = 0, /* N/A */
2144 	[GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B,
2145 	[GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C,
2146 	[GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */
2147 	[GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */
2148 };
2149 
2150 static const u8 icp_ddc_pin_map[] = {
2151 	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2152 	[GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2153 	[GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C,
2154 	[GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1,
2155 	[GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2,
2156 	[GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3,
2157 	[GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4,
2158 	[GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5,
2159 	[GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6,
2160 };
2161 
2162 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
2163 	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2164 	[GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2165 	[GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D,
2166 	[GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E,
2167 };
2168 
2169 static const u8 adls_ddc_pin_map[] = {
2170 	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2171 	[GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1,
2172 	[GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2,
2173 	[GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3,
2174 	[GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4,
2175 };
2176 
2177 static const u8 gen9bc_tgp_ddc_pin_map[] = {
2178 	[GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B,
2179 	[GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C,
2180 	[GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D,
2181 };
2182 
2183 static const u8 adlp_ddc_pin_map[] = {
2184 	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2185 	[GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2186 	[GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1,
2187 	[GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2,
2188 	[GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3,
2189 	[GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4,
2190 };
2191 
2192 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
2193 {
2194 	const u8 *ddc_pin_map;
2195 	int i, n_entries;
2196 
2197 	if (HAS_PCH_MTP(i915) || IS_ALDERLAKE_P(i915)) {
2198 		ddc_pin_map = adlp_ddc_pin_map;
2199 		n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
2200 	} else if (IS_ALDERLAKE_S(i915)) {
2201 		ddc_pin_map = adls_ddc_pin_map;
2202 		n_entries = ARRAY_SIZE(adls_ddc_pin_map);
2203 	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
2204 		return vbt_pin;
2205 	} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
2206 		ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
2207 		n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
2208 	} else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
2209 		ddc_pin_map = gen9bc_tgp_ddc_pin_map;
2210 		n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
2211 	} else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
2212 		ddc_pin_map = icp_ddc_pin_map;
2213 		n_entries = ARRAY_SIZE(icp_ddc_pin_map);
2214 	} else if (HAS_PCH_CNP(i915)) {
2215 		ddc_pin_map = cnp_ddc_pin_map;
2216 		n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
2217 	} else {
2218 		/* Assuming direct map */
2219 		return vbt_pin;
2220 	}
2221 
2222 	for (i = 0; i < n_entries; i++) {
2223 		if (ddc_pin_map[i] == vbt_pin)
2224 			return i;
2225 	}
2226 
2227 	drm_dbg_kms(&i915->drm,
2228 		    "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
2229 		    vbt_pin);
2230 	return 0;
2231 }
2232 
2233 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
2234 {
2235 	enum port port;
2236 
2237 	if (!ddc_pin)
2238 		return PORT_NONE;
2239 
2240 	for_each_port(port) {
2241 		const struct intel_bios_encoder_data *devdata =
2242 			i915->display.vbt.ports[port];
2243 
2244 		if (devdata && ddc_pin == devdata->child.ddc_pin)
2245 			return port;
2246 	}
2247 
2248 	return PORT_NONE;
2249 }
2250 
2251 static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
2252 			     enum port port)
2253 {
2254 	struct drm_i915_private *i915 = devdata->i915;
2255 	struct child_device_config *child;
2256 	u8 mapped_ddc_pin;
2257 	enum port p;
2258 
2259 	if (!devdata->child.ddc_pin)
2260 		return;
2261 
2262 	mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin);
2263 	if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) {
2264 		drm_dbg_kms(&i915->drm,
2265 			    "Port %c has invalid DDC pin %d, "
2266 			    "sticking to defaults\n",
2267 			    port_name(port), mapped_ddc_pin);
2268 		devdata->child.ddc_pin = 0;
2269 		return;
2270 	}
2271 
2272 	p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin);
2273 	if (p == PORT_NONE)
2274 		return;
2275 
2276 	drm_dbg_kms(&i915->drm,
2277 		    "port %c trying to use the same DDC pin (0x%x) as port %c, "
2278 		    "disabling port %c DVI/HDMI support\n",
2279 		    port_name(port), mapped_ddc_pin,
2280 		    port_name(p), port_name(p));
2281 
2282 	/*
2283 	 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
2284 	 * couldn't exist on the shared port. Otherwise they share the same ddc
2285 	 * pin and system couldn't communicate with them separately.
2286 	 *
2287 	 * Give inverse child device order the priority, last one wins. Yes,
2288 	 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2289 	 * port A and port E with the same AUX ch and we must pick port E :(
2290 	 */
2291 	child = &i915->display.vbt.ports[p]->child;
2292 
2293 	child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2294 	child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2295 
2296 	child->ddc_pin = 0;
2297 }
2298 
2299 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
2300 {
2301 	enum port port;
2302 
2303 	if (!aux_ch)
2304 		return PORT_NONE;
2305 
2306 	for_each_port(port) {
2307 		const struct intel_bios_encoder_data *devdata =
2308 			i915->display.vbt.ports[port];
2309 
2310 		if (devdata && aux_ch == devdata->child.aux_channel)
2311 			return port;
2312 	}
2313 
2314 	return PORT_NONE;
2315 }
2316 
2317 static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
2318 			    enum port port)
2319 {
2320 	struct drm_i915_private *i915 = devdata->i915;
2321 	struct child_device_config *child;
2322 	enum port p;
2323 
2324 	p = get_port_by_aux_ch(i915, devdata->child.aux_channel);
2325 	if (p == PORT_NONE)
2326 		return;
2327 
2328 	drm_dbg_kms(&i915->drm,
2329 		    "port %c trying to use the same AUX CH (0x%x) as port %c, "
2330 		    "disabling port %c DP support\n",
2331 		    port_name(port), devdata->child.aux_channel,
2332 		    port_name(p), port_name(p));
2333 
2334 	/*
2335 	 * If we have multiple ports supposedly sharing the aux channel, then DP
2336 	 * couldn't exist on the shared port. Otherwise they share the same aux
2337 	 * channel and system couldn't communicate with them separately.
2338 	 *
2339 	 * Give inverse child device order the priority, last one wins. Yes,
2340 	 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2341 	 * port A and port E with the same AUX ch and we must pick port E :(
2342 	 */
2343 	child = &i915->display.vbt.ports[p]->child;
2344 
2345 	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2346 	child->aux_channel = 0;
2347 }
2348 
2349 static u8 dvo_port_type(u8 dvo_port)
2350 {
2351 	switch (dvo_port) {
2352 	case DVO_PORT_HDMIA:
2353 	case DVO_PORT_HDMIB:
2354 	case DVO_PORT_HDMIC:
2355 	case DVO_PORT_HDMID:
2356 	case DVO_PORT_HDMIE:
2357 	case DVO_PORT_HDMIF:
2358 	case DVO_PORT_HDMIG:
2359 	case DVO_PORT_HDMIH:
2360 	case DVO_PORT_HDMII:
2361 		return DVO_PORT_HDMIA;
2362 	case DVO_PORT_DPA:
2363 	case DVO_PORT_DPB:
2364 	case DVO_PORT_DPC:
2365 	case DVO_PORT_DPD:
2366 	case DVO_PORT_DPE:
2367 	case DVO_PORT_DPF:
2368 	case DVO_PORT_DPG:
2369 	case DVO_PORT_DPH:
2370 	case DVO_PORT_DPI:
2371 		return DVO_PORT_DPA;
2372 	case DVO_PORT_MIPIA:
2373 	case DVO_PORT_MIPIB:
2374 	case DVO_PORT_MIPIC:
2375 	case DVO_PORT_MIPID:
2376 		return DVO_PORT_MIPIA;
2377 	default:
2378 		return dvo_port;
2379 	}
2380 }
2381 
2382 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2383 				    const int port_mapping[][3], u8 dvo_port)
2384 {
2385 	enum port port;
2386 	int i;
2387 
2388 	for (port = PORT_A; port < n_ports; port++) {
2389 		for (i = 0; i < n_dvo; i++) {
2390 			if (port_mapping[port][i] == -1)
2391 				break;
2392 
2393 			if (dvo_port == port_mapping[port][i])
2394 				return port;
2395 		}
2396 	}
2397 
2398 	return PORT_NONE;
2399 }
2400 
2401 static enum port dvo_port_to_port(struct drm_i915_private *i915,
2402 				  u8 dvo_port)
2403 {
2404 	/*
2405 	 * Each DDI port can have more than one value on the "DVO Port" field,
2406 	 * so look for all the possible values for each port.
2407 	 */
2408 	static const int port_mapping[][3] = {
2409 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2410 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2411 		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2412 		[PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2413 		[PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2414 		[PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2415 		[PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2416 		[PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2417 		[PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2418 	};
2419 	/*
2420 	 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2421 	 * map to DDI A,B,TC1,TC2 respectively.
2422 	 */
2423 	static const int rkl_port_mapping[][3] = {
2424 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2425 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2426 		[PORT_C] = { -1 },
2427 		[PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2428 		[PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2429 	};
2430 	/*
2431 	 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2432 	 * PORT_F and PORT_G, we need to map that to correct VBT sections.
2433 	 */
2434 	static const int adls_port_mapping[][3] = {
2435 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2436 		[PORT_B] = { -1 },
2437 		[PORT_C] = { -1 },
2438 		[PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2439 		[PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2440 		[PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2441 		[PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2442 	};
2443 	static const int xelpd_port_mapping[][3] = {
2444 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2445 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2446 		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2447 		[PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2448 		[PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2449 		[PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2450 		[PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2451 		[PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2452 		[PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2453 	};
2454 
2455 	if (DISPLAY_VER(i915) >= 13)
2456 		return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2457 					  ARRAY_SIZE(xelpd_port_mapping[0]),
2458 					  xelpd_port_mapping,
2459 					  dvo_port);
2460 	else if (IS_ALDERLAKE_S(i915))
2461 		return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2462 					  ARRAY_SIZE(adls_port_mapping[0]),
2463 					  adls_port_mapping,
2464 					  dvo_port);
2465 	else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2466 		return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2467 					  ARRAY_SIZE(rkl_port_mapping[0]),
2468 					  rkl_port_mapping,
2469 					  dvo_port);
2470 	else
2471 		return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2472 					  ARRAY_SIZE(port_mapping[0]),
2473 					  port_mapping,
2474 					  dvo_port);
2475 }
2476 
2477 static enum port
2478 dsi_dvo_port_to_port(struct drm_i915_private *i915, u8 dvo_port)
2479 {
2480 	switch (dvo_port) {
2481 	case DVO_PORT_MIPIA:
2482 		return PORT_A;
2483 	case DVO_PORT_MIPIC:
2484 		if (DISPLAY_VER(i915) >= 11)
2485 			return PORT_B;
2486 		else
2487 			return PORT_C;
2488 	default:
2489 		return PORT_NONE;
2490 	}
2491 }
2492 
2493 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2494 {
2495 	switch (vbt_max_link_rate) {
2496 	default:
2497 	case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2498 		return 0;
2499 	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2500 		return 2000000;
2501 	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2502 		return 1350000;
2503 	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2504 		return 1000000;
2505 	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2506 		return 810000;
2507 	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2508 		return 540000;
2509 	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2510 		return 270000;
2511 	case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2512 		return 162000;
2513 	}
2514 }
2515 
2516 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2517 {
2518 	switch (vbt_max_link_rate) {
2519 	default:
2520 	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2521 		return 810000;
2522 	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2523 		return 540000;
2524 	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2525 		return 270000;
2526 	case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2527 		return 162000;
2528 	}
2529 }
2530 
2531 int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2532 {
2533 	if (!devdata || devdata->i915->display.vbt.version < 216)
2534 		return 0;
2535 
2536 	if (devdata->i915->display.vbt.version >= 230)
2537 		return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
2538 	else
2539 		return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
2540 }
2541 
2542 int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
2543 {
2544 	if (!devdata || devdata->i915->display.vbt.version < 244)
2545 		return 0;
2546 
2547 	return devdata->child.dp_max_lane_count + 1;
2548 }
2549 
2550 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2551 				 enum port port)
2552 {
2553 	struct drm_i915_private *i915 = devdata->i915;
2554 	bool is_hdmi;
2555 
2556 	if (port != PORT_A || DISPLAY_VER(i915) >= 12)
2557 		return;
2558 
2559 	if (!intel_bios_encoder_supports_dvi(devdata))
2560 		return;
2561 
2562 	is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2563 
2564 	drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
2565 		    is_hdmi ? "/HDMI" : "");
2566 
2567 	devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2568 	devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2569 }
2570 
2571 static bool
2572 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2573 {
2574 	return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2575 }
2576 
2577 bool
2578 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2579 {
2580 	return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2581 }
2582 
2583 bool
2584 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2585 {
2586 	return intel_bios_encoder_supports_dvi(devdata) &&
2587 		(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2588 }
2589 
2590 bool
2591 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2592 {
2593 	return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2594 }
2595 
2596 bool
2597 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2598 {
2599 	return intel_bios_encoder_supports_dp(devdata) &&
2600 		devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2601 }
2602 
2603 static bool
2604 intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata)
2605 {
2606 	return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT;
2607 }
2608 
2609 bool
2610 intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata)
2611 {
2612 	return devdata && HAS_LSPCON(devdata->i915) && devdata->child.lspcon;
2613 }
2614 
2615 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
2616 int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2617 {
2618 	if (!devdata || devdata->i915->display.vbt.version < 158)
2619 		return -1;
2620 
2621 	return devdata->child.hdmi_level_shifter_value;
2622 }
2623 
2624 int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2625 {
2626 	if (!devdata || devdata->i915->display.vbt.version < 204)
2627 		return 0;
2628 
2629 	switch (devdata->child.hdmi_max_data_rate) {
2630 	default:
2631 		MISSING_CASE(devdata->child.hdmi_max_data_rate);
2632 		fallthrough;
2633 	case HDMI_MAX_DATA_RATE_PLATFORM:
2634 		return 0;
2635 	case HDMI_MAX_DATA_RATE_594:
2636 		return 594000;
2637 	case HDMI_MAX_DATA_RATE_340:
2638 		return 340000;
2639 	case HDMI_MAX_DATA_RATE_300:
2640 		return 300000;
2641 	case HDMI_MAX_DATA_RATE_297:
2642 		return 297000;
2643 	case HDMI_MAX_DATA_RATE_165:
2644 		return 165000;
2645 	}
2646 }
2647 
2648 static bool is_port_valid(struct drm_i915_private *i915, enum port port)
2649 {
2650 	/*
2651 	 * On some ICL SKUs port F is not present, but broken VBTs mark
2652 	 * the port as present. Only try to initialize port F for the
2653 	 * SKUs that may actually have it.
2654 	 */
2655 	if (port == PORT_F && IS_ICELAKE(i915))
2656 		return IS_ICL_WITH_PORT_F(i915);
2657 
2658 	return true;
2659 }
2660 
2661 static void print_ddi_port(const struct intel_bios_encoder_data *devdata,
2662 			   enum port port)
2663 {
2664 	struct drm_i915_private *i915 = devdata->i915;
2665 	const struct child_device_config *child = &devdata->child;
2666 	bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt;
2667 	int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2668 
2669 	is_dvi = intel_bios_encoder_supports_dvi(devdata);
2670 	is_dp = intel_bios_encoder_supports_dp(devdata);
2671 	is_crt = intel_bios_encoder_supports_crt(devdata);
2672 	is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2673 	is_edp = intel_bios_encoder_supports_edp(devdata);
2674 	is_dsi = intel_bios_encoder_supports_dsi(devdata);
2675 
2676 	supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2677 	supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2678 
2679 	drm_dbg_kms(&i915->drm,
2680 		    "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2681 		    port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi,
2682 		    intel_bios_encoder_supports_dp_dual_mode(devdata),
2683 		    intel_bios_encoder_is_lspcon(devdata),
2684 		    supports_typec_usb, supports_tbt,
2685 		    devdata->dsc != NULL);
2686 
2687 	hdmi_level_shift = intel_bios_hdmi_level_shift(devdata);
2688 	if (hdmi_level_shift >= 0) {
2689 		drm_dbg_kms(&i915->drm,
2690 			    "Port %c VBT HDMI level shift: %d\n",
2691 			    port_name(port), hdmi_level_shift);
2692 	}
2693 
2694 	max_tmds_clock = intel_bios_hdmi_max_tmds_clock(devdata);
2695 	if (max_tmds_clock)
2696 		drm_dbg_kms(&i915->drm,
2697 			    "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2698 			    port_name(port), max_tmds_clock);
2699 
2700 	/* I_boost config for SKL and above */
2701 	dp_boost_level = intel_bios_dp_boost_level(devdata);
2702 	if (dp_boost_level)
2703 		drm_dbg_kms(&i915->drm,
2704 			    "Port %c VBT (e)DP boost level: %d\n",
2705 			    port_name(port), dp_boost_level);
2706 
2707 	hdmi_boost_level = intel_bios_hdmi_boost_level(devdata);
2708 	if (hdmi_boost_level)
2709 		drm_dbg_kms(&i915->drm,
2710 			    "Port %c VBT HDMI boost level: %d\n",
2711 			    port_name(port), hdmi_boost_level);
2712 
2713 	dp_max_link_rate = intel_bios_dp_max_link_rate(devdata);
2714 	if (dp_max_link_rate)
2715 		drm_dbg_kms(&i915->drm,
2716 			    "Port %c VBT DP max link rate: %d\n",
2717 			    port_name(port), dp_max_link_rate);
2718 
2719 	/*
2720 	 * FIXME need to implement support for VBT
2721 	 * vswing/preemph tables should this ever trigger.
2722 	 */
2723 	drm_WARN(&i915->drm, child->use_vbt_vswing,
2724 		 "Port %c asks to use VBT vswing/preemph tables\n",
2725 		 port_name(port));
2726 }
2727 
2728 static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
2729 {
2730 	struct drm_i915_private *i915 = devdata->i915;
2731 	const struct child_device_config *child = &devdata->child;
2732 	enum port port;
2733 
2734 	port = dvo_port_to_port(i915, child->dvo_port);
2735 	if (port == PORT_NONE && DISPLAY_VER(i915) >= 11)
2736 		port = dsi_dvo_port_to_port(i915, child->dvo_port);
2737 	if (port == PORT_NONE)
2738 		return;
2739 
2740 	if (!is_port_valid(i915, port)) {
2741 		drm_dbg_kms(&i915->drm,
2742 			    "VBT reports port %c as supported, but that can't be true: skipping\n",
2743 			    port_name(port));
2744 		return;
2745 	}
2746 
2747 	if (i915->display.vbt.ports[port]) {
2748 		drm_dbg_kms(&i915->drm,
2749 			    "More than one child device for port %c in VBT, using the first.\n",
2750 			    port_name(port));
2751 		return;
2752 	}
2753 
2754 	sanitize_device_type(devdata, port);
2755 
2756 	if (intel_bios_encoder_supports_dvi(devdata))
2757 		sanitize_ddc_pin(devdata, port);
2758 
2759 	if (intel_bios_encoder_supports_dp(devdata))
2760 		sanitize_aux_ch(devdata, port);
2761 
2762 	i915->display.vbt.ports[port] = devdata;
2763 }
2764 
2765 static bool has_ddi_port_info(struct drm_i915_private *i915)
2766 {
2767 	return DISPLAY_VER(i915) >= 5 || IS_G4X(i915);
2768 }
2769 
2770 static void parse_ddi_ports(struct drm_i915_private *i915)
2771 {
2772 	struct intel_bios_encoder_data *devdata;
2773 	enum port port;
2774 
2775 	if (!has_ddi_port_info(i915))
2776 		return;
2777 
2778 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2779 		parse_ddi_port(devdata);
2780 
2781 	for_each_port(port) {
2782 		if (i915->display.vbt.ports[port])
2783 			print_ddi_port(i915->display.vbt.ports[port], port);
2784 	}
2785 }
2786 
2787 static void
2788 parse_general_definitions(struct drm_i915_private *i915)
2789 {
2790 	const struct bdb_general_definitions *defs;
2791 	struct intel_bios_encoder_data *devdata;
2792 	const struct child_device_config *child;
2793 	int i, child_device_num;
2794 	u8 expected_size;
2795 	u16 block_size;
2796 	int bus_pin;
2797 
2798 	defs = bdb_find_section(i915, BDB_GENERAL_DEFINITIONS);
2799 	if (!defs) {
2800 		drm_dbg_kms(&i915->drm,
2801 			    "No general definition block is found, no devices defined.\n");
2802 		return;
2803 	}
2804 
2805 	block_size = get_blocksize(defs);
2806 	if (block_size < sizeof(*defs)) {
2807 		drm_dbg_kms(&i915->drm,
2808 			    "General definitions block too small (%u)\n",
2809 			    block_size);
2810 		return;
2811 	}
2812 
2813 	bus_pin = defs->crt_ddc_gmbus_pin;
2814 	drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2815 	if (intel_gmbus_is_valid_pin(i915, bus_pin))
2816 		i915->display.vbt.crt_ddc_pin = bus_pin;
2817 
2818 	if (i915->display.vbt.version < 106) {
2819 		expected_size = 22;
2820 	} else if (i915->display.vbt.version < 111) {
2821 		expected_size = 27;
2822 	} else if (i915->display.vbt.version < 195) {
2823 		expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2824 	} else if (i915->display.vbt.version == 195) {
2825 		expected_size = 37;
2826 	} else if (i915->display.vbt.version <= 215) {
2827 		expected_size = 38;
2828 	} else if (i915->display.vbt.version <= 250) {
2829 		expected_size = 39;
2830 	} else {
2831 		expected_size = sizeof(*child);
2832 		BUILD_BUG_ON(sizeof(*child) < 39);
2833 		drm_dbg(&i915->drm,
2834 			"Expected child device config size for VBT version %u not known; assuming %u\n",
2835 			i915->display.vbt.version, expected_size);
2836 	}
2837 
2838 	/* Flag an error for unexpected size, but continue anyway. */
2839 	if (defs->child_dev_size != expected_size)
2840 		drm_err(&i915->drm,
2841 			"Unexpected child device config size %u (expected %u for VBT version %u)\n",
2842 			defs->child_dev_size, expected_size, i915->display.vbt.version);
2843 
2844 	/* The legacy sized child device config is the minimum we need. */
2845 	if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2846 		drm_dbg_kms(&i915->drm,
2847 			    "Child device config size %u is too small.\n",
2848 			    defs->child_dev_size);
2849 		return;
2850 	}
2851 
2852 	/* get the number of child device */
2853 	child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2854 
2855 	for (i = 0; i < child_device_num; i++) {
2856 		child = child_device_ptr(defs, i);
2857 		if (!child->device_type)
2858 			continue;
2859 
2860 		drm_dbg_kms(&i915->drm,
2861 			    "Found VBT child device with type 0x%x\n",
2862 			    child->device_type);
2863 
2864 		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2865 		if (!devdata)
2866 			break;
2867 
2868 		devdata->i915 = i915;
2869 
2870 		/*
2871 		 * Copy as much as we know (sizeof) and is available
2872 		 * (child_dev_size) of the child device config. Accessing the
2873 		 * data must depend on VBT version.
2874 		 */
2875 		memcpy(&devdata->child, child,
2876 		       min_t(size_t, defs->child_dev_size, sizeof(*child)));
2877 
2878 		list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2879 	}
2880 
2881 	if (list_empty(&i915->display.vbt.display_devices))
2882 		drm_dbg_kms(&i915->drm,
2883 			    "no child dev is parsed from VBT\n");
2884 }
2885 
2886 /* Common defaults which may be overridden by VBT. */
2887 static void
2888 init_vbt_defaults(struct drm_i915_private *i915)
2889 {
2890 	i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2891 
2892 	/* general features */
2893 	i915->display.vbt.int_tv_support = 1;
2894 	i915->display.vbt.int_crt_support = 1;
2895 
2896 	/* driver features */
2897 	i915->display.vbt.int_lvds_support = 1;
2898 
2899 	/* Default to using SSC */
2900 	i915->display.vbt.lvds_use_ssc = 1;
2901 	/*
2902 	 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2903 	 * clock for LVDS.
2904 	 */
2905 	i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2906 								   !HAS_PCH_SPLIT(i915));
2907 	drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2908 		    i915->display.vbt.lvds_ssc_freq);
2909 }
2910 
2911 /* Common defaults which may be overridden by VBT. */
2912 static void
2913 init_vbt_panel_defaults(struct intel_panel *panel)
2914 {
2915 	/* Default to having backlight */
2916 	panel->vbt.backlight.present = true;
2917 
2918 	/* LFP panel data */
2919 	panel->vbt.lvds_dither = true;
2920 }
2921 
2922 /* Defaults to initialize only if there is no VBT. */
2923 static void
2924 init_vbt_missing_defaults(struct drm_i915_private *i915)
2925 {
2926 	enum port port;
2927 	int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2928 		    BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2929 
2930 	if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2931 		return;
2932 
2933 	for_each_port_masked(port, ports) {
2934 		struct intel_bios_encoder_data *devdata;
2935 		struct child_device_config *child;
2936 		enum phy phy = intel_port_to_phy(i915, port);
2937 
2938 		/*
2939 		 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2940 		 * to detect it.
2941 		 */
2942 		if (intel_phy_is_tc(i915, phy))
2943 			continue;
2944 
2945 		/* Create fake child device config */
2946 		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2947 		if (!devdata)
2948 			break;
2949 
2950 		devdata->i915 = i915;
2951 		child = &devdata->child;
2952 
2953 		if (port == PORT_F)
2954 			child->dvo_port = DVO_PORT_HDMIF;
2955 		else if (port == PORT_E)
2956 			child->dvo_port = DVO_PORT_HDMIE;
2957 		else
2958 			child->dvo_port = DVO_PORT_HDMIA + port;
2959 
2960 		if (port != PORT_A && port != PORT_E)
2961 			child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2962 
2963 		if (port != PORT_E)
2964 			child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2965 
2966 		if (port == PORT_A)
2967 			child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2968 
2969 		list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2970 
2971 		drm_dbg_kms(&i915->drm,
2972 			    "Generating default VBT child device with type 0x04%x on port %c\n",
2973 			    child->device_type, port_name(port));
2974 	}
2975 
2976 	/* Bypass some minimum baseline VBT version checks */
2977 	i915->display.vbt.version = 155;
2978 }
2979 
2980 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2981 {
2982 	const void *_vbt = vbt;
2983 
2984 	return _vbt + vbt->bdb_offset;
2985 }
2986 
2987 /**
2988  * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2989  * @buf:	pointer to a buffer to validate
2990  * @size:	size of the buffer
2991  *
2992  * Returns true on valid VBT.
2993  */
2994 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2995 {
2996 	const struct vbt_header *vbt = buf;
2997 	const struct bdb_header *bdb;
2998 
2999 	if (!vbt)
3000 		return false;
3001 
3002 	if (sizeof(struct vbt_header) > size) {
3003 		DRM_DEBUG_DRIVER("VBT header incomplete\n");
3004 		return false;
3005 	}
3006 
3007 	if (memcmp(vbt->signature, "$VBT", 4)) {
3008 		DRM_DEBUG_DRIVER("VBT invalid signature\n");
3009 		return false;
3010 	}
3011 
3012 	if (vbt->vbt_size > size) {
3013 		DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
3014 		return false;
3015 	}
3016 
3017 	size = vbt->vbt_size;
3018 
3019 	if (range_overflows_t(size_t,
3020 			      vbt->bdb_offset,
3021 			      sizeof(struct bdb_header),
3022 			      size)) {
3023 		DRM_DEBUG_DRIVER("BDB header incomplete\n");
3024 		return false;
3025 	}
3026 
3027 	bdb = get_bdb_header(vbt);
3028 	if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
3029 		DRM_DEBUG_DRIVER("BDB incomplete\n");
3030 		return false;
3031 	}
3032 
3033 	return vbt;
3034 }
3035 
3036 static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset)
3037 {
3038 	intel_uncore_write(uncore, PRIMARY_SPI_ADDRESS, offset);
3039 
3040 	return intel_uncore_read(uncore, PRIMARY_SPI_TRIGGER);
3041 }
3042 
3043 static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
3044 {
3045 	u32 count, data, found, store = 0;
3046 	u32 static_region, oprom_offset;
3047 	u32 oprom_size = 0x200000;
3048 	u16 vbt_size;
3049 	u32 *vbt;
3050 
3051 	static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
3052 	static_region &= OPTIONROM_SPI_REGIONID_MASK;
3053 	intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region);
3054 
3055 	oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET);
3056 	oprom_offset &= OROM_OFFSET_MASK;
3057 
3058 	for (count = 0; count < oprom_size; count += 4) {
3059 		data = intel_spi_read(&i915->uncore, oprom_offset + count);
3060 		if (data == *((const u32 *)"$VBT")) {
3061 			found = oprom_offset + count;
3062 			break;
3063 		}
3064 	}
3065 
3066 	if (count >= oprom_size)
3067 		goto err_not_found;
3068 
3069 	/* Get VBT size and allocate space for the VBT */
3070 	vbt_size = intel_spi_read(&i915->uncore,
3071 				  found + offsetof(struct vbt_header, vbt_size));
3072 	vbt_size &= 0xffff;
3073 
3074 	vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
3075 	if (!vbt)
3076 		goto err_not_found;
3077 
3078 	for (count = 0; count < vbt_size; count += 4)
3079 		*(vbt + store++) = intel_spi_read(&i915->uncore, found + count);
3080 
3081 	if (!intel_bios_is_valid_vbt(vbt, vbt_size))
3082 		goto err_free_vbt;
3083 
3084 	drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
3085 
3086 	return (struct vbt_header *)vbt;
3087 
3088 err_free_vbt:
3089 	kfree(vbt);
3090 err_not_found:
3091 	return NULL;
3092 }
3093 
3094 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
3095 {
3096 	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
3097 	void __iomem *p = NULL, *oprom;
3098 	struct vbt_header *vbt;
3099 	u16 vbt_size;
3100 	size_t i, size;
3101 
3102 	oprom = pci_map_rom(pdev, &size);
3103 	if (!oprom)
3104 		return NULL;
3105 
3106 	/* Scour memory looking for the VBT signature. */
3107 	for (i = 0; i + 4 < size; i += 4) {
3108 		if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
3109 			continue;
3110 
3111 		p = oprom + i;
3112 		size -= i;
3113 		break;
3114 	}
3115 
3116 	if (!p)
3117 		goto err_unmap_oprom;
3118 
3119 	if (sizeof(struct vbt_header) > size) {
3120 		drm_dbg(&i915->drm, "VBT header incomplete\n");
3121 		goto err_unmap_oprom;
3122 	}
3123 
3124 	vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
3125 	if (vbt_size > size) {
3126 		drm_dbg(&i915->drm,
3127 			"VBT incomplete (vbt_size overflows)\n");
3128 		goto err_unmap_oprom;
3129 	}
3130 
3131 	/* The rest will be validated by intel_bios_is_valid_vbt() */
3132 	vbt = kmalloc(vbt_size, GFP_KERNEL);
3133 	if (!vbt)
3134 		goto err_unmap_oprom;
3135 
3136 	memcpy_fromio(vbt, p, vbt_size);
3137 
3138 	if (!intel_bios_is_valid_vbt(vbt, vbt_size))
3139 		goto err_free_vbt;
3140 
3141 	pci_unmap_rom(pdev, oprom);
3142 
3143 	drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
3144 
3145 	return vbt;
3146 
3147 err_free_vbt:
3148 	kfree(vbt);
3149 err_unmap_oprom:
3150 	pci_unmap_rom(pdev, oprom);
3151 
3152 	return NULL;
3153 }
3154 
3155 /**
3156  * intel_bios_init - find VBT and initialize settings from the BIOS
3157  * @i915: i915 device instance
3158  *
3159  * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
3160  * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
3161  * initialize some defaults if the VBT is not present at all.
3162  */
3163 void intel_bios_init(struct drm_i915_private *i915)
3164 {
3165 	const struct vbt_header *vbt = i915->display.opregion.vbt;
3166 	struct vbt_header *oprom_vbt = NULL;
3167 	const struct bdb_header *bdb;
3168 
3169 	INIT_LIST_HEAD(&i915->display.vbt.display_devices);
3170 	INIT_LIST_HEAD(&i915->display.vbt.bdb_blocks);
3171 
3172 	if (!HAS_DISPLAY(i915)) {
3173 		drm_dbg_kms(&i915->drm,
3174 			    "Skipping VBT init due to disabled display.\n");
3175 		return;
3176 	}
3177 
3178 	init_vbt_defaults(i915);
3179 
3180 	/*
3181 	 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
3182 	 * PCI mapping
3183 	 */
3184 	if (!vbt && IS_DGFX(i915)) {
3185 		oprom_vbt = spi_oprom_get_vbt(i915);
3186 		vbt = oprom_vbt;
3187 	}
3188 
3189 	if (!vbt) {
3190 		oprom_vbt = oprom_get_vbt(i915);
3191 		vbt = oprom_vbt;
3192 	}
3193 
3194 	if (!vbt)
3195 		goto out;
3196 
3197 	bdb = get_bdb_header(vbt);
3198 	i915->display.vbt.version = bdb->version;
3199 
3200 	drm_dbg_kms(&i915->drm,
3201 		    "VBT signature \"%.*s\", BDB version %d\n",
3202 		    (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version);
3203 
3204 	init_bdb_blocks(i915, bdb);
3205 
3206 	/* Grab useful general definitions */
3207 	parse_general_features(i915);
3208 	parse_general_definitions(i915);
3209 	parse_driver_features(i915);
3210 
3211 	/* Depends on child device list */
3212 	parse_compression_parameters(i915);
3213 
3214 out:
3215 	if (!vbt) {
3216 		drm_info(&i915->drm,
3217 			 "Failed to find VBIOS tables (VBT)\n");
3218 		init_vbt_missing_defaults(i915);
3219 	}
3220 
3221 	/* Further processing on pre-parsed or generated child device data */
3222 	parse_sdvo_device_mapping(i915);
3223 	parse_ddi_ports(i915);
3224 
3225 	kfree(oprom_vbt);
3226 }
3227 
3228 static void intel_bios_init_panel(struct drm_i915_private *i915,
3229 				  struct intel_panel *panel,
3230 				  const struct intel_bios_encoder_data *devdata,
3231 				  const struct drm_edid *drm_edid,
3232 				  bool use_fallback)
3233 {
3234 	/* already have it? */
3235 	if (panel->vbt.panel_type >= 0) {
3236 		drm_WARN_ON(&i915->drm, !use_fallback);
3237 		return;
3238 	}
3239 
3240 	panel->vbt.panel_type = get_panel_type(i915, devdata,
3241 					       drm_edid, use_fallback);
3242 	if (panel->vbt.panel_type < 0) {
3243 		drm_WARN_ON(&i915->drm, use_fallback);
3244 		return;
3245 	}
3246 
3247 	init_vbt_panel_defaults(panel);
3248 
3249 	parse_panel_options(i915, panel);
3250 	parse_generic_dtd(i915, panel);
3251 	parse_lfp_data(i915, panel);
3252 	parse_lfp_backlight(i915, panel);
3253 	parse_sdvo_panel_data(i915, panel);
3254 	parse_panel_driver_features(i915, panel);
3255 	parse_power_conservation_features(i915, panel);
3256 	parse_edp(i915, panel);
3257 	parse_psr(i915, panel);
3258 	parse_mipi_config(i915, panel);
3259 	parse_mipi_sequence(i915, panel);
3260 }
3261 
3262 void intel_bios_init_panel_early(struct drm_i915_private *i915,
3263 				 struct intel_panel *panel,
3264 				 const struct intel_bios_encoder_data *devdata)
3265 {
3266 	intel_bios_init_panel(i915, panel, devdata, NULL, false);
3267 }
3268 
3269 void intel_bios_init_panel_late(struct drm_i915_private *i915,
3270 				struct intel_panel *panel,
3271 				const struct intel_bios_encoder_data *devdata,
3272 				const struct drm_edid *drm_edid)
3273 {
3274 	intel_bios_init_panel(i915, panel, devdata, drm_edid, true);
3275 }
3276 
3277 /**
3278  * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
3279  * @i915: i915 device instance
3280  */
3281 void intel_bios_driver_remove(struct drm_i915_private *i915)
3282 {
3283 	struct intel_bios_encoder_data *devdata, *nd;
3284 	struct bdb_block_entry *entry, *ne;
3285 
3286 	list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) {
3287 		list_del(&devdata->node);
3288 		kfree(devdata->dsc);
3289 		kfree(devdata);
3290 	}
3291 
3292 	list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) {
3293 		list_del(&entry->node);
3294 		kfree(entry);
3295 	}
3296 }
3297 
3298 void intel_bios_fini_panel(struct intel_panel *panel)
3299 {
3300 	kfree(panel->vbt.sdvo_lvds_vbt_mode);
3301 	panel->vbt.sdvo_lvds_vbt_mode = NULL;
3302 	kfree(panel->vbt.lfp_lvds_vbt_mode);
3303 	panel->vbt.lfp_lvds_vbt_mode = NULL;
3304 	kfree(panel->vbt.dsi.data);
3305 	panel->vbt.dsi.data = NULL;
3306 	kfree(panel->vbt.dsi.pps);
3307 	panel->vbt.dsi.pps = NULL;
3308 	kfree(panel->vbt.dsi.config);
3309 	panel->vbt.dsi.config = NULL;
3310 	kfree(panel->vbt.dsi.deassert_seq);
3311 	panel->vbt.dsi.deassert_seq = NULL;
3312 }
3313 
3314 /**
3315  * intel_bios_is_tv_present - is integrated TV present in VBT
3316  * @i915: i915 device instance
3317  *
3318  * Return true if TV is present. If no child devices were parsed from VBT,
3319  * assume TV is present.
3320  */
3321 bool intel_bios_is_tv_present(struct drm_i915_private *i915)
3322 {
3323 	const struct intel_bios_encoder_data *devdata;
3324 
3325 	if (!i915->display.vbt.int_tv_support)
3326 		return false;
3327 
3328 	if (list_empty(&i915->display.vbt.display_devices))
3329 		return true;
3330 
3331 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3332 		const struct child_device_config *child = &devdata->child;
3333 
3334 		/*
3335 		 * If the device type is not TV, continue.
3336 		 */
3337 		switch (child->device_type) {
3338 		case DEVICE_TYPE_INT_TV:
3339 		case DEVICE_TYPE_TV:
3340 		case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
3341 			break;
3342 		default:
3343 			continue;
3344 		}
3345 		/* Only when the addin_offset is non-zero, it is regarded
3346 		 * as present.
3347 		 */
3348 		if (child->addin_offset)
3349 			return true;
3350 	}
3351 
3352 	return false;
3353 }
3354 
3355 /**
3356  * intel_bios_is_lvds_present - is LVDS present in VBT
3357  * @i915:	i915 device instance
3358  * @i2c_pin:	i2c pin for LVDS if present
3359  *
3360  * Return true if LVDS is present. If no child devices were parsed from VBT,
3361  * assume LVDS is present.
3362  */
3363 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
3364 {
3365 	const struct intel_bios_encoder_data *devdata;
3366 
3367 	if (list_empty(&i915->display.vbt.display_devices))
3368 		return true;
3369 
3370 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3371 		const struct child_device_config *child = &devdata->child;
3372 
3373 		/* If the device type is not LFP, continue.
3374 		 * We have to check both the new identifiers as well as the
3375 		 * old for compatibility with some BIOSes.
3376 		 */
3377 		if (child->device_type != DEVICE_TYPE_INT_LFP &&
3378 		    child->device_type != DEVICE_TYPE_LFP)
3379 			continue;
3380 
3381 		if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
3382 			*i2c_pin = child->i2c_pin;
3383 
3384 		/* However, we cannot trust the BIOS writers to populate
3385 		 * the VBT correctly.  Since LVDS requires additional
3386 		 * information from AIM blocks, a non-zero addin offset is
3387 		 * a good indicator that the LVDS is actually present.
3388 		 */
3389 		if (child->addin_offset)
3390 			return true;
3391 
3392 		/* But even then some BIOS writers perform some black magic
3393 		 * and instantiate the device without reference to any
3394 		 * additional data.  Trust that if the VBT was written into
3395 		 * the OpRegion then they have validated the LVDS's existence.
3396 		 */
3397 		if (i915->display.opregion.vbt)
3398 			return true;
3399 	}
3400 
3401 	return false;
3402 }
3403 
3404 /**
3405  * intel_bios_is_port_present - is the specified digital port present
3406  * @i915:	i915 device instance
3407  * @port:	port to check
3408  *
3409  * Return true if the device in %port is present.
3410  */
3411 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
3412 {
3413 	const struct intel_bios_encoder_data *devdata;
3414 
3415 	if (WARN_ON(!has_ddi_port_info(i915)))
3416 		return true;
3417 
3418 	if (!is_port_valid(i915, port))
3419 		return false;
3420 
3421 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3422 		const struct child_device_config *child = &devdata->child;
3423 
3424 		if (dvo_port_to_port(i915, child->dvo_port) == port)
3425 			return true;
3426 	}
3427 
3428 	return false;
3429 }
3430 
3431 bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3432 {
3433 	const struct child_device_config *child = &devdata->child;
3434 
3435 	if (!intel_bios_encoder_supports_dp(devdata) ||
3436 	    !intel_bios_encoder_supports_hdmi(devdata))
3437 		return false;
3438 
3439 	if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
3440 		return true;
3441 
3442 	/* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3443 	if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
3444 	    child->aux_channel != 0)
3445 		return true;
3446 
3447 	return false;
3448 }
3449 
3450 /**
3451  * intel_bios_is_dsi_present - is DSI present in VBT
3452  * @i915:	i915 device instance
3453  * @port:	port for DSI if present
3454  *
3455  * Return true if DSI is present, and return the port in %port.
3456  */
3457 bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
3458 			       enum port *port)
3459 {
3460 	const struct intel_bios_encoder_data *devdata;
3461 
3462 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3463 		const struct child_device_config *child = &devdata->child;
3464 		u8 dvo_port = child->dvo_port;
3465 
3466 		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3467 			continue;
3468 
3469 		if (dsi_dvo_port_to_port(i915, dvo_port) == PORT_NONE) {
3470 			drm_dbg_kms(&i915->drm,
3471 				    "VBT has unsupported DSI port %c\n",
3472 				    port_name(dvo_port - DVO_PORT_MIPIA));
3473 			continue;
3474 		}
3475 
3476 		if (port)
3477 			*port = dsi_dvo_port_to_port(i915, dvo_port);
3478 		return true;
3479 	}
3480 
3481 	return false;
3482 }
3483 
3484 static void fill_dsc(struct intel_crtc_state *crtc_state,
3485 		     struct dsc_compression_parameters_entry *dsc,
3486 		     int dsc_max_bpc)
3487 {
3488 	struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3489 	int bpc = 8;
3490 
3491 	vdsc_cfg->dsc_version_major = dsc->version_major;
3492 	vdsc_cfg->dsc_version_minor = dsc->version_minor;
3493 
3494 	if (dsc->support_12bpc && dsc_max_bpc >= 12)
3495 		bpc = 12;
3496 	else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3497 		bpc = 10;
3498 	else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3499 		bpc = 8;
3500 	else
3501 		DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
3502 			      dsc_max_bpc);
3503 
3504 	crtc_state->pipe_bpp = bpc * 3;
3505 
3506 	crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
3507 					     VBT_DSC_MAX_BPP(dsc->max_bpp));
3508 
3509 	/*
3510 	 * FIXME: This is ugly, and slice count should take DSC engine
3511 	 * throughput etc. into account.
3512 	 *
3513 	 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3514 	 */
3515 	if (dsc->slices_per_line & BIT(2)) {
3516 		crtc_state->dsc.slice_count = 4;
3517 	} else if (dsc->slices_per_line & BIT(1)) {
3518 		crtc_state->dsc.slice_count = 2;
3519 	} else {
3520 		/* FIXME */
3521 		if (!(dsc->slices_per_line & BIT(0)))
3522 			DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
3523 
3524 		crtc_state->dsc.slice_count = 1;
3525 	}
3526 
3527 	if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3528 	    crtc_state->dsc.slice_count != 0)
3529 		DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
3530 			      crtc_state->hw.adjusted_mode.crtc_hdisplay,
3531 			      crtc_state->dsc.slice_count);
3532 
3533 	/*
3534 	 * The VBT rc_buffer_block_size and rc_buffer_size definitions
3535 	 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3536 	 */
3537 	vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
3538 							    dsc->rc_buffer_size);
3539 
3540 	/* FIXME: DSI spec says bpc + 1 for this one */
3541 	vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3542 
3543 	vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3544 
3545 	vdsc_cfg->slice_height = dsc->slice_height;
3546 }
3547 
3548 /* FIXME: initially DSI specific */
3549 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3550 			       struct intel_crtc_state *crtc_state,
3551 			       int dsc_max_bpc)
3552 {
3553 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3554 	const struct intel_bios_encoder_data *devdata;
3555 
3556 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3557 		const struct child_device_config *child = &devdata->child;
3558 
3559 		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3560 			continue;
3561 
3562 		if (dsi_dvo_port_to_port(i915, child->dvo_port) == encoder->port) {
3563 			if (!devdata->dsc)
3564 				return false;
3565 
3566 			if (crtc_state)
3567 				fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
3568 
3569 			return true;
3570 		}
3571 	}
3572 
3573 	return false;
3574 }
3575 
3576 static const u8 adlp_aux_ch_map[] = {
3577 	[AUX_CH_A] = DP_AUX_A,
3578 	[AUX_CH_B] = DP_AUX_B,
3579 	[AUX_CH_C] = DP_AUX_C,
3580 	[AUX_CH_D_XELPD] = DP_AUX_D,
3581 	[AUX_CH_E_XELPD] = DP_AUX_E,
3582 	[AUX_CH_USBC1] = DP_AUX_F,
3583 	[AUX_CH_USBC2] = DP_AUX_G,
3584 	[AUX_CH_USBC3] = DP_AUX_H,
3585 	[AUX_CH_USBC4] = DP_AUX_I,
3586 };
3587 
3588 /*
3589  * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3590  * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3591  */
3592 static const u8 adls_aux_ch_map[] = {
3593 	[AUX_CH_A] = DP_AUX_A,
3594 	[AUX_CH_USBC1] = DP_AUX_B,
3595 	[AUX_CH_USBC2] = DP_AUX_C,
3596 	[AUX_CH_USBC3] = DP_AUX_D,
3597 	[AUX_CH_USBC4] = DP_AUX_E,
3598 };
3599 
3600 /*
3601  * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3602  * map to DDI A,B,TC1,TC2 respectively.
3603  */
3604 static const u8 rkl_aux_ch_map[] = {
3605 	[AUX_CH_A] = DP_AUX_A,
3606 	[AUX_CH_B] = DP_AUX_B,
3607 	[AUX_CH_USBC1] = DP_AUX_C,
3608 	[AUX_CH_USBC2] = DP_AUX_D,
3609 };
3610 
3611 static const u8 direct_aux_ch_map[] = {
3612 	[AUX_CH_A] = DP_AUX_A,
3613 	[AUX_CH_B] = DP_AUX_B,
3614 	[AUX_CH_C] = DP_AUX_C,
3615 	[AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */
3616 	[AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */
3617 	[AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */
3618 	[AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */
3619 	[AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */
3620 	[AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */
3621 };
3622 
3623 static enum aux_ch map_aux_ch(struct drm_i915_private *i915, u8 aux_channel)
3624 {
3625 	const u8 *aux_ch_map;
3626 	int i, n_entries;
3627 
3628 	if (DISPLAY_VER(i915) >= 13) {
3629 		aux_ch_map = adlp_aux_ch_map;
3630 		n_entries = ARRAY_SIZE(adlp_aux_ch_map);
3631 	} else if (IS_ALDERLAKE_S(i915)) {
3632 		aux_ch_map = adls_aux_ch_map;
3633 		n_entries = ARRAY_SIZE(adls_aux_ch_map);
3634 	} else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) {
3635 		aux_ch_map = rkl_aux_ch_map;
3636 		n_entries = ARRAY_SIZE(rkl_aux_ch_map);
3637 	} else {
3638 		aux_ch_map = direct_aux_ch_map;
3639 		n_entries = ARRAY_SIZE(direct_aux_ch_map);
3640 	}
3641 
3642 	for (i = 0; i < n_entries; i++) {
3643 		if (aux_ch_map[i] == aux_channel)
3644 			return i;
3645 	}
3646 
3647 	drm_dbg_kms(&i915->drm,
3648 		    "Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n",
3649 		    aux_channel);
3650 
3651 	return AUX_CH_NONE;
3652 }
3653 
3654 enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata)
3655 {
3656 	if (!devdata || !devdata->child.aux_channel)
3657 		return AUX_CH_NONE;
3658 
3659 	return map_aux_ch(devdata->i915, devdata->child.aux_channel);
3660 }
3661 
3662 int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3663 {
3664 	if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3665 		return 0;
3666 
3667 	return translate_iboost(devdata->child.dp_iboost_level);
3668 }
3669 
3670 int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3671 {
3672 	if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3673 		return 0;
3674 
3675 	return translate_iboost(devdata->child.hdmi_iboost_level);
3676 }
3677 
3678 int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata)
3679 {
3680 	if (!devdata || !devdata->child.ddc_pin)
3681 		return 0;
3682 
3683 	return map_ddc_pin(devdata->i915, devdata->child.ddc_pin);
3684 }
3685 
3686 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3687 {
3688 	return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c;
3689 }
3690 
3691 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3692 {
3693 	return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt;
3694 }
3695 
3696 bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata)
3697 {
3698 	return devdata && devdata->child.lane_reversal;
3699 }
3700 
3701 bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata)
3702 {
3703 	return devdata && devdata->child.hpd_invert;
3704 }
3705 
3706 const struct intel_bios_encoder_data *
3707 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3708 {
3709 	return i915->display.vbt.ports[port];
3710 }
3711