1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <drm/display/drm_dp_helper.h> 29 #include <drm/display/drm_dsc_helper.h> 30 #include <drm/drm_edid.h> 31 32 #include "i915_drv.h" 33 #include "i915_reg.h" 34 #include "intel_display.h" 35 #include "intel_display_types.h" 36 #include "intel_gmbus.h" 37 38 #define _INTEL_BIOS_PRIVATE 39 #include "intel_vbt_defs.h" 40 41 /** 42 * DOC: Video BIOS Table (VBT) 43 * 44 * The Video BIOS Table, or VBT, provides platform and board specific 45 * configuration information to the driver that is not discoverable or available 46 * through other means. The configuration is mostly related to display 47 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 48 * the PCI ROM. 49 * 50 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 51 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 52 * contain the actual configuration information. The VBT Header, and thus the 53 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 54 * BDB Header. The data blocks are concatenated after the BDB Header. The data 55 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 56 * data. (Block 53, the MIPI Sequence Block is an exception.) 57 * 58 * The driver parses the VBT during load. The relevant information is stored in 59 * driver private data for ease of use, and the actual VBT is not read after 60 * that. 61 */ 62 63 /* Wrapper for VBT child device config */ 64 struct intel_bios_encoder_data { 65 struct drm_i915_private *i915; 66 67 struct child_device_config child; 68 struct dsc_compression_parameters_entry *dsc; 69 struct list_head node; 70 }; 71 72 #define SLAVE_ADDR1 0x70 73 #define SLAVE_ADDR2 0x72 74 75 /* Get BDB block size given a pointer to Block ID. */ 76 static u32 _get_blocksize(const u8 *block_base) 77 { 78 /* The MIPI Sequence Block v3+ has a separate size field. */ 79 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 80 return *((const u32 *)(block_base + 4)); 81 else 82 return *((const u16 *)(block_base + 1)); 83 } 84 85 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 86 static u32 get_blocksize(const void *block_data) 87 { 88 return _get_blocksize(block_data - 3); 89 } 90 91 static const void * 92 find_raw_section(const void *_bdb, enum bdb_block_id section_id) 93 { 94 const struct bdb_header *bdb = _bdb; 95 const u8 *base = _bdb; 96 int index = 0; 97 u32 total, current_size; 98 enum bdb_block_id current_id; 99 100 /* skip to first section */ 101 index += bdb->header_size; 102 total = bdb->bdb_size; 103 104 /* walk the sections looking for section_id */ 105 while (index + 3 < total) { 106 current_id = *(base + index); 107 current_size = _get_blocksize(base + index); 108 index += 3; 109 110 if (index + current_size > total) 111 return NULL; 112 113 if (current_id == section_id) 114 return base + index; 115 116 index += current_size; 117 } 118 119 return NULL; 120 } 121 122 /* 123 * Offset from the start of BDB to the start of the 124 * block data (just past the block header). 125 */ 126 static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id) 127 { 128 const void *block; 129 130 block = find_raw_section(bdb, section_id); 131 if (!block) 132 return 0; 133 134 return block - bdb; 135 } 136 137 struct bdb_block_entry { 138 struct list_head node; 139 enum bdb_block_id section_id; 140 u8 data[]; 141 }; 142 143 static const void * 144 bdb_find_section(struct drm_i915_private *i915, 145 enum bdb_block_id section_id) 146 { 147 struct bdb_block_entry *entry; 148 149 list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) { 150 if (entry->section_id == section_id) 151 return entry->data + 3; 152 } 153 154 return NULL; 155 } 156 157 static const struct { 158 enum bdb_block_id section_id; 159 size_t min_size; 160 } bdb_blocks[] = { 161 { .section_id = BDB_GENERAL_FEATURES, 162 .min_size = sizeof(struct bdb_general_features), }, 163 { .section_id = BDB_GENERAL_DEFINITIONS, 164 .min_size = sizeof(struct bdb_general_definitions), }, 165 { .section_id = BDB_PSR, 166 .min_size = sizeof(struct bdb_psr), }, 167 { .section_id = BDB_DRIVER_FEATURES, 168 .min_size = sizeof(struct bdb_driver_features), }, 169 { .section_id = BDB_SDVO_LVDS_OPTIONS, 170 .min_size = sizeof(struct bdb_sdvo_lvds_options), }, 171 { .section_id = BDB_SDVO_PANEL_DTDS, 172 .min_size = sizeof(struct bdb_sdvo_panel_dtds), }, 173 { .section_id = BDB_EDP, 174 .min_size = sizeof(struct bdb_edp), }, 175 { .section_id = BDB_LVDS_OPTIONS, 176 .min_size = sizeof(struct bdb_lvds_options), }, 177 /* 178 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS, 179 * so keep the two ordered. 180 */ 181 { .section_id = BDB_LVDS_LFP_DATA_PTRS, 182 .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), }, 183 { .section_id = BDB_LVDS_LFP_DATA, 184 .min_size = 0, /* special case */ }, 185 { .section_id = BDB_LVDS_BACKLIGHT, 186 .min_size = sizeof(struct bdb_lfp_backlight_data), }, 187 { .section_id = BDB_LFP_POWER, 188 .min_size = sizeof(struct bdb_lfp_power), }, 189 { .section_id = BDB_MIPI_CONFIG, 190 .min_size = sizeof(struct bdb_mipi_config), }, 191 { .section_id = BDB_MIPI_SEQUENCE, 192 .min_size = sizeof(struct bdb_mipi_sequence) }, 193 { .section_id = BDB_COMPRESSION_PARAMETERS, 194 .min_size = sizeof(struct bdb_compression_parameters), }, 195 { .section_id = BDB_GENERIC_DTD, 196 .min_size = sizeof(struct bdb_generic_dtd), }, 197 }; 198 199 static size_t lfp_data_min_size(struct drm_i915_private *i915) 200 { 201 const struct bdb_lvds_lfp_data_ptrs *ptrs; 202 size_t size; 203 204 ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS); 205 if (!ptrs) 206 return 0; 207 208 size = sizeof(struct bdb_lvds_lfp_data); 209 if (ptrs->panel_name.table_size) 210 size = max(size, ptrs->panel_name.offset + 211 sizeof(struct bdb_lvds_lfp_data_tail)); 212 213 return size; 214 } 215 216 static bool validate_lfp_data_ptrs(const void *bdb, 217 const struct bdb_lvds_lfp_data_ptrs *ptrs) 218 { 219 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size; 220 int data_block_size, lfp_data_size; 221 const void *data_block; 222 int i; 223 224 data_block = find_raw_section(bdb, BDB_LVDS_LFP_DATA); 225 if (!data_block) 226 return false; 227 228 data_block_size = get_blocksize(data_block); 229 if (data_block_size == 0) 230 return false; 231 232 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */ 233 if (ptrs->lvds_entries != 3) 234 return false; 235 236 fp_timing_size = ptrs->ptr[0].fp_timing.table_size; 237 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size; 238 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size; 239 panel_name_size = ptrs->panel_name.table_size; 240 241 /* fp_timing has variable size */ 242 if (fp_timing_size < 32 || 243 dvo_timing_size != sizeof(struct lvds_dvo_timing) || 244 panel_pnp_id_size != sizeof(struct lvds_pnp_id)) 245 return false; 246 247 /* panel_name is not present in old VBTs */ 248 if (panel_name_size != 0 && 249 panel_name_size != sizeof(struct lvds_lfp_panel_name)) 250 return false; 251 252 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset; 253 if (16 * lfp_data_size > data_block_size) 254 return false; 255 256 /* make sure the table entries have uniform size */ 257 for (i = 1; i < 16; i++) { 258 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size || 259 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size || 260 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size) 261 return false; 262 263 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size || 264 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size || 265 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size) 266 return false; 267 } 268 269 /* 270 * Except for vlv/chv machines all real VBTs seem to have 6 271 * unaccounted bytes in the fp_timing table. And it doesn't 272 * appear to be a really intentional hole as the fp_timing 273 * 0xffff terminator is always within those 6 missing bytes. 274 */ 275 if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size) 276 fp_timing_size += 6; 277 278 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size) 279 return false; 280 281 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset || 282 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset || 283 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size) 284 return false; 285 286 /* make sure the tables fit inside the data block */ 287 for (i = 0; i < 16; i++) { 288 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size || 289 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size || 290 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size) 291 return false; 292 } 293 294 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size) 295 return false; 296 297 /* make sure fp_timing terminators are present at expected locations */ 298 for (i = 0; i < 16; i++) { 299 const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset + 300 fp_timing_size - 2; 301 302 if (*t != 0xffff) 303 return false; 304 } 305 306 return true; 307 } 308 309 /* make the data table offsets relative to the data block */ 310 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block) 311 { 312 struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block; 313 u32 offset; 314 int i; 315 316 offset = raw_block_offset(bdb, BDB_LVDS_LFP_DATA); 317 318 for (i = 0; i < 16; i++) { 319 if (ptrs->ptr[i].fp_timing.offset < offset || 320 ptrs->ptr[i].dvo_timing.offset < offset || 321 ptrs->ptr[i].panel_pnp_id.offset < offset) 322 return false; 323 324 ptrs->ptr[i].fp_timing.offset -= offset; 325 ptrs->ptr[i].dvo_timing.offset -= offset; 326 ptrs->ptr[i].panel_pnp_id.offset -= offset; 327 } 328 329 if (ptrs->panel_name.table_size) { 330 if (ptrs->panel_name.offset < offset) 331 return false; 332 333 ptrs->panel_name.offset -= offset; 334 } 335 336 return validate_lfp_data_ptrs(bdb, ptrs); 337 } 338 339 static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table, 340 int table_size, int total_size) 341 { 342 if (total_size < table_size) 343 return total_size; 344 345 table->table_size = table_size; 346 table->offset = total_size - table_size; 347 348 return total_size - table_size; 349 } 350 351 static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next, 352 const struct lvds_lfp_data_ptr_table *prev, 353 int size) 354 { 355 next->table_size = prev->table_size; 356 next->offset = prev->offset + size; 357 } 358 359 static void *generate_lfp_data_ptrs(struct drm_i915_private *i915, 360 const void *bdb) 361 { 362 int i, size, table_size, block_size, offset, fp_timing_size; 363 struct bdb_lvds_lfp_data_ptrs *ptrs; 364 const void *block; 365 void *ptrs_block; 366 367 /* 368 * The hardcoded fp_timing_size is only valid for 369 * modernish VBTs. All older VBTs definitely should 370 * include block 41 and thus we don't need to 371 * generate one. 372 */ 373 if (i915->display.vbt.version < 155) 374 return NULL; 375 376 fp_timing_size = 38; 377 378 block = find_raw_section(bdb, BDB_LVDS_LFP_DATA); 379 if (!block) 380 return NULL; 381 382 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n"); 383 384 block_size = get_blocksize(block); 385 386 size = fp_timing_size + sizeof(struct lvds_dvo_timing) + 387 sizeof(struct lvds_pnp_id); 388 if (size * 16 > block_size) 389 return NULL; 390 391 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL); 392 if (!ptrs_block) 393 return NULL; 394 395 *(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS; 396 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs); 397 ptrs = ptrs_block + 3; 398 399 table_size = sizeof(struct lvds_pnp_id); 400 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size); 401 402 table_size = sizeof(struct lvds_dvo_timing); 403 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size); 404 405 table_size = fp_timing_size; 406 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size); 407 408 if (ptrs->ptr[0].fp_timing.table_size) 409 ptrs->lvds_entries++; 410 if (ptrs->ptr[0].dvo_timing.table_size) 411 ptrs->lvds_entries++; 412 if (ptrs->ptr[0].panel_pnp_id.table_size) 413 ptrs->lvds_entries++; 414 415 if (size != 0 || ptrs->lvds_entries != 3) { 416 kfree(ptrs_block); 417 return NULL; 418 } 419 420 size = fp_timing_size + sizeof(struct lvds_dvo_timing) + 421 sizeof(struct lvds_pnp_id); 422 for (i = 1; i < 16; i++) { 423 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size); 424 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size); 425 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size); 426 } 427 428 table_size = sizeof(struct lvds_lfp_panel_name); 429 430 if (16 * (size + table_size) <= block_size) { 431 ptrs->panel_name.table_size = table_size; 432 ptrs->panel_name.offset = size * 16; 433 } 434 435 offset = block - bdb; 436 437 for (i = 0; i < 16; i++) { 438 ptrs->ptr[i].fp_timing.offset += offset; 439 ptrs->ptr[i].dvo_timing.offset += offset; 440 ptrs->ptr[i].panel_pnp_id.offset += offset; 441 } 442 443 if (ptrs->panel_name.table_size) 444 ptrs->panel_name.offset += offset; 445 446 return ptrs_block; 447 } 448 449 static void 450 init_bdb_block(struct drm_i915_private *i915, 451 const void *bdb, enum bdb_block_id section_id, 452 size_t min_size) 453 { 454 struct bdb_block_entry *entry; 455 void *temp_block = NULL; 456 const void *block; 457 size_t block_size; 458 459 block = find_raw_section(bdb, section_id); 460 461 /* Modern VBTs lack the LFP data table pointers block, make one up */ 462 if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) { 463 temp_block = generate_lfp_data_ptrs(i915, bdb); 464 if (temp_block) 465 block = temp_block + 3; 466 } 467 if (!block) 468 return; 469 470 drm_WARN(&i915->drm, min_size == 0, 471 "Block %d min_size is zero\n", section_id); 472 473 block_size = get_blocksize(block); 474 475 /* 476 * Version number and new block size are considered 477 * part of the header for MIPI sequenece block v3+. 478 */ 479 if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3) 480 block_size += 5; 481 482 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3), 483 GFP_KERNEL); 484 if (!entry) { 485 kfree(temp_block); 486 return; 487 } 488 489 entry->section_id = section_id; 490 memcpy(entry->data, block - 3, block_size + 3); 491 492 kfree(temp_block); 493 494 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n", 495 section_id, block_size, min_size); 496 497 if (section_id == BDB_LVDS_LFP_DATA_PTRS && 498 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) { 499 drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n"); 500 kfree(entry); 501 return; 502 } 503 504 list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks); 505 } 506 507 static void init_bdb_blocks(struct drm_i915_private *i915, 508 const void *bdb) 509 { 510 int i; 511 512 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) { 513 enum bdb_block_id section_id = bdb_blocks[i].section_id; 514 size_t min_size = bdb_blocks[i].min_size; 515 516 if (section_id == BDB_LVDS_LFP_DATA) 517 min_size = lfp_data_min_size(i915); 518 519 init_bdb_block(i915, bdb, section_id, min_size); 520 } 521 } 522 523 static void 524 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 525 const struct lvds_dvo_timing *dvo_timing) 526 { 527 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 528 dvo_timing->hactive_lo; 529 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 530 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 531 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 532 ((dvo_timing->hsync_pulse_width_hi << 8) | 533 dvo_timing->hsync_pulse_width_lo); 534 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 535 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 536 537 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 538 dvo_timing->vactive_lo; 539 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 540 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 541 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 542 ((dvo_timing->vsync_pulse_width_hi << 4) | 543 dvo_timing->vsync_pulse_width_lo); 544 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 545 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 546 panel_fixed_mode->clock = dvo_timing->clock * 10; 547 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 548 549 if (dvo_timing->hsync_positive) 550 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 551 else 552 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 553 554 if (dvo_timing->vsync_positive) 555 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 556 else 557 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 558 559 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 560 dvo_timing->himage_lo; 561 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 562 dvo_timing->vimage_lo; 563 564 /* Some VBTs have bogus h/vtotal values */ 565 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 566 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 567 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 568 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 569 570 drm_mode_set_name(panel_fixed_mode); 571 } 572 573 static const struct lvds_dvo_timing * 574 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data, 575 const struct bdb_lvds_lfp_data_ptrs *ptrs, 576 int index) 577 { 578 return (const void *)data + ptrs->ptr[index].dvo_timing.offset; 579 } 580 581 static const struct lvds_fp_timing * 582 get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data, 583 const struct bdb_lvds_lfp_data_ptrs *ptrs, 584 int index) 585 { 586 return (const void *)data + ptrs->ptr[index].fp_timing.offset; 587 } 588 589 static const struct lvds_pnp_id * 590 get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data, 591 const struct bdb_lvds_lfp_data_ptrs *ptrs, 592 int index) 593 { 594 return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset; 595 } 596 597 static const struct bdb_lvds_lfp_data_tail * 598 get_lfp_data_tail(const struct bdb_lvds_lfp_data *data, 599 const struct bdb_lvds_lfp_data_ptrs *ptrs) 600 { 601 if (ptrs->panel_name.table_size) 602 return (const void *)data + ptrs->panel_name.offset; 603 else 604 return NULL; 605 } 606 607 static void dump_pnp_id(struct drm_i915_private *i915, 608 const struct lvds_pnp_id *pnp_id, 609 const char *name) 610 { 611 u16 mfg_name = be16_to_cpu((__force __be16)pnp_id->mfg_name); 612 char vend[4]; 613 614 drm_dbg_kms(&i915->drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n", 615 name, drm_edid_decode_mfg_id(mfg_name, vend), 616 pnp_id->mfg_name, pnp_id->product_code, pnp_id->serial, 617 pnp_id->mfg_week, pnp_id->mfg_year + 1990); 618 } 619 620 static int opregion_get_panel_type(struct drm_i915_private *i915, 621 const struct intel_bios_encoder_data *devdata, 622 const struct drm_edid *drm_edid, bool use_fallback) 623 { 624 return intel_opregion_get_panel_type(i915); 625 } 626 627 static int vbt_get_panel_type(struct drm_i915_private *i915, 628 const struct intel_bios_encoder_data *devdata, 629 const struct drm_edid *drm_edid, bool use_fallback) 630 { 631 const struct bdb_lvds_options *lvds_options; 632 633 lvds_options = bdb_find_section(i915, BDB_LVDS_OPTIONS); 634 if (!lvds_options) 635 return -1; 636 637 if (lvds_options->panel_type > 0xf && 638 lvds_options->panel_type != 0xff) { 639 drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n", 640 lvds_options->panel_type); 641 return -1; 642 } 643 644 if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2) 645 return lvds_options->panel_type2; 646 647 drm_WARN_ON(&i915->drm, devdata && devdata->child.handle != DEVICE_HANDLE_LFP1); 648 649 return lvds_options->panel_type; 650 } 651 652 static int pnpid_get_panel_type(struct drm_i915_private *i915, 653 const struct intel_bios_encoder_data *devdata, 654 const struct drm_edid *drm_edid, bool use_fallback) 655 { 656 const struct bdb_lvds_lfp_data *data; 657 const struct bdb_lvds_lfp_data_ptrs *ptrs; 658 const struct lvds_pnp_id *edid_id; 659 struct lvds_pnp_id edid_id_nodate; 660 const struct edid *edid = drm_edid_raw(drm_edid); /* FIXME */ 661 int i, best = -1; 662 663 if (!edid) 664 return -1; 665 666 edid_id = (const void *)&edid->mfg_id[0]; 667 668 edid_id_nodate = *edid_id; 669 edid_id_nodate.mfg_week = 0; 670 edid_id_nodate.mfg_year = 0; 671 672 dump_pnp_id(i915, edid_id, "EDID"); 673 674 ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS); 675 if (!ptrs) 676 return -1; 677 678 data = bdb_find_section(i915, BDB_LVDS_LFP_DATA); 679 if (!data) 680 return -1; 681 682 for (i = 0; i < 16; i++) { 683 const struct lvds_pnp_id *vbt_id = 684 get_lvds_pnp_id(data, ptrs, i); 685 686 /* full match? */ 687 if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id))) 688 return i; 689 690 /* 691 * Accept a match w/o date if no full match is found, 692 * and the VBT entry does not specify a date. 693 */ 694 if (best < 0 && 695 !memcmp(vbt_id, &edid_id_nodate, sizeof(*vbt_id))) 696 best = i; 697 } 698 699 return best; 700 } 701 702 static int fallback_get_panel_type(struct drm_i915_private *i915, 703 const struct intel_bios_encoder_data *devdata, 704 const struct drm_edid *drm_edid, bool use_fallback) 705 { 706 return use_fallback ? 0 : -1; 707 } 708 709 enum panel_type { 710 PANEL_TYPE_OPREGION, 711 PANEL_TYPE_VBT, 712 PANEL_TYPE_PNPID, 713 PANEL_TYPE_FALLBACK, 714 }; 715 716 static int get_panel_type(struct drm_i915_private *i915, 717 const struct intel_bios_encoder_data *devdata, 718 const struct drm_edid *drm_edid, bool use_fallback) 719 { 720 struct { 721 const char *name; 722 int (*get_panel_type)(struct drm_i915_private *i915, 723 const struct intel_bios_encoder_data *devdata, 724 const struct drm_edid *drm_edid, bool use_fallback); 725 int panel_type; 726 } panel_types[] = { 727 [PANEL_TYPE_OPREGION] = { 728 .name = "OpRegion", 729 .get_panel_type = opregion_get_panel_type, 730 }, 731 [PANEL_TYPE_VBT] = { 732 .name = "VBT", 733 .get_panel_type = vbt_get_panel_type, 734 }, 735 [PANEL_TYPE_PNPID] = { 736 .name = "PNPID", 737 .get_panel_type = pnpid_get_panel_type, 738 }, 739 [PANEL_TYPE_FALLBACK] = { 740 .name = "fallback", 741 .get_panel_type = fallback_get_panel_type, 742 }, 743 }; 744 int i; 745 746 for (i = 0; i < ARRAY_SIZE(panel_types); i++) { 747 panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata, 748 drm_edid, use_fallback); 749 750 drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf && 751 panel_types[i].panel_type != 0xff); 752 753 if (panel_types[i].panel_type >= 0) 754 drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n", 755 panel_types[i].name, panel_types[i].panel_type); 756 } 757 758 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0) 759 i = PANEL_TYPE_OPREGION; 760 else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff && 761 panel_types[PANEL_TYPE_PNPID].panel_type >= 0) 762 i = PANEL_TYPE_PNPID; 763 else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff && 764 panel_types[PANEL_TYPE_VBT].panel_type >= 0) 765 i = PANEL_TYPE_VBT; 766 else 767 i = PANEL_TYPE_FALLBACK; 768 769 drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n", 770 panel_types[i].name, panel_types[i].panel_type); 771 772 return panel_types[i].panel_type; 773 } 774 775 static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits) 776 { 777 return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1); 778 } 779 780 static bool panel_bool(unsigned int value, int panel_type) 781 { 782 return panel_bits(value, panel_type, 1); 783 } 784 785 /* Parse general panel options */ 786 static void 787 parse_panel_options(struct drm_i915_private *i915, 788 struct intel_panel *panel) 789 { 790 const struct bdb_lvds_options *lvds_options; 791 int panel_type = panel->vbt.panel_type; 792 int drrs_mode; 793 794 lvds_options = bdb_find_section(i915, BDB_LVDS_OPTIONS); 795 if (!lvds_options) 796 return; 797 798 panel->vbt.lvds_dither = lvds_options->pixel_dither; 799 800 /* 801 * Empirical evidence indicates the block size can be 802 * either 4,14,16,24+ bytes. For older VBTs no clear 803 * relationship between the block size vs. BDB version. 804 */ 805 if (get_blocksize(lvds_options) < 16) 806 return; 807 808 drrs_mode = panel_bits(lvds_options->dps_panel_type_bits, 809 panel_type, 2); 810 /* 811 * VBT has static DRRS = 0 and seamless DRRS = 2. 812 * The below piece of code is required to adjust vbt.drrs_type 813 * to match the enum drrs_support_type. 814 */ 815 switch (drrs_mode) { 816 case 0: 817 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 818 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n"); 819 break; 820 case 2: 821 panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS; 822 drm_dbg_kms(&i915->drm, 823 "DRRS supported mode is seamless\n"); 824 break; 825 default: 826 panel->vbt.drrs_type = DRRS_TYPE_NONE; 827 drm_dbg_kms(&i915->drm, 828 "DRRS not supported (VBT input)\n"); 829 break; 830 } 831 } 832 833 static void 834 parse_lfp_panel_dtd(struct drm_i915_private *i915, 835 struct intel_panel *panel, 836 const struct bdb_lvds_lfp_data *lvds_lfp_data, 837 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs) 838 { 839 const struct lvds_dvo_timing *panel_dvo_timing; 840 const struct lvds_fp_timing *fp_timing; 841 struct drm_display_mode *panel_fixed_mode; 842 int panel_type = panel->vbt.panel_type; 843 844 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 845 lvds_lfp_data_ptrs, 846 panel_type); 847 848 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 849 if (!panel_fixed_mode) 850 return; 851 852 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 853 854 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 855 856 drm_dbg_kms(&i915->drm, 857 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n", 858 DRM_MODE_ARG(panel_fixed_mode)); 859 860 fp_timing = get_lvds_fp_timing(lvds_lfp_data, 861 lvds_lfp_data_ptrs, 862 panel_type); 863 864 /* check the resolution, just to be sure */ 865 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 866 fp_timing->y_res == panel_fixed_mode->vdisplay) { 867 panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 868 drm_dbg_kms(&i915->drm, 869 "VBT initial LVDS value %x\n", 870 panel->vbt.bios_lvds_val); 871 } 872 } 873 874 static void 875 parse_lfp_data(struct drm_i915_private *i915, 876 struct intel_panel *panel) 877 { 878 const struct bdb_lvds_lfp_data *data; 879 const struct bdb_lvds_lfp_data_tail *tail; 880 const struct bdb_lvds_lfp_data_ptrs *ptrs; 881 const struct lvds_pnp_id *pnp_id; 882 int panel_type = panel->vbt.panel_type; 883 884 ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS); 885 if (!ptrs) 886 return; 887 888 data = bdb_find_section(i915, BDB_LVDS_LFP_DATA); 889 if (!data) 890 return; 891 892 if (!panel->vbt.lfp_lvds_vbt_mode) 893 parse_lfp_panel_dtd(i915, panel, data, ptrs); 894 895 pnp_id = get_lvds_pnp_id(data, ptrs, panel_type); 896 dump_pnp_id(i915, pnp_id, "Panel"); 897 898 tail = get_lfp_data_tail(data, ptrs); 899 if (!tail) 900 return; 901 902 drm_dbg_kms(&i915->drm, "Panel name: %.*s\n", 903 (int)sizeof(tail->panel_name[0].name), 904 tail->panel_name[panel_type].name); 905 906 if (i915->display.vbt.version >= 188) { 907 panel->vbt.seamless_drrs_min_refresh_rate = 908 tail->seamless_drrs_min_refresh_rate[panel_type]; 909 drm_dbg_kms(&i915->drm, 910 "Seamless DRRS min refresh rate: %d Hz\n", 911 panel->vbt.seamless_drrs_min_refresh_rate); 912 } 913 } 914 915 static void 916 parse_generic_dtd(struct drm_i915_private *i915, 917 struct intel_panel *panel) 918 { 919 const struct bdb_generic_dtd *generic_dtd; 920 const struct generic_dtd_entry *dtd; 921 struct drm_display_mode *panel_fixed_mode; 922 int num_dtd; 923 924 /* 925 * Older VBTs provided DTD information for internal displays through 926 * the "LFP panel tables" block (42). As of VBT revision 229 the 927 * DTD information should be provided via a newer "generic DTD" 928 * block (58). Just to be safe, we'll try the new generic DTD block 929 * first on VBT >= 229, but still fall back to trying the old LFP 930 * block if that fails. 931 */ 932 if (i915->display.vbt.version < 229) 933 return; 934 935 generic_dtd = bdb_find_section(i915, BDB_GENERIC_DTD); 936 if (!generic_dtd) 937 return; 938 939 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 940 drm_err(&i915->drm, "GDTD size %u is too small.\n", 941 generic_dtd->gdtd_size); 942 return; 943 } else if (generic_dtd->gdtd_size != 944 sizeof(struct generic_dtd_entry)) { 945 drm_err(&i915->drm, "Unexpected GDTD size %u\n", 946 generic_dtd->gdtd_size); 947 /* DTD has unknown fields, but keep going */ 948 } 949 950 num_dtd = (get_blocksize(generic_dtd) - 951 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 952 if (panel->vbt.panel_type >= num_dtd) { 953 drm_err(&i915->drm, 954 "Panel type %d not found in table of %d DTD's\n", 955 panel->vbt.panel_type, num_dtd); 956 return; 957 } 958 959 dtd = &generic_dtd->dtd[panel->vbt.panel_type]; 960 961 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 962 if (!panel_fixed_mode) 963 return; 964 965 panel_fixed_mode->hdisplay = dtd->hactive; 966 panel_fixed_mode->hsync_start = 967 panel_fixed_mode->hdisplay + dtd->hfront_porch; 968 panel_fixed_mode->hsync_end = 969 panel_fixed_mode->hsync_start + dtd->hsync; 970 panel_fixed_mode->htotal = 971 panel_fixed_mode->hdisplay + dtd->hblank; 972 973 panel_fixed_mode->vdisplay = dtd->vactive; 974 panel_fixed_mode->vsync_start = 975 panel_fixed_mode->vdisplay + dtd->vfront_porch; 976 panel_fixed_mode->vsync_end = 977 panel_fixed_mode->vsync_start + dtd->vsync; 978 panel_fixed_mode->vtotal = 979 panel_fixed_mode->vdisplay + dtd->vblank; 980 981 panel_fixed_mode->clock = dtd->pixel_clock; 982 panel_fixed_mode->width_mm = dtd->width_mm; 983 panel_fixed_mode->height_mm = dtd->height_mm; 984 985 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 986 drm_mode_set_name(panel_fixed_mode); 987 988 if (dtd->hsync_positive_polarity) 989 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 990 else 991 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 992 993 if (dtd->vsync_positive_polarity) 994 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 995 else 996 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 997 998 drm_dbg_kms(&i915->drm, 999 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n", 1000 DRM_MODE_ARG(panel_fixed_mode)); 1001 1002 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 1003 } 1004 1005 static void 1006 parse_lfp_backlight(struct drm_i915_private *i915, 1007 struct intel_panel *panel) 1008 { 1009 const struct bdb_lfp_backlight_data *backlight_data; 1010 const struct lfp_backlight_data_entry *entry; 1011 int panel_type = panel->vbt.panel_type; 1012 u16 level; 1013 1014 backlight_data = bdb_find_section(i915, BDB_LVDS_BACKLIGHT); 1015 if (!backlight_data) 1016 return; 1017 1018 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 1019 drm_dbg_kms(&i915->drm, 1020 "Unsupported backlight data entry size %u\n", 1021 backlight_data->entry_size); 1022 return; 1023 } 1024 1025 entry = &backlight_data->data[panel_type]; 1026 1027 panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 1028 if (!panel->vbt.backlight.present) { 1029 drm_dbg_kms(&i915->drm, 1030 "PWM backlight not present in VBT (type %u)\n", 1031 entry->type); 1032 return; 1033 } 1034 1035 panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 1036 panel->vbt.backlight.controller = 0; 1037 if (i915->display.vbt.version >= 191) { 1038 const struct lfp_backlight_control_method *method; 1039 1040 method = &backlight_data->backlight_control[panel_type]; 1041 panel->vbt.backlight.type = method->type; 1042 panel->vbt.backlight.controller = method->controller; 1043 } 1044 1045 panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 1046 panel->vbt.backlight.active_low_pwm = entry->active_low_pwm; 1047 1048 if (i915->display.vbt.version >= 234) { 1049 u16 min_level; 1050 bool scale; 1051 1052 level = backlight_data->brightness_level[panel_type].level; 1053 min_level = backlight_data->brightness_min_level[panel_type].level; 1054 1055 if (i915->display.vbt.version >= 236) 1056 scale = backlight_data->brightness_precision_bits[panel_type] == 16; 1057 else 1058 scale = level > 255; 1059 1060 if (scale) 1061 min_level = min_level / 255; 1062 1063 if (min_level > 255) { 1064 drm_warn(&i915->drm, "Brightness min level > 255\n"); 1065 level = 255; 1066 } 1067 panel->vbt.backlight.min_brightness = min_level; 1068 1069 panel->vbt.backlight.brightness_precision_bits = 1070 backlight_data->brightness_precision_bits[panel_type]; 1071 } else { 1072 level = backlight_data->level[panel_type]; 1073 panel->vbt.backlight.min_brightness = entry->min_brightness; 1074 } 1075 1076 if (i915->display.vbt.version >= 239) 1077 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 1078 DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100); 1079 else 1080 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30; 1081 1082 drm_dbg_kms(&i915->drm, 1083 "VBT backlight PWM modulation frequency %u Hz, " 1084 "active %s, min brightness %u, level %u, controller %u\n", 1085 panel->vbt.backlight.pwm_freq_hz, 1086 panel->vbt.backlight.active_low_pwm ? "low" : "high", 1087 panel->vbt.backlight.min_brightness, 1088 level, 1089 panel->vbt.backlight.controller); 1090 } 1091 1092 /* Try to find sdvo panel data */ 1093 static void 1094 parse_sdvo_panel_data(struct drm_i915_private *i915, 1095 struct intel_panel *panel) 1096 { 1097 const struct bdb_sdvo_panel_dtds *dtds; 1098 struct drm_display_mode *panel_fixed_mode; 1099 int index; 1100 1101 index = i915->params.vbt_sdvo_panel_type; 1102 if (index == -2) { 1103 drm_dbg_kms(&i915->drm, 1104 "Ignore SDVO panel mode from BIOS VBT tables.\n"); 1105 return; 1106 } 1107 1108 if (index == -1) { 1109 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 1110 1111 sdvo_lvds_options = bdb_find_section(i915, BDB_SDVO_LVDS_OPTIONS); 1112 if (!sdvo_lvds_options) 1113 return; 1114 1115 index = sdvo_lvds_options->panel_type; 1116 } 1117 1118 dtds = bdb_find_section(i915, BDB_SDVO_PANEL_DTDS); 1119 if (!dtds) 1120 return; 1121 1122 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 1123 if (!panel_fixed_mode) 1124 return; 1125 1126 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 1127 1128 panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 1129 1130 drm_dbg_kms(&i915->drm, 1131 "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n", 1132 DRM_MODE_ARG(panel_fixed_mode)); 1133 } 1134 1135 static int intel_bios_ssc_frequency(struct drm_i915_private *i915, 1136 bool alternate) 1137 { 1138 switch (DISPLAY_VER(i915)) { 1139 case 2: 1140 return alternate ? 66667 : 48000; 1141 case 3: 1142 case 4: 1143 return alternate ? 100000 : 96000; 1144 default: 1145 return alternate ? 100000 : 120000; 1146 } 1147 } 1148 1149 static void 1150 parse_general_features(struct drm_i915_private *i915) 1151 { 1152 const struct bdb_general_features *general; 1153 1154 general = bdb_find_section(i915, BDB_GENERAL_FEATURES); 1155 if (!general) 1156 return; 1157 1158 i915->display.vbt.int_tv_support = general->int_tv_support; 1159 /* int_crt_support can't be trusted on earlier platforms */ 1160 if (i915->display.vbt.version >= 155 && 1161 (HAS_DDI(i915) || IS_VALLEYVIEW(i915))) 1162 i915->display.vbt.int_crt_support = general->int_crt_support; 1163 i915->display.vbt.lvds_use_ssc = general->enable_ssc; 1164 i915->display.vbt.lvds_ssc_freq = 1165 intel_bios_ssc_frequency(i915, general->ssc_freq); 1166 i915->display.vbt.display_clock_mode = general->display_clock_mode; 1167 i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 1168 if (i915->display.vbt.version >= 181) { 1169 i915->display.vbt.orientation = general->rotate_180 ? 1170 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 1171 DRM_MODE_PANEL_ORIENTATION_NORMAL; 1172 } else { 1173 i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1174 } 1175 1176 if (i915->display.vbt.version >= 249 && general->afc_startup_config) { 1177 i915->display.vbt.override_afc_startup = true; 1178 i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7; 1179 } 1180 1181 drm_dbg_kms(&i915->drm, 1182 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 1183 i915->display.vbt.int_tv_support, 1184 i915->display.vbt.int_crt_support, 1185 i915->display.vbt.lvds_use_ssc, 1186 i915->display.vbt.lvds_ssc_freq, 1187 i915->display.vbt.display_clock_mode, 1188 i915->display.vbt.fdi_rx_polarity_inverted); 1189 } 1190 1191 static const struct child_device_config * 1192 child_device_ptr(const struct bdb_general_definitions *defs, int i) 1193 { 1194 return (const void *) &defs->devices[i * defs->child_dev_size]; 1195 } 1196 1197 static void 1198 parse_sdvo_device_mapping(struct drm_i915_private *i915) 1199 { 1200 const struct intel_bios_encoder_data *devdata; 1201 int count = 0; 1202 1203 /* 1204 * Only parse SDVO mappings on gens that could have SDVO. This isn't 1205 * accurate and doesn't have to be, as long as it's not too strict. 1206 */ 1207 if (!IS_DISPLAY_VER(i915, 3, 7)) { 1208 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n"); 1209 return; 1210 } 1211 1212 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 1213 const struct child_device_config *child = &devdata->child; 1214 struct sdvo_device_mapping *mapping; 1215 1216 if (child->slave_addr != SLAVE_ADDR1 && 1217 child->slave_addr != SLAVE_ADDR2) { 1218 /* 1219 * If the slave address is neither 0x70 nor 0x72, 1220 * it is not a SDVO device. Skip it. 1221 */ 1222 continue; 1223 } 1224 if (child->dvo_port != DEVICE_PORT_DVOB && 1225 child->dvo_port != DEVICE_PORT_DVOC) { 1226 /* skip the incorrect SDVO port */ 1227 drm_dbg_kms(&i915->drm, 1228 "Incorrect SDVO port. Skip it\n"); 1229 continue; 1230 } 1231 drm_dbg_kms(&i915->drm, 1232 "the SDVO device with slave addr %2x is found on" 1233 " %s port\n", 1234 child->slave_addr, 1235 (child->dvo_port == DEVICE_PORT_DVOB) ? 1236 "SDVOB" : "SDVOC"); 1237 mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1]; 1238 if (!mapping->initialized) { 1239 mapping->dvo_port = child->dvo_port; 1240 mapping->slave_addr = child->slave_addr; 1241 mapping->dvo_wiring = child->dvo_wiring; 1242 mapping->ddc_pin = child->ddc_pin; 1243 mapping->i2c_pin = child->i2c_pin; 1244 mapping->initialized = 1; 1245 drm_dbg_kms(&i915->drm, 1246 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 1247 mapping->dvo_port, mapping->slave_addr, 1248 mapping->dvo_wiring, mapping->ddc_pin, 1249 mapping->i2c_pin); 1250 } else { 1251 drm_dbg_kms(&i915->drm, 1252 "Maybe one SDVO port is shared by " 1253 "two SDVO device.\n"); 1254 } 1255 if (child->slave2_addr) { 1256 /* Maybe this is a SDVO device with multiple inputs */ 1257 /* And the mapping info is not added */ 1258 drm_dbg_kms(&i915->drm, 1259 "there exists the slave2_addr. Maybe this" 1260 " is a SDVO device with multiple inputs.\n"); 1261 } 1262 count++; 1263 } 1264 1265 if (!count) { 1266 /* No SDVO device info is found */ 1267 drm_dbg_kms(&i915->drm, 1268 "No SDVO device info is found in VBT\n"); 1269 } 1270 } 1271 1272 static void 1273 parse_driver_features(struct drm_i915_private *i915) 1274 { 1275 const struct bdb_driver_features *driver; 1276 1277 driver = bdb_find_section(i915, BDB_DRIVER_FEATURES); 1278 if (!driver) 1279 return; 1280 1281 if (DISPLAY_VER(i915) >= 5) { 1282 /* 1283 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 1284 * to mean "eDP". The VBT spec doesn't agree with that 1285 * interpretation, but real world VBTs seem to. 1286 */ 1287 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 1288 i915->display.vbt.int_lvds_support = 0; 1289 } else { 1290 /* 1291 * FIXME it's not clear which BDB version has the LVDS config 1292 * bits defined. Revision history in the VBT spec says: 1293 * "0.92 | Add two definitions for VBT value of LVDS Active 1294 * Config (00b and 11b values defined) | 06/13/2005" 1295 * but does not the specify the BDB version. 1296 * 1297 * So far version 134 (on i945gm) is the oldest VBT observed 1298 * in the wild with the bits correctly populated. Version 1299 * 108 (on i85x) does not have the bits correctly populated. 1300 */ 1301 if (i915->display.vbt.version >= 134 && 1302 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 1303 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 1304 i915->display.vbt.int_lvds_support = 0; 1305 } 1306 } 1307 1308 static void 1309 parse_panel_driver_features(struct drm_i915_private *i915, 1310 struct intel_panel *panel) 1311 { 1312 const struct bdb_driver_features *driver; 1313 1314 driver = bdb_find_section(i915, BDB_DRIVER_FEATURES); 1315 if (!driver) 1316 return; 1317 1318 if (i915->display.vbt.version < 228) { 1319 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n", 1320 driver->drrs_enabled); 1321 /* 1322 * If DRRS is not supported, drrs_type has to be set to 0. 1323 * This is because, VBT is configured in such a way that 1324 * static DRRS is 0 and DRRS not supported is represented by 1325 * driver->drrs_enabled=false 1326 */ 1327 if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) { 1328 /* 1329 * FIXME Should DMRRS perhaps be treated as seamless 1330 * but without the automatic downclocking? 1331 */ 1332 if (driver->dmrrs_enabled) 1333 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 1334 else 1335 panel->vbt.drrs_type = DRRS_TYPE_NONE; 1336 } 1337 1338 panel->vbt.psr.enable = driver->psr_enabled; 1339 } 1340 } 1341 1342 static void 1343 parse_power_conservation_features(struct drm_i915_private *i915, 1344 struct intel_panel *panel) 1345 { 1346 const struct bdb_lfp_power *power; 1347 u8 panel_type = panel->vbt.panel_type; 1348 1349 panel->vbt.vrr = true; /* matches Windows behaviour */ 1350 1351 if (i915->display.vbt.version < 228) 1352 return; 1353 1354 power = bdb_find_section(i915, BDB_LFP_POWER); 1355 if (!power) 1356 return; 1357 1358 panel->vbt.psr.enable = panel_bool(power->psr, panel_type); 1359 1360 /* 1361 * If DRRS is not supported, drrs_type has to be set to 0. 1362 * This is because, VBT is configured in such a way that 1363 * static DRRS is 0 and DRRS not supported is represented by 1364 * power->drrs & BIT(panel_type)=false 1365 */ 1366 if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) { 1367 /* 1368 * FIXME Should DMRRS perhaps be treated as seamless 1369 * but without the automatic downclocking? 1370 */ 1371 if (panel_bool(power->dmrrs, panel_type)) 1372 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 1373 else 1374 panel->vbt.drrs_type = DRRS_TYPE_NONE; 1375 } 1376 1377 if (i915->display.vbt.version >= 232) 1378 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type); 1379 1380 if (i915->display.vbt.version >= 233) 1381 panel->vbt.vrr = panel_bool(power->vrr_feature_enabled, 1382 panel_type); 1383 } 1384 1385 static void 1386 parse_edp(struct drm_i915_private *i915, 1387 struct intel_panel *panel) 1388 { 1389 const struct bdb_edp *edp; 1390 const struct edp_power_seq *edp_pps; 1391 const struct edp_fast_link_params *edp_link_params; 1392 int panel_type = panel->vbt.panel_type; 1393 1394 edp = bdb_find_section(i915, BDB_EDP); 1395 if (!edp) 1396 return; 1397 1398 switch (panel_bits(edp->color_depth, panel_type, 2)) { 1399 case EDP_18BPP: 1400 panel->vbt.edp.bpp = 18; 1401 break; 1402 case EDP_24BPP: 1403 panel->vbt.edp.bpp = 24; 1404 break; 1405 case EDP_30BPP: 1406 panel->vbt.edp.bpp = 30; 1407 break; 1408 } 1409 1410 /* Get the eDP sequencing and link info */ 1411 edp_pps = &edp->power_seqs[panel_type]; 1412 edp_link_params = &edp->fast_link_params[panel_type]; 1413 1414 panel->vbt.edp.pps = *edp_pps; 1415 1416 if (i915->display.vbt.version >= 224) { 1417 panel->vbt.edp.rate = 1418 edp->edp_fast_link_training_rate[panel_type] * 20; 1419 } else { 1420 switch (edp_link_params->rate) { 1421 case EDP_RATE_1_62: 1422 panel->vbt.edp.rate = 162000; 1423 break; 1424 case EDP_RATE_2_7: 1425 panel->vbt.edp.rate = 270000; 1426 break; 1427 case EDP_RATE_5_4: 1428 panel->vbt.edp.rate = 540000; 1429 break; 1430 default: 1431 drm_dbg_kms(&i915->drm, 1432 "VBT has unknown eDP link rate value %u\n", 1433 edp_link_params->rate); 1434 break; 1435 } 1436 } 1437 1438 switch (edp_link_params->lanes) { 1439 case EDP_LANE_1: 1440 panel->vbt.edp.lanes = 1; 1441 break; 1442 case EDP_LANE_2: 1443 panel->vbt.edp.lanes = 2; 1444 break; 1445 case EDP_LANE_4: 1446 panel->vbt.edp.lanes = 4; 1447 break; 1448 default: 1449 drm_dbg_kms(&i915->drm, 1450 "VBT has unknown eDP lane count value %u\n", 1451 edp_link_params->lanes); 1452 break; 1453 } 1454 1455 switch (edp_link_params->preemphasis) { 1456 case EDP_PREEMPHASIS_NONE: 1457 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 1458 break; 1459 case EDP_PREEMPHASIS_3_5dB: 1460 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 1461 break; 1462 case EDP_PREEMPHASIS_6dB: 1463 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 1464 break; 1465 case EDP_PREEMPHASIS_9_5dB: 1466 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 1467 break; 1468 default: 1469 drm_dbg_kms(&i915->drm, 1470 "VBT has unknown eDP pre-emphasis value %u\n", 1471 edp_link_params->preemphasis); 1472 break; 1473 } 1474 1475 switch (edp_link_params->vswing) { 1476 case EDP_VSWING_0_4V: 1477 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 1478 break; 1479 case EDP_VSWING_0_6V: 1480 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 1481 break; 1482 case EDP_VSWING_0_8V: 1483 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 1484 break; 1485 case EDP_VSWING_1_2V: 1486 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 1487 break; 1488 default: 1489 drm_dbg_kms(&i915->drm, 1490 "VBT has unknown eDP voltage swing value %u\n", 1491 edp_link_params->vswing); 1492 break; 1493 } 1494 1495 if (i915->display.vbt.version >= 173) { 1496 u8 vswing; 1497 1498 /* Don't read from VBT if module parameter has valid value*/ 1499 if (i915->params.edp_vswing) { 1500 panel->vbt.edp.low_vswing = 1501 i915->params.edp_vswing == 1; 1502 } else { 1503 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 1504 panel->vbt.edp.low_vswing = vswing == 0; 1505 } 1506 } 1507 1508 panel->vbt.edp.drrs_msa_timing_delay = 1509 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2); 1510 1511 if (i915->display.vbt.version >= 244) 1512 panel->vbt.edp.max_link_rate = 1513 edp->edp_max_port_link_rate[panel_type] * 20; 1514 } 1515 1516 static void 1517 parse_psr(struct drm_i915_private *i915, 1518 struct intel_panel *panel) 1519 { 1520 const struct bdb_psr *psr; 1521 const struct psr_table *psr_table; 1522 int panel_type = panel->vbt.panel_type; 1523 1524 psr = bdb_find_section(i915, BDB_PSR); 1525 if (!psr) { 1526 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n"); 1527 return; 1528 } 1529 1530 psr_table = &psr->psr_table[panel_type]; 1531 1532 panel->vbt.psr.full_link = psr_table->full_link; 1533 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 1534 1535 /* Allowed VBT values goes from 0 to 15 */ 1536 panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 1537 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 1538 1539 /* 1540 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 1541 * Old decimal value is wake up time in multiples of 100 us. 1542 */ 1543 if (i915->display.vbt.version >= 205 && 1544 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) { 1545 switch (psr_table->tp1_wakeup_time) { 1546 case 0: 1547 panel->vbt.psr.tp1_wakeup_time_us = 500; 1548 break; 1549 case 1: 1550 panel->vbt.psr.tp1_wakeup_time_us = 100; 1551 break; 1552 case 3: 1553 panel->vbt.psr.tp1_wakeup_time_us = 0; 1554 break; 1555 default: 1556 drm_dbg_kms(&i915->drm, 1557 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1558 psr_table->tp1_wakeup_time); 1559 fallthrough; 1560 case 2: 1561 panel->vbt.psr.tp1_wakeup_time_us = 2500; 1562 break; 1563 } 1564 1565 switch (psr_table->tp2_tp3_wakeup_time) { 1566 case 0: 1567 panel->vbt.psr.tp2_tp3_wakeup_time_us = 500; 1568 break; 1569 case 1: 1570 panel->vbt.psr.tp2_tp3_wakeup_time_us = 100; 1571 break; 1572 case 3: 1573 panel->vbt.psr.tp2_tp3_wakeup_time_us = 0; 1574 break; 1575 default: 1576 drm_dbg_kms(&i915->drm, 1577 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1578 psr_table->tp2_tp3_wakeup_time); 1579 fallthrough; 1580 case 2: 1581 panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 1582 break; 1583 } 1584 } else { 1585 panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 1586 panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 1587 } 1588 1589 if (i915->display.vbt.version >= 226) { 1590 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 1591 1592 wakeup_time = panel_bits(wakeup_time, panel_type, 2); 1593 switch (wakeup_time) { 1594 case 0: 1595 wakeup_time = 500; 1596 break; 1597 case 1: 1598 wakeup_time = 100; 1599 break; 1600 case 3: 1601 wakeup_time = 50; 1602 break; 1603 default: 1604 case 2: 1605 wakeup_time = 2500; 1606 break; 1607 } 1608 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 1609 } else { 1610 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 1611 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us; 1612 } 1613 } 1614 1615 static void parse_dsi_backlight_ports(struct drm_i915_private *i915, 1616 struct intel_panel *panel, 1617 enum port port) 1618 { 1619 enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C; 1620 1621 if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) { 1622 panel->vbt.dsi.bl_ports = BIT(port); 1623 if (panel->vbt.dsi.config->cabc_supported) 1624 panel->vbt.dsi.cabc_ports = BIT(port); 1625 1626 return; 1627 } 1628 1629 switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) { 1630 case DL_DCS_PORT_A: 1631 panel->vbt.dsi.bl_ports = BIT(PORT_A); 1632 break; 1633 case DL_DCS_PORT_C: 1634 panel->vbt.dsi.bl_ports = BIT(port_bc); 1635 break; 1636 default: 1637 case DL_DCS_PORT_A_AND_C: 1638 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc); 1639 break; 1640 } 1641 1642 if (!panel->vbt.dsi.config->cabc_supported) 1643 return; 1644 1645 switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) { 1646 case DL_DCS_PORT_A: 1647 panel->vbt.dsi.cabc_ports = BIT(PORT_A); 1648 break; 1649 case DL_DCS_PORT_C: 1650 panel->vbt.dsi.cabc_ports = BIT(port_bc); 1651 break; 1652 default: 1653 case DL_DCS_PORT_A_AND_C: 1654 panel->vbt.dsi.cabc_ports = 1655 BIT(PORT_A) | BIT(port_bc); 1656 break; 1657 } 1658 } 1659 1660 static void 1661 parse_mipi_config(struct drm_i915_private *i915, 1662 struct intel_panel *panel) 1663 { 1664 const struct bdb_mipi_config *start; 1665 const struct mipi_config *config; 1666 const struct mipi_pps_data *pps; 1667 int panel_type = panel->vbt.panel_type; 1668 enum port port; 1669 1670 /* parse MIPI blocks only if LFP type is MIPI */ 1671 if (!intel_bios_is_dsi_present(i915, &port)) 1672 return; 1673 1674 /* Initialize this to undefined indicating no generic MIPI support */ 1675 panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 1676 1677 /* Block #40 is already parsed and panel_fixed_mode is 1678 * stored in i915->lfp_lvds_vbt_mode 1679 * resuse this when needed 1680 */ 1681 1682 /* Parse #52 for panel index used from panel_type already 1683 * parsed 1684 */ 1685 start = bdb_find_section(i915, BDB_MIPI_CONFIG); 1686 if (!start) { 1687 drm_dbg_kms(&i915->drm, "No MIPI config BDB found"); 1688 return; 1689 } 1690 1691 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n", 1692 panel_type); 1693 1694 /* 1695 * get hold of the correct configuration block and pps data as per 1696 * the panel_type as index 1697 */ 1698 config = &start->config[panel_type]; 1699 pps = &start->pps[panel_type]; 1700 1701 /* store as of now full data. Trim when we realise all is not needed */ 1702 panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1703 if (!panel->vbt.dsi.config) 1704 return; 1705 1706 panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1707 if (!panel->vbt.dsi.pps) { 1708 kfree(panel->vbt.dsi.config); 1709 return; 1710 } 1711 1712 parse_dsi_backlight_ports(i915, panel, port); 1713 1714 /* FIXME is the 90 vs. 270 correct? */ 1715 switch (config->rotation) { 1716 case ENABLE_ROTATION_0: 1717 /* 1718 * Most (all?) VBTs claim 0 degrees despite having 1719 * an upside down panel, thus we do not trust this. 1720 */ 1721 panel->vbt.dsi.orientation = 1722 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1723 break; 1724 case ENABLE_ROTATION_90: 1725 panel->vbt.dsi.orientation = 1726 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1727 break; 1728 case ENABLE_ROTATION_180: 1729 panel->vbt.dsi.orientation = 1730 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1731 break; 1732 case ENABLE_ROTATION_270: 1733 panel->vbt.dsi.orientation = 1734 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1735 break; 1736 } 1737 1738 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1739 panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1740 } 1741 1742 /* Find the sequence block and size for the given panel. */ 1743 static const u8 * 1744 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 1745 u16 panel_id, u32 *seq_size) 1746 { 1747 u32 total = get_blocksize(sequence); 1748 const u8 *data = &sequence->data[0]; 1749 u8 current_id; 1750 u32 current_size; 1751 int header_size = sequence->version >= 3 ? 5 : 3; 1752 int index = 0; 1753 int i; 1754 1755 /* skip new block size */ 1756 if (sequence->version >= 3) 1757 data += 4; 1758 1759 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1760 if (index + header_size > total) { 1761 DRM_ERROR("Invalid sequence block (header)\n"); 1762 return NULL; 1763 } 1764 1765 current_id = *(data + index); 1766 if (sequence->version >= 3) 1767 current_size = *((const u32 *)(data + index + 1)); 1768 else 1769 current_size = *((const u16 *)(data + index + 1)); 1770 1771 index += header_size; 1772 1773 if (index + current_size > total) { 1774 DRM_ERROR("Invalid sequence block\n"); 1775 return NULL; 1776 } 1777 1778 if (current_id == panel_id) { 1779 *seq_size = current_size; 1780 return data + index; 1781 } 1782 1783 index += current_size; 1784 } 1785 1786 DRM_ERROR("Sequence block detected but no valid configuration\n"); 1787 1788 return NULL; 1789 } 1790 1791 static int goto_next_sequence(const u8 *data, int index, int total) 1792 { 1793 u16 len; 1794 1795 /* Skip Sequence Byte. */ 1796 for (index = index + 1; index < total; index += len) { 1797 u8 operation_byte = *(data + index); 1798 index++; 1799 1800 switch (operation_byte) { 1801 case MIPI_SEQ_ELEM_END: 1802 return index; 1803 case MIPI_SEQ_ELEM_SEND_PKT: 1804 if (index + 4 > total) 1805 return 0; 1806 1807 len = *((const u16 *)(data + index + 2)) + 4; 1808 break; 1809 case MIPI_SEQ_ELEM_DELAY: 1810 len = 4; 1811 break; 1812 case MIPI_SEQ_ELEM_GPIO: 1813 len = 2; 1814 break; 1815 case MIPI_SEQ_ELEM_I2C: 1816 if (index + 7 > total) 1817 return 0; 1818 len = *(data + index + 6) + 7; 1819 break; 1820 default: 1821 DRM_ERROR("Unknown operation byte\n"); 1822 return 0; 1823 } 1824 } 1825 1826 return 0; 1827 } 1828 1829 static int goto_next_sequence_v3(const u8 *data, int index, int total) 1830 { 1831 int seq_end; 1832 u16 len; 1833 u32 size_of_sequence; 1834 1835 /* 1836 * Could skip sequence based on Size of Sequence alone, but also do some 1837 * checking on the structure. 1838 */ 1839 if (total < 5) { 1840 DRM_ERROR("Too small sequence size\n"); 1841 return 0; 1842 } 1843 1844 /* Skip Sequence Byte. */ 1845 index++; 1846 1847 /* 1848 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1849 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1850 * byte. 1851 */ 1852 size_of_sequence = *((const u32 *)(data + index)); 1853 index += 4; 1854 1855 seq_end = index + size_of_sequence; 1856 if (seq_end > total) { 1857 DRM_ERROR("Invalid sequence size\n"); 1858 return 0; 1859 } 1860 1861 for (; index < total; index += len) { 1862 u8 operation_byte = *(data + index); 1863 index++; 1864 1865 if (operation_byte == MIPI_SEQ_ELEM_END) { 1866 if (index != seq_end) { 1867 DRM_ERROR("Invalid element structure\n"); 1868 return 0; 1869 } 1870 return index; 1871 } 1872 1873 len = *(data + index); 1874 index++; 1875 1876 /* 1877 * FIXME: Would be nice to check elements like for v1/v2 in 1878 * goto_next_sequence() above. 1879 */ 1880 switch (operation_byte) { 1881 case MIPI_SEQ_ELEM_SEND_PKT: 1882 case MIPI_SEQ_ELEM_DELAY: 1883 case MIPI_SEQ_ELEM_GPIO: 1884 case MIPI_SEQ_ELEM_I2C: 1885 case MIPI_SEQ_ELEM_SPI: 1886 case MIPI_SEQ_ELEM_PMIC: 1887 break; 1888 default: 1889 DRM_ERROR("Unknown operation byte %u\n", 1890 operation_byte); 1891 break; 1892 } 1893 } 1894 1895 return 0; 1896 } 1897 1898 /* 1899 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1900 * skip all delay + gpio operands and stop at the first DSI packet op. 1901 */ 1902 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915, 1903 struct intel_panel *panel) 1904 { 1905 const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1906 int index, len; 1907 1908 if (drm_WARN_ON(&i915->drm, 1909 !data || panel->vbt.dsi.seq_version != 1)) 1910 return 0; 1911 1912 /* index = 1 to skip sequence byte */ 1913 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1914 switch (data[index]) { 1915 case MIPI_SEQ_ELEM_SEND_PKT: 1916 return index == 1 ? 0 : index; 1917 case MIPI_SEQ_ELEM_DELAY: 1918 len = 5; /* 1 byte for operand + uint32 */ 1919 break; 1920 case MIPI_SEQ_ELEM_GPIO: 1921 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1922 break; 1923 default: 1924 return 0; 1925 } 1926 } 1927 1928 return 0; 1929 } 1930 1931 /* 1932 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1933 * The deassert must be done before calling intel_dsi_device_ready, so for 1934 * these devices we split the init OTP sequence into a deassert sequence and 1935 * the actual init OTP part. 1936 */ 1937 static void vlv_fixup_mipi_sequences(struct drm_i915_private *i915, 1938 struct intel_panel *panel) 1939 { 1940 u8 *init_otp; 1941 int len; 1942 1943 /* Limit this to v1 vid-mode sequences */ 1944 if (panel->vbt.dsi.config->is_cmd_mode || 1945 panel->vbt.dsi.seq_version != 1) 1946 return; 1947 1948 /* Only do this if there are otp and assert seqs and no deassert seq */ 1949 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1950 !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1951 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1952 return; 1953 1954 /* The deassert-sequence ends at the first DSI packet */ 1955 len = get_init_otp_deassert_fragment_len(i915, panel); 1956 if (!len) 1957 return; 1958 1959 drm_dbg_kms(&i915->drm, 1960 "Using init OTP fragment to deassert reset\n"); 1961 1962 /* Copy the fragment, update seq byte and terminate it */ 1963 init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1964 panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1965 if (!panel->vbt.dsi.deassert_seq) 1966 return; 1967 panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1968 panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1969 /* Use the copy for deassert */ 1970 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1971 panel->vbt.dsi.deassert_seq; 1972 /* Replace the last byte of the fragment with init OTP seq byte */ 1973 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1974 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1975 panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1976 } 1977 1978 /* 1979 * Some machines (eg. Lenovo 82TQ) appear to have broken 1980 * VBT sequences: 1981 * - INIT_OTP is not present at all 1982 * - what should be in INIT_OTP is in DISPLAY_ON 1983 * - what should be in DISPLAY_ON is in BACKLIGHT_ON 1984 * (along with the actual backlight stuff) 1985 * 1986 * To make those work we simply swap DISPLAY_ON and INIT_OTP. 1987 * 1988 * TODO: Do we need to limit this to specific machines, 1989 * or examine the contents of the sequences to 1990 * avoid false positives? 1991 */ 1992 static void icl_fixup_mipi_sequences(struct drm_i915_private *i915, 1993 struct intel_panel *panel) 1994 { 1995 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] && 1996 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]) { 1997 drm_dbg_kms(&i915->drm, "Broken VBT: Swapping INIT_OTP and DISPLAY_ON sequences\n"); 1998 1999 swap(panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP], 2000 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]); 2001 } 2002 } 2003 2004 static void fixup_mipi_sequences(struct drm_i915_private *i915, 2005 struct intel_panel *panel) 2006 { 2007 if (DISPLAY_VER(i915) >= 11) 2008 icl_fixup_mipi_sequences(i915, panel); 2009 else if (IS_VALLEYVIEW(i915)) 2010 vlv_fixup_mipi_sequences(i915, panel); 2011 } 2012 2013 static void 2014 parse_mipi_sequence(struct drm_i915_private *i915, 2015 struct intel_panel *panel) 2016 { 2017 int panel_type = panel->vbt.panel_type; 2018 const struct bdb_mipi_sequence *sequence; 2019 const u8 *seq_data; 2020 u32 seq_size; 2021 u8 *data; 2022 int index = 0; 2023 2024 /* Only our generic panel driver uses the sequence block. */ 2025 if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 2026 return; 2027 2028 sequence = bdb_find_section(i915, BDB_MIPI_SEQUENCE); 2029 if (!sequence) { 2030 drm_dbg_kms(&i915->drm, 2031 "No MIPI Sequence found, parsing complete\n"); 2032 return; 2033 } 2034 2035 /* Fail gracefully for forward incompatible sequence block. */ 2036 if (sequence->version >= 4) { 2037 drm_err(&i915->drm, 2038 "Unable to parse MIPI Sequence Block v%u\n", 2039 sequence->version); 2040 return; 2041 } 2042 2043 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n", 2044 sequence->version); 2045 2046 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 2047 if (!seq_data) 2048 return; 2049 2050 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 2051 if (!data) 2052 return; 2053 2054 /* Parse the sequences, store pointers to each sequence. */ 2055 for (;;) { 2056 u8 seq_id = *(data + index); 2057 if (seq_id == MIPI_SEQ_END) 2058 break; 2059 2060 if (seq_id >= MIPI_SEQ_MAX) { 2061 drm_err(&i915->drm, "Unknown sequence %u\n", 2062 seq_id); 2063 goto err; 2064 } 2065 2066 /* Log about presence of sequences we won't run. */ 2067 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 2068 drm_dbg_kms(&i915->drm, 2069 "Unsupported sequence %u\n", seq_id); 2070 2071 panel->vbt.dsi.sequence[seq_id] = data + index; 2072 2073 if (sequence->version >= 3) 2074 index = goto_next_sequence_v3(data, index, seq_size); 2075 else 2076 index = goto_next_sequence(data, index, seq_size); 2077 if (!index) { 2078 drm_err(&i915->drm, "Invalid sequence %u\n", 2079 seq_id); 2080 goto err; 2081 } 2082 } 2083 2084 panel->vbt.dsi.data = data; 2085 panel->vbt.dsi.size = seq_size; 2086 panel->vbt.dsi.seq_version = sequence->version; 2087 2088 fixup_mipi_sequences(i915, panel); 2089 2090 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n"); 2091 return; 2092 2093 err: 2094 kfree(data); 2095 memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence)); 2096 } 2097 2098 static void 2099 parse_compression_parameters(struct drm_i915_private *i915) 2100 { 2101 const struct bdb_compression_parameters *params; 2102 struct intel_bios_encoder_data *devdata; 2103 u16 block_size; 2104 int index; 2105 2106 if (i915->display.vbt.version < 198) 2107 return; 2108 2109 params = bdb_find_section(i915, BDB_COMPRESSION_PARAMETERS); 2110 if (params) { 2111 /* Sanity checks */ 2112 if (params->entry_size != sizeof(params->data[0])) { 2113 drm_dbg_kms(&i915->drm, 2114 "VBT: unsupported compression param entry size\n"); 2115 return; 2116 } 2117 2118 block_size = get_blocksize(params); 2119 if (block_size < sizeof(*params)) { 2120 drm_dbg_kms(&i915->drm, 2121 "VBT: expected 16 compression param entries\n"); 2122 return; 2123 } 2124 } 2125 2126 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 2127 const struct child_device_config *child = &devdata->child; 2128 2129 if (!child->compression_enable) 2130 continue; 2131 2132 if (!params) { 2133 drm_dbg_kms(&i915->drm, 2134 "VBT: compression params not available\n"); 2135 continue; 2136 } 2137 2138 if (child->compression_method_cps) { 2139 drm_dbg_kms(&i915->drm, 2140 "VBT: CPS compression not supported\n"); 2141 continue; 2142 } 2143 2144 index = child->compression_structure_index; 2145 2146 devdata->dsc = kmemdup(¶ms->data[index], 2147 sizeof(*devdata->dsc), GFP_KERNEL); 2148 } 2149 } 2150 2151 static u8 translate_iboost(u8 val) 2152 { 2153 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 2154 2155 if (val >= ARRAY_SIZE(mapping)) { 2156 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 2157 return 0; 2158 } 2159 return mapping[val]; 2160 } 2161 2162 static const u8 cnp_ddc_pin_map[] = { 2163 [0] = 0, /* N/A */ 2164 [GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B, 2165 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C, 2166 [GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */ 2167 [GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */ 2168 }; 2169 2170 static const u8 icp_ddc_pin_map[] = { 2171 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2172 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2173 [GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C, 2174 [GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1, 2175 [GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2, 2176 [GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3, 2177 [GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4, 2178 [GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5, 2179 [GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6, 2180 }; 2181 2182 static const u8 rkl_pch_tgp_ddc_pin_map[] = { 2183 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2184 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2185 [GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D, 2186 [GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E, 2187 }; 2188 2189 static const u8 adls_ddc_pin_map[] = { 2190 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2191 [GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1, 2192 [GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2, 2193 [GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3, 2194 [GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4, 2195 }; 2196 2197 static const u8 gen9bc_tgp_ddc_pin_map[] = { 2198 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B, 2199 [GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C, 2200 [GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D, 2201 }; 2202 2203 static const u8 adlp_ddc_pin_map[] = { 2204 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2205 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2206 [GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1, 2207 [GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2, 2208 [GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3, 2209 [GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4, 2210 }; 2211 2212 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin) 2213 { 2214 const u8 *ddc_pin_map; 2215 int i, n_entries; 2216 2217 if (HAS_PCH_MTP(i915) || IS_ALDERLAKE_P(i915)) { 2218 ddc_pin_map = adlp_ddc_pin_map; 2219 n_entries = ARRAY_SIZE(adlp_ddc_pin_map); 2220 } else if (IS_ALDERLAKE_S(i915)) { 2221 ddc_pin_map = adls_ddc_pin_map; 2222 n_entries = ARRAY_SIZE(adls_ddc_pin_map); 2223 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) { 2224 return vbt_pin; 2225 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { 2226 ddc_pin_map = rkl_pch_tgp_ddc_pin_map; 2227 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map); 2228 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) { 2229 ddc_pin_map = gen9bc_tgp_ddc_pin_map; 2230 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map); 2231 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) { 2232 ddc_pin_map = icp_ddc_pin_map; 2233 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 2234 } else if (HAS_PCH_CNP(i915)) { 2235 ddc_pin_map = cnp_ddc_pin_map; 2236 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 2237 } else { 2238 /* Assuming direct map */ 2239 return vbt_pin; 2240 } 2241 2242 for (i = 0; i < n_entries; i++) { 2243 if (ddc_pin_map[i] == vbt_pin) 2244 return i; 2245 } 2246 2247 drm_dbg_kms(&i915->drm, 2248 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 2249 vbt_pin); 2250 return 0; 2251 } 2252 2253 static u8 dvo_port_type(u8 dvo_port) 2254 { 2255 switch (dvo_port) { 2256 case DVO_PORT_HDMIA: 2257 case DVO_PORT_HDMIB: 2258 case DVO_PORT_HDMIC: 2259 case DVO_PORT_HDMID: 2260 case DVO_PORT_HDMIE: 2261 case DVO_PORT_HDMIF: 2262 case DVO_PORT_HDMIG: 2263 case DVO_PORT_HDMIH: 2264 case DVO_PORT_HDMII: 2265 return DVO_PORT_HDMIA; 2266 case DVO_PORT_DPA: 2267 case DVO_PORT_DPB: 2268 case DVO_PORT_DPC: 2269 case DVO_PORT_DPD: 2270 case DVO_PORT_DPE: 2271 case DVO_PORT_DPF: 2272 case DVO_PORT_DPG: 2273 case DVO_PORT_DPH: 2274 case DVO_PORT_DPI: 2275 return DVO_PORT_DPA; 2276 case DVO_PORT_MIPIA: 2277 case DVO_PORT_MIPIB: 2278 case DVO_PORT_MIPIC: 2279 case DVO_PORT_MIPID: 2280 return DVO_PORT_MIPIA; 2281 default: 2282 return dvo_port; 2283 } 2284 } 2285 2286 static enum port __dvo_port_to_port(int n_ports, int n_dvo, 2287 const int port_mapping[][3], u8 dvo_port) 2288 { 2289 enum port port; 2290 int i; 2291 2292 for (port = PORT_A; port < n_ports; port++) { 2293 for (i = 0; i < n_dvo; i++) { 2294 if (port_mapping[port][i] == -1) 2295 break; 2296 2297 if (dvo_port == port_mapping[port][i]) 2298 return port; 2299 } 2300 } 2301 2302 return PORT_NONE; 2303 } 2304 2305 static enum port dvo_port_to_port(struct drm_i915_private *i915, 2306 u8 dvo_port) 2307 { 2308 /* 2309 * Each DDI port can have more than one value on the "DVO Port" field, 2310 * so look for all the possible values for each port. 2311 */ 2312 static const int port_mapping[][3] = { 2313 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2314 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2315 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2316 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2317 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT }, 2318 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2319 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2320 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2321 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2322 }; 2323 /* 2324 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D 2325 * map to DDI A,B,TC1,TC2 respectively. 2326 */ 2327 static const int rkl_port_mapping[][3] = { 2328 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2329 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2330 [PORT_C] = { -1 }, 2331 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2332 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2333 }; 2334 /* 2335 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E, 2336 * PORT_F and PORT_G, we need to map that to correct VBT sections. 2337 */ 2338 static const int adls_port_mapping[][3] = { 2339 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2340 [PORT_B] = { -1 }, 2341 [PORT_C] = { -1 }, 2342 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2343 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2344 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2345 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2346 }; 2347 static const int xelpd_port_mapping[][3] = { 2348 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2349 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2350 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2351 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2352 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2353 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2354 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2355 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2356 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2357 }; 2358 2359 if (DISPLAY_VER(i915) >= 13) 2360 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping), 2361 ARRAY_SIZE(xelpd_port_mapping[0]), 2362 xelpd_port_mapping, 2363 dvo_port); 2364 else if (IS_ALDERLAKE_S(i915)) 2365 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping), 2366 ARRAY_SIZE(adls_port_mapping[0]), 2367 adls_port_mapping, 2368 dvo_port); 2369 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 2370 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), 2371 ARRAY_SIZE(rkl_port_mapping[0]), 2372 rkl_port_mapping, 2373 dvo_port); 2374 else 2375 return __dvo_port_to_port(ARRAY_SIZE(port_mapping), 2376 ARRAY_SIZE(port_mapping[0]), 2377 port_mapping, 2378 dvo_port); 2379 } 2380 2381 static enum port 2382 dsi_dvo_port_to_port(struct drm_i915_private *i915, u8 dvo_port) 2383 { 2384 switch (dvo_port) { 2385 case DVO_PORT_MIPIA: 2386 return PORT_A; 2387 case DVO_PORT_MIPIC: 2388 if (DISPLAY_VER(i915) >= 11) 2389 return PORT_B; 2390 else 2391 return PORT_C; 2392 default: 2393 return PORT_NONE; 2394 } 2395 } 2396 2397 enum port intel_bios_encoder_port(const struct intel_bios_encoder_data *devdata) 2398 { 2399 struct drm_i915_private *i915 = devdata->i915; 2400 const struct child_device_config *child = &devdata->child; 2401 enum port port; 2402 2403 port = dvo_port_to_port(i915, child->dvo_port); 2404 if (port == PORT_NONE && DISPLAY_VER(i915) >= 11) 2405 port = dsi_dvo_port_to_port(i915, child->dvo_port); 2406 2407 return port; 2408 } 2409 2410 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate) 2411 { 2412 switch (vbt_max_link_rate) { 2413 default: 2414 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF: 2415 return 0; 2416 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20: 2417 return 2000000; 2418 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5: 2419 return 1350000; 2420 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10: 2421 return 1000000; 2422 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3: 2423 return 810000; 2424 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2: 2425 return 540000; 2426 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR: 2427 return 270000; 2428 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR: 2429 return 162000; 2430 } 2431 } 2432 2433 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate) 2434 { 2435 switch (vbt_max_link_rate) { 2436 default: 2437 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3: 2438 return 810000; 2439 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2: 2440 return 540000; 2441 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR: 2442 return 270000; 2443 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR: 2444 return 162000; 2445 } 2446 } 2447 2448 int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata) 2449 { 2450 if (!devdata || devdata->i915->display.vbt.version < 216) 2451 return 0; 2452 2453 if (devdata->i915->display.vbt.version >= 230) 2454 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate); 2455 else 2456 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate); 2457 } 2458 2459 int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata) 2460 { 2461 if (!devdata || devdata->i915->display.vbt.version < 244) 2462 return 0; 2463 2464 return devdata->child.dp_max_lane_count + 1; 2465 } 2466 2467 static void sanitize_device_type(struct intel_bios_encoder_data *devdata, 2468 enum port port) 2469 { 2470 struct drm_i915_private *i915 = devdata->i915; 2471 bool is_hdmi; 2472 2473 if (port != PORT_A || DISPLAY_VER(i915) >= 12) 2474 return; 2475 2476 if (!intel_bios_encoder_supports_dvi(devdata)) 2477 return; 2478 2479 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2480 2481 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n", 2482 is_hdmi ? "/HDMI" : ""); 2483 2484 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 2485 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 2486 } 2487 2488 static bool 2489 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata) 2490 { 2491 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT; 2492 } 2493 2494 bool 2495 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata) 2496 { 2497 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 2498 } 2499 2500 bool 2501 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata) 2502 { 2503 return intel_bios_encoder_supports_dvi(devdata) && 2504 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 2505 } 2506 2507 bool 2508 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata) 2509 { 2510 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2511 } 2512 2513 bool 2514 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata) 2515 { 2516 return intel_bios_encoder_supports_dp(devdata) && 2517 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR; 2518 } 2519 2520 bool 2521 intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata) 2522 { 2523 return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT; 2524 } 2525 2526 bool 2527 intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata) 2528 { 2529 return devdata && HAS_LSPCON(devdata->i915) && devdata->child.lspcon; 2530 } 2531 2532 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */ 2533 int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata) 2534 { 2535 if (!devdata || devdata->i915->display.vbt.version < 158 || 2536 DISPLAY_VER(devdata->i915) >= 14) 2537 return -1; 2538 2539 return devdata->child.hdmi_level_shifter_value; 2540 } 2541 2542 int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata) 2543 { 2544 if (!devdata || devdata->i915->display.vbt.version < 204) 2545 return 0; 2546 2547 switch (devdata->child.hdmi_max_data_rate) { 2548 default: 2549 MISSING_CASE(devdata->child.hdmi_max_data_rate); 2550 fallthrough; 2551 case HDMI_MAX_DATA_RATE_PLATFORM: 2552 return 0; 2553 case HDMI_MAX_DATA_RATE_594: 2554 return 594000; 2555 case HDMI_MAX_DATA_RATE_340: 2556 return 340000; 2557 case HDMI_MAX_DATA_RATE_300: 2558 return 300000; 2559 case HDMI_MAX_DATA_RATE_297: 2560 return 297000; 2561 case HDMI_MAX_DATA_RATE_165: 2562 return 165000; 2563 } 2564 } 2565 2566 static bool is_port_valid(struct drm_i915_private *i915, enum port port) 2567 { 2568 /* 2569 * On some ICL SKUs port F is not present, but broken VBTs mark 2570 * the port as present. Only try to initialize port F for the 2571 * SKUs that may actually have it. 2572 */ 2573 if (port == PORT_F && IS_ICELAKE(i915)) 2574 return IS_ICL_WITH_PORT_F(i915); 2575 2576 return true; 2577 } 2578 2579 static void print_ddi_port(const struct intel_bios_encoder_data *devdata) 2580 { 2581 struct drm_i915_private *i915 = devdata->i915; 2582 const struct child_device_config *child = &devdata->child; 2583 bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt; 2584 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock; 2585 enum port port; 2586 2587 port = intel_bios_encoder_port(devdata); 2588 if (port == PORT_NONE) 2589 return; 2590 2591 is_dvi = intel_bios_encoder_supports_dvi(devdata); 2592 is_dp = intel_bios_encoder_supports_dp(devdata); 2593 is_crt = intel_bios_encoder_supports_crt(devdata); 2594 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2595 is_edp = intel_bios_encoder_supports_edp(devdata); 2596 is_dsi = intel_bios_encoder_supports_dsi(devdata); 2597 2598 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata); 2599 supports_tbt = intel_bios_encoder_supports_tbt(devdata); 2600 2601 drm_dbg_kms(&i915->drm, 2602 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 2603 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi, 2604 intel_bios_encoder_supports_dp_dual_mode(devdata), 2605 intel_bios_encoder_is_lspcon(devdata), 2606 supports_typec_usb, supports_tbt, 2607 devdata->dsc != NULL); 2608 2609 hdmi_level_shift = intel_bios_hdmi_level_shift(devdata); 2610 if (hdmi_level_shift >= 0) { 2611 drm_dbg_kms(&i915->drm, 2612 "Port %c VBT HDMI level shift: %d\n", 2613 port_name(port), hdmi_level_shift); 2614 } 2615 2616 max_tmds_clock = intel_bios_hdmi_max_tmds_clock(devdata); 2617 if (max_tmds_clock) 2618 drm_dbg_kms(&i915->drm, 2619 "Port %c VBT HDMI max TMDS clock: %d kHz\n", 2620 port_name(port), max_tmds_clock); 2621 2622 /* I_boost config for SKL and above */ 2623 dp_boost_level = intel_bios_dp_boost_level(devdata); 2624 if (dp_boost_level) 2625 drm_dbg_kms(&i915->drm, 2626 "Port %c VBT (e)DP boost level: %d\n", 2627 port_name(port), dp_boost_level); 2628 2629 hdmi_boost_level = intel_bios_hdmi_boost_level(devdata); 2630 if (hdmi_boost_level) 2631 drm_dbg_kms(&i915->drm, 2632 "Port %c VBT HDMI boost level: %d\n", 2633 port_name(port), hdmi_boost_level); 2634 2635 dp_max_link_rate = intel_bios_dp_max_link_rate(devdata); 2636 if (dp_max_link_rate) 2637 drm_dbg_kms(&i915->drm, 2638 "Port %c VBT DP max link rate: %d\n", 2639 port_name(port), dp_max_link_rate); 2640 2641 /* 2642 * FIXME need to implement support for VBT 2643 * vswing/preemph tables should this ever trigger. 2644 */ 2645 drm_WARN(&i915->drm, child->use_vbt_vswing, 2646 "Port %c asks to use VBT vswing/preemph tables\n", 2647 port_name(port)); 2648 } 2649 2650 static void parse_ddi_port(struct intel_bios_encoder_data *devdata) 2651 { 2652 struct drm_i915_private *i915 = devdata->i915; 2653 enum port port; 2654 2655 port = intel_bios_encoder_port(devdata); 2656 if (port == PORT_NONE) 2657 return; 2658 2659 if (!is_port_valid(i915, port)) { 2660 drm_dbg_kms(&i915->drm, 2661 "VBT reports port %c as supported, but that can't be true: skipping\n", 2662 port_name(port)); 2663 return; 2664 } 2665 2666 sanitize_device_type(devdata, port); 2667 } 2668 2669 static bool has_ddi_port_info(struct drm_i915_private *i915) 2670 { 2671 return DISPLAY_VER(i915) >= 5 || IS_G4X(i915); 2672 } 2673 2674 static void parse_ddi_ports(struct drm_i915_private *i915) 2675 { 2676 struct intel_bios_encoder_data *devdata; 2677 2678 if (!has_ddi_port_info(i915)) 2679 return; 2680 2681 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) 2682 parse_ddi_port(devdata); 2683 2684 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) 2685 print_ddi_port(devdata); 2686 } 2687 2688 static void 2689 parse_general_definitions(struct drm_i915_private *i915) 2690 { 2691 const struct bdb_general_definitions *defs; 2692 struct intel_bios_encoder_data *devdata; 2693 const struct child_device_config *child; 2694 int i, child_device_num; 2695 u8 expected_size; 2696 u16 block_size; 2697 int bus_pin; 2698 2699 defs = bdb_find_section(i915, BDB_GENERAL_DEFINITIONS); 2700 if (!defs) { 2701 drm_dbg_kms(&i915->drm, 2702 "No general definition block is found, no devices defined.\n"); 2703 return; 2704 } 2705 2706 block_size = get_blocksize(defs); 2707 if (block_size < sizeof(*defs)) { 2708 drm_dbg_kms(&i915->drm, 2709 "General definitions block too small (%u)\n", 2710 block_size); 2711 return; 2712 } 2713 2714 bus_pin = defs->crt_ddc_gmbus_pin; 2715 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin); 2716 if (intel_gmbus_is_valid_pin(i915, bus_pin)) 2717 i915->display.vbt.crt_ddc_pin = bus_pin; 2718 2719 if (i915->display.vbt.version < 106) { 2720 expected_size = 22; 2721 } else if (i915->display.vbt.version < 111) { 2722 expected_size = 27; 2723 } else if (i915->display.vbt.version < 195) { 2724 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 2725 } else if (i915->display.vbt.version == 195) { 2726 expected_size = 37; 2727 } else if (i915->display.vbt.version <= 215) { 2728 expected_size = 38; 2729 } else if (i915->display.vbt.version <= 250) { 2730 expected_size = 39; 2731 } else { 2732 expected_size = sizeof(*child); 2733 BUILD_BUG_ON(sizeof(*child) < 39); 2734 drm_dbg(&i915->drm, 2735 "Expected child device config size for VBT version %u not known; assuming %u\n", 2736 i915->display.vbt.version, expected_size); 2737 } 2738 2739 /* Flag an error for unexpected size, but continue anyway. */ 2740 if (defs->child_dev_size != expected_size) 2741 drm_err(&i915->drm, 2742 "Unexpected child device config size %u (expected %u for VBT version %u)\n", 2743 defs->child_dev_size, expected_size, i915->display.vbt.version); 2744 2745 /* The legacy sized child device config is the minimum we need. */ 2746 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 2747 drm_dbg_kms(&i915->drm, 2748 "Child device config size %u is too small.\n", 2749 defs->child_dev_size); 2750 return; 2751 } 2752 2753 /* get the number of child device */ 2754 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 2755 2756 for (i = 0; i < child_device_num; i++) { 2757 child = child_device_ptr(defs, i); 2758 if (!child->device_type) 2759 continue; 2760 2761 drm_dbg_kms(&i915->drm, 2762 "Found VBT child device with type 0x%x\n", 2763 child->device_type); 2764 2765 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2766 if (!devdata) 2767 break; 2768 2769 devdata->i915 = i915; 2770 2771 /* 2772 * Copy as much as we know (sizeof) and is available 2773 * (child_dev_size) of the child device config. Accessing the 2774 * data must depend on VBT version. 2775 */ 2776 memcpy(&devdata->child, child, 2777 min_t(size_t, defs->child_dev_size, sizeof(*child))); 2778 2779 list_add_tail(&devdata->node, &i915->display.vbt.display_devices); 2780 } 2781 2782 if (list_empty(&i915->display.vbt.display_devices)) 2783 drm_dbg_kms(&i915->drm, 2784 "no child dev is parsed from VBT\n"); 2785 } 2786 2787 /* Common defaults which may be overridden by VBT. */ 2788 static void 2789 init_vbt_defaults(struct drm_i915_private *i915) 2790 { 2791 i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 2792 2793 /* general features */ 2794 i915->display.vbt.int_tv_support = 1; 2795 i915->display.vbt.int_crt_support = 1; 2796 2797 /* driver features */ 2798 i915->display.vbt.int_lvds_support = 1; 2799 2800 /* Default to using SSC */ 2801 i915->display.vbt.lvds_use_ssc = 1; 2802 /* 2803 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 2804 * clock for LVDS. 2805 */ 2806 i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915, 2807 !HAS_PCH_SPLIT(i915)); 2808 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n", 2809 i915->display.vbt.lvds_ssc_freq); 2810 } 2811 2812 /* Common defaults which may be overridden by VBT. */ 2813 static void 2814 init_vbt_panel_defaults(struct intel_panel *panel) 2815 { 2816 /* Default to having backlight */ 2817 panel->vbt.backlight.present = true; 2818 2819 /* LFP panel data */ 2820 panel->vbt.lvds_dither = true; 2821 } 2822 2823 /* Defaults to initialize only if there is no VBT. */ 2824 static void 2825 init_vbt_missing_defaults(struct drm_i915_private *i915) 2826 { 2827 enum port port; 2828 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | 2829 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F); 2830 2831 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915)) 2832 return; 2833 2834 for_each_port_masked(port, ports) { 2835 struct intel_bios_encoder_data *devdata; 2836 struct child_device_config *child; 2837 enum phy phy = intel_port_to_phy(i915, port); 2838 2839 /* 2840 * VBT has the TypeC mode (native,TBT/USB) and we don't want 2841 * to detect it. 2842 */ 2843 if (intel_phy_is_tc(i915, phy)) 2844 continue; 2845 2846 /* Create fake child device config */ 2847 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2848 if (!devdata) 2849 break; 2850 2851 devdata->i915 = i915; 2852 child = &devdata->child; 2853 2854 if (port == PORT_F) 2855 child->dvo_port = DVO_PORT_HDMIF; 2856 else if (port == PORT_E) 2857 child->dvo_port = DVO_PORT_HDMIE; 2858 else 2859 child->dvo_port = DVO_PORT_HDMIA + port; 2860 2861 if (port != PORT_A && port != PORT_E) 2862 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING; 2863 2864 if (port != PORT_E) 2865 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2866 2867 if (port == PORT_A) 2868 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR; 2869 2870 list_add_tail(&devdata->node, &i915->display.vbt.display_devices); 2871 2872 drm_dbg_kms(&i915->drm, 2873 "Generating default VBT child device with type 0x04%x on port %c\n", 2874 child->device_type, port_name(port)); 2875 } 2876 2877 /* Bypass some minimum baseline VBT version checks */ 2878 i915->display.vbt.version = 155; 2879 } 2880 2881 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 2882 { 2883 const void *_vbt = vbt; 2884 2885 return _vbt + vbt->bdb_offset; 2886 } 2887 2888 /** 2889 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 2890 * @buf: pointer to a buffer to validate 2891 * @size: size of the buffer 2892 * 2893 * Returns true on valid VBT. 2894 */ 2895 bool intel_bios_is_valid_vbt(const void *buf, size_t size) 2896 { 2897 const struct vbt_header *vbt = buf; 2898 const struct bdb_header *bdb; 2899 2900 if (!vbt) 2901 return false; 2902 2903 if (sizeof(struct vbt_header) > size) { 2904 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 2905 return false; 2906 } 2907 2908 if (memcmp(vbt->signature, "$VBT", 4)) { 2909 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 2910 return false; 2911 } 2912 2913 if (vbt->vbt_size > size) { 2914 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 2915 return false; 2916 } 2917 2918 size = vbt->vbt_size; 2919 2920 if (range_overflows_t(size_t, 2921 vbt->bdb_offset, 2922 sizeof(struct bdb_header), 2923 size)) { 2924 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 2925 return false; 2926 } 2927 2928 bdb = get_bdb_header(vbt); 2929 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 2930 DRM_DEBUG_DRIVER("BDB incomplete\n"); 2931 return false; 2932 } 2933 2934 return vbt; 2935 } 2936 2937 static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset) 2938 { 2939 intel_uncore_write(uncore, PRIMARY_SPI_ADDRESS, offset); 2940 2941 return intel_uncore_read(uncore, PRIMARY_SPI_TRIGGER); 2942 } 2943 2944 static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915) 2945 { 2946 u32 count, data, found, store = 0; 2947 u32 static_region, oprom_offset; 2948 u32 oprom_size = 0x200000; 2949 u16 vbt_size; 2950 u32 *vbt; 2951 2952 static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS); 2953 static_region &= OPTIONROM_SPI_REGIONID_MASK; 2954 intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region); 2955 2956 oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET); 2957 oprom_offset &= OROM_OFFSET_MASK; 2958 2959 for (count = 0; count < oprom_size; count += 4) { 2960 data = intel_spi_read(&i915->uncore, oprom_offset + count); 2961 if (data == *((const u32 *)"$VBT")) { 2962 found = oprom_offset + count; 2963 break; 2964 } 2965 } 2966 2967 if (count >= oprom_size) 2968 goto err_not_found; 2969 2970 /* Get VBT size and allocate space for the VBT */ 2971 vbt_size = intel_spi_read(&i915->uncore, 2972 found + offsetof(struct vbt_header, vbt_size)); 2973 vbt_size &= 0xffff; 2974 2975 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL); 2976 if (!vbt) 2977 goto err_not_found; 2978 2979 for (count = 0; count < vbt_size; count += 4) 2980 *(vbt + store++) = intel_spi_read(&i915->uncore, found + count); 2981 2982 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2983 goto err_free_vbt; 2984 2985 drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n"); 2986 2987 return (struct vbt_header *)vbt; 2988 2989 err_free_vbt: 2990 kfree(vbt); 2991 err_not_found: 2992 return NULL; 2993 } 2994 2995 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) 2996 { 2997 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); 2998 void __iomem *p = NULL, *oprom; 2999 struct vbt_header *vbt; 3000 u16 vbt_size; 3001 size_t i, size; 3002 3003 oprom = pci_map_rom(pdev, &size); 3004 if (!oprom) 3005 return NULL; 3006 3007 /* Scour memory looking for the VBT signature. */ 3008 for (i = 0; i + 4 < size; i += 4) { 3009 if (ioread32(oprom + i) != *((const u32 *)"$VBT")) 3010 continue; 3011 3012 p = oprom + i; 3013 size -= i; 3014 break; 3015 } 3016 3017 if (!p) 3018 goto err_unmap_oprom; 3019 3020 if (sizeof(struct vbt_header) > size) { 3021 drm_dbg(&i915->drm, "VBT header incomplete\n"); 3022 goto err_unmap_oprom; 3023 } 3024 3025 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size)); 3026 if (vbt_size > size) { 3027 drm_dbg(&i915->drm, 3028 "VBT incomplete (vbt_size overflows)\n"); 3029 goto err_unmap_oprom; 3030 } 3031 3032 /* The rest will be validated by intel_bios_is_valid_vbt() */ 3033 vbt = kmalloc(vbt_size, GFP_KERNEL); 3034 if (!vbt) 3035 goto err_unmap_oprom; 3036 3037 memcpy_fromio(vbt, p, vbt_size); 3038 3039 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 3040 goto err_free_vbt; 3041 3042 pci_unmap_rom(pdev, oprom); 3043 3044 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n"); 3045 3046 return vbt; 3047 3048 err_free_vbt: 3049 kfree(vbt); 3050 err_unmap_oprom: 3051 pci_unmap_rom(pdev, oprom); 3052 3053 return NULL; 3054 } 3055 3056 /** 3057 * intel_bios_init - find VBT and initialize settings from the BIOS 3058 * @i915: i915 device instance 3059 * 3060 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 3061 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 3062 * initialize some defaults if the VBT is not present at all. 3063 */ 3064 void intel_bios_init(struct drm_i915_private *i915) 3065 { 3066 const struct vbt_header *vbt = i915->display.opregion.vbt; 3067 struct vbt_header *oprom_vbt = NULL; 3068 const struct bdb_header *bdb; 3069 3070 INIT_LIST_HEAD(&i915->display.vbt.display_devices); 3071 INIT_LIST_HEAD(&i915->display.vbt.bdb_blocks); 3072 3073 if (!HAS_DISPLAY(i915)) { 3074 drm_dbg_kms(&i915->drm, 3075 "Skipping VBT init due to disabled display.\n"); 3076 return; 3077 } 3078 3079 init_vbt_defaults(i915); 3080 3081 /* 3082 * If the OpRegion does not have VBT, look in SPI flash through MMIO or 3083 * PCI mapping 3084 */ 3085 if (!vbt && IS_DGFX(i915)) { 3086 oprom_vbt = spi_oprom_get_vbt(i915); 3087 vbt = oprom_vbt; 3088 } 3089 3090 if (!vbt) { 3091 oprom_vbt = oprom_get_vbt(i915); 3092 vbt = oprom_vbt; 3093 } 3094 3095 if (!vbt) 3096 goto out; 3097 3098 bdb = get_bdb_header(vbt); 3099 i915->display.vbt.version = bdb->version; 3100 3101 drm_dbg_kms(&i915->drm, 3102 "VBT signature \"%.*s\", BDB version %d\n", 3103 (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version); 3104 3105 init_bdb_blocks(i915, bdb); 3106 3107 /* Grab useful general definitions */ 3108 parse_general_features(i915); 3109 parse_general_definitions(i915); 3110 parse_driver_features(i915); 3111 3112 /* Depends on child device list */ 3113 parse_compression_parameters(i915); 3114 3115 out: 3116 if (!vbt) { 3117 drm_info(&i915->drm, 3118 "Failed to find VBIOS tables (VBT)\n"); 3119 init_vbt_missing_defaults(i915); 3120 } 3121 3122 /* Further processing on pre-parsed or generated child device data */ 3123 parse_sdvo_device_mapping(i915); 3124 parse_ddi_ports(i915); 3125 3126 kfree(oprom_vbt); 3127 } 3128 3129 static void intel_bios_init_panel(struct drm_i915_private *i915, 3130 struct intel_panel *panel, 3131 const struct intel_bios_encoder_data *devdata, 3132 const struct drm_edid *drm_edid, 3133 bool use_fallback) 3134 { 3135 /* already have it? */ 3136 if (panel->vbt.panel_type >= 0) { 3137 drm_WARN_ON(&i915->drm, !use_fallback); 3138 return; 3139 } 3140 3141 panel->vbt.panel_type = get_panel_type(i915, devdata, 3142 drm_edid, use_fallback); 3143 if (panel->vbt.panel_type < 0) { 3144 drm_WARN_ON(&i915->drm, use_fallback); 3145 return; 3146 } 3147 3148 init_vbt_panel_defaults(panel); 3149 3150 parse_panel_options(i915, panel); 3151 parse_generic_dtd(i915, panel); 3152 parse_lfp_data(i915, panel); 3153 parse_lfp_backlight(i915, panel); 3154 parse_sdvo_panel_data(i915, panel); 3155 parse_panel_driver_features(i915, panel); 3156 parse_power_conservation_features(i915, panel); 3157 parse_edp(i915, panel); 3158 parse_psr(i915, panel); 3159 parse_mipi_config(i915, panel); 3160 parse_mipi_sequence(i915, panel); 3161 } 3162 3163 void intel_bios_init_panel_early(struct drm_i915_private *i915, 3164 struct intel_panel *panel, 3165 const struct intel_bios_encoder_data *devdata) 3166 { 3167 intel_bios_init_panel(i915, panel, devdata, NULL, false); 3168 } 3169 3170 void intel_bios_init_panel_late(struct drm_i915_private *i915, 3171 struct intel_panel *panel, 3172 const struct intel_bios_encoder_data *devdata, 3173 const struct drm_edid *drm_edid) 3174 { 3175 intel_bios_init_panel(i915, panel, devdata, drm_edid, true); 3176 } 3177 3178 /** 3179 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 3180 * @i915: i915 device instance 3181 */ 3182 void intel_bios_driver_remove(struct drm_i915_private *i915) 3183 { 3184 struct intel_bios_encoder_data *devdata, *nd; 3185 struct bdb_block_entry *entry, *ne; 3186 3187 list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) { 3188 list_del(&devdata->node); 3189 kfree(devdata->dsc); 3190 kfree(devdata); 3191 } 3192 3193 list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) { 3194 list_del(&entry->node); 3195 kfree(entry); 3196 } 3197 } 3198 3199 void intel_bios_fini_panel(struct intel_panel *panel) 3200 { 3201 kfree(panel->vbt.sdvo_lvds_vbt_mode); 3202 panel->vbt.sdvo_lvds_vbt_mode = NULL; 3203 kfree(panel->vbt.lfp_lvds_vbt_mode); 3204 panel->vbt.lfp_lvds_vbt_mode = NULL; 3205 kfree(panel->vbt.dsi.data); 3206 panel->vbt.dsi.data = NULL; 3207 kfree(panel->vbt.dsi.pps); 3208 panel->vbt.dsi.pps = NULL; 3209 kfree(panel->vbt.dsi.config); 3210 panel->vbt.dsi.config = NULL; 3211 kfree(panel->vbt.dsi.deassert_seq); 3212 panel->vbt.dsi.deassert_seq = NULL; 3213 } 3214 3215 /** 3216 * intel_bios_is_tv_present - is integrated TV present in VBT 3217 * @i915: i915 device instance 3218 * 3219 * Return true if TV is present. If no child devices were parsed from VBT, 3220 * assume TV is present. 3221 */ 3222 bool intel_bios_is_tv_present(struct drm_i915_private *i915) 3223 { 3224 const struct intel_bios_encoder_data *devdata; 3225 3226 if (!i915->display.vbt.int_tv_support) 3227 return false; 3228 3229 if (list_empty(&i915->display.vbt.display_devices)) 3230 return true; 3231 3232 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3233 const struct child_device_config *child = &devdata->child; 3234 3235 /* 3236 * If the device type is not TV, continue. 3237 */ 3238 switch (child->device_type) { 3239 case DEVICE_TYPE_INT_TV: 3240 case DEVICE_TYPE_TV: 3241 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 3242 break; 3243 default: 3244 continue; 3245 } 3246 /* Only when the addin_offset is non-zero, it is regarded 3247 * as present. 3248 */ 3249 if (child->addin_offset) 3250 return true; 3251 } 3252 3253 return false; 3254 } 3255 3256 /** 3257 * intel_bios_is_lvds_present - is LVDS present in VBT 3258 * @i915: i915 device instance 3259 * @i2c_pin: i2c pin for LVDS if present 3260 * 3261 * Return true if LVDS is present. If no child devices were parsed from VBT, 3262 * assume LVDS is present. 3263 */ 3264 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin) 3265 { 3266 const struct intel_bios_encoder_data *devdata; 3267 3268 if (list_empty(&i915->display.vbt.display_devices)) 3269 return true; 3270 3271 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3272 const struct child_device_config *child = &devdata->child; 3273 3274 /* If the device type is not LFP, continue. 3275 * We have to check both the new identifiers as well as the 3276 * old for compatibility with some BIOSes. 3277 */ 3278 if (child->device_type != DEVICE_TYPE_INT_LFP && 3279 child->device_type != DEVICE_TYPE_LFP) 3280 continue; 3281 3282 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin)) 3283 *i2c_pin = child->i2c_pin; 3284 3285 /* However, we cannot trust the BIOS writers to populate 3286 * the VBT correctly. Since LVDS requires additional 3287 * information from AIM blocks, a non-zero addin offset is 3288 * a good indicator that the LVDS is actually present. 3289 */ 3290 if (child->addin_offset) 3291 return true; 3292 3293 /* But even then some BIOS writers perform some black magic 3294 * and instantiate the device without reference to any 3295 * additional data. Trust that if the VBT was written into 3296 * the OpRegion then they have validated the LVDS's existence. 3297 */ 3298 if (i915->display.opregion.vbt) 3299 return true; 3300 } 3301 3302 return false; 3303 } 3304 3305 /** 3306 * intel_bios_is_port_present - is the specified digital port present 3307 * @i915: i915 device instance 3308 * @port: port to check 3309 * 3310 * Return true if the device in %port is present. 3311 */ 3312 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port) 3313 { 3314 const struct intel_bios_encoder_data *devdata; 3315 3316 if (WARN_ON(!has_ddi_port_info(i915))) 3317 return true; 3318 3319 if (!is_port_valid(i915, port)) 3320 return false; 3321 3322 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3323 const struct child_device_config *child = &devdata->child; 3324 3325 if (dvo_port_to_port(i915, child->dvo_port) == port) 3326 return true; 3327 } 3328 3329 return false; 3330 } 3331 3332 bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata) 3333 { 3334 const struct child_device_config *child = &devdata->child; 3335 3336 if (!devdata) 3337 return false; 3338 3339 if (!intel_bios_encoder_supports_dp(devdata) || 3340 !intel_bios_encoder_supports_hdmi(devdata)) 3341 return false; 3342 3343 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA) 3344 return true; 3345 3346 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 3347 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA && 3348 child->aux_channel != 0) 3349 return true; 3350 3351 return false; 3352 } 3353 3354 /** 3355 * intel_bios_is_dsi_present - is DSI present in VBT 3356 * @i915: i915 device instance 3357 * @port: port for DSI if present 3358 * 3359 * Return true if DSI is present, and return the port in %port. 3360 */ 3361 bool intel_bios_is_dsi_present(struct drm_i915_private *i915, 3362 enum port *port) 3363 { 3364 const struct intel_bios_encoder_data *devdata; 3365 3366 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3367 const struct child_device_config *child = &devdata->child; 3368 u8 dvo_port = child->dvo_port; 3369 3370 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3371 continue; 3372 3373 if (dsi_dvo_port_to_port(i915, dvo_port) == PORT_NONE) { 3374 drm_dbg_kms(&i915->drm, 3375 "VBT has unsupported DSI port %c\n", 3376 port_name(dvo_port - DVO_PORT_MIPIA)); 3377 continue; 3378 } 3379 3380 if (port) 3381 *port = dsi_dvo_port_to_port(i915, dvo_port); 3382 return true; 3383 } 3384 3385 return false; 3386 } 3387 3388 static void fill_dsc(struct intel_crtc_state *crtc_state, 3389 struct dsc_compression_parameters_entry *dsc, 3390 int dsc_max_bpc) 3391 { 3392 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 3393 int bpc = 8; 3394 3395 vdsc_cfg->dsc_version_major = dsc->version_major; 3396 vdsc_cfg->dsc_version_minor = dsc->version_minor; 3397 3398 if (dsc->support_12bpc && dsc_max_bpc >= 12) 3399 bpc = 12; 3400 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 3401 bpc = 10; 3402 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 3403 bpc = 8; 3404 else 3405 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n", 3406 dsc_max_bpc); 3407 3408 crtc_state->pipe_bpp = bpc * 3; 3409 3410 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp, 3411 VBT_DSC_MAX_BPP(dsc->max_bpp)); 3412 3413 /* 3414 * FIXME: This is ugly, and slice count should take DSC engine 3415 * throughput etc. into account. 3416 * 3417 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 3418 */ 3419 if (dsc->slices_per_line & BIT(2)) { 3420 crtc_state->dsc.slice_count = 4; 3421 } else if (dsc->slices_per_line & BIT(1)) { 3422 crtc_state->dsc.slice_count = 2; 3423 } else { 3424 /* FIXME */ 3425 if (!(dsc->slices_per_line & BIT(0))) 3426 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n"); 3427 3428 crtc_state->dsc.slice_count = 1; 3429 } 3430 3431 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 3432 crtc_state->dsc.slice_count != 0) 3433 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n", 3434 crtc_state->hw.adjusted_mode.crtc_hdisplay, 3435 crtc_state->dsc.slice_count); 3436 3437 /* 3438 * The VBT rc_buffer_block_size and rc_buffer_size definitions 3439 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. 3440 */ 3441 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, 3442 dsc->rc_buffer_size); 3443 3444 /* FIXME: DSI spec says bpc + 1 for this one */ 3445 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 3446 3447 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 3448 3449 vdsc_cfg->slice_height = dsc->slice_height; 3450 } 3451 3452 /* FIXME: initially DSI specific */ 3453 bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 3454 struct intel_crtc_state *crtc_state, 3455 int dsc_max_bpc) 3456 { 3457 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3458 const struct intel_bios_encoder_data *devdata; 3459 3460 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3461 const struct child_device_config *child = &devdata->child; 3462 3463 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3464 continue; 3465 3466 if (dsi_dvo_port_to_port(i915, child->dvo_port) == encoder->port) { 3467 if (!devdata->dsc) 3468 return false; 3469 3470 if (crtc_state) 3471 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 3472 3473 return true; 3474 } 3475 } 3476 3477 return false; 3478 } 3479 3480 static const u8 adlp_aux_ch_map[] = { 3481 [AUX_CH_A] = DP_AUX_A, 3482 [AUX_CH_B] = DP_AUX_B, 3483 [AUX_CH_C] = DP_AUX_C, 3484 [AUX_CH_D_XELPD] = DP_AUX_D, 3485 [AUX_CH_E_XELPD] = DP_AUX_E, 3486 [AUX_CH_USBC1] = DP_AUX_F, 3487 [AUX_CH_USBC2] = DP_AUX_G, 3488 [AUX_CH_USBC3] = DP_AUX_H, 3489 [AUX_CH_USBC4] = DP_AUX_I, 3490 }; 3491 3492 /* 3493 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E 3494 * map to DDI A,TC1,TC2,TC3,TC4 respectively. 3495 */ 3496 static const u8 adls_aux_ch_map[] = { 3497 [AUX_CH_A] = DP_AUX_A, 3498 [AUX_CH_USBC1] = DP_AUX_B, 3499 [AUX_CH_USBC2] = DP_AUX_C, 3500 [AUX_CH_USBC3] = DP_AUX_D, 3501 [AUX_CH_USBC4] = DP_AUX_E, 3502 }; 3503 3504 /* 3505 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D 3506 * map to DDI A,B,TC1,TC2 respectively. 3507 */ 3508 static const u8 rkl_aux_ch_map[] = { 3509 [AUX_CH_A] = DP_AUX_A, 3510 [AUX_CH_B] = DP_AUX_B, 3511 [AUX_CH_USBC1] = DP_AUX_C, 3512 [AUX_CH_USBC2] = DP_AUX_D, 3513 }; 3514 3515 static const u8 direct_aux_ch_map[] = { 3516 [AUX_CH_A] = DP_AUX_A, 3517 [AUX_CH_B] = DP_AUX_B, 3518 [AUX_CH_C] = DP_AUX_C, 3519 [AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */ 3520 [AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */ 3521 [AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */ 3522 [AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */ 3523 [AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */ 3524 [AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */ 3525 }; 3526 3527 static enum aux_ch map_aux_ch(struct drm_i915_private *i915, u8 aux_channel) 3528 { 3529 const u8 *aux_ch_map; 3530 int i, n_entries; 3531 3532 if (DISPLAY_VER(i915) >= 13) { 3533 aux_ch_map = adlp_aux_ch_map; 3534 n_entries = ARRAY_SIZE(adlp_aux_ch_map); 3535 } else if (IS_ALDERLAKE_S(i915)) { 3536 aux_ch_map = adls_aux_ch_map; 3537 n_entries = ARRAY_SIZE(adls_aux_ch_map); 3538 } else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) { 3539 aux_ch_map = rkl_aux_ch_map; 3540 n_entries = ARRAY_SIZE(rkl_aux_ch_map); 3541 } else { 3542 aux_ch_map = direct_aux_ch_map; 3543 n_entries = ARRAY_SIZE(direct_aux_ch_map); 3544 } 3545 3546 for (i = 0; i < n_entries; i++) { 3547 if (aux_ch_map[i] == aux_channel) 3548 return i; 3549 } 3550 3551 drm_dbg_kms(&i915->drm, 3552 "Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n", 3553 aux_channel); 3554 3555 return AUX_CH_NONE; 3556 } 3557 3558 enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata) 3559 { 3560 if (!devdata || !devdata->child.aux_channel) 3561 return AUX_CH_NONE; 3562 3563 return map_aux_ch(devdata->i915, devdata->child.aux_channel); 3564 } 3565 3566 bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata) 3567 { 3568 struct drm_i915_private *i915; 3569 u8 aux_channel; 3570 int count = 0; 3571 3572 if (!devdata || !devdata->child.aux_channel) 3573 return false; 3574 3575 i915 = devdata->i915; 3576 aux_channel = devdata->child.aux_channel; 3577 3578 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3579 if (intel_bios_encoder_supports_dp(devdata) && 3580 aux_channel == devdata->child.aux_channel) 3581 count++; 3582 } 3583 3584 return count > 1; 3585 } 3586 3587 int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata) 3588 { 3589 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost) 3590 return 0; 3591 3592 return translate_iboost(devdata->child.dp_iboost_level); 3593 } 3594 3595 int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata) 3596 { 3597 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost) 3598 return 0; 3599 3600 return translate_iboost(devdata->child.hdmi_iboost_level); 3601 } 3602 3603 int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata) 3604 { 3605 if (!devdata || !devdata->child.ddc_pin) 3606 return 0; 3607 3608 return map_ddc_pin(devdata->i915, devdata->child.ddc_pin); 3609 } 3610 3611 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata) 3612 { 3613 return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c; 3614 } 3615 3616 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata) 3617 { 3618 return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt; 3619 } 3620 3621 bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata) 3622 { 3623 return devdata && devdata->child.lane_reversal; 3624 } 3625 3626 bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata) 3627 { 3628 return devdata && devdata->child.hpd_invert; 3629 } 3630 3631 const struct intel_bios_encoder_data * 3632 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port) 3633 { 3634 struct intel_bios_encoder_data *devdata; 3635 3636 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3637 if (intel_bios_encoder_port(devdata) == port) 3638 return devdata; 3639 } 3640 3641 return NULL; 3642 } 3643 3644 void intel_bios_for_each_encoder(struct drm_i915_private *i915, 3645 void (*func)(struct drm_i915_private *i915, 3646 const struct intel_bios_encoder_data *devdata)) 3647 { 3648 struct intel_bios_encoder_data *devdata; 3649 3650 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) 3651 func(i915, devdata); 3652 } 3653