1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <drm/drm_dp_helper.h> 29 30 #include "display/intel_display.h" 31 #include "display/intel_display_types.h" 32 #include "display/intel_gmbus.h" 33 34 #include "i915_drv.h" 35 36 #define _INTEL_BIOS_PRIVATE 37 #include "intel_vbt_defs.h" 38 39 /** 40 * DOC: Video BIOS Table (VBT) 41 * 42 * The Video BIOS Table, or VBT, provides platform and board specific 43 * configuration information to the driver that is not discoverable or available 44 * through other means. The configuration is mostly related to display 45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 46 * the PCI ROM. 47 * 48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 50 * contain the actual configuration information. The VBT Header, and thus the 51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 52 * BDB Header. The data blocks are concatenated after the BDB Header. The data 53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 54 * data. (Block 53, the MIPI Sequence Block is an exception.) 55 * 56 * The driver parses the VBT during load. The relevant information is stored in 57 * driver private data for ease of use, and the actual VBT is not read after 58 * that. 59 */ 60 61 /* Wrapper for VBT child device config */ 62 struct display_device_data { 63 struct child_device_config child; 64 struct dsc_compression_parameters_entry *dsc; 65 struct list_head node; 66 }; 67 68 #define SLAVE_ADDR1 0x70 69 #define SLAVE_ADDR2 0x72 70 71 /* Get BDB block size given a pointer to Block ID. */ 72 static u32 _get_blocksize(const u8 *block_base) 73 { 74 /* The MIPI Sequence Block v3+ has a separate size field. */ 75 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 76 return *((const u32 *)(block_base + 4)); 77 else 78 return *((const u16 *)(block_base + 1)); 79 } 80 81 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 82 static u32 get_blocksize(const void *block_data) 83 { 84 return _get_blocksize(block_data - 3); 85 } 86 87 static const void * 88 find_section(const void *_bdb, enum bdb_block_id section_id) 89 { 90 const struct bdb_header *bdb = _bdb; 91 const u8 *base = _bdb; 92 int index = 0; 93 u32 total, current_size; 94 enum bdb_block_id current_id; 95 96 /* skip to first section */ 97 index += bdb->header_size; 98 total = bdb->bdb_size; 99 100 /* walk the sections looking for section_id */ 101 while (index + 3 < total) { 102 current_id = *(base + index); 103 current_size = _get_blocksize(base + index); 104 index += 3; 105 106 if (index + current_size > total) 107 return NULL; 108 109 if (current_id == section_id) 110 return base + index; 111 112 index += current_size; 113 } 114 115 return NULL; 116 } 117 118 static void 119 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 120 const struct lvds_dvo_timing *dvo_timing) 121 { 122 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 123 dvo_timing->hactive_lo; 124 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 125 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 126 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 127 ((dvo_timing->hsync_pulse_width_hi << 8) | 128 dvo_timing->hsync_pulse_width_lo); 129 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 130 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 131 132 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 133 dvo_timing->vactive_lo; 134 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 135 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 136 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 137 ((dvo_timing->vsync_pulse_width_hi << 4) | 138 dvo_timing->vsync_pulse_width_lo); 139 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 140 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 141 panel_fixed_mode->clock = dvo_timing->clock * 10; 142 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 143 144 if (dvo_timing->hsync_positive) 145 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 146 else 147 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 148 149 if (dvo_timing->vsync_positive) 150 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 151 else 152 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 153 154 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 155 dvo_timing->himage_lo; 156 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 157 dvo_timing->vimage_lo; 158 159 /* Some VBTs have bogus h/vtotal values */ 160 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 161 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 162 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 163 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 164 165 drm_mode_set_name(panel_fixed_mode); 166 } 167 168 static const struct lvds_dvo_timing * 169 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, 170 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, 171 int index) 172 { 173 /* 174 * the size of fp_timing varies on the different platform. 175 * So calculate the DVO timing relative offset in LVDS data 176 * entry to get the DVO timing entry 177 */ 178 179 int lfp_data_size = 180 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - 181 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; 182 int dvo_timing_offset = 183 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - 184 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; 185 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; 186 187 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); 188 } 189 190 /* get lvds_fp_timing entry 191 * this function may return NULL if the corresponding entry is invalid 192 */ 193 static const struct lvds_fp_timing * 194 get_lvds_fp_timing(const struct bdb_header *bdb, 195 const struct bdb_lvds_lfp_data *data, 196 const struct bdb_lvds_lfp_data_ptrs *ptrs, 197 int index) 198 { 199 size_t data_ofs = (const u8 *)data - (const u8 *)bdb; 200 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ 201 size_t ofs; 202 203 if (index >= ARRAY_SIZE(ptrs->ptr)) 204 return NULL; 205 ofs = ptrs->ptr[index].fp_timing_offset; 206 if (ofs < data_ofs || 207 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) 208 return NULL; 209 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); 210 } 211 212 /* Parse general panel options */ 213 static void 214 parse_panel_options(struct drm_i915_private *dev_priv, 215 const struct bdb_header *bdb) 216 { 217 const struct bdb_lvds_options *lvds_options; 218 int panel_type; 219 int drrs_mode; 220 int ret; 221 222 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); 223 if (!lvds_options) 224 return; 225 226 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; 227 228 ret = intel_opregion_get_panel_type(dev_priv); 229 if (ret >= 0) { 230 drm_WARN_ON(&dev_priv->drm, ret > 0xf); 231 panel_type = ret; 232 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (OpRegion)\n", 233 panel_type); 234 } else { 235 if (lvds_options->panel_type > 0xf) { 236 drm_dbg_kms(&dev_priv->drm, 237 "Invalid VBT panel type 0x%x\n", 238 lvds_options->panel_type); 239 return; 240 } 241 panel_type = lvds_options->panel_type; 242 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (VBT)\n", 243 panel_type); 244 } 245 246 dev_priv->vbt.panel_type = panel_type; 247 248 drrs_mode = (lvds_options->dps_panel_type_bits 249 >> (panel_type * 2)) & MODE_MASK; 250 /* 251 * VBT has static DRRS = 0 and seamless DRRS = 2. 252 * The below piece of code is required to adjust vbt.drrs_type 253 * to match the enum drrs_support_type. 254 */ 255 switch (drrs_mode) { 256 case 0: 257 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; 258 drm_dbg_kms(&dev_priv->drm, "DRRS supported mode is static\n"); 259 break; 260 case 2: 261 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; 262 drm_dbg_kms(&dev_priv->drm, 263 "DRRS supported mode is seamless\n"); 264 break; 265 default: 266 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 267 drm_dbg_kms(&dev_priv->drm, 268 "DRRS not supported (VBT input)\n"); 269 break; 270 } 271 } 272 273 /* Try to find integrated panel timing data */ 274 static void 275 parse_lfp_panel_dtd(struct drm_i915_private *dev_priv, 276 const struct bdb_header *bdb) 277 { 278 const struct bdb_lvds_lfp_data *lvds_lfp_data; 279 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; 280 const struct lvds_dvo_timing *panel_dvo_timing; 281 const struct lvds_fp_timing *fp_timing; 282 struct drm_display_mode *panel_fixed_mode; 283 int panel_type = dev_priv->vbt.panel_type; 284 285 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); 286 if (!lvds_lfp_data) 287 return; 288 289 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); 290 if (!lvds_lfp_data_ptrs) 291 return; 292 293 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 294 lvds_lfp_data_ptrs, 295 panel_type); 296 297 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 298 if (!panel_fixed_mode) 299 return; 300 301 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 302 303 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 304 305 drm_dbg_kms(&dev_priv->drm, 306 "Found panel mode in BIOS VBT legacy lfp table:\n"); 307 drm_mode_debug_printmodeline(panel_fixed_mode); 308 309 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, 310 lvds_lfp_data_ptrs, 311 panel_type); 312 if (fp_timing) { 313 /* check the resolution, just to be sure */ 314 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 315 fp_timing->y_res == panel_fixed_mode->vdisplay) { 316 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 317 drm_dbg_kms(&dev_priv->drm, 318 "VBT initial LVDS value %x\n", 319 dev_priv->vbt.bios_lvds_val); 320 } 321 } 322 } 323 324 static void 325 parse_generic_dtd(struct drm_i915_private *dev_priv, 326 const struct bdb_header *bdb) 327 { 328 const struct bdb_generic_dtd *generic_dtd; 329 const struct generic_dtd_entry *dtd; 330 struct drm_display_mode *panel_fixed_mode; 331 int num_dtd; 332 333 generic_dtd = find_section(bdb, BDB_GENERIC_DTD); 334 if (!generic_dtd) 335 return; 336 337 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 338 drm_err(&dev_priv->drm, "GDTD size %u is too small.\n", 339 generic_dtd->gdtd_size); 340 return; 341 } else if (generic_dtd->gdtd_size != 342 sizeof(struct generic_dtd_entry)) { 343 drm_err(&dev_priv->drm, "Unexpected GDTD size %u\n", 344 generic_dtd->gdtd_size); 345 /* DTD has unknown fields, but keep going */ 346 } 347 348 num_dtd = (get_blocksize(generic_dtd) - 349 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 350 if (dev_priv->vbt.panel_type >= num_dtd) { 351 drm_err(&dev_priv->drm, 352 "Panel type %d not found in table of %d DTD's\n", 353 dev_priv->vbt.panel_type, num_dtd); 354 return; 355 } 356 357 dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type]; 358 359 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 360 if (!panel_fixed_mode) 361 return; 362 363 panel_fixed_mode->hdisplay = dtd->hactive; 364 panel_fixed_mode->hsync_start = 365 panel_fixed_mode->hdisplay + dtd->hfront_porch; 366 panel_fixed_mode->hsync_end = 367 panel_fixed_mode->hsync_start + dtd->hsync; 368 panel_fixed_mode->htotal = 369 panel_fixed_mode->hdisplay + dtd->hblank; 370 371 panel_fixed_mode->vdisplay = dtd->vactive; 372 panel_fixed_mode->vsync_start = 373 panel_fixed_mode->vdisplay + dtd->vfront_porch; 374 panel_fixed_mode->vsync_end = 375 panel_fixed_mode->vsync_start + dtd->vsync; 376 panel_fixed_mode->vtotal = 377 panel_fixed_mode->vdisplay + dtd->vblank; 378 379 panel_fixed_mode->clock = dtd->pixel_clock; 380 panel_fixed_mode->width_mm = dtd->width_mm; 381 panel_fixed_mode->height_mm = dtd->height_mm; 382 383 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 384 drm_mode_set_name(panel_fixed_mode); 385 386 if (dtd->hsync_positive_polarity) 387 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 388 else 389 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 390 391 if (dtd->vsync_positive_polarity) 392 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 393 else 394 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 395 396 drm_dbg_kms(&dev_priv->drm, 397 "Found panel mode in BIOS VBT generic dtd table:\n"); 398 drm_mode_debug_printmodeline(panel_fixed_mode); 399 400 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 401 } 402 403 static void 404 parse_panel_dtd(struct drm_i915_private *dev_priv, 405 const struct bdb_header *bdb) 406 { 407 /* 408 * Older VBTs provided provided DTD information for internal displays 409 * through the "LFP panel DTD" block (42). As of VBT revision 229, 410 * that block is now deprecated and DTD information should be provided 411 * via a newer "generic DTD" block (58). Just to be safe, we'll 412 * try the new generic DTD block first on VBT >= 229, but still fall 413 * back to trying the old LFP block if that fails. 414 */ 415 if (bdb->version >= 229) 416 parse_generic_dtd(dev_priv, bdb); 417 if (!dev_priv->vbt.lfp_lvds_vbt_mode) 418 parse_lfp_panel_dtd(dev_priv, bdb); 419 } 420 421 static void 422 parse_lfp_backlight(struct drm_i915_private *dev_priv, 423 const struct bdb_header *bdb) 424 { 425 const struct bdb_lfp_backlight_data *backlight_data; 426 const struct lfp_backlight_data_entry *entry; 427 int panel_type = dev_priv->vbt.panel_type; 428 429 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); 430 if (!backlight_data) 431 return; 432 433 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 434 drm_dbg_kms(&dev_priv->drm, 435 "Unsupported backlight data entry size %u\n", 436 backlight_data->entry_size); 437 return; 438 } 439 440 entry = &backlight_data->data[panel_type]; 441 442 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 443 if (!dev_priv->vbt.backlight.present) { 444 drm_dbg_kms(&dev_priv->drm, 445 "PWM backlight not present in VBT (type %u)\n", 446 entry->type); 447 return; 448 } 449 450 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 451 if (bdb->version >= 191 && 452 get_blocksize(backlight_data) >= sizeof(*backlight_data)) { 453 const struct lfp_backlight_control_method *method; 454 455 method = &backlight_data->backlight_control[panel_type]; 456 dev_priv->vbt.backlight.type = method->type; 457 dev_priv->vbt.backlight.controller = method->controller; 458 } 459 460 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 461 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; 462 dev_priv->vbt.backlight.min_brightness = entry->min_brightness; 463 drm_dbg_kms(&dev_priv->drm, 464 "VBT backlight PWM modulation frequency %u Hz, " 465 "active %s, min brightness %u, level %u, controller %u\n", 466 dev_priv->vbt.backlight.pwm_freq_hz, 467 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", 468 dev_priv->vbt.backlight.min_brightness, 469 backlight_data->level[panel_type], 470 dev_priv->vbt.backlight.controller); 471 } 472 473 /* Try to find sdvo panel data */ 474 static void 475 parse_sdvo_panel_data(struct drm_i915_private *dev_priv, 476 const struct bdb_header *bdb) 477 { 478 const struct bdb_sdvo_panel_dtds *dtds; 479 struct drm_display_mode *panel_fixed_mode; 480 int index; 481 482 index = dev_priv->params.vbt_sdvo_panel_type; 483 if (index == -2) { 484 drm_dbg_kms(&dev_priv->drm, 485 "Ignore SDVO panel mode from BIOS VBT tables.\n"); 486 return; 487 } 488 489 if (index == -1) { 490 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 491 492 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); 493 if (!sdvo_lvds_options) 494 return; 495 496 index = sdvo_lvds_options->panel_type; 497 } 498 499 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS); 500 if (!dtds) 501 return; 502 503 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 504 if (!panel_fixed_mode) 505 return; 506 507 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 508 509 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 510 511 drm_dbg_kms(&dev_priv->drm, 512 "Found SDVO panel mode in BIOS VBT tables:\n"); 513 drm_mode_debug_printmodeline(panel_fixed_mode); 514 } 515 516 static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv, 517 bool alternate) 518 { 519 switch (INTEL_GEN(dev_priv)) { 520 case 2: 521 return alternate ? 66667 : 48000; 522 case 3: 523 case 4: 524 return alternate ? 100000 : 96000; 525 default: 526 return alternate ? 100000 : 120000; 527 } 528 } 529 530 static void 531 parse_general_features(struct drm_i915_private *dev_priv, 532 const struct bdb_header *bdb) 533 { 534 const struct bdb_general_features *general; 535 536 general = find_section(bdb, BDB_GENERAL_FEATURES); 537 if (!general) 538 return; 539 540 dev_priv->vbt.int_tv_support = general->int_tv_support; 541 /* int_crt_support can't be trusted on earlier platforms */ 542 if (bdb->version >= 155 && 543 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv))) 544 dev_priv->vbt.int_crt_support = general->int_crt_support; 545 dev_priv->vbt.lvds_use_ssc = general->enable_ssc; 546 dev_priv->vbt.lvds_ssc_freq = 547 intel_bios_ssc_frequency(dev_priv, general->ssc_freq); 548 dev_priv->vbt.display_clock_mode = general->display_clock_mode; 549 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 550 if (bdb->version >= 181) { 551 dev_priv->vbt.orientation = general->rotate_180 ? 552 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 553 DRM_MODE_PANEL_ORIENTATION_NORMAL; 554 } else { 555 dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 556 } 557 drm_dbg_kms(&dev_priv->drm, 558 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 559 dev_priv->vbt.int_tv_support, 560 dev_priv->vbt.int_crt_support, 561 dev_priv->vbt.lvds_use_ssc, 562 dev_priv->vbt.lvds_ssc_freq, 563 dev_priv->vbt.display_clock_mode, 564 dev_priv->vbt.fdi_rx_polarity_inverted); 565 } 566 567 static const struct child_device_config * 568 child_device_ptr(const struct bdb_general_definitions *defs, int i) 569 { 570 return (const void *) &defs->devices[i * defs->child_dev_size]; 571 } 572 573 static void 574 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version) 575 { 576 struct sdvo_device_mapping *mapping; 577 const struct display_device_data *devdata; 578 const struct child_device_config *child; 579 int count = 0; 580 581 /* 582 * Only parse SDVO mappings on gens that could have SDVO. This isn't 583 * accurate and doesn't have to be, as long as it's not too strict. 584 */ 585 if (!IS_GEN_RANGE(dev_priv, 3, 7)) { 586 drm_dbg_kms(&dev_priv->drm, "Skipping SDVO device mapping\n"); 587 return; 588 } 589 590 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 591 child = &devdata->child; 592 593 if (child->slave_addr != SLAVE_ADDR1 && 594 child->slave_addr != SLAVE_ADDR2) { 595 /* 596 * If the slave address is neither 0x70 nor 0x72, 597 * it is not a SDVO device. Skip it. 598 */ 599 continue; 600 } 601 if (child->dvo_port != DEVICE_PORT_DVOB && 602 child->dvo_port != DEVICE_PORT_DVOC) { 603 /* skip the incorrect SDVO port */ 604 drm_dbg_kms(&dev_priv->drm, 605 "Incorrect SDVO port. Skip it\n"); 606 continue; 607 } 608 drm_dbg_kms(&dev_priv->drm, 609 "the SDVO device with slave addr %2x is found on" 610 " %s port\n", 611 child->slave_addr, 612 (child->dvo_port == DEVICE_PORT_DVOB) ? 613 "SDVOB" : "SDVOC"); 614 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1]; 615 if (!mapping->initialized) { 616 mapping->dvo_port = child->dvo_port; 617 mapping->slave_addr = child->slave_addr; 618 mapping->dvo_wiring = child->dvo_wiring; 619 mapping->ddc_pin = child->ddc_pin; 620 mapping->i2c_pin = child->i2c_pin; 621 mapping->initialized = 1; 622 drm_dbg_kms(&dev_priv->drm, 623 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 624 mapping->dvo_port, mapping->slave_addr, 625 mapping->dvo_wiring, mapping->ddc_pin, 626 mapping->i2c_pin); 627 } else { 628 drm_dbg_kms(&dev_priv->drm, 629 "Maybe one SDVO port is shared by " 630 "two SDVO device.\n"); 631 } 632 if (child->slave2_addr) { 633 /* Maybe this is a SDVO device with multiple inputs */ 634 /* And the mapping info is not added */ 635 drm_dbg_kms(&dev_priv->drm, 636 "there exists the slave2_addr. Maybe this" 637 " is a SDVO device with multiple inputs.\n"); 638 } 639 count++; 640 } 641 642 if (!count) { 643 /* No SDVO device info is found */ 644 drm_dbg_kms(&dev_priv->drm, 645 "No SDVO device info is found in VBT\n"); 646 } 647 } 648 649 static void 650 parse_driver_features(struct drm_i915_private *dev_priv, 651 const struct bdb_header *bdb) 652 { 653 const struct bdb_driver_features *driver; 654 655 driver = find_section(bdb, BDB_DRIVER_FEATURES); 656 if (!driver) 657 return; 658 659 if (INTEL_GEN(dev_priv) >= 5) { 660 /* 661 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 662 * to mean "eDP". The VBT spec doesn't agree with that 663 * interpretation, but real world VBTs seem to. 664 */ 665 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 666 dev_priv->vbt.int_lvds_support = 0; 667 } else { 668 /* 669 * FIXME it's not clear which BDB version has the LVDS config 670 * bits defined. Revision history in the VBT spec says: 671 * "0.92 | Add two definitions for VBT value of LVDS Active 672 * Config (00b and 11b values defined) | 06/13/2005" 673 * but does not the specify the BDB version. 674 * 675 * So far version 134 (on i945gm) is the oldest VBT observed 676 * in the wild with the bits correctly populated. Version 677 * 108 (on i85x) does not have the bits correctly populated. 678 */ 679 if (bdb->version >= 134 && 680 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 681 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 682 dev_priv->vbt.int_lvds_support = 0; 683 } 684 685 if (bdb->version < 228) { 686 drm_dbg_kms(&dev_priv->drm, "DRRS State Enabled:%d\n", 687 driver->drrs_enabled); 688 /* 689 * If DRRS is not supported, drrs_type has to be set to 0. 690 * This is because, VBT is configured in such a way that 691 * static DRRS is 0 and DRRS not supported is represented by 692 * driver->drrs_enabled=false 693 */ 694 if (!driver->drrs_enabled) 695 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 696 697 dev_priv->vbt.psr.enable = driver->psr_enabled; 698 } 699 } 700 701 static void 702 parse_power_conservation_features(struct drm_i915_private *dev_priv, 703 const struct bdb_header *bdb) 704 { 705 const struct bdb_lfp_power *power; 706 u8 panel_type = dev_priv->vbt.panel_type; 707 708 if (bdb->version < 228) 709 return; 710 711 power = find_section(bdb, BDB_LFP_POWER); 712 if (!power) 713 return; 714 715 dev_priv->vbt.psr.enable = power->psr & BIT(panel_type); 716 717 /* 718 * If DRRS is not supported, drrs_type has to be set to 0. 719 * This is because, VBT is configured in such a way that 720 * static DRRS is 0 and DRRS not supported is represented by 721 * power->drrs & BIT(panel_type)=false 722 */ 723 if (!(power->drrs & BIT(panel_type))) 724 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 725 726 if (bdb->version >= 232) 727 dev_priv->vbt.edp.hobl = power->hobl & BIT(panel_type); 728 } 729 730 static void 731 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 732 { 733 const struct bdb_edp *edp; 734 const struct edp_power_seq *edp_pps; 735 const struct edp_fast_link_params *edp_link_params; 736 int panel_type = dev_priv->vbt.panel_type; 737 738 edp = find_section(bdb, BDB_EDP); 739 if (!edp) 740 return; 741 742 switch ((edp->color_depth >> (panel_type * 2)) & 3) { 743 case EDP_18BPP: 744 dev_priv->vbt.edp.bpp = 18; 745 break; 746 case EDP_24BPP: 747 dev_priv->vbt.edp.bpp = 24; 748 break; 749 case EDP_30BPP: 750 dev_priv->vbt.edp.bpp = 30; 751 break; 752 } 753 754 /* Get the eDP sequencing and link info */ 755 edp_pps = &edp->power_seqs[panel_type]; 756 edp_link_params = &edp->fast_link_params[panel_type]; 757 758 dev_priv->vbt.edp.pps = *edp_pps; 759 760 switch (edp_link_params->rate) { 761 case EDP_RATE_1_62: 762 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62; 763 break; 764 case EDP_RATE_2_7: 765 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7; 766 break; 767 default: 768 drm_dbg_kms(&dev_priv->drm, 769 "VBT has unknown eDP link rate value %u\n", 770 edp_link_params->rate); 771 break; 772 } 773 774 switch (edp_link_params->lanes) { 775 case EDP_LANE_1: 776 dev_priv->vbt.edp.lanes = 1; 777 break; 778 case EDP_LANE_2: 779 dev_priv->vbt.edp.lanes = 2; 780 break; 781 case EDP_LANE_4: 782 dev_priv->vbt.edp.lanes = 4; 783 break; 784 default: 785 drm_dbg_kms(&dev_priv->drm, 786 "VBT has unknown eDP lane count value %u\n", 787 edp_link_params->lanes); 788 break; 789 } 790 791 switch (edp_link_params->preemphasis) { 792 case EDP_PREEMPHASIS_NONE: 793 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 794 break; 795 case EDP_PREEMPHASIS_3_5dB: 796 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 797 break; 798 case EDP_PREEMPHASIS_6dB: 799 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 800 break; 801 case EDP_PREEMPHASIS_9_5dB: 802 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 803 break; 804 default: 805 drm_dbg_kms(&dev_priv->drm, 806 "VBT has unknown eDP pre-emphasis value %u\n", 807 edp_link_params->preemphasis); 808 break; 809 } 810 811 switch (edp_link_params->vswing) { 812 case EDP_VSWING_0_4V: 813 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 814 break; 815 case EDP_VSWING_0_6V: 816 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 817 break; 818 case EDP_VSWING_0_8V: 819 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 820 break; 821 case EDP_VSWING_1_2V: 822 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 823 break; 824 default: 825 drm_dbg_kms(&dev_priv->drm, 826 "VBT has unknown eDP voltage swing value %u\n", 827 edp_link_params->vswing); 828 break; 829 } 830 831 if (bdb->version >= 173) { 832 u8 vswing; 833 834 /* Don't read from VBT if module parameter has valid value*/ 835 if (dev_priv->params.edp_vswing) { 836 dev_priv->vbt.edp.low_vswing = 837 dev_priv->params.edp_vswing == 1; 838 } else { 839 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 840 dev_priv->vbt.edp.low_vswing = vswing == 0; 841 } 842 } 843 } 844 845 static void 846 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 847 { 848 const struct bdb_psr *psr; 849 const struct psr_table *psr_table; 850 int panel_type = dev_priv->vbt.panel_type; 851 852 psr = find_section(bdb, BDB_PSR); 853 if (!psr) { 854 drm_dbg_kms(&dev_priv->drm, "No PSR BDB found.\n"); 855 return; 856 } 857 858 psr_table = &psr->psr_table[panel_type]; 859 860 dev_priv->vbt.psr.full_link = psr_table->full_link; 861 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 862 863 /* Allowed VBT values goes from 0 to 15 */ 864 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 865 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 866 867 switch (psr_table->lines_to_wait) { 868 case 0: 869 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT; 870 break; 871 case 1: 872 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT; 873 break; 874 case 2: 875 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT; 876 break; 877 case 3: 878 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT; 879 break; 880 default: 881 drm_dbg_kms(&dev_priv->drm, 882 "VBT has unknown PSR lines to wait %u\n", 883 psr_table->lines_to_wait); 884 break; 885 } 886 887 /* 888 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 889 * Old decimal value is wake up time in multiples of 100 us. 890 */ 891 if (bdb->version >= 205 && 892 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) || 893 INTEL_GEN(dev_priv) >= 10)) { 894 switch (psr_table->tp1_wakeup_time) { 895 case 0: 896 dev_priv->vbt.psr.tp1_wakeup_time_us = 500; 897 break; 898 case 1: 899 dev_priv->vbt.psr.tp1_wakeup_time_us = 100; 900 break; 901 case 3: 902 dev_priv->vbt.psr.tp1_wakeup_time_us = 0; 903 break; 904 default: 905 drm_dbg_kms(&dev_priv->drm, 906 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 907 psr_table->tp1_wakeup_time); 908 /* fallthrough */ 909 case 2: 910 dev_priv->vbt.psr.tp1_wakeup_time_us = 2500; 911 break; 912 } 913 914 switch (psr_table->tp2_tp3_wakeup_time) { 915 case 0: 916 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500; 917 break; 918 case 1: 919 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100; 920 break; 921 case 3: 922 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0; 923 break; 924 default: 925 drm_dbg_kms(&dev_priv->drm, 926 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 927 psr_table->tp2_tp3_wakeup_time); 928 /* fallthrough */ 929 case 2: 930 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 931 break; 932 } 933 } else { 934 dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 935 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 936 } 937 938 if (bdb->version >= 226) { 939 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 940 941 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3; 942 switch (wakeup_time) { 943 case 0: 944 wakeup_time = 500; 945 break; 946 case 1: 947 wakeup_time = 100; 948 break; 949 case 3: 950 wakeup_time = 50; 951 break; 952 default: 953 case 2: 954 wakeup_time = 2500; 955 break; 956 } 957 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 958 } else { 959 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 960 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us; 961 } 962 } 963 964 static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv, 965 u16 version, enum port port) 966 { 967 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) { 968 dev_priv->vbt.dsi.bl_ports = BIT(port); 969 if (dev_priv->vbt.dsi.config->cabc_supported) 970 dev_priv->vbt.dsi.cabc_ports = BIT(port); 971 972 return; 973 } 974 975 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) { 976 case DL_DCS_PORT_A: 977 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A); 978 break; 979 case DL_DCS_PORT_C: 980 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C); 981 break; 982 default: 983 case DL_DCS_PORT_A_AND_C: 984 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C); 985 break; 986 } 987 988 if (!dev_priv->vbt.dsi.config->cabc_supported) 989 return; 990 991 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) { 992 case DL_DCS_PORT_A: 993 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A); 994 break; 995 case DL_DCS_PORT_C: 996 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C); 997 break; 998 default: 999 case DL_DCS_PORT_A_AND_C: 1000 dev_priv->vbt.dsi.cabc_ports = 1001 BIT(PORT_A) | BIT(PORT_C); 1002 break; 1003 } 1004 } 1005 1006 static void 1007 parse_mipi_config(struct drm_i915_private *dev_priv, 1008 const struct bdb_header *bdb) 1009 { 1010 const struct bdb_mipi_config *start; 1011 const struct mipi_config *config; 1012 const struct mipi_pps_data *pps; 1013 int panel_type = dev_priv->vbt.panel_type; 1014 enum port port; 1015 1016 /* parse MIPI blocks only if LFP type is MIPI */ 1017 if (!intel_bios_is_dsi_present(dev_priv, &port)) 1018 return; 1019 1020 /* Initialize this to undefined indicating no generic MIPI support */ 1021 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 1022 1023 /* Block #40 is already parsed and panel_fixed_mode is 1024 * stored in dev_priv->lfp_lvds_vbt_mode 1025 * resuse this when needed 1026 */ 1027 1028 /* Parse #52 for panel index used from panel_type already 1029 * parsed 1030 */ 1031 start = find_section(bdb, BDB_MIPI_CONFIG); 1032 if (!start) { 1033 drm_dbg_kms(&dev_priv->drm, "No MIPI config BDB found"); 1034 return; 1035 } 1036 1037 drm_dbg(&dev_priv->drm, "Found MIPI Config block, panel index = %d\n", 1038 panel_type); 1039 1040 /* 1041 * get hold of the correct configuration block and pps data as per 1042 * the panel_type as index 1043 */ 1044 config = &start->config[panel_type]; 1045 pps = &start->pps[panel_type]; 1046 1047 /* store as of now full data. Trim when we realise all is not needed */ 1048 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1049 if (!dev_priv->vbt.dsi.config) 1050 return; 1051 1052 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1053 if (!dev_priv->vbt.dsi.pps) { 1054 kfree(dev_priv->vbt.dsi.config); 1055 return; 1056 } 1057 1058 parse_dsi_backlight_ports(dev_priv, bdb->version, port); 1059 1060 /* FIXME is the 90 vs. 270 correct? */ 1061 switch (config->rotation) { 1062 case ENABLE_ROTATION_0: 1063 /* 1064 * Most (all?) VBTs claim 0 degrees despite having 1065 * an upside down panel, thus we do not trust this. 1066 */ 1067 dev_priv->vbt.dsi.orientation = 1068 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1069 break; 1070 case ENABLE_ROTATION_90: 1071 dev_priv->vbt.dsi.orientation = 1072 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1073 break; 1074 case ENABLE_ROTATION_180: 1075 dev_priv->vbt.dsi.orientation = 1076 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1077 break; 1078 case ENABLE_ROTATION_270: 1079 dev_priv->vbt.dsi.orientation = 1080 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1081 break; 1082 } 1083 1084 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1085 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1086 } 1087 1088 /* Find the sequence block and size for the given panel. */ 1089 static const u8 * 1090 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 1091 u16 panel_id, u32 *seq_size) 1092 { 1093 u32 total = get_blocksize(sequence); 1094 const u8 *data = &sequence->data[0]; 1095 u8 current_id; 1096 u32 current_size; 1097 int header_size = sequence->version >= 3 ? 5 : 3; 1098 int index = 0; 1099 int i; 1100 1101 /* skip new block size */ 1102 if (sequence->version >= 3) 1103 data += 4; 1104 1105 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1106 if (index + header_size > total) { 1107 DRM_ERROR("Invalid sequence block (header)\n"); 1108 return NULL; 1109 } 1110 1111 current_id = *(data + index); 1112 if (sequence->version >= 3) 1113 current_size = *((const u32 *)(data + index + 1)); 1114 else 1115 current_size = *((const u16 *)(data + index + 1)); 1116 1117 index += header_size; 1118 1119 if (index + current_size > total) { 1120 DRM_ERROR("Invalid sequence block\n"); 1121 return NULL; 1122 } 1123 1124 if (current_id == panel_id) { 1125 *seq_size = current_size; 1126 return data + index; 1127 } 1128 1129 index += current_size; 1130 } 1131 1132 DRM_ERROR("Sequence block detected but no valid configuration\n"); 1133 1134 return NULL; 1135 } 1136 1137 static int goto_next_sequence(const u8 *data, int index, int total) 1138 { 1139 u16 len; 1140 1141 /* Skip Sequence Byte. */ 1142 for (index = index + 1; index < total; index += len) { 1143 u8 operation_byte = *(data + index); 1144 index++; 1145 1146 switch (operation_byte) { 1147 case MIPI_SEQ_ELEM_END: 1148 return index; 1149 case MIPI_SEQ_ELEM_SEND_PKT: 1150 if (index + 4 > total) 1151 return 0; 1152 1153 len = *((const u16 *)(data + index + 2)) + 4; 1154 break; 1155 case MIPI_SEQ_ELEM_DELAY: 1156 len = 4; 1157 break; 1158 case MIPI_SEQ_ELEM_GPIO: 1159 len = 2; 1160 break; 1161 case MIPI_SEQ_ELEM_I2C: 1162 if (index + 7 > total) 1163 return 0; 1164 len = *(data + index + 6) + 7; 1165 break; 1166 default: 1167 DRM_ERROR("Unknown operation byte\n"); 1168 return 0; 1169 } 1170 } 1171 1172 return 0; 1173 } 1174 1175 static int goto_next_sequence_v3(const u8 *data, int index, int total) 1176 { 1177 int seq_end; 1178 u16 len; 1179 u32 size_of_sequence; 1180 1181 /* 1182 * Could skip sequence based on Size of Sequence alone, but also do some 1183 * checking on the structure. 1184 */ 1185 if (total < 5) { 1186 DRM_ERROR("Too small sequence size\n"); 1187 return 0; 1188 } 1189 1190 /* Skip Sequence Byte. */ 1191 index++; 1192 1193 /* 1194 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1195 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1196 * byte. 1197 */ 1198 size_of_sequence = *((const u32 *)(data + index)); 1199 index += 4; 1200 1201 seq_end = index + size_of_sequence; 1202 if (seq_end > total) { 1203 DRM_ERROR("Invalid sequence size\n"); 1204 return 0; 1205 } 1206 1207 for (; index < total; index += len) { 1208 u8 operation_byte = *(data + index); 1209 index++; 1210 1211 if (operation_byte == MIPI_SEQ_ELEM_END) { 1212 if (index != seq_end) { 1213 DRM_ERROR("Invalid element structure\n"); 1214 return 0; 1215 } 1216 return index; 1217 } 1218 1219 len = *(data + index); 1220 index++; 1221 1222 /* 1223 * FIXME: Would be nice to check elements like for v1/v2 in 1224 * goto_next_sequence() above. 1225 */ 1226 switch (operation_byte) { 1227 case MIPI_SEQ_ELEM_SEND_PKT: 1228 case MIPI_SEQ_ELEM_DELAY: 1229 case MIPI_SEQ_ELEM_GPIO: 1230 case MIPI_SEQ_ELEM_I2C: 1231 case MIPI_SEQ_ELEM_SPI: 1232 case MIPI_SEQ_ELEM_PMIC: 1233 break; 1234 default: 1235 DRM_ERROR("Unknown operation byte %u\n", 1236 operation_byte); 1237 break; 1238 } 1239 } 1240 1241 return 0; 1242 } 1243 1244 /* 1245 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1246 * skip all delay + gpio operands and stop at the first DSI packet op. 1247 */ 1248 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv) 1249 { 1250 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1251 int index, len; 1252 1253 if (drm_WARN_ON(&dev_priv->drm, 1254 !data || dev_priv->vbt.dsi.seq_version != 1)) 1255 return 0; 1256 1257 /* index = 1 to skip sequence byte */ 1258 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1259 switch (data[index]) { 1260 case MIPI_SEQ_ELEM_SEND_PKT: 1261 return index == 1 ? 0 : index; 1262 case MIPI_SEQ_ELEM_DELAY: 1263 len = 5; /* 1 byte for operand + uint32 */ 1264 break; 1265 case MIPI_SEQ_ELEM_GPIO: 1266 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1267 break; 1268 default: 1269 return 0; 1270 } 1271 } 1272 1273 return 0; 1274 } 1275 1276 /* 1277 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1278 * The deassert must be done before calling intel_dsi_device_ready, so for 1279 * these devices we split the init OTP sequence into a deassert sequence and 1280 * the actual init OTP part. 1281 */ 1282 static void fixup_mipi_sequences(struct drm_i915_private *dev_priv) 1283 { 1284 u8 *init_otp; 1285 int len; 1286 1287 /* Limit this to VLV for now. */ 1288 if (!IS_VALLEYVIEW(dev_priv)) 1289 return; 1290 1291 /* Limit this to v1 vid-mode sequences */ 1292 if (dev_priv->vbt.dsi.config->is_cmd_mode || 1293 dev_priv->vbt.dsi.seq_version != 1) 1294 return; 1295 1296 /* Only do this if there are otp and assert seqs and no deassert seq */ 1297 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1298 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1299 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1300 return; 1301 1302 /* The deassert-sequence ends at the first DSI packet */ 1303 len = get_init_otp_deassert_fragment_len(dev_priv); 1304 if (!len) 1305 return; 1306 1307 drm_dbg_kms(&dev_priv->drm, 1308 "Using init OTP fragment to deassert reset\n"); 1309 1310 /* Copy the fragment, update seq byte and terminate it */ 1311 init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1312 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1313 if (!dev_priv->vbt.dsi.deassert_seq) 1314 return; 1315 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1316 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1317 /* Use the copy for deassert */ 1318 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1319 dev_priv->vbt.dsi.deassert_seq; 1320 /* Replace the last byte of the fragment with init OTP seq byte */ 1321 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1322 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1323 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1324 } 1325 1326 static void 1327 parse_mipi_sequence(struct drm_i915_private *dev_priv, 1328 const struct bdb_header *bdb) 1329 { 1330 int panel_type = dev_priv->vbt.panel_type; 1331 const struct bdb_mipi_sequence *sequence; 1332 const u8 *seq_data; 1333 u32 seq_size; 1334 u8 *data; 1335 int index = 0; 1336 1337 /* Only our generic panel driver uses the sequence block. */ 1338 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 1339 return; 1340 1341 sequence = find_section(bdb, BDB_MIPI_SEQUENCE); 1342 if (!sequence) { 1343 drm_dbg_kms(&dev_priv->drm, 1344 "No MIPI Sequence found, parsing complete\n"); 1345 return; 1346 } 1347 1348 /* Fail gracefully for forward incompatible sequence block. */ 1349 if (sequence->version >= 4) { 1350 drm_err(&dev_priv->drm, 1351 "Unable to parse MIPI Sequence Block v%u\n", 1352 sequence->version); 1353 return; 1354 } 1355 1356 drm_dbg(&dev_priv->drm, "Found MIPI sequence block v%u\n", 1357 sequence->version); 1358 1359 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 1360 if (!seq_data) 1361 return; 1362 1363 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 1364 if (!data) 1365 return; 1366 1367 /* Parse the sequences, store pointers to each sequence. */ 1368 for (;;) { 1369 u8 seq_id = *(data + index); 1370 if (seq_id == MIPI_SEQ_END) 1371 break; 1372 1373 if (seq_id >= MIPI_SEQ_MAX) { 1374 drm_err(&dev_priv->drm, "Unknown sequence %u\n", 1375 seq_id); 1376 goto err; 1377 } 1378 1379 /* Log about presence of sequences we won't run. */ 1380 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 1381 drm_dbg_kms(&dev_priv->drm, 1382 "Unsupported sequence %u\n", seq_id); 1383 1384 dev_priv->vbt.dsi.sequence[seq_id] = data + index; 1385 1386 if (sequence->version >= 3) 1387 index = goto_next_sequence_v3(data, index, seq_size); 1388 else 1389 index = goto_next_sequence(data, index, seq_size); 1390 if (!index) { 1391 drm_err(&dev_priv->drm, "Invalid sequence %u\n", 1392 seq_id); 1393 goto err; 1394 } 1395 } 1396 1397 dev_priv->vbt.dsi.data = data; 1398 dev_priv->vbt.dsi.size = seq_size; 1399 dev_priv->vbt.dsi.seq_version = sequence->version; 1400 1401 fixup_mipi_sequences(dev_priv); 1402 1403 drm_dbg(&dev_priv->drm, "MIPI related VBT parsing complete\n"); 1404 return; 1405 1406 err: 1407 kfree(data); 1408 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence)); 1409 } 1410 1411 static void 1412 parse_compression_parameters(struct drm_i915_private *i915, 1413 const struct bdb_header *bdb) 1414 { 1415 const struct bdb_compression_parameters *params; 1416 struct display_device_data *devdata; 1417 const struct child_device_config *child; 1418 u16 block_size; 1419 int index; 1420 1421 if (bdb->version < 198) 1422 return; 1423 1424 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS); 1425 if (params) { 1426 /* Sanity checks */ 1427 if (params->entry_size != sizeof(params->data[0])) { 1428 drm_dbg_kms(&i915->drm, 1429 "VBT: unsupported compression param entry size\n"); 1430 return; 1431 } 1432 1433 block_size = get_blocksize(params); 1434 if (block_size < sizeof(*params)) { 1435 drm_dbg_kms(&i915->drm, 1436 "VBT: expected 16 compression param entries\n"); 1437 return; 1438 } 1439 } 1440 1441 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 1442 child = &devdata->child; 1443 1444 if (!child->compression_enable) 1445 continue; 1446 1447 if (!params) { 1448 drm_dbg_kms(&i915->drm, 1449 "VBT: compression params not available\n"); 1450 continue; 1451 } 1452 1453 if (child->compression_method_cps) { 1454 drm_dbg_kms(&i915->drm, 1455 "VBT: CPS compression not supported\n"); 1456 continue; 1457 } 1458 1459 index = child->compression_structure_index; 1460 1461 devdata->dsc = kmemdup(¶ms->data[index], 1462 sizeof(*devdata->dsc), GFP_KERNEL); 1463 } 1464 } 1465 1466 static u8 translate_iboost(u8 val) 1467 { 1468 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 1469 1470 if (val >= ARRAY_SIZE(mapping)) { 1471 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 1472 return 0; 1473 } 1474 return mapping[val]; 1475 } 1476 1477 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin) 1478 { 1479 const struct ddi_vbt_port_info *info; 1480 enum port port; 1481 1482 for_each_port(port) { 1483 info = &i915->vbt.ddi_port_info[port]; 1484 1485 if (info->child && ddc_pin == info->alternate_ddc_pin) 1486 return port; 1487 } 1488 1489 return PORT_NONE; 1490 } 1491 1492 static void sanitize_ddc_pin(struct drm_i915_private *dev_priv, 1493 enum port port) 1494 { 1495 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1496 enum port p; 1497 1498 if (!info->alternate_ddc_pin) 1499 return; 1500 1501 p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin); 1502 if (p != PORT_NONE) { 1503 drm_dbg_kms(&dev_priv->drm, 1504 "port %c trying to use the same DDC pin (0x%x) as port %c, " 1505 "disabling port %c DVI/HDMI support\n", 1506 port_name(port), info->alternate_ddc_pin, 1507 port_name(p), port_name(p)); 1508 1509 /* 1510 * If we have multiple ports supposedly sharing the 1511 * pin, then dvi/hdmi couldn't exist on the shared 1512 * port. Otherwise they share the same ddc bin and 1513 * system couldn't communicate with them separately. 1514 * 1515 * Give inverse child device order the priority, 1516 * last one wins. Yes, there are real machines 1517 * (eg. Asrock B250M-HDV) where VBT has both 1518 * port A and port E with the same AUX ch and 1519 * we must pick port E :( 1520 */ 1521 info = &dev_priv->vbt.ddi_port_info[p]; 1522 1523 info->supports_dvi = false; 1524 info->supports_hdmi = false; 1525 info->alternate_ddc_pin = 0; 1526 } 1527 } 1528 1529 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch) 1530 { 1531 const struct ddi_vbt_port_info *info; 1532 enum port port; 1533 1534 for_each_port(port) { 1535 info = &i915->vbt.ddi_port_info[port]; 1536 1537 if (info->child && aux_ch == info->alternate_aux_channel) 1538 return port; 1539 } 1540 1541 return PORT_NONE; 1542 } 1543 1544 static void sanitize_aux_ch(struct drm_i915_private *dev_priv, 1545 enum port port) 1546 { 1547 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1548 enum port p; 1549 1550 if (!info->alternate_aux_channel) 1551 return; 1552 1553 p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel); 1554 if (p != PORT_NONE) { 1555 drm_dbg_kms(&dev_priv->drm, 1556 "port %c trying to use the same AUX CH (0x%x) as port %c, " 1557 "disabling port %c DP support\n", 1558 port_name(port), info->alternate_aux_channel, 1559 port_name(p), port_name(p)); 1560 1561 /* 1562 * If we have multiple ports supposedlt sharing the 1563 * aux channel, then DP couldn't exist on the shared 1564 * port. Otherwise they share the same aux channel 1565 * and system couldn't communicate with them separately. 1566 * 1567 * Give inverse child device order the priority, 1568 * last one wins. Yes, there are real machines 1569 * (eg. Asrock B250M-HDV) where VBT has both 1570 * port A and port E with the same AUX ch and 1571 * we must pick port E :( 1572 */ 1573 info = &dev_priv->vbt.ddi_port_info[p]; 1574 1575 info->supports_dp = false; 1576 info->alternate_aux_channel = 0; 1577 } 1578 } 1579 1580 static const u8 cnp_ddc_pin_map[] = { 1581 [0] = 0, /* N/A */ 1582 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT, 1583 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT, 1584 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */ 1585 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */ 1586 }; 1587 1588 static const u8 icp_ddc_pin_map[] = { 1589 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1590 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1591 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT, 1592 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP, 1593 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP, 1594 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP, 1595 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP, 1596 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP, 1597 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, 1598 }; 1599 1600 static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin) 1601 { 1602 const u8 *ddc_pin_map; 1603 int n_entries; 1604 1605 if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) { 1606 ddc_pin_map = icp_ddc_pin_map; 1607 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 1608 } else if (HAS_PCH_CNP(dev_priv)) { 1609 ddc_pin_map = cnp_ddc_pin_map; 1610 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 1611 } else { 1612 /* Assuming direct map */ 1613 return vbt_pin; 1614 } 1615 1616 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0) 1617 return ddc_pin_map[vbt_pin]; 1618 1619 drm_dbg_kms(&dev_priv->drm, 1620 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 1621 vbt_pin); 1622 return 0; 1623 } 1624 1625 static enum port __dvo_port_to_port(int n_ports, int n_dvo, 1626 const int port_mapping[][3], u8 dvo_port) 1627 { 1628 enum port port; 1629 int i; 1630 1631 for (port = PORT_A; port < n_ports; port++) { 1632 for (i = 0; i < n_dvo; i++) { 1633 if (port_mapping[port][i] == -1) 1634 break; 1635 1636 if (dvo_port == port_mapping[port][i]) 1637 return port; 1638 } 1639 } 1640 1641 return PORT_NONE; 1642 } 1643 1644 static enum port dvo_port_to_port(struct drm_i915_private *dev_priv, 1645 u8 dvo_port) 1646 { 1647 /* 1648 * Each DDI port can have more than one value on the "DVO Port" field, 1649 * so look for all the possible values for each port. 1650 */ 1651 static const int port_mapping[][3] = { 1652 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1653 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1654 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1655 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1656 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT }, 1657 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 1658 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 1659 }; 1660 /* 1661 * Bspec lists the ports as A, B, C, D - however internally in our 1662 * driver we keep them as PORT_A, PORT_B, PORT_D and PORT_E so the 1663 * registers in Display Engine match the right offsets. Apply the 1664 * mapping here to translate from VBT to internal convention. 1665 */ 1666 static const int rkl_port_mapping[][3] = { 1667 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1668 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1669 [PORT_C] = { -1 }, 1670 [PORT_D] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1671 [PORT_E] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1672 }; 1673 1674 if (IS_ROCKETLAKE(dev_priv)) 1675 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), 1676 ARRAY_SIZE(rkl_port_mapping[0]), 1677 rkl_port_mapping, 1678 dvo_port); 1679 else 1680 return __dvo_port_to_port(ARRAY_SIZE(port_mapping), 1681 ARRAY_SIZE(port_mapping[0]), 1682 port_mapping, 1683 dvo_port); 1684 } 1685 1686 static void parse_ddi_port(struct drm_i915_private *dev_priv, 1687 struct display_device_data *devdata, 1688 u8 bdb_version) 1689 { 1690 const struct child_device_config *child = &devdata->child; 1691 struct ddi_vbt_port_info *info; 1692 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; 1693 enum port port; 1694 1695 port = dvo_port_to_port(dev_priv, child->dvo_port); 1696 if (port == PORT_NONE) 1697 return; 1698 1699 info = &dev_priv->vbt.ddi_port_info[port]; 1700 1701 if (info->child) { 1702 drm_dbg_kms(&dev_priv->drm, 1703 "More than one child device for port %c in VBT, using the first.\n", 1704 port_name(port)); 1705 return; 1706 } 1707 1708 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 1709 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 1710 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT; 1711 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 1712 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); 1713 1714 if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) { 1715 drm_dbg_kms(&dev_priv->drm, 1716 "VBT claims port A supports DVI%s, ignoring\n", 1717 is_hdmi ? "/HDMI" : ""); 1718 is_dvi = false; 1719 is_hdmi = false; 1720 } 1721 1722 info->supports_dvi = is_dvi; 1723 info->supports_hdmi = is_hdmi; 1724 info->supports_dp = is_dp; 1725 info->supports_edp = is_edp; 1726 1727 if (bdb_version >= 195) 1728 info->supports_typec_usb = child->dp_usb_type_c; 1729 1730 if (bdb_version >= 209) 1731 info->supports_tbt = child->tbt; 1732 1733 drm_dbg_kms(&dev_priv->drm, 1734 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 1735 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, 1736 HAS_LSPCON(dev_priv) && child->lspcon, 1737 info->supports_typec_usb, info->supports_tbt, 1738 devdata->dsc != NULL); 1739 1740 if (is_dvi) { 1741 u8 ddc_pin; 1742 1743 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin); 1744 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) { 1745 info->alternate_ddc_pin = ddc_pin; 1746 sanitize_ddc_pin(dev_priv, port); 1747 } else { 1748 drm_dbg_kms(&dev_priv->drm, 1749 "Port %c has invalid DDC pin %d, " 1750 "sticking to defaults\n", 1751 port_name(port), ddc_pin); 1752 } 1753 } 1754 1755 if (is_dp) { 1756 info->alternate_aux_channel = child->aux_channel; 1757 1758 sanitize_aux_ch(dev_priv, port); 1759 } 1760 1761 if (bdb_version >= 158) { 1762 /* The VBT HDMI level shift values match the table we have. */ 1763 u8 hdmi_level_shift = child->hdmi_level_shifter_value; 1764 drm_dbg_kms(&dev_priv->drm, 1765 "VBT HDMI level shift for port %c: %d\n", 1766 port_name(port), 1767 hdmi_level_shift); 1768 info->hdmi_level_shift = hdmi_level_shift; 1769 info->hdmi_level_shift_set = true; 1770 } 1771 1772 if (bdb_version >= 204) { 1773 int max_tmds_clock; 1774 1775 switch (child->hdmi_max_data_rate) { 1776 default: 1777 MISSING_CASE(child->hdmi_max_data_rate); 1778 /* fall through */ 1779 case HDMI_MAX_DATA_RATE_PLATFORM: 1780 max_tmds_clock = 0; 1781 break; 1782 case HDMI_MAX_DATA_RATE_297: 1783 max_tmds_clock = 297000; 1784 break; 1785 case HDMI_MAX_DATA_RATE_165: 1786 max_tmds_clock = 165000; 1787 break; 1788 } 1789 1790 if (max_tmds_clock) 1791 drm_dbg_kms(&dev_priv->drm, 1792 "VBT HDMI max TMDS clock for port %c: %d kHz\n", 1793 port_name(port), max_tmds_clock); 1794 info->max_tmds_clock = max_tmds_clock; 1795 } 1796 1797 /* Parse the I_boost config for SKL and above */ 1798 if (bdb_version >= 196 && child->iboost) { 1799 info->dp_boost_level = translate_iboost(child->dp_iboost_level); 1800 drm_dbg_kms(&dev_priv->drm, 1801 "VBT (e)DP boost level for port %c: %d\n", 1802 port_name(port), info->dp_boost_level); 1803 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level); 1804 drm_dbg_kms(&dev_priv->drm, 1805 "VBT HDMI boost level for port %c: %d\n", 1806 port_name(port), info->hdmi_boost_level); 1807 } 1808 1809 /* DP max link rate for CNL+ */ 1810 if (bdb_version >= 216) { 1811 switch (child->dp_max_link_rate) { 1812 default: 1813 case VBT_DP_MAX_LINK_RATE_HBR3: 1814 info->dp_max_link_rate = 810000; 1815 break; 1816 case VBT_DP_MAX_LINK_RATE_HBR2: 1817 info->dp_max_link_rate = 540000; 1818 break; 1819 case VBT_DP_MAX_LINK_RATE_HBR: 1820 info->dp_max_link_rate = 270000; 1821 break; 1822 case VBT_DP_MAX_LINK_RATE_LBR: 1823 info->dp_max_link_rate = 162000; 1824 break; 1825 } 1826 drm_dbg_kms(&dev_priv->drm, 1827 "VBT DP max link rate for port %c: %d\n", 1828 port_name(port), info->dp_max_link_rate); 1829 } 1830 1831 info->child = child; 1832 } 1833 1834 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version) 1835 { 1836 struct display_device_data *devdata; 1837 1838 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv)) 1839 return; 1840 1841 if (bdb_version < 155) 1842 return; 1843 1844 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) 1845 parse_ddi_port(dev_priv, devdata, bdb_version); 1846 } 1847 1848 static void 1849 parse_general_definitions(struct drm_i915_private *dev_priv, 1850 const struct bdb_header *bdb) 1851 { 1852 const struct bdb_general_definitions *defs; 1853 struct display_device_data *devdata; 1854 const struct child_device_config *child; 1855 int i, child_device_num; 1856 u8 expected_size; 1857 u16 block_size; 1858 int bus_pin; 1859 1860 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); 1861 if (!defs) { 1862 drm_dbg_kms(&dev_priv->drm, 1863 "No general definition block is found, no devices defined.\n"); 1864 return; 1865 } 1866 1867 block_size = get_blocksize(defs); 1868 if (block_size < sizeof(*defs)) { 1869 drm_dbg_kms(&dev_priv->drm, 1870 "General definitions block too small (%u)\n", 1871 block_size); 1872 return; 1873 } 1874 1875 bus_pin = defs->crt_ddc_gmbus_pin; 1876 drm_dbg_kms(&dev_priv->drm, "crt_ddc_bus_pin: %d\n", bus_pin); 1877 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin)) 1878 dev_priv->vbt.crt_ddc_pin = bus_pin; 1879 1880 if (bdb->version < 106) { 1881 expected_size = 22; 1882 } else if (bdb->version < 111) { 1883 expected_size = 27; 1884 } else if (bdb->version < 195) { 1885 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 1886 } else if (bdb->version == 195) { 1887 expected_size = 37; 1888 } else if (bdb->version <= 215) { 1889 expected_size = 38; 1890 } else if (bdb->version <= 229) { 1891 expected_size = 39; 1892 } else { 1893 expected_size = sizeof(*child); 1894 BUILD_BUG_ON(sizeof(*child) < 39); 1895 drm_dbg(&dev_priv->drm, 1896 "Expected child device config size for VBT version %u not known; assuming %u\n", 1897 bdb->version, expected_size); 1898 } 1899 1900 /* Flag an error for unexpected size, but continue anyway. */ 1901 if (defs->child_dev_size != expected_size) 1902 drm_err(&dev_priv->drm, 1903 "Unexpected child device config size %u (expected %u for VBT version %u)\n", 1904 defs->child_dev_size, expected_size, bdb->version); 1905 1906 /* The legacy sized child device config is the minimum we need. */ 1907 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 1908 drm_dbg_kms(&dev_priv->drm, 1909 "Child device config size %u is too small.\n", 1910 defs->child_dev_size); 1911 return; 1912 } 1913 1914 /* get the number of child device */ 1915 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 1916 1917 for (i = 0; i < child_device_num; i++) { 1918 child = child_device_ptr(defs, i); 1919 if (!child->device_type) 1920 continue; 1921 1922 drm_dbg_kms(&dev_priv->drm, 1923 "Found VBT child device with type 0x%x\n", 1924 child->device_type); 1925 1926 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 1927 if (!devdata) 1928 break; 1929 1930 /* 1931 * Copy as much as we know (sizeof) and is available 1932 * (child_dev_size) of the child device config. Accessing the 1933 * data must depend on VBT version. 1934 */ 1935 memcpy(&devdata->child, child, 1936 min_t(size_t, defs->child_dev_size, sizeof(*child))); 1937 1938 list_add_tail(&devdata->node, &dev_priv->vbt.display_devices); 1939 } 1940 1941 if (list_empty(&dev_priv->vbt.display_devices)) 1942 drm_dbg_kms(&dev_priv->drm, 1943 "no child dev is parsed from VBT\n"); 1944 } 1945 1946 /* Common defaults which may be overridden by VBT. */ 1947 static void 1948 init_vbt_defaults(struct drm_i915_private *dev_priv) 1949 { 1950 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 1951 1952 /* Default to having backlight */ 1953 dev_priv->vbt.backlight.present = true; 1954 1955 /* LFP panel data */ 1956 dev_priv->vbt.lvds_dither = 1; 1957 1958 /* SDVO panel data */ 1959 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 1960 1961 /* general features */ 1962 dev_priv->vbt.int_tv_support = 1; 1963 dev_priv->vbt.int_crt_support = 1; 1964 1965 /* driver features */ 1966 dev_priv->vbt.int_lvds_support = 1; 1967 1968 /* Default to using SSC */ 1969 dev_priv->vbt.lvds_use_ssc = 1; 1970 /* 1971 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 1972 * clock for LVDS. 1973 */ 1974 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv, 1975 !HAS_PCH_SPLIT(dev_priv)); 1976 drm_dbg_kms(&dev_priv->drm, "Set default to SSC at %d kHz\n", 1977 dev_priv->vbt.lvds_ssc_freq); 1978 } 1979 1980 /* Defaults to initialize only if there is no VBT. */ 1981 static void 1982 init_vbt_missing_defaults(struct drm_i915_private *dev_priv) 1983 { 1984 enum port port; 1985 1986 for_each_port(port) { 1987 struct ddi_vbt_port_info *info = 1988 &dev_priv->vbt.ddi_port_info[port]; 1989 enum phy phy = intel_port_to_phy(dev_priv, port); 1990 1991 /* 1992 * VBT has the TypeC mode (native,TBT/USB) and we don't want 1993 * to detect it. 1994 */ 1995 if (intel_phy_is_tc(dev_priv, phy)) 1996 continue; 1997 1998 info->supports_dvi = (port != PORT_A && port != PORT_E); 1999 info->supports_hdmi = info->supports_dvi; 2000 info->supports_dp = (port != PORT_E); 2001 info->supports_edp = (port == PORT_A); 2002 } 2003 } 2004 2005 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 2006 { 2007 const void *_vbt = vbt; 2008 2009 return _vbt + vbt->bdb_offset; 2010 } 2011 2012 /** 2013 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 2014 * @buf: pointer to a buffer to validate 2015 * @size: size of the buffer 2016 * 2017 * Returns true on valid VBT. 2018 */ 2019 bool intel_bios_is_valid_vbt(const void *buf, size_t size) 2020 { 2021 const struct vbt_header *vbt = buf; 2022 const struct bdb_header *bdb; 2023 2024 if (!vbt) 2025 return false; 2026 2027 if (sizeof(struct vbt_header) > size) { 2028 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 2029 return false; 2030 } 2031 2032 if (memcmp(vbt->signature, "$VBT", 4)) { 2033 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 2034 return false; 2035 } 2036 2037 if (vbt->vbt_size > size) { 2038 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 2039 return false; 2040 } 2041 2042 size = vbt->vbt_size; 2043 2044 if (range_overflows_t(size_t, 2045 vbt->bdb_offset, 2046 sizeof(struct bdb_header), 2047 size)) { 2048 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 2049 return false; 2050 } 2051 2052 bdb = get_bdb_header(vbt); 2053 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 2054 DRM_DEBUG_DRIVER("BDB incomplete\n"); 2055 return false; 2056 } 2057 2058 return vbt; 2059 } 2060 2061 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv) 2062 { 2063 struct pci_dev *pdev = dev_priv->drm.pdev; 2064 void __iomem *p = NULL, *oprom; 2065 struct vbt_header *vbt; 2066 u16 vbt_size; 2067 size_t i, size; 2068 2069 oprom = pci_map_rom(pdev, &size); 2070 if (!oprom) 2071 return NULL; 2072 2073 /* Scour memory looking for the VBT signature. */ 2074 for (i = 0; i + 4 < size; i += 4) { 2075 if (ioread32(oprom + i) != *((const u32 *)"$VBT")) 2076 continue; 2077 2078 p = oprom + i; 2079 size -= i; 2080 break; 2081 } 2082 2083 if (!p) 2084 goto err_unmap_oprom; 2085 2086 if (sizeof(struct vbt_header) > size) { 2087 drm_dbg(&dev_priv->drm, "VBT header incomplete\n"); 2088 goto err_unmap_oprom; 2089 } 2090 2091 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size)); 2092 if (vbt_size > size) { 2093 drm_dbg(&dev_priv->drm, 2094 "VBT incomplete (vbt_size overflows)\n"); 2095 goto err_unmap_oprom; 2096 } 2097 2098 /* The rest will be validated by intel_bios_is_valid_vbt() */ 2099 vbt = kmalloc(vbt_size, GFP_KERNEL); 2100 if (!vbt) 2101 goto err_unmap_oprom; 2102 2103 memcpy_fromio(vbt, p, vbt_size); 2104 2105 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2106 goto err_free_vbt; 2107 2108 pci_unmap_rom(pdev, oprom); 2109 2110 return vbt; 2111 2112 err_free_vbt: 2113 kfree(vbt); 2114 err_unmap_oprom: 2115 pci_unmap_rom(pdev, oprom); 2116 2117 return NULL; 2118 } 2119 2120 /** 2121 * intel_bios_init - find VBT and initialize settings from the BIOS 2122 * @dev_priv: i915 device instance 2123 * 2124 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 2125 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 2126 * initialize some defaults if the VBT is not present at all. 2127 */ 2128 void intel_bios_init(struct drm_i915_private *dev_priv) 2129 { 2130 const struct vbt_header *vbt = dev_priv->opregion.vbt; 2131 struct vbt_header *oprom_vbt = NULL; 2132 const struct bdb_header *bdb; 2133 2134 INIT_LIST_HEAD(&dev_priv->vbt.display_devices); 2135 2136 if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) { 2137 drm_dbg_kms(&dev_priv->drm, 2138 "Skipping VBT init due to disabled display.\n"); 2139 return; 2140 } 2141 2142 init_vbt_defaults(dev_priv); 2143 2144 /* If the OpRegion does not have VBT, look in PCI ROM. */ 2145 if (!vbt) { 2146 oprom_vbt = oprom_get_vbt(dev_priv); 2147 if (!oprom_vbt) 2148 goto out; 2149 2150 vbt = oprom_vbt; 2151 2152 drm_dbg_kms(&dev_priv->drm, "Found valid VBT in PCI ROM\n"); 2153 } 2154 2155 bdb = get_bdb_header(vbt); 2156 2157 drm_dbg_kms(&dev_priv->drm, 2158 "VBT signature \"%.*s\", BDB version %d\n", 2159 (int)sizeof(vbt->signature), vbt->signature, bdb->version); 2160 2161 /* Grab useful general definitions */ 2162 parse_general_features(dev_priv, bdb); 2163 parse_general_definitions(dev_priv, bdb); 2164 parse_panel_options(dev_priv, bdb); 2165 parse_panel_dtd(dev_priv, bdb); 2166 parse_lfp_backlight(dev_priv, bdb); 2167 parse_sdvo_panel_data(dev_priv, bdb); 2168 parse_driver_features(dev_priv, bdb); 2169 parse_power_conservation_features(dev_priv, bdb); 2170 parse_edp(dev_priv, bdb); 2171 parse_psr(dev_priv, bdb); 2172 parse_mipi_config(dev_priv, bdb); 2173 parse_mipi_sequence(dev_priv, bdb); 2174 2175 /* Depends on child device list */ 2176 parse_compression_parameters(dev_priv, bdb); 2177 2178 /* Further processing on pre-parsed data */ 2179 parse_sdvo_device_mapping(dev_priv, bdb->version); 2180 parse_ddi_ports(dev_priv, bdb->version); 2181 2182 out: 2183 if (!vbt) { 2184 drm_info(&dev_priv->drm, 2185 "Failed to find VBIOS tables (VBT)\n"); 2186 init_vbt_missing_defaults(dev_priv); 2187 } 2188 2189 kfree(oprom_vbt); 2190 } 2191 2192 /** 2193 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 2194 * @dev_priv: i915 device instance 2195 */ 2196 void intel_bios_driver_remove(struct drm_i915_private *dev_priv) 2197 { 2198 struct display_device_data *devdata, *n; 2199 2200 list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) { 2201 list_del(&devdata->node); 2202 kfree(devdata->dsc); 2203 kfree(devdata); 2204 } 2205 2206 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode); 2207 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 2208 kfree(dev_priv->vbt.lfp_lvds_vbt_mode); 2209 dev_priv->vbt.lfp_lvds_vbt_mode = NULL; 2210 kfree(dev_priv->vbt.dsi.data); 2211 dev_priv->vbt.dsi.data = NULL; 2212 kfree(dev_priv->vbt.dsi.pps); 2213 dev_priv->vbt.dsi.pps = NULL; 2214 kfree(dev_priv->vbt.dsi.config); 2215 dev_priv->vbt.dsi.config = NULL; 2216 kfree(dev_priv->vbt.dsi.deassert_seq); 2217 dev_priv->vbt.dsi.deassert_seq = NULL; 2218 } 2219 2220 /** 2221 * intel_bios_is_tv_present - is integrated TV present in VBT 2222 * @dev_priv: i915 device instance 2223 * 2224 * Return true if TV is present. If no child devices were parsed from VBT, 2225 * assume TV is present. 2226 */ 2227 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv) 2228 { 2229 const struct display_device_data *devdata; 2230 const struct child_device_config *child; 2231 2232 if (!dev_priv->vbt.int_tv_support) 2233 return false; 2234 2235 if (list_empty(&dev_priv->vbt.display_devices)) 2236 return true; 2237 2238 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2239 child = &devdata->child; 2240 2241 /* 2242 * If the device type is not TV, continue. 2243 */ 2244 switch (child->device_type) { 2245 case DEVICE_TYPE_INT_TV: 2246 case DEVICE_TYPE_TV: 2247 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 2248 break; 2249 default: 2250 continue; 2251 } 2252 /* Only when the addin_offset is non-zero, it is regarded 2253 * as present. 2254 */ 2255 if (child->addin_offset) 2256 return true; 2257 } 2258 2259 return false; 2260 } 2261 2262 /** 2263 * intel_bios_is_lvds_present - is LVDS present in VBT 2264 * @dev_priv: i915 device instance 2265 * @i2c_pin: i2c pin for LVDS if present 2266 * 2267 * Return true if LVDS is present. If no child devices were parsed from VBT, 2268 * assume LVDS is present. 2269 */ 2270 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin) 2271 { 2272 const struct display_device_data *devdata; 2273 const struct child_device_config *child; 2274 2275 if (list_empty(&dev_priv->vbt.display_devices)) 2276 return true; 2277 2278 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2279 child = &devdata->child; 2280 2281 /* If the device type is not LFP, continue. 2282 * We have to check both the new identifiers as well as the 2283 * old for compatibility with some BIOSes. 2284 */ 2285 if (child->device_type != DEVICE_TYPE_INT_LFP && 2286 child->device_type != DEVICE_TYPE_LFP) 2287 continue; 2288 2289 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin)) 2290 *i2c_pin = child->i2c_pin; 2291 2292 /* However, we cannot trust the BIOS writers to populate 2293 * the VBT correctly. Since LVDS requires additional 2294 * information from AIM blocks, a non-zero addin offset is 2295 * a good indicator that the LVDS is actually present. 2296 */ 2297 if (child->addin_offset) 2298 return true; 2299 2300 /* But even then some BIOS writers perform some black magic 2301 * and instantiate the device without reference to any 2302 * additional data. Trust that if the VBT was written into 2303 * the OpRegion then they have validated the LVDS's existence. 2304 */ 2305 if (dev_priv->opregion.vbt) 2306 return true; 2307 } 2308 2309 return false; 2310 } 2311 2312 /** 2313 * intel_bios_is_port_present - is the specified digital port present 2314 * @dev_priv: i915 device instance 2315 * @port: port to check 2316 * 2317 * Return true if the device in %port is present. 2318 */ 2319 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port) 2320 { 2321 const struct display_device_data *devdata; 2322 const struct child_device_config *child; 2323 static const struct { 2324 u16 dp, hdmi; 2325 } port_mapping[] = { 2326 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2327 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2328 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2329 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2330 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2331 }; 2332 2333 if (HAS_DDI(dev_priv)) { 2334 const struct ddi_vbt_port_info *port_info = 2335 &dev_priv->vbt.ddi_port_info[port]; 2336 2337 return port_info->child; 2338 } 2339 2340 /* FIXME maybe deal with port A as well? */ 2341 if (drm_WARN_ON(&dev_priv->drm, 2342 port == PORT_A) || port >= ARRAY_SIZE(port_mapping)) 2343 return false; 2344 2345 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2346 child = &devdata->child; 2347 2348 if ((child->dvo_port == port_mapping[port].dp || 2349 child->dvo_port == port_mapping[port].hdmi) && 2350 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING | 2351 DEVICE_TYPE_DISPLAYPORT_OUTPUT))) 2352 return true; 2353 } 2354 2355 return false; 2356 } 2357 2358 /** 2359 * intel_bios_is_port_edp - is the device in given port eDP 2360 * @dev_priv: i915 device instance 2361 * @port: port to check 2362 * 2363 * Return true if the device in %port is eDP. 2364 */ 2365 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port) 2366 { 2367 const struct display_device_data *devdata; 2368 const struct child_device_config *child; 2369 static const short port_mapping[] = { 2370 [PORT_B] = DVO_PORT_DPB, 2371 [PORT_C] = DVO_PORT_DPC, 2372 [PORT_D] = DVO_PORT_DPD, 2373 [PORT_E] = DVO_PORT_DPE, 2374 [PORT_F] = DVO_PORT_DPF, 2375 }; 2376 2377 if (HAS_DDI(dev_priv)) 2378 return dev_priv->vbt.ddi_port_info[port].supports_edp; 2379 2380 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2381 child = &devdata->child; 2382 2383 if (child->dvo_port == port_mapping[port] && 2384 (child->device_type & DEVICE_TYPE_eDP_BITS) == 2385 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS)) 2386 return true; 2387 } 2388 2389 return false; 2390 } 2391 2392 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child, 2393 enum port port) 2394 { 2395 static const struct { 2396 u16 dp, hdmi; 2397 } port_mapping[] = { 2398 /* 2399 * Buggy VBTs may declare DP ports as having 2400 * HDMI type dvo_port :( So let's check both. 2401 */ 2402 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2403 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2404 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2405 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2406 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2407 }; 2408 2409 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping)) 2410 return false; 2411 2412 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) != 2413 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS)) 2414 return false; 2415 2416 if (child->dvo_port == port_mapping[port].dp) 2417 return true; 2418 2419 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 2420 if (child->dvo_port == port_mapping[port].hdmi && 2421 child->aux_channel != 0) 2422 return true; 2423 2424 return false; 2425 } 2426 2427 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, 2428 enum port port) 2429 { 2430 const struct display_device_data *devdata; 2431 2432 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2433 if (child_dev_is_dp_dual_mode(&devdata->child, port)) 2434 return true; 2435 } 2436 2437 return false; 2438 } 2439 2440 /** 2441 * intel_bios_is_dsi_present - is DSI present in VBT 2442 * @dev_priv: i915 device instance 2443 * @port: port for DSI if present 2444 * 2445 * Return true if DSI is present, and return the port in %port. 2446 */ 2447 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, 2448 enum port *port) 2449 { 2450 const struct display_device_data *devdata; 2451 const struct child_device_config *child; 2452 u8 dvo_port; 2453 2454 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2455 child = &devdata->child; 2456 2457 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2458 continue; 2459 2460 dvo_port = child->dvo_port; 2461 2462 if (dvo_port == DVO_PORT_MIPIA || 2463 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) || 2464 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) { 2465 if (port) 2466 *port = dvo_port - DVO_PORT_MIPIA; 2467 return true; 2468 } else if (dvo_port == DVO_PORT_MIPIB || 2469 dvo_port == DVO_PORT_MIPIC || 2470 dvo_port == DVO_PORT_MIPID) { 2471 drm_dbg_kms(&dev_priv->drm, 2472 "VBT has unsupported DSI port %c\n", 2473 port_name(dvo_port - DVO_PORT_MIPIA)); 2474 } 2475 } 2476 2477 return false; 2478 } 2479 2480 static void fill_dsc(struct intel_crtc_state *crtc_state, 2481 struct dsc_compression_parameters_entry *dsc, 2482 int dsc_max_bpc) 2483 { 2484 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 2485 int bpc = 8; 2486 2487 vdsc_cfg->dsc_version_major = dsc->version_major; 2488 vdsc_cfg->dsc_version_minor = dsc->version_minor; 2489 2490 if (dsc->support_12bpc && dsc_max_bpc >= 12) 2491 bpc = 12; 2492 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 2493 bpc = 10; 2494 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 2495 bpc = 8; 2496 else 2497 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n", 2498 dsc_max_bpc); 2499 2500 crtc_state->pipe_bpp = bpc * 3; 2501 2502 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp, 2503 VBT_DSC_MAX_BPP(dsc->max_bpp)); 2504 2505 /* 2506 * FIXME: This is ugly, and slice count should take DSC engine 2507 * throughput etc. into account. 2508 * 2509 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 2510 */ 2511 if (dsc->slices_per_line & BIT(2)) { 2512 crtc_state->dsc.slice_count = 4; 2513 } else if (dsc->slices_per_line & BIT(1)) { 2514 crtc_state->dsc.slice_count = 2; 2515 } else { 2516 /* FIXME */ 2517 if (!(dsc->slices_per_line & BIT(0))) 2518 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n"); 2519 2520 crtc_state->dsc.slice_count = 1; 2521 } 2522 2523 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 2524 crtc_state->dsc.slice_count != 0) 2525 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n", 2526 crtc_state->hw.adjusted_mode.crtc_hdisplay, 2527 crtc_state->dsc.slice_count); 2528 2529 /* 2530 * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the 2531 * implementation specific physical rate buffer size. Currently we use 2532 * the required rate buffer model size calculated in 2533 * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E. 2534 * 2535 * The VBT rc_buffer_block_size and rc_buffer_size definitions 2536 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC 2537 * implementation should also use the DPCD (or perhaps VBT for eDP) 2538 * provided value for the buffer size. 2539 */ 2540 2541 /* FIXME: DSI spec says bpc + 1 for this one */ 2542 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 2543 2544 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 2545 2546 vdsc_cfg->slice_height = dsc->slice_height; 2547 } 2548 2549 /* FIXME: initially DSI specific */ 2550 bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 2551 struct intel_crtc_state *crtc_state, 2552 int dsc_max_bpc) 2553 { 2554 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2555 const struct display_device_data *devdata; 2556 const struct child_device_config *child; 2557 2558 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2559 child = &devdata->child; 2560 2561 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2562 continue; 2563 2564 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) { 2565 if (!devdata->dsc) 2566 return false; 2567 2568 if (crtc_state) 2569 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 2570 2571 return true; 2572 } 2573 } 2574 2575 return false; 2576 } 2577 2578 /** 2579 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port 2580 * @i915: i915 device instance 2581 * @port: port to check 2582 * 2583 * Return true if HPD should be inverted for %port. 2584 */ 2585 bool 2586 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, 2587 enum port port) 2588 { 2589 const struct child_device_config *child = 2590 i915->vbt.ddi_port_info[port].child; 2591 2592 if (drm_WARN_ON_ONCE(&i915->drm, !IS_GEN9_LP(i915))) 2593 return false; 2594 2595 return child && child->hpd_invert; 2596 } 2597 2598 /** 2599 * intel_bios_is_lspcon_present - if LSPCON is attached on %port 2600 * @i915: i915 device instance 2601 * @port: port to check 2602 * 2603 * Return true if LSPCON is present on this port 2604 */ 2605 bool 2606 intel_bios_is_lspcon_present(const struct drm_i915_private *i915, 2607 enum port port) 2608 { 2609 const struct child_device_config *child = 2610 i915->vbt.ddi_port_info[port].child; 2611 2612 return HAS_LSPCON(i915) && child && child->lspcon; 2613 } 2614 2615 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, 2616 enum port port) 2617 { 2618 const struct ddi_vbt_port_info *info = 2619 &dev_priv->vbt.ddi_port_info[port]; 2620 enum aux_ch aux_ch; 2621 2622 if (!info->alternate_aux_channel) { 2623 aux_ch = (enum aux_ch)port; 2624 2625 drm_dbg_kms(&dev_priv->drm, 2626 "using AUX %c for port %c (platform default)\n", 2627 aux_ch_name(aux_ch), port_name(port)); 2628 return aux_ch; 2629 } 2630 2631 switch (info->alternate_aux_channel) { 2632 case DP_AUX_A: 2633 aux_ch = AUX_CH_A; 2634 break; 2635 case DP_AUX_B: 2636 aux_ch = AUX_CH_B; 2637 break; 2638 case DP_AUX_C: 2639 aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_D : AUX_CH_C; 2640 break; 2641 case DP_AUX_D: 2642 aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_E : AUX_CH_D; 2643 break; 2644 case DP_AUX_E: 2645 aux_ch = AUX_CH_E; 2646 break; 2647 case DP_AUX_F: 2648 aux_ch = AUX_CH_F; 2649 break; 2650 case DP_AUX_G: 2651 aux_ch = AUX_CH_G; 2652 break; 2653 default: 2654 MISSING_CASE(info->alternate_aux_channel); 2655 aux_ch = AUX_CH_A; 2656 break; 2657 } 2658 2659 drm_dbg_kms(&dev_priv->drm, "using AUX %c for port %c (VBT)\n", 2660 aux_ch_name(aux_ch), port_name(port)); 2661 2662 return aux_ch; 2663 } 2664 2665 int intel_bios_max_tmds_clock(struct intel_encoder *encoder) 2666 { 2667 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2668 2669 return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock; 2670 } 2671 2672 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder) 2673 { 2674 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2675 const struct ddi_vbt_port_info *info = 2676 &i915->vbt.ddi_port_info[encoder->port]; 2677 2678 return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1; 2679 } 2680 2681 int intel_bios_dp_boost_level(struct intel_encoder *encoder) 2682 { 2683 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2684 2685 return i915->vbt.ddi_port_info[encoder->port].dp_boost_level; 2686 } 2687 2688 int intel_bios_hdmi_boost_level(struct intel_encoder *encoder) 2689 { 2690 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2691 2692 return i915->vbt.ddi_port_info[encoder->port].hdmi_boost_level; 2693 } 2694 2695 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder) 2696 { 2697 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2698 2699 return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate; 2700 } 2701 2702 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder) 2703 { 2704 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2705 2706 return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin; 2707 } 2708 2709 bool intel_bios_port_supports_dvi(struct drm_i915_private *i915, enum port port) 2710 { 2711 return i915->vbt.ddi_port_info[port].supports_dvi; 2712 } 2713 2714 bool intel_bios_port_supports_hdmi(struct drm_i915_private *i915, enum port port) 2715 { 2716 return i915->vbt.ddi_port_info[port].supports_hdmi; 2717 } 2718 2719 bool intel_bios_port_supports_dp(struct drm_i915_private *i915, enum port port) 2720 { 2721 return i915->vbt.ddi_port_info[port].supports_dp; 2722 } 2723 2724 bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915, 2725 enum port port) 2726 { 2727 return i915->vbt.ddi_port_info[port].supports_typec_usb; 2728 } 2729 2730 bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port) 2731 { 2732 return i915->vbt.ddi_port_info[port].supports_tbt; 2733 } 2734