1 /*
2  * Copyright © 2006 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Authors:
24  *    Eric Anholt <eric@anholt.net>
25  *
26  */
27 
28 #include <drm/drm_edid.h>
29 #include <drm/display/drm_dp_helper.h>
30 #include <drm/display/drm_dsc_helper.h>
31 
32 #include "display/intel_display.h"
33 #include "display/intel_display_types.h"
34 #include "display/intel_gmbus.h"
35 
36 #include "i915_drv.h"
37 #include "i915_reg.h"
38 
39 #define _INTEL_BIOS_PRIVATE
40 #include "intel_vbt_defs.h"
41 
42 /**
43  * DOC: Video BIOS Table (VBT)
44  *
45  * The Video BIOS Table, or VBT, provides platform and board specific
46  * configuration information to the driver that is not discoverable or available
47  * through other means. The configuration is mostly related to display
48  * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
49  * the PCI ROM.
50  *
51  * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
52  * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
53  * contain the actual configuration information. The VBT Header, and thus the
54  * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
55  * BDB Header. The data blocks are concatenated after the BDB Header. The data
56  * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
57  * data. (Block 53, the MIPI Sequence Block is an exception.)
58  *
59  * The driver parses the VBT during load. The relevant information is stored in
60  * driver private data for ease of use, and the actual VBT is not read after
61  * that.
62  */
63 
64 /* Wrapper for VBT child device config */
65 struct intel_bios_encoder_data {
66 	struct drm_i915_private *i915;
67 
68 	struct child_device_config child;
69 	struct dsc_compression_parameters_entry *dsc;
70 	struct list_head node;
71 };
72 
73 #define	SLAVE_ADDR1	0x70
74 #define	SLAVE_ADDR2	0x72
75 
76 /* Get BDB block size given a pointer to Block ID. */
77 static u32 _get_blocksize(const u8 *block_base)
78 {
79 	/* The MIPI Sequence Block v3+ has a separate size field. */
80 	if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
81 		return *((const u32 *)(block_base + 4));
82 	else
83 		return *((const u16 *)(block_base + 1));
84 }
85 
86 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
87 static u32 get_blocksize(const void *block_data)
88 {
89 	return _get_blocksize(block_data - 3);
90 }
91 
92 static const void *
93 find_raw_section(const void *_bdb, enum bdb_block_id section_id)
94 {
95 	const struct bdb_header *bdb = _bdb;
96 	const u8 *base = _bdb;
97 	int index = 0;
98 	u32 total, current_size;
99 	enum bdb_block_id current_id;
100 
101 	/* skip to first section */
102 	index += bdb->header_size;
103 	total = bdb->bdb_size;
104 
105 	/* walk the sections looking for section_id */
106 	while (index + 3 < total) {
107 		current_id = *(base + index);
108 		current_size = _get_blocksize(base + index);
109 		index += 3;
110 
111 		if (index + current_size > total)
112 			return NULL;
113 
114 		if (current_id == section_id)
115 			return base + index;
116 
117 		index += current_size;
118 	}
119 
120 	return NULL;
121 }
122 
123 /*
124  * Offset from the start of BDB to the start of the
125  * block data (just past the block header).
126  */
127 static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id)
128 {
129 	const void *block;
130 
131 	block = find_raw_section(bdb, section_id);
132 	if (!block)
133 		return 0;
134 
135 	return block - bdb;
136 }
137 
138 /* size of the block excluding the header */
139 static u32 raw_block_size(const void *bdb, enum bdb_block_id section_id)
140 {
141 	const void *block;
142 
143 	block = find_raw_section(bdb, section_id);
144 	if (!block)
145 		return 0;
146 
147 	return get_blocksize(block);
148 }
149 
150 struct bdb_block_entry {
151 	struct list_head node;
152 	enum bdb_block_id section_id;
153 	u8 data[];
154 };
155 
156 static const void *
157 find_section(struct drm_i915_private *i915,
158 	     enum bdb_block_id section_id)
159 {
160 	struct bdb_block_entry *entry;
161 
162 	list_for_each_entry(entry, &i915->vbt.bdb_blocks, node) {
163 		if (entry->section_id == section_id)
164 			return entry->data + 3;
165 	}
166 
167 	return NULL;
168 }
169 
170 static const struct {
171 	enum bdb_block_id section_id;
172 	size_t min_size;
173 } bdb_blocks[] = {
174 	{ .section_id = BDB_GENERAL_FEATURES,
175 	  .min_size = sizeof(struct bdb_general_features), },
176 	{ .section_id = BDB_GENERAL_DEFINITIONS,
177 	  .min_size = sizeof(struct bdb_general_definitions), },
178 	{ .section_id = BDB_PSR,
179 	  .min_size = sizeof(struct bdb_psr), },
180 	{ .section_id = BDB_DRIVER_FEATURES,
181 	  .min_size = sizeof(struct bdb_driver_features), },
182 	{ .section_id = BDB_SDVO_LVDS_OPTIONS,
183 	  .min_size = sizeof(struct bdb_sdvo_lvds_options), },
184 	{ .section_id = BDB_SDVO_PANEL_DTDS,
185 	  .min_size = sizeof(struct bdb_sdvo_panel_dtds), },
186 	{ .section_id = BDB_EDP,
187 	  .min_size = sizeof(struct bdb_edp), },
188 	{ .section_id = BDB_LVDS_OPTIONS,
189 	  .min_size = sizeof(struct bdb_lvds_options), },
190 	/*
191 	 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS,
192 	 * so keep the two ordered.
193 	 */
194 	{ .section_id = BDB_LVDS_LFP_DATA_PTRS,
195 	  .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), },
196 	{ .section_id = BDB_LVDS_LFP_DATA,
197 	  .min_size = 0, /* special case */ },
198 	{ .section_id = BDB_LVDS_BACKLIGHT,
199 	  .min_size = sizeof(struct bdb_lfp_backlight_data), },
200 	{ .section_id = BDB_LFP_POWER,
201 	  .min_size = sizeof(struct bdb_lfp_power), },
202 	{ .section_id = BDB_MIPI_CONFIG,
203 	  .min_size = sizeof(struct bdb_mipi_config), },
204 	{ .section_id = BDB_MIPI_SEQUENCE,
205 	  .min_size = sizeof(struct bdb_mipi_sequence) },
206 	{ .section_id = BDB_COMPRESSION_PARAMETERS,
207 	  .min_size = sizeof(struct bdb_compression_parameters), },
208 	{ .section_id = BDB_GENERIC_DTD,
209 	  .min_size = sizeof(struct bdb_generic_dtd), },
210 };
211 
212 static size_t lfp_data_min_size(struct drm_i915_private *i915)
213 {
214 	const struct bdb_lvds_lfp_data_ptrs *ptrs;
215 	size_t size;
216 
217 	ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
218 	if (!ptrs)
219 		return 0;
220 
221 	size = sizeof(struct bdb_lvds_lfp_data);
222 	if (ptrs->panel_name.table_size)
223 		size = max(size, ptrs->panel_name.offset +
224 			   sizeof(struct bdb_lvds_lfp_data_tail));
225 
226 	return size;
227 }
228 
229 static bool validate_lfp_data_ptrs(const void *bdb,
230 				   const struct bdb_lvds_lfp_data_ptrs *ptrs)
231 {
232 	int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
233 	int data_block_size, lfp_data_size;
234 	int i;
235 
236 	data_block_size = raw_block_size(bdb, BDB_LVDS_LFP_DATA);
237 	if (data_block_size == 0)
238 		return false;
239 
240 	/* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
241 	if (ptrs->lvds_entries != 3)
242 		return false;
243 
244 	fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
245 	dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
246 	panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
247 	panel_name_size = ptrs->panel_name.table_size;
248 
249 	/* fp_timing has variable size */
250 	if (fp_timing_size < 32 ||
251 	    dvo_timing_size != sizeof(struct lvds_dvo_timing) ||
252 	    panel_pnp_id_size != sizeof(struct lvds_pnp_id))
253 		return false;
254 
255 	/* panel_name is not present in old VBTs */
256 	if (panel_name_size != 0 &&
257 	    panel_name_size != sizeof(struct lvds_lfp_panel_name))
258 		return false;
259 
260 	lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
261 	if (16 * lfp_data_size > data_block_size)
262 		return false;
263 
264 	/*
265 	 * Except for vlv/chv machines all real VBTs seem to have 6
266 	 * unaccounted bytes in the fp_timing table. And it doesn't
267 	 * appear to be a really intentional hole as the fp_timing
268 	 * 0xffff terminator is always within those 6 missing bytes.
269 	 */
270 	if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size &&
271 	    fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
272 		return false;
273 
274 	if (ptrs->ptr[0].fp_timing.offset + fp_timing_size > ptrs->ptr[0].dvo_timing.offset ||
275 	    ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
276 	    ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
277 		return false;
278 
279 	/* make sure the table entries have uniform size */
280 	for (i = 1; i < 16; i++) {
281 		if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
282 		    ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
283 		    ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
284 			return false;
285 
286 		if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
287 		    ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
288 		    ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
289 			return false;
290 	}
291 
292 	/* make sure the tables fit inside the data block */
293 	for (i = 0; i < 16; i++) {
294 		if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
295 		    ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
296 		    ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
297 			return false;
298 	}
299 
300 	if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
301 		return false;
302 
303 	return true;
304 }
305 
306 /* make the data table offsets relative to the data block */
307 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
308 {
309 	struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block;
310 	u32 offset;
311 	int i;
312 
313 	offset = raw_block_offset(bdb, BDB_LVDS_LFP_DATA);
314 
315 	for (i = 0; i < 16; i++) {
316 		if (ptrs->ptr[i].fp_timing.offset < offset ||
317 		    ptrs->ptr[i].dvo_timing.offset < offset ||
318 		    ptrs->ptr[i].panel_pnp_id.offset < offset)
319 			return false;
320 
321 		ptrs->ptr[i].fp_timing.offset -= offset;
322 		ptrs->ptr[i].dvo_timing.offset -= offset;
323 		ptrs->ptr[i].panel_pnp_id.offset -= offset;
324 	}
325 
326 	if (ptrs->panel_name.table_size) {
327 		if (ptrs->panel_name.offset < offset)
328 			return false;
329 
330 		ptrs->panel_name.offset -= offset;
331 	}
332 
333 	return validate_lfp_data_ptrs(bdb, ptrs);
334 }
335 
336 static const void *find_fp_timing_terminator(const u8 *data, int size)
337 {
338 	int i;
339 
340 	for (i = 0; i < size - 1; i++) {
341 		if (data[i] == 0xff && data[i+1] == 0xff)
342 			return &data[i];
343 	}
344 
345 	return NULL;
346 }
347 
348 static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table,
349 			     int table_size, int total_size)
350 {
351 	if (total_size < table_size)
352 		return total_size;
353 
354 	table->table_size = table_size;
355 	table->offset = total_size - table_size;
356 
357 	return total_size - table_size;
358 }
359 
360 static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next,
361 			      const struct lvds_lfp_data_ptr_table *prev,
362 			      int size)
363 {
364 	next->table_size = prev->table_size;
365 	next->offset = prev->offset + size;
366 }
367 
368 static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
369 				    const void *bdb)
370 {
371 	int i, size, table_size, block_size, offset;
372 	const void *t0, *t1, *block;
373 	struct bdb_lvds_lfp_data_ptrs *ptrs;
374 	void *ptrs_block;
375 
376 	block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
377 	if (!block)
378 		return NULL;
379 
380 	drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n");
381 
382 	block_size = get_blocksize(block);
383 
384 	size = block_size;
385 	t0 = find_fp_timing_terminator(block, size);
386 	if (!t0)
387 		return NULL;
388 
389 	size -= t0 - block - 2;
390 	t1 = find_fp_timing_terminator(t0 + 2, size);
391 	if (!t1)
392 		return NULL;
393 
394 	size = t1 - t0;
395 	if (size * 16 > block_size)
396 		return NULL;
397 
398 	ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
399 	if (!ptrs_block)
400 		return NULL;
401 
402 	*(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS;
403 	*(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
404 	ptrs = ptrs_block + 3;
405 
406 	table_size = sizeof(struct lvds_pnp_id);
407 	size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size);
408 
409 	table_size = sizeof(struct lvds_dvo_timing);
410 	size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size);
411 
412 	table_size = t0 - block + 2;
413 	size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size);
414 
415 	if (ptrs->ptr[0].fp_timing.table_size)
416 		ptrs->lvds_entries++;
417 	if (ptrs->ptr[0].dvo_timing.table_size)
418 		ptrs->lvds_entries++;
419 	if (ptrs->ptr[0].panel_pnp_id.table_size)
420 		ptrs->lvds_entries++;
421 
422 	if (size != 0 || ptrs->lvds_entries != 3) {
423 		kfree(ptrs);
424 		return NULL;
425 	}
426 
427 	size = t1 - t0;
428 	for (i = 1; i < 16; i++) {
429 		next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size);
430 		next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size);
431 		next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size);
432 	}
433 
434 	size = t1 - t0;
435 	table_size = sizeof(struct lvds_lfp_panel_name);
436 
437 	if (16 * (size + table_size) <= block_size) {
438 		ptrs->panel_name.table_size = table_size;
439 		ptrs->panel_name.offset = size * 16;
440 	}
441 
442 	offset = block - bdb;
443 
444 	for (i = 0; i < 16; i++) {
445 		ptrs->ptr[i].fp_timing.offset += offset;
446 		ptrs->ptr[i].dvo_timing.offset += offset;
447 		ptrs->ptr[i].panel_pnp_id.offset += offset;
448 	}
449 
450 	if (ptrs->panel_name.table_size)
451 		ptrs->panel_name.offset += offset;
452 
453 	return ptrs_block;
454 }
455 
456 static void
457 init_bdb_block(struct drm_i915_private *i915,
458 	       const void *bdb, enum bdb_block_id section_id,
459 	       size_t min_size)
460 {
461 	struct bdb_block_entry *entry;
462 	void *temp_block = NULL;
463 	const void *block;
464 	size_t block_size;
465 
466 	block = find_raw_section(bdb, section_id);
467 
468 	/* Modern VBTs lack the LFP data table pointers block, make one up */
469 	if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) {
470 		temp_block = generate_lfp_data_ptrs(i915, bdb);
471 		if (temp_block)
472 			block = temp_block + 3;
473 	}
474 	if (!block)
475 		return;
476 
477 	drm_WARN(&i915->drm, min_size == 0,
478 		 "Block %d min_size is zero\n", section_id);
479 
480 	block_size = get_blocksize(block);
481 
482 	entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
483 			GFP_KERNEL);
484 	if (!entry) {
485 		kfree(temp_block);
486 		return;
487 	}
488 
489 	entry->section_id = section_id;
490 	memcpy(entry->data, block - 3, block_size + 3);
491 
492 	kfree(temp_block);
493 
494 	drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n",
495 		    section_id, block_size, min_size);
496 
497 	if (section_id == BDB_LVDS_LFP_DATA_PTRS &&
498 	    !fixup_lfp_data_ptrs(bdb, entry->data + 3)) {
499 		drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n");
500 		kfree(entry);
501 		return;
502 	}
503 
504 	list_add_tail(&entry->node, &i915->vbt.bdb_blocks);
505 }
506 
507 static void init_bdb_blocks(struct drm_i915_private *i915,
508 			    const void *bdb)
509 {
510 	int i;
511 
512 	for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
513 		enum bdb_block_id section_id = bdb_blocks[i].section_id;
514 		size_t min_size = bdb_blocks[i].min_size;
515 
516 		if (section_id == BDB_LVDS_LFP_DATA)
517 			min_size = lfp_data_min_size(i915);
518 
519 		init_bdb_block(i915, bdb, section_id, min_size);
520 	}
521 }
522 
523 static void
524 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
525 			const struct lvds_dvo_timing *dvo_timing)
526 {
527 	panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
528 		dvo_timing->hactive_lo;
529 	panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
530 		((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
531 	panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
532 		((dvo_timing->hsync_pulse_width_hi << 8) |
533 			dvo_timing->hsync_pulse_width_lo);
534 	panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
535 		((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
536 
537 	panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
538 		dvo_timing->vactive_lo;
539 	panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
540 		((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
541 	panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
542 		((dvo_timing->vsync_pulse_width_hi << 4) |
543 			dvo_timing->vsync_pulse_width_lo);
544 	panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
545 		((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
546 	panel_fixed_mode->clock = dvo_timing->clock * 10;
547 	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
548 
549 	if (dvo_timing->hsync_positive)
550 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
551 	else
552 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
553 
554 	if (dvo_timing->vsync_positive)
555 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
556 	else
557 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
558 
559 	panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
560 		dvo_timing->himage_lo;
561 	panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
562 		dvo_timing->vimage_lo;
563 
564 	/* Some VBTs have bogus h/vtotal values */
565 	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
566 		panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
567 	if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
568 		panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
569 
570 	drm_mode_set_name(panel_fixed_mode);
571 }
572 
573 static const struct lvds_dvo_timing *
574 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data,
575 		    const struct bdb_lvds_lfp_data_ptrs *ptrs,
576 		    int index)
577 {
578 	return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
579 }
580 
581 static const struct lvds_fp_timing *
582 get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
583 		   const struct bdb_lvds_lfp_data_ptrs *ptrs,
584 		   int index)
585 {
586 	return (const void *)data + ptrs->ptr[index].fp_timing.offset;
587 }
588 
589 static const struct lvds_pnp_id *
590 get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data,
591 		const struct bdb_lvds_lfp_data_ptrs *ptrs,
592 		int index)
593 {
594 	return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
595 }
596 
597 static const struct bdb_lvds_lfp_data_tail *
598 get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
599 		  const struct bdb_lvds_lfp_data_ptrs *ptrs)
600 {
601 	if (ptrs->panel_name.table_size)
602 		return (const void *)data + ptrs->panel_name.offset;
603 	else
604 		return NULL;
605 }
606 
607 static int opregion_get_panel_type(struct drm_i915_private *i915,
608 				   const struct intel_bios_encoder_data *devdata,
609 				   const struct edid *edid)
610 {
611 	return intel_opregion_get_panel_type(i915);
612 }
613 
614 static int vbt_get_panel_type(struct drm_i915_private *i915,
615 			      const struct intel_bios_encoder_data *devdata,
616 			      const struct edid *edid)
617 {
618 	const struct bdb_lvds_options *lvds_options;
619 
620 	lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
621 	if (!lvds_options)
622 		return -1;
623 
624 	if (lvds_options->panel_type > 0xf &&
625 	    lvds_options->panel_type != 0xff) {
626 		drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n",
627 			    lvds_options->panel_type);
628 		return -1;
629 	}
630 
631 	if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
632 		return lvds_options->panel_type2;
633 
634 	drm_WARN_ON(&i915->drm, devdata && devdata->child.handle != DEVICE_HANDLE_LFP1);
635 
636 	return lvds_options->panel_type;
637 }
638 
639 static int pnpid_get_panel_type(struct drm_i915_private *i915,
640 				const struct intel_bios_encoder_data *devdata,
641 				const struct edid *edid)
642 {
643 	const struct bdb_lvds_lfp_data *data;
644 	const struct bdb_lvds_lfp_data_ptrs *ptrs;
645 	const struct lvds_pnp_id *edid_id;
646 	struct lvds_pnp_id edid_id_nodate;
647 	int i, best = -1;
648 
649 	if (!edid)
650 		return -1;
651 
652 	edid_id = (const void *)&edid->mfg_id[0];
653 
654 	edid_id_nodate = *edid_id;
655 	edid_id_nodate.mfg_week = 0;
656 	edid_id_nodate.mfg_year = 0;
657 
658 	ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
659 	if (!ptrs)
660 		return -1;
661 
662 	data = find_section(i915, BDB_LVDS_LFP_DATA);
663 	if (!data)
664 		return -1;
665 
666 	for (i = 0; i < 16; i++) {
667 		const struct lvds_pnp_id *vbt_id =
668 			get_lvds_pnp_id(data, ptrs, i);
669 
670 		/* full match? */
671 		if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id)))
672 			return i;
673 
674 		/*
675 		 * Accept a match w/o date if no full match is found,
676 		 * and the VBT entry does not specify a date.
677 		 */
678 		if (best < 0 &&
679 		    !memcmp(vbt_id, &edid_id_nodate, sizeof(*vbt_id)))
680 			best = i;
681 	}
682 
683 	return best;
684 }
685 
686 static int fallback_get_panel_type(struct drm_i915_private *i915,
687 				   const struct intel_bios_encoder_data *devdata,
688 				   const struct edid *edid)
689 {
690 	return 0;
691 }
692 
693 enum panel_type {
694 	PANEL_TYPE_OPREGION,
695 	PANEL_TYPE_VBT,
696 	PANEL_TYPE_PNPID,
697 	PANEL_TYPE_FALLBACK,
698 };
699 
700 static int get_panel_type(struct drm_i915_private *i915,
701 			  const struct intel_bios_encoder_data *devdata,
702 			  const struct edid *edid)
703 {
704 	struct {
705 		const char *name;
706 		int (*get_panel_type)(struct drm_i915_private *i915,
707 				      const struct intel_bios_encoder_data *devdata,
708 				      const struct edid *edid);
709 		int panel_type;
710 	} panel_types[] = {
711 		[PANEL_TYPE_OPREGION] = {
712 			.name = "OpRegion",
713 			.get_panel_type = opregion_get_panel_type,
714 		},
715 		[PANEL_TYPE_VBT] = {
716 			.name = "VBT",
717 			.get_panel_type = vbt_get_panel_type,
718 		},
719 		[PANEL_TYPE_PNPID] = {
720 			.name = "PNPID",
721 			.get_panel_type = pnpid_get_panel_type,
722 		},
723 		[PANEL_TYPE_FALLBACK] = {
724 			.name = "fallback",
725 			.get_panel_type = fallback_get_panel_type,
726 		},
727 	};
728 	int i;
729 
730 	for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
731 		panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata, edid);
732 
733 		drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf &&
734 			    panel_types[i].panel_type != 0xff);
735 
736 		if (panel_types[i].panel_type >= 0)
737 			drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n",
738 				    panel_types[i].name, panel_types[i].panel_type);
739 	}
740 
741 	if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
742 		i = PANEL_TYPE_OPREGION;
743 	else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff &&
744 		 panel_types[PANEL_TYPE_PNPID].panel_type >= 0)
745 		i = PANEL_TYPE_PNPID;
746 	else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff &&
747 		 panel_types[PANEL_TYPE_VBT].panel_type >= 0)
748 		i = PANEL_TYPE_VBT;
749 	else
750 		i = PANEL_TYPE_FALLBACK;
751 
752 	drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n",
753 		    panel_types[i].name, panel_types[i].panel_type);
754 
755 	return panel_types[i].panel_type;
756 }
757 
758 static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits)
759 {
760 	return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1);
761 }
762 
763 static bool panel_bool(unsigned int value, int panel_type)
764 {
765 	return panel_bits(value, panel_type, 1);
766 }
767 
768 /* Parse general panel options */
769 static void
770 parse_panel_options(struct drm_i915_private *i915,
771 		    struct intel_panel *panel)
772 {
773 	const struct bdb_lvds_options *lvds_options;
774 	int panel_type = panel->vbt.panel_type;
775 	int drrs_mode;
776 
777 	lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
778 	if (!lvds_options)
779 		return;
780 
781 	panel->vbt.lvds_dither = lvds_options->pixel_dither;
782 
783 	/*
784 	 * Empirical evidence indicates the block size can be
785 	 * either 4,14,16,24+ bytes. For older VBTs no clear
786 	 * relationship between the block size vs. BDB version.
787 	 */
788 	if (get_blocksize(lvds_options) < 16)
789 		return;
790 
791 	drrs_mode = panel_bits(lvds_options->dps_panel_type_bits,
792 			       panel_type, 2);
793 	/*
794 	 * VBT has static DRRS = 0 and seamless DRRS = 2.
795 	 * The below piece of code is required to adjust vbt.drrs_type
796 	 * to match the enum drrs_support_type.
797 	 */
798 	switch (drrs_mode) {
799 	case 0:
800 		panel->vbt.drrs_type = DRRS_TYPE_STATIC;
801 		drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
802 		break;
803 	case 2:
804 		panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
805 		drm_dbg_kms(&i915->drm,
806 			    "DRRS supported mode is seamless\n");
807 		break;
808 	default:
809 		panel->vbt.drrs_type = DRRS_TYPE_NONE;
810 		drm_dbg_kms(&i915->drm,
811 			    "DRRS not supported (VBT input)\n");
812 		break;
813 	}
814 }
815 
816 static void
817 parse_lfp_panel_dtd(struct drm_i915_private *i915,
818 		    struct intel_panel *panel,
819 		    const struct bdb_lvds_lfp_data *lvds_lfp_data,
820 		    const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs)
821 {
822 	const struct lvds_dvo_timing *panel_dvo_timing;
823 	const struct lvds_fp_timing *fp_timing;
824 	struct drm_display_mode *panel_fixed_mode;
825 	int panel_type = panel->vbt.panel_type;
826 
827 	panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
828 					       lvds_lfp_data_ptrs,
829 					       panel_type);
830 
831 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
832 	if (!panel_fixed_mode)
833 		return;
834 
835 	fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
836 
837 	panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
838 
839 	drm_dbg_kms(&i915->drm,
840 		    "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
841 		    DRM_MODE_ARG(panel_fixed_mode));
842 
843 	fp_timing = get_lvds_fp_timing(lvds_lfp_data,
844 				       lvds_lfp_data_ptrs,
845 				       panel_type);
846 
847 	/* check the resolution, just to be sure */
848 	if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
849 	    fp_timing->y_res == panel_fixed_mode->vdisplay) {
850 		panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
851 		drm_dbg_kms(&i915->drm,
852 			    "VBT initial LVDS value %x\n",
853 			    panel->vbt.bios_lvds_val);
854 	}
855 }
856 
857 static void
858 parse_lfp_data(struct drm_i915_private *i915,
859 	       struct intel_panel *panel)
860 {
861 	const struct bdb_lvds_lfp_data *data;
862 	const struct bdb_lvds_lfp_data_tail *tail;
863 	const struct bdb_lvds_lfp_data_ptrs *ptrs;
864 	int panel_type = panel->vbt.panel_type;
865 
866 	ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
867 	if (!ptrs)
868 		return;
869 
870 	data = find_section(i915, BDB_LVDS_LFP_DATA);
871 	if (!data)
872 		return;
873 
874 	if (!panel->vbt.lfp_lvds_vbt_mode)
875 		parse_lfp_panel_dtd(i915, panel, data, ptrs);
876 
877 	tail = get_lfp_data_tail(data, ptrs);
878 	if (!tail)
879 		return;
880 
881 	if (i915->vbt.version >= 188) {
882 		panel->vbt.seamless_drrs_min_refresh_rate =
883 			tail->seamless_drrs_min_refresh_rate[panel_type];
884 		drm_dbg_kms(&i915->drm,
885 			    "Seamless DRRS min refresh rate: %d Hz\n",
886 			    panel->vbt.seamless_drrs_min_refresh_rate);
887 	}
888 }
889 
890 static void
891 parse_generic_dtd(struct drm_i915_private *i915,
892 		  struct intel_panel *panel)
893 {
894 	const struct bdb_generic_dtd *generic_dtd;
895 	const struct generic_dtd_entry *dtd;
896 	struct drm_display_mode *panel_fixed_mode;
897 	int num_dtd;
898 
899 	/*
900 	 * Older VBTs provided DTD information for internal displays through
901 	 * the "LFP panel tables" block (42).  As of VBT revision 229 the
902 	 * DTD information should be provided via a newer "generic DTD"
903 	 * block (58).  Just to be safe, we'll try the new generic DTD block
904 	 * first on VBT >= 229, but still fall back to trying the old LFP
905 	 * block if that fails.
906 	 */
907 	if (i915->vbt.version < 229)
908 		return;
909 
910 	generic_dtd = find_section(i915, BDB_GENERIC_DTD);
911 	if (!generic_dtd)
912 		return;
913 
914 	if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
915 		drm_err(&i915->drm, "GDTD size %u is too small.\n",
916 			generic_dtd->gdtd_size);
917 		return;
918 	} else if (generic_dtd->gdtd_size !=
919 		   sizeof(struct generic_dtd_entry)) {
920 		drm_err(&i915->drm, "Unexpected GDTD size %u\n",
921 			generic_dtd->gdtd_size);
922 		/* DTD has unknown fields, but keep going */
923 	}
924 
925 	num_dtd = (get_blocksize(generic_dtd) -
926 		   sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
927 	if (panel->vbt.panel_type >= num_dtd) {
928 		drm_err(&i915->drm,
929 			"Panel type %d not found in table of %d DTD's\n",
930 			panel->vbt.panel_type, num_dtd);
931 		return;
932 	}
933 
934 	dtd = &generic_dtd->dtd[panel->vbt.panel_type];
935 
936 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
937 	if (!panel_fixed_mode)
938 		return;
939 
940 	panel_fixed_mode->hdisplay = dtd->hactive;
941 	panel_fixed_mode->hsync_start =
942 		panel_fixed_mode->hdisplay + dtd->hfront_porch;
943 	panel_fixed_mode->hsync_end =
944 		panel_fixed_mode->hsync_start + dtd->hsync;
945 	panel_fixed_mode->htotal =
946 		panel_fixed_mode->hdisplay + dtd->hblank;
947 
948 	panel_fixed_mode->vdisplay = dtd->vactive;
949 	panel_fixed_mode->vsync_start =
950 		panel_fixed_mode->vdisplay + dtd->vfront_porch;
951 	panel_fixed_mode->vsync_end =
952 		panel_fixed_mode->vsync_start + dtd->vsync;
953 	panel_fixed_mode->vtotal =
954 		panel_fixed_mode->vdisplay + dtd->vblank;
955 
956 	panel_fixed_mode->clock = dtd->pixel_clock;
957 	panel_fixed_mode->width_mm = dtd->width_mm;
958 	panel_fixed_mode->height_mm = dtd->height_mm;
959 
960 	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
961 	drm_mode_set_name(panel_fixed_mode);
962 
963 	if (dtd->hsync_positive_polarity)
964 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
965 	else
966 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
967 
968 	if (dtd->vsync_positive_polarity)
969 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
970 	else
971 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
972 
973 	drm_dbg_kms(&i915->drm,
974 		    "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
975 		    DRM_MODE_ARG(panel_fixed_mode));
976 
977 	panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
978 }
979 
980 static void
981 parse_lfp_backlight(struct drm_i915_private *i915,
982 		    struct intel_panel *panel)
983 {
984 	const struct bdb_lfp_backlight_data *backlight_data;
985 	const struct lfp_backlight_data_entry *entry;
986 	int panel_type = panel->vbt.panel_type;
987 	u16 level;
988 
989 	backlight_data = find_section(i915, BDB_LVDS_BACKLIGHT);
990 	if (!backlight_data)
991 		return;
992 
993 	if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
994 		drm_dbg_kms(&i915->drm,
995 			    "Unsupported backlight data entry size %u\n",
996 			    backlight_data->entry_size);
997 		return;
998 	}
999 
1000 	entry = &backlight_data->data[panel_type];
1001 
1002 	panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
1003 	if (!panel->vbt.backlight.present) {
1004 		drm_dbg_kms(&i915->drm,
1005 			    "PWM backlight not present in VBT (type %u)\n",
1006 			    entry->type);
1007 		return;
1008 	}
1009 
1010 	panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
1011 	if (i915->vbt.version >= 191) {
1012 		size_t exp_size;
1013 
1014 		if (i915->vbt.version >= 236)
1015 			exp_size = sizeof(struct bdb_lfp_backlight_data);
1016 		else if (i915->vbt.version >= 234)
1017 			exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
1018 		else
1019 			exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
1020 
1021 		if (get_blocksize(backlight_data) >= exp_size) {
1022 			const struct lfp_backlight_control_method *method;
1023 
1024 			method = &backlight_data->backlight_control[panel_type];
1025 			panel->vbt.backlight.type = method->type;
1026 			panel->vbt.backlight.controller = method->controller;
1027 		}
1028 	}
1029 
1030 	panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
1031 	panel->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1032 
1033 	if (i915->vbt.version >= 234) {
1034 		u16 min_level;
1035 		bool scale;
1036 
1037 		level = backlight_data->brightness_level[panel_type].level;
1038 		min_level = backlight_data->brightness_min_level[panel_type].level;
1039 
1040 		if (i915->vbt.version >= 236)
1041 			scale = backlight_data->brightness_precision_bits[panel_type] == 16;
1042 		else
1043 			scale = level > 255;
1044 
1045 		if (scale)
1046 			min_level = min_level / 255;
1047 
1048 		if (min_level > 255) {
1049 			drm_warn(&i915->drm, "Brightness min level > 255\n");
1050 			level = 255;
1051 		}
1052 		panel->vbt.backlight.min_brightness = min_level;
1053 
1054 		panel->vbt.backlight.brightness_precision_bits =
1055 			backlight_data->brightness_precision_bits[panel_type];
1056 	} else {
1057 		level = backlight_data->level[panel_type];
1058 		panel->vbt.backlight.min_brightness = entry->min_brightness;
1059 	}
1060 
1061 	drm_dbg_kms(&i915->drm,
1062 		    "VBT backlight PWM modulation frequency %u Hz, "
1063 		    "active %s, min brightness %u, level %u, controller %u\n",
1064 		    panel->vbt.backlight.pwm_freq_hz,
1065 		    panel->vbt.backlight.active_low_pwm ? "low" : "high",
1066 		    panel->vbt.backlight.min_brightness,
1067 		    level,
1068 		    panel->vbt.backlight.controller);
1069 }
1070 
1071 /* Try to find sdvo panel data */
1072 static void
1073 parse_sdvo_panel_data(struct drm_i915_private *i915,
1074 		      struct intel_panel *panel)
1075 {
1076 	const struct bdb_sdvo_panel_dtds *dtds;
1077 	struct drm_display_mode *panel_fixed_mode;
1078 	int index;
1079 
1080 	index = i915->params.vbt_sdvo_panel_type;
1081 	if (index == -2) {
1082 		drm_dbg_kms(&i915->drm,
1083 			    "Ignore SDVO panel mode from BIOS VBT tables.\n");
1084 		return;
1085 	}
1086 
1087 	if (index == -1) {
1088 		const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
1089 
1090 		sdvo_lvds_options = find_section(i915, BDB_SDVO_LVDS_OPTIONS);
1091 		if (!sdvo_lvds_options)
1092 			return;
1093 
1094 		index = sdvo_lvds_options->panel_type;
1095 	}
1096 
1097 	dtds = find_section(i915, BDB_SDVO_PANEL_DTDS);
1098 	if (!dtds)
1099 		return;
1100 
1101 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
1102 	if (!panel_fixed_mode)
1103 		return;
1104 
1105 	fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
1106 
1107 	panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
1108 
1109 	drm_dbg_kms(&i915->drm,
1110 		    "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
1111 		    DRM_MODE_ARG(panel_fixed_mode));
1112 }
1113 
1114 static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
1115 				    bool alternate)
1116 {
1117 	switch (DISPLAY_VER(i915)) {
1118 	case 2:
1119 		return alternate ? 66667 : 48000;
1120 	case 3:
1121 	case 4:
1122 		return alternate ? 100000 : 96000;
1123 	default:
1124 		return alternate ? 100000 : 120000;
1125 	}
1126 }
1127 
1128 static void
1129 parse_general_features(struct drm_i915_private *i915)
1130 {
1131 	const struct bdb_general_features *general;
1132 
1133 	general = find_section(i915, BDB_GENERAL_FEATURES);
1134 	if (!general)
1135 		return;
1136 
1137 	i915->vbt.int_tv_support = general->int_tv_support;
1138 	/* int_crt_support can't be trusted on earlier platforms */
1139 	if (i915->vbt.version >= 155 &&
1140 	    (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
1141 		i915->vbt.int_crt_support = general->int_crt_support;
1142 	i915->vbt.lvds_use_ssc = general->enable_ssc;
1143 	i915->vbt.lvds_ssc_freq =
1144 		intel_bios_ssc_frequency(i915, general->ssc_freq);
1145 	i915->vbt.display_clock_mode = general->display_clock_mode;
1146 	i915->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
1147 	if (i915->vbt.version >= 181) {
1148 		i915->vbt.orientation = general->rotate_180 ?
1149 			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
1150 			DRM_MODE_PANEL_ORIENTATION_NORMAL;
1151 	} else {
1152 		i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1153 	}
1154 
1155 	if (i915->vbt.version >= 249 && general->afc_startup_config) {
1156 		i915->vbt.override_afc_startup = true;
1157 		i915->vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7;
1158 	}
1159 
1160 	drm_dbg_kms(&i915->drm,
1161 		    "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
1162 		    i915->vbt.int_tv_support,
1163 		    i915->vbt.int_crt_support,
1164 		    i915->vbt.lvds_use_ssc,
1165 		    i915->vbt.lvds_ssc_freq,
1166 		    i915->vbt.display_clock_mode,
1167 		    i915->vbt.fdi_rx_polarity_inverted);
1168 }
1169 
1170 static const struct child_device_config *
1171 child_device_ptr(const struct bdb_general_definitions *defs, int i)
1172 {
1173 	return (const void *) &defs->devices[i * defs->child_dev_size];
1174 }
1175 
1176 static void
1177 parse_sdvo_device_mapping(struct drm_i915_private *i915)
1178 {
1179 	struct sdvo_device_mapping *mapping;
1180 	const struct intel_bios_encoder_data *devdata;
1181 	const struct child_device_config *child;
1182 	int count = 0;
1183 
1184 	/*
1185 	 * Only parse SDVO mappings on gens that could have SDVO. This isn't
1186 	 * accurate and doesn't have to be, as long as it's not too strict.
1187 	 */
1188 	if (!IS_DISPLAY_VER(i915, 3, 7)) {
1189 		drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
1190 		return;
1191 	}
1192 
1193 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1194 		child = &devdata->child;
1195 
1196 		if (child->slave_addr != SLAVE_ADDR1 &&
1197 		    child->slave_addr != SLAVE_ADDR2) {
1198 			/*
1199 			 * If the slave address is neither 0x70 nor 0x72,
1200 			 * it is not a SDVO device. Skip it.
1201 			 */
1202 			continue;
1203 		}
1204 		if (child->dvo_port != DEVICE_PORT_DVOB &&
1205 		    child->dvo_port != DEVICE_PORT_DVOC) {
1206 			/* skip the incorrect SDVO port */
1207 			drm_dbg_kms(&i915->drm,
1208 				    "Incorrect SDVO port. Skip it\n");
1209 			continue;
1210 		}
1211 		drm_dbg_kms(&i915->drm,
1212 			    "the SDVO device with slave addr %2x is found on"
1213 			    " %s port\n",
1214 			    child->slave_addr,
1215 			    (child->dvo_port == DEVICE_PORT_DVOB) ?
1216 			    "SDVOB" : "SDVOC");
1217 		mapping = &i915->vbt.sdvo_mappings[child->dvo_port - 1];
1218 		if (!mapping->initialized) {
1219 			mapping->dvo_port = child->dvo_port;
1220 			mapping->slave_addr = child->slave_addr;
1221 			mapping->dvo_wiring = child->dvo_wiring;
1222 			mapping->ddc_pin = child->ddc_pin;
1223 			mapping->i2c_pin = child->i2c_pin;
1224 			mapping->initialized = 1;
1225 			drm_dbg_kms(&i915->drm,
1226 				    "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1227 				    mapping->dvo_port, mapping->slave_addr,
1228 				    mapping->dvo_wiring, mapping->ddc_pin,
1229 				    mapping->i2c_pin);
1230 		} else {
1231 			drm_dbg_kms(&i915->drm,
1232 				    "Maybe one SDVO port is shared by "
1233 				    "two SDVO device.\n");
1234 		}
1235 		if (child->slave2_addr) {
1236 			/* Maybe this is a SDVO device with multiple inputs */
1237 			/* And the mapping info is not added */
1238 			drm_dbg_kms(&i915->drm,
1239 				    "there exists the slave2_addr. Maybe this"
1240 				    " is a SDVO device with multiple inputs.\n");
1241 		}
1242 		count++;
1243 	}
1244 
1245 	if (!count) {
1246 		/* No SDVO device info is found */
1247 		drm_dbg_kms(&i915->drm,
1248 			    "No SDVO device info is found in VBT\n");
1249 	}
1250 }
1251 
1252 static void
1253 parse_driver_features(struct drm_i915_private *i915)
1254 {
1255 	const struct bdb_driver_features *driver;
1256 
1257 	driver = find_section(i915, BDB_DRIVER_FEATURES);
1258 	if (!driver)
1259 		return;
1260 
1261 	if (DISPLAY_VER(i915) >= 5) {
1262 		/*
1263 		 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1264 		 * to mean "eDP". The VBT spec doesn't agree with that
1265 		 * interpretation, but real world VBTs seem to.
1266 		 */
1267 		if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1268 			i915->vbt.int_lvds_support = 0;
1269 	} else {
1270 		/*
1271 		 * FIXME it's not clear which BDB version has the LVDS config
1272 		 * bits defined. Revision history in the VBT spec says:
1273 		 * "0.92 | Add two definitions for VBT value of LVDS Active
1274 		 *  Config (00b and 11b values defined) | 06/13/2005"
1275 		 * but does not the specify the BDB version.
1276 		 *
1277 		 * So far version 134 (on i945gm) is the oldest VBT observed
1278 		 * in the wild with the bits correctly populated. Version
1279 		 * 108 (on i85x) does not have the bits correctly populated.
1280 		 */
1281 		if (i915->vbt.version >= 134 &&
1282 		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1283 		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1284 			i915->vbt.int_lvds_support = 0;
1285 	}
1286 }
1287 
1288 static void
1289 parse_panel_driver_features(struct drm_i915_private *i915,
1290 			    struct intel_panel *panel)
1291 {
1292 	const struct bdb_driver_features *driver;
1293 
1294 	driver = find_section(i915, BDB_DRIVER_FEATURES);
1295 	if (!driver)
1296 		return;
1297 
1298 	if (i915->vbt.version < 228) {
1299 		drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
1300 			    driver->drrs_enabled);
1301 		/*
1302 		 * If DRRS is not supported, drrs_type has to be set to 0.
1303 		 * This is because, VBT is configured in such a way that
1304 		 * static DRRS is 0 and DRRS not supported is represented by
1305 		 * driver->drrs_enabled=false
1306 		 */
1307 		if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1308 			/*
1309 			 * FIXME Should DMRRS perhaps be treated as seamless
1310 			 * but without the automatic downclocking?
1311 			 */
1312 			if (driver->dmrrs_enabled)
1313 				panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1314 			else
1315 				panel->vbt.drrs_type = DRRS_TYPE_NONE;
1316 		}
1317 
1318 		panel->vbt.psr.enable = driver->psr_enabled;
1319 	}
1320 }
1321 
1322 static void
1323 parse_power_conservation_features(struct drm_i915_private *i915,
1324 				  struct intel_panel *panel)
1325 {
1326 	const struct bdb_lfp_power *power;
1327 	u8 panel_type = panel->vbt.panel_type;
1328 
1329 	panel->vbt.vrr = true; /* matches Windows behaviour */
1330 
1331 	if (i915->vbt.version < 228)
1332 		return;
1333 
1334 	power = find_section(i915, BDB_LFP_POWER);
1335 	if (!power)
1336 		return;
1337 
1338 	panel->vbt.psr.enable = panel_bool(power->psr, panel_type);
1339 
1340 	/*
1341 	 * If DRRS is not supported, drrs_type has to be set to 0.
1342 	 * This is because, VBT is configured in such a way that
1343 	 * static DRRS is 0 and DRRS not supported is represented by
1344 	 * power->drrs & BIT(panel_type)=false
1345 	 */
1346 	if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1347 		/*
1348 		 * FIXME Should DMRRS perhaps be treated as seamless
1349 		 * but without the automatic downclocking?
1350 		 */
1351 		if (panel_bool(power->dmrrs, panel_type))
1352 			panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1353 		else
1354 			panel->vbt.drrs_type = DRRS_TYPE_NONE;
1355 	}
1356 
1357 	if (i915->vbt.version >= 232)
1358 		panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type);
1359 
1360 	if (i915->vbt.version >= 233)
1361 		panel->vbt.vrr = panel_bool(power->vrr_feature_enabled,
1362 					    panel_type);
1363 }
1364 
1365 static void
1366 parse_edp(struct drm_i915_private *i915,
1367 	  struct intel_panel *panel)
1368 {
1369 	const struct bdb_edp *edp;
1370 	const struct edp_power_seq *edp_pps;
1371 	const struct edp_fast_link_params *edp_link_params;
1372 	int panel_type = panel->vbt.panel_type;
1373 
1374 	edp = find_section(i915, BDB_EDP);
1375 	if (!edp)
1376 		return;
1377 
1378 	switch (panel_bits(edp->color_depth, panel_type, 2)) {
1379 	case EDP_18BPP:
1380 		panel->vbt.edp.bpp = 18;
1381 		break;
1382 	case EDP_24BPP:
1383 		panel->vbt.edp.bpp = 24;
1384 		break;
1385 	case EDP_30BPP:
1386 		panel->vbt.edp.bpp = 30;
1387 		break;
1388 	}
1389 
1390 	/* Get the eDP sequencing and link info */
1391 	edp_pps = &edp->power_seqs[panel_type];
1392 	edp_link_params = &edp->fast_link_params[panel_type];
1393 
1394 	panel->vbt.edp.pps = *edp_pps;
1395 
1396 	if (i915->vbt.version >= 224) {
1397 		panel->vbt.edp.rate =
1398 			edp->edp_fast_link_training_rate[panel_type] * 20;
1399 	} else {
1400 		switch (edp_link_params->rate) {
1401 		case EDP_RATE_1_62:
1402 			panel->vbt.edp.rate = 162000;
1403 			break;
1404 		case EDP_RATE_2_7:
1405 			panel->vbt.edp.rate = 270000;
1406 			break;
1407 		case EDP_RATE_5_4:
1408 			panel->vbt.edp.rate = 540000;
1409 			break;
1410 		default:
1411 			drm_dbg_kms(&i915->drm,
1412 				    "VBT has unknown eDP link rate value %u\n",
1413 				    edp_link_params->rate);
1414 			break;
1415 		}
1416 	}
1417 
1418 	switch (edp_link_params->lanes) {
1419 	case EDP_LANE_1:
1420 		panel->vbt.edp.lanes = 1;
1421 		break;
1422 	case EDP_LANE_2:
1423 		panel->vbt.edp.lanes = 2;
1424 		break;
1425 	case EDP_LANE_4:
1426 		panel->vbt.edp.lanes = 4;
1427 		break;
1428 	default:
1429 		drm_dbg_kms(&i915->drm,
1430 			    "VBT has unknown eDP lane count value %u\n",
1431 			    edp_link_params->lanes);
1432 		break;
1433 	}
1434 
1435 	switch (edp_link_params->preemphasis) {
1436 	case EDP_PREEMPHASIS_NONE:
1437 		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1438 		break;
1439 	case EDP_PREEMPHASIS_3_5dB:
1440 		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1441 		break;
1442 	case EDP_PREEMPHASIS_6dB:
1443 		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1444 		break;
1445 	case EDP_PREEMPHASIS_9_5dB:
1446 		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1447 		break;
1448 	default:
1449 		drm_dbg_kms(&i915->drm,
1450 			    "VBT has unknown eDP pre-emphasis value %u\n",
1451 			    edp_link_params->preemphasis);
1452 		break;
1453 	}
1454 
1455 	switch (edp_link_params->vswing) {
1456 	case EDP_VSWING_0_4V:
1457 		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1458 		break;
1459 	case EDP_VSWING_0_6V:
1460 		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1461 		break;
1462 	case EDP_VSWING_0_8V:
1463 		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1464 		break;
1465 	case EDP_VSWING_1_2V:
1466 		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1467 		break;
1468 	default:
1469 		drm_dbg_kms(&i915->drm,
1470 			    "VBT has unknown eDP voltage swing value %u\n",
1471 			    edp_link_params->vswing);
1472 		break;
1473 	}
1474 
1475 	if (i915->vbt.version >= 173) {
1476 		u8 vswing;
1477 
1478 		/* Don't read from VBT if module parameter has valid value*/
1479 		if (i915->params.edp_vswing) {
1480 			panel->vbt.edp.low_vswing =
1481 				i915->params.edp_vswing == 1;
1482 		} else {
1483 			vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1484 			panel->vbt.edp.low_vswing = vswing == 0;
1485 		}
1486 	}
1487 
1488 	panel->vbt.edp.drrs_msa_timing_delay =
1489 		panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2);
1490 
1491 	if (i915->vbt.version >= 244)
1492 		panel->vbt.edp.max_link_rate =
1493 			edp->edp_max_port_link_rate[panel_type] * 20;
1494 }
1495 
1496 static void
1497 parse_psr(struct drm_i915_private *i915,
1498 	  struct intel_panel *panel)
1499 {
1500 	const struct bdb_psr *psr;
1501 	const struct psr_table *psr_table;
1502 	int panel_type = panel->vbt.panel_type;
1503 
1504 	psr = find_section(i915, BDB_PSR);
1505 	if (!psr) {
1506 		drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
1507 		return;
1508 	}
1509 
1510 	psr_table = &psr->psr_table[panel_type];
1511 
1512 	panel->vbt.psr.full_link = psr_table->full_link;
1513 	panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1514 
1515 	/* Allowed VBT values goes from 0 to 15 */
1516 	panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1517 		psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1518 
1519 	/*
1520 	 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1521 	 * Old decimal value is wake up time in multiples of 100 us.
1522 	 */
1523 	if (i915->vbt.version >= 205 &&
1524 	    (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
1525 		switch (psr_table->tp1_wakeup_time) {
1526 		case 0:
1527 			panel->vbt.psr.tp1_wakeup_time_us = 500;
1528 			break;
1529 		case 1:
1530 			panel->vbt.psr.tp1_wakeup_time_us = 100;
1531 			break;
1532 		case 3:
1533 			panel->vbt.psr.tp1_wakeup_time_us = 0;
1534 			break;
1535 		default:
1536 			drm_dbg_kms(&i915->drm,
1537 				    "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1538 				    psr_table->tp1_wakeup_time);
1539 			fallthrough;
1540 		case 2:
1541 			panel->vbt.psr.tp1_wakeup_time_us = 2500;
1542 			break;
1543 		}
1544 
1545 		switch (psr_table->tp2_tp3_wakeup_time) {
1546 		case 0:
1547 			panel->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1548 			break;
1549 		case 1:
1550 			panel->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1551 			break;
1552 		case 3:
1553 			panel->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1554 			break;
1555 		default:
1556 			drm_dbg_kms(&i915->drm,
1557 				    "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1558 				    psr_table->tp2_tp3_wakeup_time);
1559 			fallthrough;
1560 		case 2:
1561 			panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1562 		break;
1563 		}
1564 	} else {
1565 		panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1566 		panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1567 	}
1568 
1569 	if (i915->vbt.version >= 226) {
1570 		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1571 
1572 		wakeup_time = panel_bits(wakeup_time, panel_type, 2);
1573 		switch (wakeup_time) {
1574 		case 0:
1575 			wakeup_time = 500;
1576 			break;
1577 		case 1:
1578 			wakeup_time = 100;
1579 			break;
1580 		case 3:
1581 			wakeup_time = 50;
1582 			break;
1583 		default:
1584 		case 2:
1585 			wakeup_time = 2500;
1586 			break;
1587 		}
1588 		panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1589 	} else {
1590 		/* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1591 		panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us;
1592 	}
1593 }
1594 
1595 static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1596 				      struct intel_panel *panel,
1597 				      enum port port)
1598 {
1599 	if (!panel->vbt.dsi.config->dual_link || i915->vbt.version < 197) {
1600 		panel->vbt.dsi.bl_ports = BIT(port);
1601 		if (panel->vbt.dsi.config->cabc_supported)
1602 			panel->vbt.dsi.cabc_ports = BIT(port);
1603 
1604 		return;
1605 	}
1606 
1607 	switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) {
1608 	case DL_DCS_PORT_A:
1609 		panel->vbt.dsi.bl_ports = BIT(PORT_A);
1610 		break;
1611 	case DL_DCS_PORT_C:
1612 		panel->vbt.dsi.bl_ports = BIT(PORT_C);
1613 		break;
1614 	default:
1615 	case DL_DCS_PORT_A_AND_C:
1616 		panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
1617 		break;
1618 	}
1619 
1620 	if (!panel->vbt.dsi.config->cabc_supported)
1621 		return;
1622 
1623 	switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) {
1624 	case DL_DCS_PORT_A:
1625 		panel->vbt.dsi.cabc_ports = BIT(PORT_A);
1626 		break;
1627 	case DL_DCS_PORT_C:
1628 		panel->vbt.dsi.cabc_ports = BIT(PORT_C);
1629 		break;
1630 	default:
1631 	case DL_DCS_PORT_A_AND_C:
1632 		panel->vbt.dsi.cabc_ports =
1633 					BIT(PORT_A) | BIT(PORT_C);
1634 		break;
1635 	}
1636 }
1637 
1638 static void
1639 parse_mipi_config(struct drm_i915_private *i915,
1640 		  struct intel_panel *panel)
1641 {
1642 	const struct bdb_mipi_config *start;
1643 	const struct mipi_config *config;
1644 	const struct mipi_pps_data *pps;
1645 	int panel_type = panel->vbt.panel_type;
1646 	enum port port;
1647 
1648 	/* parse MIPI blocks only if LFP type is MIPI */
1649 	if (!intel_bios_is_dsi_present(i915, &port))
1650 		return;
1651 
1652 	/* Initialize this to undefined indicating no generic MIPI support */
1653 	panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1654 
1655 	/* Block #40 is already parsed and panel_fixed_mode is
1656 	 * stored in i915->lfp_lvds_vbt_mode
1657 	 * resuse this when needed
1658 	 */
1659 
1660 	/* Parse #52 for panel index used from panel_type already
1661 	 * parsed
1662 	 */
1663 	start = find_section(i915, BDB_MIPI_CONFIG);
1664 	if (!start) {
1665 		drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1666 		return;
1667 	}
1668 
1669 	drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1670 		panel_type);
1671 
1672 	/*
1673 	 * get hold of the correct configuration block and pps data as per
1674 	 * the panel_type as index
1675 	 */
1676 	config = &start->config[panel_type];
1677 	pps = &start->pps[panel_type];
1678 
1679 	/* store as of now full data. Trim when we realise all is not needed */
1680 	panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1681 	if (!panel->vbt.dsi.config)
1682 		return;
1683 
1684 	panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1685 	if (!panel->vbt.dsi.pps) {
1686 		kfree(panel->vbt.dsi.config);
1687 		return;
1688 	}
1689 
1690 	parse_dsi_backlight_ports(i915, panel, port);
1691 
1692 	/* FIXME is the 90 vs. 270 correct? */
1693 	switch (config->rotation) {
1694 	case ENABLE_ROTATION_0:
1695 		/*
1696 		 * Most (all?) VBTs claim 0 degrees despite having
1697 		 * an upside down panel, thus we do not trust this.
1698 		 */
1699 		panel->vbt.dsi.orientation =
1700 			DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1701 		break;
1702 	case ENABLE_ROTATION_90:
1703 		panel->vbt.dsi.orientation =
1704 			DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1705 		break;
1706 	case ENABLE_ROTATION_180:
1707 		panel->vbt.dsi.orientation =
1708 			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1709 		break;
1710 	case ENABLE_ROTATION_270:
1711 		panel->vbt.dsi.orientation =
1712 			DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1713 		break;
1714 	}
1715 
1716 	/* We have mandatory mipi config blocks. Initialize as generic panel */
1717 	panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1718 }
1719 
1720 /* Find the sequence block and size for the given panel. */
1721 static const u8 *
1722 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1723 			  u16 panel_id, u32 *seq_size)
1724 {
1725 	u32 total = get_blocksize(sequence);
1726 	const u8 *data = &sequence->data[0];
1727 	u8 current_id;
1728 	u32 current_size;
1729 	int header_size = sequence->version >= 3 ? 5 : 3;
1730 	int index = 0;
1731 	int i;
1732 
1733 	/* skip new block size */
1734 	if (sequence->version >= 3)
1735 		data += 4;
1736 
1737 	for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1738 		if (index + header_size > total) {
1739 			DRM_ERROR("Invalid sequence block (header)\n");
1740 			return NULL;
1741 		}
1742 
1743 		current_id = *(data + index);
1744 		if (sequence->version >= 3)
1745 			current_size = *((const u32 *)(data + index + 1));
1746 		else
1747 			current_size = *((const u16 *)(data + index + 1));
1748 
1749 		index += header_size;
1750 
1751 		if (index + current_size > total) {
1752 			DRM_ERROR("Invalid sequence block\n");
1753 			return NULL;
1754 		}
1755 
1756 		if (current_id == panel_id) {
1757 			*seq_size = current_size;
1758 			return data + index;
1759 		}
1760 
1761 		index += current_size;
1762 	}
1763 
1764 	DRM_ERROR("Sequence block detected but no valid configuration\n");
1765 
1766 	return NULL;
1767 }
1768 
1769 static int goto_next_sequence(const u8 *data, int index, int total)
1770 {
1771 	u16 len;
1772 
1773 	/* Skip Sequence Byte. */
1774 	for (index = index + 1; index < total; index += len) {
1775 		u8 operation_byte = *(data + index);
1776 		index++;
1777 
1778 		switch (operation_byte) {
1779 		case MIPI_SEQ_ELEM_END:
1780 			return index;
1781 		case MIPI_SEQ_ELEM_SEND_PKT:
1782 			if (index + 4 > total)
1783 				return 0;
1784 
1785 			len = *((const u16 *)(data + index + 2)) + 4;
1786 			break;
1787 		case MIPI_SEQ_ELEM_DELAY:
1788 			len = 4;
1789 			break;
1790 		case MIPI_SEQ_ELEM_GPIO:
1791 			len = 2;
1792 			break;
1793 		case MIPI_SEQ_ELEM_I2C:
1794 			if (index + 7 > total)
1795 				return 0;
1796 			len = *(data + index + 6) + 7;
1797 			break;
1798 		default:
1799 			DRM_ERROR("Unknown operation byte\n");
1800 			return 0;
1801 		}
1802 	}
1803 
1804 	return 0;
1805 }
1806 
1807 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1808 {
1809 	int seq_end;
1810 	u16 len;
1811 	u32 size_of_sequence;
1812 
1813 	/*
1814 	 * Could skip sequence based on Size of Sequence alone, but also do some
1815 	 * checking on the structure.
1816 	 */
1817 	if (total < 5) {
1818 		DRM_ERROR("Too small sequence size\n");
1819 		return 0;
1820 	}
1821 
1822 	/* Skip Sequence Byte. */
1823 	index++;
1824 
1825 	/*
1826 	 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1827 	 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1828 	 * byte.
1829 	 */
1830 	size_of_sequence = *((const u32 *)(data + index));
1831 	index += 4;
1832 
1833 	seq_end = index + size_of_sequence;
1834 	if (seq_end > total) {
1835 		DRM_ERROR("Invalid sequence size\n");
1836 		return 0;
1837 	}
1838 
1839 	for (; index < total; index += len) {
1840 		u8 operation_byte = *(data + index);
1841 		index++;
1842 
1843 		if (operation_byte == MIPI_SEQ_ELEM_END) {
1844 			if (index != seq_end) {
1845 				DRM_ERROR("Invalid element structure\n");
1846 				return 0;
1847 			}
1848 			return index;
1849 		}
1850 
1851 		len = *(data + index);
1852 		index++;
1853 
1854 		/*
1855 		 * FIXME: Would be nice to check elements like for v1/v2 in
1856 		 * goto_next_sequence() above.
1857 		 */
1858 		switch (operation_byte) {
1859 		case MIPI_SEQ_ELEM_SEND_PKT:
1860 		case MIPI_SEQ_ELEM_DELAY:
1861 		case MIPI_SEQ_ELEM_GPIO:
1862 		case MIPI_SEQ_ELEM_I2C:
1863 		case MIPI_SEQ_ELEM_SPI:
1864 		case MIPI_SEQ_ELEM_PMIC:
1865 			break;
1866 		default:
1867 			DRM_ERROR("Unknown operation byte %u\n",
1868 				  operation_byte);
1869 			break;
1870 		}
1871 	}
1872 
1873 	return 0;
1874 }
1875 
1876 /*
1877  * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1878  * skip all delay + gpio operands and stop at the first DSI packet op.
1879  */
1880 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915,
1881 					      struct intel_panel *panel)
1882 {
1883 	const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1884 	int index, len;
1885 
1886 	if (drm_WARN_ON(&i915->drm,
1887 			!data || panel->vbt.dsi.seq_version != 1))
1888 		return 0;
1889 
1890 	/* index = 1 to skip sequence byte */
1891 	for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1892 		switch (data[index]) {
1893 		case MIPI_SEQ_ELEM_SEND_PKT:
1894 			return index == 1 ? 0 : index;
1895 		case MIPI_SEQ_ELEM_DELAY:
1896 			len = 5; /* 1 byte for operand + uint32 */
1897 			break;
1898 		case MIPI_SEQ_ELEM_GPIO:
1899 			len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1900 			break;
1901 		default:
1902 			return 0;
1903 		}
1904 	}
1905 
1906 	return 0;
1907 }
1908 
1909 /*
1910  * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1911  * The deassert must be done before calling intel_dsi_device_ready, so for
1912  * these devices we split the init OTP sequence into a deassert sequence and
1913  * the actual init OTP part.
1914  */
1915 static void fixup_mipi_sequences(struct drm_i915_private *i915,
1916 				 struct intel_panel *panel)
1917 {
1918 	u8 *init_otp;
1919 	int len;
1920 
1921 	/* Limit this to VLV for now. */
1922 	if (!IS_VALLEYVIEW(i915))
1923 		return;
1924 
1925 	/* Limit this to v1 vid-mode sequences */
1926 	if (panel->vbt.dsi.config->is_cmd_mode ||
1927 	    panel->vbt.dsi.seq_version != 1)
1928 		return;
1929 
1930 	/* Only do this if there are otp and assert seqs and no deassert seq */
1931 	if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1932 	    !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1933 	    panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1934 		return;
1935 
1936 	/* The deassert-sequence ends at the first DSI packet */
1937 	len = get_init_otp_deassert_fragment_len(i915, panel);
1938 	if (!len)
1939 		return;
1940 
1941 	drm_dbg_kms(&i915->drm,
1942 		    "Using init OTP fragment to deassert reset\n");
1943 
1944 	/* Copy the fragment, update seq byte and terminate it */
1945 	init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1946 	panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1947 	if (!panel->vbt.dsi.deassert_seq)
1948 		return;
1949 	panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1950 	panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1951 	/* Use the copy for deassert */
1952 	panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1953 		panel->vbt.dsi.deassert_seq;
1954 	/* Replace the last byte of the fragment with init OTP seq byte */
1955 	init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1956 	/* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1957 	panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1958 }
1959 
1960 static void
1961 parse_mipi_sequence(struct drm_i915_private *i915,
1962 		    struct intel_panel *panel)
1963 {
1964 	int panel_type = panel->vbt.panel_type;
1965 	const struct bdb_mipi_sequence *sequence;
1966 	const u8 *seq_data;
1967 	u32 seq_size;
1968 	u8 *data;
1969 	int index = 0;
1970 
1971 	/* Only our generic panel driver uses the sequence block. */
1972 	if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1973 		return;
1974 
1975 	sequence = find_section(i915, BDB_MIPI_SEQUENCE);
1976 	if (!sequence) {
1977 		drm_dbg_kms(&i915->drm,
1978 			    "No MIPI Sequence found, parsing complete\n");
1979 		return;
1980 	}
1981 
1982 	/* Fail gracefully for forward incompatible sequence block. */
1983 	if (sequence->version >= 4) {
1984 		drm_err(&i915->drm,
1985 			"Unable to parse MIPI Sequence Block v%u\n",
1986 			sequence->version);
1987 		return;
1988 	}
1989 
1990 	drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
1991 		sequence->version);
1992 
1993 	seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1994 	if (!seq_data)
1995 		return;
1996 
1997 	data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1998 	if (!data)
1999 		return;
2000 
2001 	/* Parse the sequences, store pointers to each sequence. */
2002 	for (;;) {
2003 		u8 seq_id = *(data + index);
2004 		if (seq_id == MIPI_SEQ_END)
2005 			break;
2006 
2007 		if (seq_id >= MIPI_SEQ_MAX) {
2008 			drm_err(&i915->drm, "Unknown sequence %u\n",
2009 				seq_id);
2010 			goto err;
2011 		}
2012 
2013 		/* Log about presence of sequences we won't run. */
2014 		if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
2015 			drm_dbg_kms(&i915->drm,
2016 				    "Unsupported sequence %u\n", seq_id);
2017 
2018 		panel->vbt.dsi.sequence[seq_id] = data + index;
2019 
2020 		if (sequence->version >= 3)
2021 			index = goto_next_sequence_v3(data, index, seq_size);
2022 		else
2023 			index = goto_next_sequence(data, index, seq_size);
2024 		if (!index) {
2025 			drm_err(&i915->drm, "Invalid sequence %u\n",
2026 				seq_id);
2027 			goto err;
2028 		}
2029 	}
2030 
2031 	panel->vbt.dsi.data = data;
2032 	panel->vbt.dsi.size = seq_size;
2033 	panel->vbt.dsi.seq_version = sequence->version;
2034 
2035 	fixup_mipi_sequences(i915, panel);
2036 
2037 	drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
2038 	return;
2039 
2040 err:
2041 	kfree(data);
2042 	memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence));
2043 }
2044 
2045 static void
2046 parse_compression_parameters(struct drm_i915_private *i915)
2047 {
2048 	const struct bdb_compression_parameters *params;
2049 	struct intel_bios_encoder_data *devdata;
2050 	const struct child_device_config *child;
2051 	u16 block_size;
2052 	int index;
2053 
2054 	if (i915->vbt.version < 198)
2055 		return;
2056 
2057 	params = find_section(i915, BDB_COMPRESSION_PARAMETERS);
2058 	if (params) {
2059 		/* Sanity checks */
2060 		if (params->entry_size != sizeof(params->data[0])) {
2061 			drm_dbg_kms(&i915->drm,
2062 				    "VBT: unsupported compression param entry size\n");
2063 			return;
2064 		}
2065 
2066 		block_size = get_blocksize(params);
2067 		if (block_size < sizeof(*params)) {
2068 			drm_dbg_kms(&i915->drm,
2069 				    "VBT: expected 16 compression param entries\n");
2070 			return;
2071 		}
2072 	}
2073 
2074 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2075 		child = &devdata->child;
2076 
2077 		if (!child->compression_enable)
2078 			continue;
2079 
2080 		if (!params) {
2081 			drm_dbg_kms(&i915->drm,
2082 				    "VBT: compression params not available\n");
2083 			continue;
2084 		}
2085 
2086 		if (child->compression_method_cps) {
2087 			drm_dbg_kms(&i915->drm,
2088 				    "VBT: CPS compression not supported\n");
2089 			continue;
2090 		}
2091 
2092 		index = child->compression_structure_index;
2093 
2094 		devdata->dsc = kmemdup(&params->data[index],
2095 				       sizeof(*devdata->dsc), GFP_KERNEL);
2096 	}
2097 }
2098 
2099 static u8 translate_iboost(u8 val)
2100 {
2101 	static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
2102 
2103 	if (val >= ARRAY_SIZE(mapping)) {
2104 		DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
2105 		return 0;
2106 	}
2107 	return mapping[val];
2108 }
2109 
2110 static const u8 cnp_ddc_pin_map[] = {
2111 	[0] = 0, /* N/A */
2112 	[DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
2113 	[DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
2114 	[DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
2115 	[DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
2116 };
2117 
2118 static const u8 icp_ddc_pin_map[] = {
2119 	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2120 	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2121 	[TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
2122 	[ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
2123 	[ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
2124 	[ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
2125 	[ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
2126 	[TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
2127 	[TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
2128 };
2129 
2130 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
2131 	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2132 	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2133 	[RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
2134 	[RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
2135 };
2136 
2137 static const u8 adls_ddc_pin_map[] = {
2138 	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2139 	[ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
2140 	[ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
2141 	[ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
2142 	[ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
2143 };
2144 
2145 static const u8 gen9bc_tgp_ddc_pin_map[] = {
2146 	[DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2147 	[DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
2148 	[DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
2149 };
2150 
2151 static const u8 adlp_ddc_pin_map[] = {
2152 	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
2153 	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
2154 	[ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
2155 	[ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
2156 	[ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
2157 	[ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
2158 };
2159 
2160 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
2161 {
2162 	const u8 *ddc_pin_map;
2163 	int n_entries;
2164 
2165 	if (IS_ALDERLAKE_P(i915)) {
2166 		ddc_pin_map = adlp_ddc_pin_map;
2167 		n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
2168 	} else if (IS_ALDERLAKE_S(i915)) {
2169 		ddc_pin_map = adls_ddc_pin_map;
2170 		n_entries = ARRAY_SIZE(adls_ddc_pin_map);
2171 	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
2172 		return vbt_pin;
2173 	} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
2174 		ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
2175 		n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
2176 	} else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
2177 		ddc_pin_map = gen9bc_tgp_ddc_pin_map;
2178 		n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
2179 	} else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
2180 		ddc_pin_map = icp_ddc_pin_map;
2181 		n_entries = ARRAY_SIZE(icp_ddc_pin_map);
2182 	} else if (HAS_PCH_CNP(i915)) {
2183 		ddc_pin_map = cnp_ddc_pin_map;
2184 		n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
2185 	} else {
2186 		/* Assuming direct map */
2187 		return vbt_pin;
2188 	}
2189 
2190 	if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
2191 		return ddc_pin_map[vbt_pin];
2192 
2193 	drm_dbg_kms(&i915->drm,
2194 		    "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
2195 		    vbt_pin);
2196 	return 0;
2197 }
2198 
2199 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
2200 {
2201 	const struct intel_bios_encoder_data *devdata;
2202 	enum port port;
2203 
2204 	if (!ddc_pin)
2205 		return PORT_NONE;
2206 
2207 	for_each_port(port) {
2208 		devdata = i915->vbt.ports[port];
2209 
2210 		if (devdata && ddc_pin == devdata->child.ddc_pin)
2211 			return port;
2212 	}
2213 
2214 	return PORT_NONE;
2215 }
2216 
2217 static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
2218 			     enum port port)
2219 {
2220 	struct drm_i915_private *i915 = devdata->i915;
2221 	struct child_device_config *child;
2222 	u8 mapped_ddc_pin;
2223 	enum port p;
2224 
2225 	if (!devdata->child.ddc_pin)
2226 		return;
2227 
2228 	mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin);
2229 	if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) {
2230 		drm_dbg_kms(&i915->drm,
2231 			    "Port %c has invalid DDC pin %d, "
2232 			    "sticking to defaults\n",
2233 			    port_name(port), mapped_ddc_pin);
2234 		devdata->child.ddc_pin = 0;
2235 		return;
2236 	}
2237 
2238 	p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin);
2239 	if (p == PORT_NONE)
2240 		return;
2241 
2242 	drm_dbg_kms(&i915->drm,
2243 		    "port %c trying to use the same DDC pin (0x%x) as port %c, "
2244 		    "disabling port %c DVI/HDMI support\n",
2245 		    port_name(port), mapped_ddc_pin,
2246 		    port_name(p), port_name(p));
2247 
2248 	/*
2249 	 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
2250 	 * couldn't exist on the shared port. Otherwise they share the same ddc
2251 	 * pin and system couldn't communicate with them separately.
2252 	 *
2253 	 * Give inverse child device order the priority, last one wins. Yes,
2254 	 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2255 	 * port A and port E with the same AUX ch and we must pick port E :(
2256 	 */
2257 	child = &i915->vbt.ports[p]->child;
2258 
2259 	child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2260 	child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2261 
2262 	child->ddc_pin = 0;
2263 }
2264 
2265 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
2266 {
2267 	const struct intel_bios_encoder_data *devdata;
2268 	enum port port;
2269 
2270 	if (!aux_ch)
2271 		return PORT_NONE;
2272 
2273 	for_each_port(port) {
2274 		devdata = i915->vbt.ports[port];
2275 
2276 		if (devdata && aux_ch == devdata->child.aux_channel)
2277 			return port;
2278 	}
2279 
2280 	return PORT_NONE;
2281 }
2282 
2283 static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
2284 			    enum port port)
2285 {
2286 	struct drm_i915_private *i915 = devdata->i915;
2287 	struct child_device_config *child;
2288 	enum port p;
2289 
2290 	p = get_port_by_aux_ch(i915, devdata->child.aux_channel);
2291 	if (p == PORT_NONE)
2292 		return;
2293 
2294 	drm_dbg_kms(&i915->drm,
2295 		    "port %c trying to use the same AUX CH (0x%x) as port %c, "
2296 		    "disabling port %c DP support\n",
2297 		    port_name(port), devdata->child.aux_channel,
2298 		    port_name(p), port_name(p));
2299 
2300 	/*
2301 	 * If we have multiple ports supposedly sharing the aux channel, then DP
2302 	 * couldn't exist on the shared port. Otherwise they share the same aux
2303 	 * channel and system couldn't communicate with them separately.
2304 	 *
2305 	 * Give inverse child device order the priority, last one wins. Yes,
2306 	 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2307 	 * port A and port E with the same AUX ch and we must pick port E :(
2308 	 */
2309 	child = &i915->vbt.ports[p]->child;
2310 
2311 	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2312 	child->aux_channel = 0;
2313 }
2314 
2315 static u8 dvo_port_type(u8 dvo_port)
2316 {
2317 	switch (dvo_port) {
2318 	case DVO_PORT_HDMIA:
2319 	case DVO_PORT_HDMIB:
2320 	case DVO_PORT_HDMIC:
2321 	case DVO_PORT_HDMID:
2322 	case DVO_PORT_HDMIE:
2323 	case DVO_PORT_HDMIF:
2324 	case DVO_PORT_HDMIG:
2325 	case DVO_PORT_HDMIH:
2326 	case DVO_PORT_HDMII:
2327 		return DVO_PORT_HDMIA;
2328 	case DVO_PORT_DPA:
2329 	case DVO_PORT_DPB:
2330 	case DVO_PORT_DPC:
2331 	case DVO_PORT_DPD:
2332 	case DVO_PORT_DPE:
2333 	case DVO_PORT_DPF:
2334 	case DVO_PORT_DPG:
2335 	case DVO_PORT_DPH:
2336 	case DVO_PORT_DPI:
2337 		return DVO_PORT_DPA;
2338 	case DVO_PORT_MIPIA:
2339 	case DVO_PORT_MIPIB:
2340 	case DVO_PORT_MIPIC:
2341 	case DVO_PORT_MIPID:
2342 		return DVO_PORT_MIPIA;
2343 	default:
2344 		return dvo_port;
2345 	}
2346 }
2347 
2348 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2349 				    const int port_mapping[][3], u8 dvo_port)
2350 {
2351 	enum port port;
2352 	int i;
2353 
2354 	for (port = PORT_A; port < n_ports; port++) {
2355 		for (i = 0; i < n_dvo; i++) {
2356 			if (port_mapping[port][i] == -1)
2357 				break;
2358 
2359 			if (dvo_port == port_mapping[port][i])
2360 				return port;
2361 		}
2362 	}
2363 
2364 	return PORT_NONE;
2365 }
2366 
2367 static enum port dvo_port_to_port(struct drm_i915_private *i915,
2368 				  u8 dvo_port)
2369 {
2370 	/*
2371 	 * Each DDI port can have more than one value on the "DVO Port" field,
2372 	 * so look for all the possible values for each port.
2373 	 */
2374 	static const int port_mapping[][3] = {
2375 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2376 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2377 		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2378 		[PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2379 		[PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2380 		[PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2381 		[PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2382 		[PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2383 		[PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2384 	};
2385 	/*
2386 	 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2387 	 * map to DDI A,B,TC1,TC2 respectively.
2388 	 */
2389 	static const int rkl_port_mapping[][3] = {
2390 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2391 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2392 		[PORT_C] = { -1 },
2393 		[PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2394 		[PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2395 	};
2396 	/*
2397 	 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2398 	 * PORT_F and PORT_G, we need to map that to correct VBT sections.
2399 	 */
2400 	static const int adls_port_mapping[][3] = {
2401 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2402 		[PORT_B] = { -1 },
2403 		[PORT_C] = { -1 },
2404 		[PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2405 		[PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2406 		[PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2407 		[PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2408 	};
2409 	static const int xelpd_port_mapping[][3] = {
2410 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2411 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2412 		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2413 		[PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2414 		[PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2415 		[PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2416 		[PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2417 		[PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2418 		[PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2419 	};
2420 
2421 	if (DISPLAY_VER(i915) == 13)
2422 		return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2423 					  ARRAY_SIZE(xelpd_port_mapping[0]),
2424 					  xelpd_port_mapping,
2425 					  dvo_port);
2426 	else if (IS_ALDERLAKE_S(i915))
2427 		return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2428 					  ARRAY_SIZE(adls_port_mapping[0]),
2429 					  adls_port_mapping,
2430 					  dvo_port);
2431 	else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2432 		return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2433 					  ARRAY_SIZE(rkl_port_mapping[0]),
2434 					  rkl_port_mapping,
2435 					  dvo_port);
2436 	else
2437 		return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2438 					  ARRAY_SIZE(port_mapping[0]),
2439 					  port_mapping,
2440 					  dvo_port);
2441 }
2442 
2443 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2444 {
2445 	switch (vbt_max_link_rate) {
2446 	default:
2447 	case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2448 		return 0;
2449 	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2450 		return 2000000;
2451 	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2452 		return 1350000;
2453 	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2454 		return 1000000;
2455 	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2456 		return 810000;
2457 	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2458 		return 540000;
2459 	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2460 		return 270000;
2461 	case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2462 		return 162000;
2463 	}
2464 }
2465 
2466 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2467 {
2468 	switch (vbt_max_link_rate) {
2469 	default:
2470 	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2471 		return 810000;
2472 	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2473 		return 540000;
2474 	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2475 		return 270000;
2476 	case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2477 		return 162000;
2478 	}
2479 }
2480 
2481 static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2482 {
2483 	if (!devdata || devdata->i915->vbt.version < 216)
2484 		return 0;
2485 
2486 	if (devdata->i915->vbt.version >= 230)
2487 		return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
2488 	else
2489 		return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
2490 }
2491 
2492 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2493 				 enum port port)
2494 {
2495 	struct drm_i915_private *i915 = devdata->i915;
2496 	bool is_hdmi;
2497 
2498 	if (port != PORT_A || DISPLAY_VER(i915) >= 12)
2499 		return;
2500 
2501 	if (!intel_bios_encoder_supports_dvi(devdata))
2502 		return;
2503 
2504 	is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2505 
2506 	drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
2507 		    is_hdmi ? "/HDMI" : "");
2508 
2509 	devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2510 	devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2511 }
2512 
2513 static bool
2514 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2515 {
2516 	return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2517 }
2518 
2519 bool
2520 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2521 {
2522 	return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2523 }
2524 
2525 bool
2526 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2527 {
2528 	return intel_bios_encoder_supports_dvi(devdata) &&
2529 		(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2530 }
2531 
2532 bool
2533 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2534 {
2535 	return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2536 }
2537 
2538 static bool
2539 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2540 {
2541 	return intel_bios_encoder_supports_dp(devdata) &&
2542 		devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2543 }
2544 
2545 static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2546 {
2547 	if (!devdata || devdata->i915->vbt.version < 158)
2548 		return -1;
2549 
2550 	return devdata->child.hdmi_level_shifter_value;
2551 }
2552 
2553 static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2554 {
2555 	if (!devdata || devdata->i915->vbt.version < 204)
2556 		return 0;
2557 
2558 	switch (devdata->child.hdmi_max_data_rate) {
2559 	default:
2560 		MISSING_CASE(devdata->child.hdmi_max_data_rate);
2561 		fallthrough;
2562 	case HDMI_MAX_DATA_RATE_PLATFORM:
2563 		return 0;
2564 	case HDMI_MAX_DATA_RATE_594:
2565 		return 594000;
2566 	case HDMI_MAX_DATA_RATE_340:
2567 		return 340000;
2568 	case HDMI_MAX_DATA_RATE_300:
2569 		return 300000;
2570 	case HDMI_MAX_DATA_RATE_297:
2571 		return 297000;
2572 	case HDMI_MAX_DATA_RATE_165:
2573 		return 165000;
2574 	}
2575 }
2576 
2577 static bool is_port_valid(struct drm_i915_private *i915, enum port port)
2578 {
2579 	/*
2580 	 * On some ICL SKUs port F is not present, but broken VBTs mark
2581 	 * the port as present. Only try to initialize port F for the
2582 	 * SKUs that may actually have it.
2583 	 */
2584 	if (port == PORT_F && IS_ICELAKE(i915))
2585 		return IS_ICL_WITH_PORT_F(i915);
2586 
2587 	return true;
2588 }
2589 
2590 static void print_ddi_port(const struct intel_bios_encoder_data *devdata,
2591 			   enum port port)
2592 {
2593 	struct drm_i915_private *i915 = devdata->i915;
2594 	const struct child_device_config *child = &devdata->child;
2595 	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
2596 	int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2597 
2598 	is_dvi = intel_bios_encoder_supports_dvi(devdata);
2599 	is_dp = intel_bios_encoder_supports_dp(devdata);
2600 	is_crt = intel_bios_encoder_supports_crt(devdata);
2601 	is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2602 	is_edp = intel_bios_encoder_supports_edp(devdata);
2603 
2604 	supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2605 	supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2606 
2607 	drm_dbg_kms(&i915->drm,
2608 		    "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2609 		    port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
2610 		    HAS_LSPCON(i915) && child->lspcon,
2611 		    supports_typec_usb, supports_tbt,
2612 		    devdata->dsc != NULL);
2613 
2614 	hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata);
2615 	if (hdmi_level_shift >= 0) {
2616 		drm_dbg_kms(&i915->drm,
2617 			    "Port %c VBT HDMI level shift: %d\n",
2618 			    port_name(port), hdmi_level_shift);
2619 	}
2620 
2621 	max_tmds_clock = _intel_bios_max_tmds_clock(devdata);
2622 	if (max_tmds_clock)
2623 		drm_dbg_kms(&i915->drm,
2624 			    "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2625 			    port_name(port), max_tmds_clock);
2626 
2627 	/* I_boost config for SKL and above */
2628 	dp_boost_level = intel_bios_encoder_dp_boost_level(devdata);
2629 	if (dp_boost_level)
2630 		drm_dbg_kms(&i915->drm,
2631 			    "Port %c VBT (e)DP boost level: %d\n",
2632 			    port_name(port), dp_boost_level);
2633 
2634 	hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata);
2635 	if (hdmi_boost_level)
2636 		drm_dbg_kms(&i915->drm,
2637 			    "Port %c VBT HDMI boost level: %d\n",
2638 			    port_name(port), hdmi_boost_level);
2639 
2640 	dp_max_link_rate = _intel_bios_dp_max_link_rate(devdata);
2641 	if (dp_max_link_rate)
2642 		drm_dbg_kms(&i915->drm,
2643 			    "Port %c VBT DP max link rate: %d\n",
2644 			    port_name(port), dp_max_link_rate);
2645 }
2646 
2647 static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
2648 {
2649 	struct drm_i915_private *i915 = devdata->i915;
2650 	const struct child_device_config *child = &devdata->child;
2651 	enum port port;
2652 
2653 	port = dvo_port_to_port(i915, child->dvo_port);
2654 	if (port == PORT_NONE)
2655 		return;
2656 
2657 	if (!is_port_valid(i915, port)) {
2658 		drm_dbg_kms(&i915->drm,
2659 			    "VBT reports port %c as supported, but that can't be true: skipping\n",
2660 			    port_name(port));
2661 		return;
2662 	}
2663 
2664 	if (i915->vbt.ports[port]) {
2665 		drm_dbg_kms(&i915->drm,
2666 			    "More than one child device for port %c in VBT, using the first.\n",
2667 			    port_name(port));
2668 		return;
2669 	}
2670 
2671 	sanitize_device_type(devdata, port);
2672 
2673 	if (intel_bios_encoder_supports_dvi(devdata))
2674 		sanitize_ddc_pin(devdata, port);
2675 
2676 	if (intel_bios_encoder_supports_dp(devdata))
2677 		sanitize_aux_ch(devdata, port);
2678 
2679 	i915->vbt.ports[port] = devdata;
2680 }
2681 
2682 static bool has_ddi_port_info(struct drm_i915_private *i915)
2683 {
2684 	return DISPLAY_VER(i915) >= 5 || IS_G4X(i915);
2685 }
2686 
2687 static void parse_ddi_ports(struct drm_i915_private *i915)
2688 {
2689 	struct intel_bios_encoder_data *devdata;
2690 	enum port port;
2691 
2692 	if (!has_ddi_port_info(i915))
2693 		return;
2694 
2695 	list_for_each_entry(devdata, &i915->vbt.display_devices, node)
2696 		parse_ddi_port(devdata);
2697 
2698 	for_each_port(port) {
2699 		if (i915->vbt.ports[port])
2700 			print_ddi_port(i915->vbt.ports[port], port);
2701 	}
2702 }
2703 
2704 static void
2705 parse_general_definitions(struct drm_i915_private *i915)
2706 {
2707 	const struct bdb_general_definitions *defs;
2708 	struct intel_bios_encoder_data *devdata;
2709 	const struct child_device_config *child;
2710 	int i, child_device_num;
2711 	u8 expected_size;
2712 	u16 block_size;
2713 	int bus_pin;
2714 
2715 	defs = find_section(i915, BDB_GENERAL_DEFINITIONS);
2716 	if (!defs) {
2717 		drm_dbg_kms(&i915->drm,
2718 			    "No general definition block is found, no devices defined.\n");
2719 		return;
2720 	}
2721 
2722 	block_size = get_blocksize(defs);
2723 	if (block_size < sizeof(*defs)) {
2724 		drm_dbg_kms(&i915->drm,
2725 			    "General definitions block too small (%u)\n",
2726 			    block_size);
2727 		return;
2728 	}
2729 
2730 	bus_pin = defs->crt_ddc_gmbus_pin;
2731 	drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2732 	if (intel_gmbus_is_valid_pin(i915, bus_pin))
2733 		i915->vbt.crt_ddc_pin = bus_pin;
2734 
2735 	if (i915->vbt.version < 106) {
2736 		expected_size = 22;
2737 	} else if (i915->vbt.version < 111) {
2738 		expected_size = 27;
2739 	} else if (i915->vbt.version < 195) {
2740 		expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2741 	} else if (i915->vbt.version == 195) {
2742 		expected_size = 37;
2743 	} else if (i915->vbt.version <= 215) {
2744 		expected_size = 38;
2745 	} else if (i915->vbt.version <= 237) {
2746 		expected_size = 39;
2747 	} else {
2748 		expected_size = sizeof(*child);
2749 		BUILD_BUG_ON(sizeof(*child) < 39);
2750 		drm_dbg(&i915->drm,
2751 			"Expected child device config size for VBT version %u not known; assuming %u\n",
2752 			i915->vbt.version, expected_size);
2753 	}
2754 
2755 	/* Flag an error for unexpected size, but continue anyway. */
2756 	if (defs->child_dev_size != expected_size)
2757 		drm_err(&i915->drm,
2758 			"Unexpected child device config size %u (expected %u for VBT version %u)\n",
2759 			defs->child_dev_size, expected_size, i915->vbt.version);
2760 
2761 	/* The legacy sized child device config is the minimum we need. */
2762 	if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2763 		drm_dbg_kms(&i915->drm,
2764 			    "Child device config size %u is too small.\n",
2765 			    defs->child_dev_size);
2766 		return;
2767 	}
2768 
2769 	/* get the number of child device */
2770 	child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2771 
2772 	for (i = 0; i < child_device_num; i++) {
2773 		child = child_device_ptr(defs, i);
2774 		if (!child->device_type)
2775 			continue;
2776 
2777 		drm_dbg_kms(&i915->drm,
2778 			    "Found VBT child device with type 0x%x\n",
2779 			    child->device_type);
2780 
2781 		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2782 		if (!devdata)
2783 			break;
2784 
2785 		devdata->i915 = i915;
2786 
2787 		/*
2788 		 * Copy as much as we know (sizeof) and is available
2789 		 * (child_dev_size) of the child device config. Accessing the
2790 		 * data must depend on VBT version.
2791 		 */
2792 		memcpy(&devdata->child, child,
2793 		       min_t(size_t, defs->child_dev_size, sizeof(*child)));
2794 
2795 		list_add_tail(&devdata->node, &i915->vbt.display_devices);
2796 	}
2797 
2798 	if (list_empty(&i915->vbt.display_devices))
2799 		drm_dbg_kms(&i915->drm,
2800 			    "no child dev is parsed from VBT\n");
2801 }
2802 
2803 /* Common defaults which may be overridden by VBT. */
2804 static void
2805 init_vbt_defaults(struct drm_i915_private *i915)
2806 {
2807 	i915->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2808 
2809 	/* general features */
2810 	i915->vbt.int_tv_support = 1;
2811 	i915->vbt.int_crt_support = 1;
2812 
2813 	/* driver features */
2814 	i915->vbt.int_lvds_support = 1;
2815 
2816 	/* Default to using SSC */
2817 	i915->vbt.lvds_use_ssc = 1;
2818 	/*
2819 	 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2820 	 * clock for LVDS.
2821 	 */
2822 	i915->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2823 							   !HAS_PCH_SPLIT(i915));
2824 	drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2825 		    i915->vbt.lvds_ssc_freq);
2826 }
2827 
2828 /* Common defaults which may be overridden by VBT. */
2829 static void
2830 init_vbt_panel_defaults(struct intel_panel *panel)
2831 {
2832 	/* Default to having backlight */
2833 	panel->vbt.backlight.present = true;
2834 
2835 	/* LFP panel data */
2836 	panel->vbt.lvds_dither = true;
2837 }
2838 
2839 /* Defaults to initialize only if there is no VBT. */
2840 static void
2841 init_vbt_missing_defaults(struct drm_i915_private *i915)
2842 {
2843 	enum port port;
2844 	int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2845 		    BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2846 
2847 	if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2848 		return;
2849 
2850 	for_each_port_masked(port, ports) {
2851 		struct intel_bios_encoder_data *devdata;
2852 		struct child_device_config *child;
2853 		enum phy phy = intel_port_to_phy(i915, port);
2854 
2855 		/*
2856 		 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2857 		 * to detect it.
2858 		 */
2859 		if (intel_phy_is_tc(i915, phy))
2860 			continue;
2861 
2862 		/* Create fake child device config */
2863 		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2864 		if (!devdata)
2865 			break;
2866 
2867 		devdata->i915 = i915;
2868 		child = &devdata->child;
2869 
2870 		if (port == PORT_F)
2871 			child->dvo_port = DVO_PORT_HDMIF;
2872 		else if (port == PORT_E)
2873 			child->dvo_port = DVO_PORT_HDMIE;
2874 		else
2875 			child->dvo_port = DVO_PORT_HDMIA + port;
2876 
2877 		if (port != PORT_A && port != PORT_E)
2878 			child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2879 
2880 		if (port != PORT_E)
2881 			child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2882 
2883 		if (port == PORT_A)
2884 			child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2885 
2886 		list_add_tail(&devdata->node, &i915->vbt.display_devices);
2887 
2888 		drm_dbg_kms(&i915->drm,
2889 			    "Generating default VBT child device with type 0x04%x on port %c\n",
2890 			    child->device_type, port_name(port));
2891 	}
2892 
2893 	/* Bypass some minimum baseline VBT version checks */
2894 	i915->vbt.version = 155;
2895 }
2896 
2897 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2898 {
2899 	const void *_vbt = vbt;
2900 
2901 	return _vbt + vbt->bdb_offset;
2902 }
2903 
2904 /**
2905  * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2906  * @buf:	pointer to a buffer to validate
2907  * @size:	size of the buffer
2908  *
2909  * Returns true on valid VBT.
2910  */
2911 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2912 {
2913 	const struct vbt_header *vbt = buf;
2914 	const struct bdb_header *bdb;
2915 
2916 	if (!vbt)
2917 		return false;
2918 
2919 	if (sizeof(struct vbt_header) > size) {
2920 		DRM_DEBUG_DRIVER("VBT header incomplete\n");
2921 		return false;
2922 	}
2923 
2924 	if (memcmp(vbt->signature, "$VBT", 4)) {
2925 		DRM_DEBUG_DRIVER("VBT invalid signature\n");
2926 		return false;
2927 	}
2928 
2929 	if (vbt->vbt_size > size) {
2930 		DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2931 		return false;
2932 	}
2933 
2934 	size = vbt->vbt_size;
2935 
2936 	if (range_overflows_t(size_t,
2937 			      vbt->bdb_offset,
2938 			      sizeof(struct bdb_header),
2939 			      size)) {
2940 		DRM_DEBUG_DRIVER("BDB header incomplete\n");
2941 		return false;
2942 	}
2943 
2944 	bdb = get_bdb_header(vbt);
2945 	if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2946 		DRM_DEBUG_DRIVER("BDB incomplete\n");
2947 		return false;
2948 	}
2949 
2950 	return vbt;
2951 }
2952 
2953 static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
2954 {
2955 	u32 count, data, found, store = 0;
2956 	u32 static_region, oprom_offset;
2957 	u32 oprom_size = 0x200000;
2958 	u16 vbt_size;
2959 	u32 *vbt;
2960 
2961 	static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
2962 	static_region &= OPTIONROM_SPI_REGIONID_MASK;
2963 	intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region);
2964 
2965 	oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET);
2966 	oprom_offset &= OROM_OFFSET_MASK;
2967 
2968 	for (count = 0; count < oprom_size; count += 4) {
2969 		intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, oprom_offset + count);
2970 		data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
2971 
2972 		if (data == *((const u32 *)"$VBT")) {
2973 			found = oprom_offset + count;
2974 			break;
2975 		}
2976 	}
2977 
2978 	if (count >= oprom_size)
2979 		goto err_not_found;
2980 
2981 	/* Get VBT size and allocate space for the VBT */
2982 	intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found +
2983 		   offsetof(struct vbt_header, vbt_size));
2984 	vbt_size = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
2985 	vbt_size &= 0xffff;
2986 
2987 	vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
2988 	if (!vbt)
2989 		goto err_not_found;
2990 
2991 	for (count = 0; count < vbt_size; count += 4) {
2992 		intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + count);
2993 		data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
2994 		*(vbt + store++) = data;
2995 	}
2996 
2997 	if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2998 		goto err_free_vbt;
2999 
3000 	drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
3001 
3002 	return (struct vbt_header *)vbt;
3003 
3004 err_free_vbt:
3005 	kfree(vbt);
3006 err_not_found:
3007 	return NULL;
3008 }
3009 
3010 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
3011 {
3012 	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
3013 	void __iomem *p = NULL, *oprom;
3014 	struct vbt_header *vbt;
3015 	u16 vbt_size;
3016 	size_t i, size;
3017 
3018 	oprom = pci_map_rom(pdev, &size);
3019 	if (!oprom)
3020 		return NULL;
3021 
3022 	/* Scour memory looking for the VBT signature. */
3023 	for (i = 0; i + 4 < size; i += 4) {
3024 		if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
3025 			continue;
3026 
3027 		p = oprom + i;
3028 		size -= i;
3029 		break;
3030 	}
3031 
3032 	if (!p)
3033 		goto err_unmap_oprom;
3034 
3035 	if (sizeof(struct vbt_header) > size) {
3036 		drm_dbg(&i915->drm, "VBT header incomplete\n");
3037 		goto err_unmap_oprom;
3038 	}
3039 
3040 	vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
3041 	if (vbt_size > size) {
3042 		drm_dbg(&i915->drm,
3043 			"VBT incomplete (vbt_size overflows)\n");
3044 		goto err_unmap_oprom;
3045 	}
3046 
3047 	/* The rest will be validated by intel_bios_is_valid_vbt() */
3048 	vbt = kmalloc(vbt_size, GFP_KERNEL);
3049 	if (!vbt)
3050 		goto err_unmap_oprom;
3051 
3052 	memcpy_fromio(vbt, p, vbt_size);
3053 
3054 	if (!intel_bios_is_valid_vbt(vbt, vbt_size))
3055 		goto err_free_vbt;
3056 
3057 	pci_unmap_rom(pdev, oprom);
3058 
3059 	drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
3060 
3061 	return vbt;
3062 
3063 err_free_vbt:
3064 	kfree(vbt);
3065 err_unmap_oprom:
3066 	pci_unmap_rom(pdev, oprom);
3067 
3068 	return NULL;
3069 }
3070 
3071 /**
3072  * intel_bios_init - find VBT and initialize settings from the BIOS
3073  * @i915: i915 device instance
3074  *
3075  * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
3076  * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
3077  * initialize some defaults if the VBT is not present at all.
3078  */
3079 void intel_bios_init(struct drm_i915_private *i915)
3080 {
3081 	const struct vbt_header *vbt = i915->opregion.vbt;
3082 	struct vbt_header *oprom_vbt = NULL;
3083 	const struct bdb_header *bdb;
3084 
3085 	INIT_LIST_HEAD(&i915->vbt.display_devices);
3086 	INIT_LIST_HEAD(&i915->vbt.bdb_blocks);
3087 
3088 	if (!HAS_DISPLAY(i915)) {
3089 		drm_dbg_kms(&i915->drm,
3090 			    "Skipping VBT init due to disabled display.\n");
3091 		return;
3092 	}
3093 
3094 	init_vbt_defaults(i915);
3095 
3096 	/*
3097 	 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
3098 	 * PCI mapping
3099 	 */
3100 	if (!vbt && IS_DGFX(i915)) {
3101 		oprom_vbt = spi_oprom_get_vbt(i915);
3102 		vbt = oprom_vbt;
3103 	}
3104 
3105 	if (!vbt) {
3106 		oprom_vbt = oprom_get_vbt(i915);
3107 		vbt = oprom_vbt;
3108 	}
3109 
3110 	if (!vbt)
3111 		goto out;
3112 
3113 	bdb = get_bdb_header(vbt);
3114 	i915->vbt.version = bdb->version;
3115 
3116 	drm_dbg_kms(&i915->drm,
3117 		    "VBT signature \"%.*s\", BDB version %d\n",
3118 		    (int)sizeof(vbt->signature), vbt->signature, i915->vbt.version);
3119 
3120 	init_bdb_blocks(i915, bdb);
3121 
3122 	/* Grab useful general definitions */
3123 	parse_general_features(i915);
3124 	parse_general_definitions(i915);
3125 	parse_driver_features(i915);
3126 
3127 	/* Depends on child device list */
3128 	parse_compression_parameters(i915);
3129 
3130 out:
3131 	if (!vbt) {
3132 		drm_info(&i915->drm,
3133 			 "Failed to find VBIOS tables (VBT)\n");
3134 		init_vbt_missing_defaults(i915);
3135 	}
3136 
3137 	/* Further processing on pre-parsed or generated child device data */
3138 	parse_sdvo_device_mapping(i915);
3139 	parse_ddi_ports(i915);
3140 
3141 	kfree(oprom_vbt);
3142 }
3143 
3144 void intel_bios_init_panel(struct drm_i915_private *i915,
3145 			   struct intel_panel *panel,
3146 			   const struct intel_bios_encoder_data *devdata,
3147 			   const struct edid *edid)
3148 {
3149 	init_vbt_panel_defaults(panel);
3150 
3151 	panel->vbt.panel_type = get_panel_type(i915, devdata, edid);
3152 
3153 	parse_panel_options(i915, panel);
3154 	parse_generic_dtd(i915, panel);
3155 	parse_lfp_data(i915, panel);
3156 	parse_lfp_backlight(i915, panel);
3157 	parse_sdvo_panel_data(i915, panel);
3158 	parse_panel_driver_features(i915, panel);
3159 	parse_power_conservation_features(i915, panel);
3160 	parse_edp(i915, panel);
3161 	parse_psr(i915, panel);
3162 	parse_mipi_config(i915, panel);
3163 	parse_mipi_sequence(i915, panel);
3164 }
3165 
3166 /**
3167  * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
3168  * @i915: i915 device instance
3169  */
3170 void intel_bios_driver_remove(struct drm_i915_private *i915)
3171 {
3172 	struct intel_bios_encoder_data *devdata, *nd;
3173 	struct bdb_block_entry *entry, *ne;
3174 
3175 	list_for_each_entry_safe(devdata, nd, &i915->vbt.display_devices, node) {
3176 		list_del(&devdata->node);
3177 		kfree(devdata->dsc);
3178 		kfree(devdata);
3179 	}
3180 
3181 	list_for_each_entry_safe(entry, ne, &i915->vbt.bdb_blocks, node) {
3182 		list_del(&entry->node);
3183 		kfree(entry);
3184 	}
3185 }
3186 
3187 void intel_bios_fini_panel(struct intel_panel *panel)
3188 {
3189 	kfree(panel->vbt.sdvo_lvds_vbt_mode);
3190 	panel->vbt.sdvo_lvds_vbt_mode = NULL;
3191 	kfree(panel->vbt.lfp_lvds_vbt_mode);
3192 	panel->vbt.lfp_lvds_vbt_mode = NULL;
3193 	kfree(panel->vbt.dsi.data);
3194 	panel->vbt.dsi.data = NULL;
3195 	kfree(panel->vbt.dsi.pps);
3196 	panel->vbt.dsi.pps = NULL;
3197 	kfree(panel->vbt.dsi.config);
3198 	panel->vbt.dsi.config = NULL;
3199 	kfree(panel->vbt.dsi.deassert_seq);
3200 	panel->vbt.dsi.deassert_seq = NULL;
3201 }
3202 
3203 /**
3204  * intel_bios_is_tv_present - is integrated TV present in VBT
3205  * @i915: i915 device instance
3206  *
3207  * Return true if TV is present. If no child devices were parsed from VBT,
3208  * assume TV is present.
3209  */
3210 bool intel_bios_is_tv_present(struct drm_i915_private *i915)
3211 {
3212 	const struct intel_bios_encoder_data *devdata;
3213 	const struct child_device_config *child;
3214 
3215 	if (!i915->vbt.int_tv_support)
3216 		return false;
3217 
3218 	if (list_empty(&i915->vbt.display_devices))
3219 		return true;
3220 
3221 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
3222 		child = &devdata->child;
3223 
3224 		/*
3225 		 * If the device type is not TV, continue.
3226 		 */
3227 		switch (child->device_type) {
3228 		case DEVICE_TYPE_INT_TV:
3229 		case DEVICE_TYPE_TV:
3230 		case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
3231 			break;
3232 		default:
3233 			continue;
3234 		}
3235 		/* Only when the addin_offset is non-zero, it is regarded
3236 		 * as present.
3237 		 */
3238 		if (child->addin_offset)
3239 			return true;
3240 	}
3241 
3242 	return false;
3243 }
3244 
3245 /**
3246  * intel_bios_is_lvds_present - is LVDS present in VBT
3247  * @i915:	i915 device instance
3248  * @i2c_pin:	i2c pin for LVDS if present
3249  *
3250  * Return true if LVDS is present. If no child devices were parsed from VBT,
3251  * assume LVDS is present.
3252  */
3253 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
3254 {
3255 	const struct intel_bios_encoder_data *devdata;
3256 	const struct child_device_config *child;
3257 
3258 	if (list_empty(&i915->vbt.display_devices))
3259 		return true;
3260 
3261 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
3262 		child = &devdata->child;
3263 
3264 		/* If the device type is not LFP, continue.
3265 		 * We have to check both the new identifiers as well as the
3266 		 * old for compatibility with some BIOSes.
3267 		 */
3268 		if (child->device_type != DEVICE_TYPE_INT_LFP &&
3269 		    child->device_type != DEVICE_TYPE_LFP)
3270 			continue;
3271 
3272 		if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
3273 			*i2c_pin = child->i2c_pin;
3274 
3275 		/* However, we cannot trust the BIOS writers to populate
3276 		 * the VBT correctly.  Since LVDS requires additional
3277 		 * information from AIM blocks, a non-zero addin offset is
3278 		 * a good indicator that the LVDS is actually present.
3279 		 */
3280 		if (child->addin_offset)
3281 			return true;
3282 
3283 		/* But even then some BIOS writers perform some black magic
3284 		 * and instantiate the device without reference to any
3285 		 * additional data.  Trust that if the VBT was written into
3286 		 * the OpRegion then they have validated the LVDS's existence.
3287 		 */
3288 		if (i915->opregion.vbt)
3289 			return true;
3290 	}
3291 
3292 	return false;
3293 }
3294 
3295 /**
3296  * intel_bios_is_port_present - is the specified digital port present
3297  * @i915:	i915 device instance
3298  * @port:	port to check
3299  *
3300  * Return true if the device in %port is present.
3301  */
3302 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
3303 {
3304 	if (WARN_ON(!has_ddi_port_info(i915)))
3305 		return true;
3306 
3307 	return i915->vbt.ports[port];
3308 }
3309 
3310 /**
3311  * intel_bios_is_port_edp - is the device in given port eDP
3312  * @i915:	i915 device instance
3313  * @port:	port to check
3314  *
3315  * Return true if the device in %port is eDP.
3316  */
3317 bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port)
3318 {
3319 	const struct intel_bios_encoder_data *devdata =
3320 		intel_bios_encoder_data_lookup(i915, port);
3321 
3322 	return devdata && intel_bios_encoder_supports_edp(devdata);
3323 }
3324 
3325 static bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3326 {
3327 	const struct child_device_config *child = &devdata->child;
3328 
3329 	if (!intel_bios_encoder_supports_dp(devdata) ||
3330 	    !intel_bios_encoder_supports_hdmi(devdata))
3331 		return false;
3332 
3333 	if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
3334 		return true;
3335 
3336 	/* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3337 	if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
3338 	    child->aux_channel != 0)
3339 		return true;
3340 
3341 	return false;
3342 }
3343 
3344 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
3345 				     enum port port)
3346 {
3347 	const struct intel_bios_encoder_data *devdata =
3348 		intel_bios_encoder_data_lookup(i915, port);
3349 
3350 	return devdata && intel_bios_encoder_supports_dp_dual_mode(devdata);
3351 }
3352 
3353 /**
3354  * intel_bios_is_dsi_present - is DSI present in VBT
3355  * @i915:	i915 device instance
3356  * @port:	port for DSI if present
3357  *
3358  * Return true if DSI is present, and return the port in %port.
3359  */
3360 bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
3361 			       enum port *port)
3362 {
3363 	const struct intel_bios_encoder_data *devdata;
3364 	const struct child_device_config *child;
3365 	u8 dvo_port;
3366 
3367 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
3368 		child = &devdata->child;
3369 
3370 		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3371 			continue;
3372 
3373 		dvo_port = child->dvo_port;
3374 
3375 		if (dvo_port == DVO_PORT_MIPIA ||
3376 		    (dvo_port == DVO_PORT_MIPIB && DISPLAY_VER(i915) >= 11) ||
3377 		    (dvo_port == DVO_PORT_MIPIC && DISPLAY_VER(i915) < 11)) {
3378 			if (port)
3379 				*port = dvo_port - DVO_PORT_MIPIA;
3380 			return true;
3381 		} else if (dvo_port == DVO_PORT_MIPIB ||
3382 			   dvo_port == DVO_PORT_MIPIC ||
3383 			   dvo_port == DVO_PORT_MIPID) {
3384 			drm_dbg_kms(&i915->drm,
3385 				    "VBT has unsupported DSI port %c\n",
3386 				    port_name(dvo_port - DVO_PORT_MIPIA));
3387 		}
3388 	}
3389 
3390 	return false;
3391 }
3392 
3393 static void fill_dsc(struct intel_crtc_state *crtc_state,
3394 		     struct dsc_compression_parameters_entry *dsc,
3395 		     int dsc_max_bpc)
3396 {
3397 	struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3398 	int bpc = 8;
3399 
3400 	vdsc_cfg->dsc_version_major = dsc->version_major;
3401 	vdsc_cfg->dsc_version_minor = dsc->version_minor;
3402 
3403 	if (dsc->support_12bpc && dsc_max_bpc >= 12)
3404 		bpc = 12;
3405 	else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3406 		bpc = 10;
3407 	else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3408 		bpc = 8;
3409 	else
3410 		DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
3411 			      dsc_max_bpc);
3412 
3413 	crtc_state->pipe_bpp = bpc * 3;
3414 
3415 	crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
3416 					     VBT_DSC_MAX_BPP(dsc->max_bpp));
3417 
3418 	/*
3419 	 * FIXME: This is ugly, and slice count should take DSC engine
3420 	 * throughput etc. into account.
3421 	 *
3422 	 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3423 	 */
3424 	if (dsc->slices_per_line & BIT(2)) {
3425 		crtc_state->dsc.slice_count = 4;
3426 	} else if (dsc->slices_per_line & BIT(1)) {
3427 		crtc_state->dsc.slice_count = 2;
3428 	} else {
3429 		/* FIXME */
3430 		if (!(dsc->slices_per_line & BIT(0)))
3431 			DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
3432 
3433 		crtc_state->dsc.slice_count = 1;
3434 	}
3435 
3436 	if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3437 	    crtc_state->dsc.slice_count != 0)
3438 		DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
3439 			      crtc_state->hw.adjusted_mode.crtc_hdisplay,
3440 			      crtc_state->dsc.slice_count);
3441 
3442 	/*
3443 	 * The VBT rc_buffer_block_size and rc_buffer_size definitions
3444 	 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3445 	 */
3446 	vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
3447 							    dsc->rc_buffer_size);
3448 
3449 	/* FIXME: DSI spec says bpc + 1 for this one */
3450 	vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3451 
3452 	vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3453 
3454 	vdsc_cfg->slice_height = dsc->slice_height;
3455 }
3456 
3457 /* FIXME: initially DSI specific */
3458 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3459 			       struct intel_crtc_state *crtc_state,
3460 			       int dsc_max_bpc)
3461 {
3462 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3463 	const struct intel_bios_encoder_data *devdata;
3464 	const struct child_device_config *child;
3465 
3466 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
3467 		child = &devdata->child;
3468 
3469 		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3470 			continue;
3471 
3472 		if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
3473 			if (!devdata->dsc)
3474 				return false;
3475 
3476 			if (crtc_state)
3477 				fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
3478 
3479 			return true;
3480 		}
3481 	}
3482 
3483 	return false;
3484 }
3485 
3486 /**
3487  * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
3488  * @i915:	i915 device instance
3489  * @port:	port to check
3490  *
3491  * Return true if HPD should be inverted for %port.
3492  */
3493 bool
3494 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
3495 				enum port port)
3496 {
3497 	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
3498 
3499 	if (drm_WARN_ON_ONCE(&i915->drm,
3500 			     !IS_GEMINILAKE(i915) && !IS_BROXTON(i915)))
3501 		return false;
3502 
3503 	return devdata && devdata->child.hpd_invert;
3504 }
3505 
3506 /**
3507  * intel_bios_is_lspcon_present - if LSPCON is attached on %port
3508  * @i915:	i915 device instance
3509  * @port:	port to check
3510  *
3511  * Return true if LSPCON is present on this port
3512  */
3513 bool
3514 intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
3515 			     enum port port)
3516 {
3517 	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
3518 
3519 	return HAS_LSPCON(i915) && devdata && devdata->child.lspcon;
3520 }
3521 
3522 /**
3523  * intel_bios_is_lane_reversal_needed - if lane reversal needed on port
3524  * @i915:       i915 device instance
3525  * @port:       port to check
3526  *
3527  * Return true if port requires lane reversal
3528  */
3529 bool
3530 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
3531 				   enum port port)
3532 {
3533 	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
3534 
3535 	return devdata && devdata->child.lane_reversal;
3536 }
3537 
3538 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
3539 				   enum port port)
3540 {
3541 	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
3542 	enum aux_ch aux_ch;
3543 
3544 	if (!devdata || !devdata->child.aux_channel) {
3545 		aux_ch = (enum aux_ch)port;
3546 
3547 		drm_dbg_kms(&i915->drm,
3548 			    "using AUX %c for port %c (platform default)\n",
3549 			    aux_ch_name(aux_ch), port_name(port));
3550 		return aux_ch;
3551 	}
3552 
3553 	/*
3554 	 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3555 	 * map to DDI A,B,TC1,TC2 respectively.
3556 	 *
3557 	 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3558 	 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3559 	 */
3560 	switch (devdata->child.aux_channel) {
3561 	case DP_AUX_A:
3562 		aux_ch = AUX_CH_A;
3563 		break;
3564 	case DP_AUX_B:
3565 		if (IS_ALDERLAKE_S(i915))
3566 			aux_ch = AUX_CH_USBC1;
3567 		else
3568 			aux_ch = AUX_CH_B;
3569 		break;
3570 	case DP_AUX_C:
3571 		if (IS_ALDERLAKE_S(i915))
3572 			aux_ch = AUX_CH_USBC2;
3573 		else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
3574 			aux_ch = AUX_CH_USBC1;
3575 		else
3576 			aux_ch = AUX_CH_C;
3577 		break;
3578 	case DP_AUX_D:
3579 		if (DISPLAY_VER(i915) == 13)
3580 			aux_ch = AUX_CH_D_XELPD;
3581 		else if (IS_ALDERLAKE_S(i915))
3582 			aux_ch = AUX_CH_USBC3;
3583 		else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
3584 			aux_ch = AUX_CH_USBC2;
3585 		else
3586 			aux_ch = AUX_CH_D;
3587 		break;
3588 	case DP_AUX_E:
3589 		if (DISPLAY_VER(i915) == 13)
3590 			aux_ch = AUX_CH_E_XELPD;
3591 		else if (IS_ALDERLAKE_S(i915))
3592 			aux_ch = AUX_CH_USBC4;
3593 		else
3594 			aux_ch = AUX_CH_E;
3595 		break;
3596 	case DP_AUX_F:
3597 		if (DISPLAY_VER(i915) == 13)
3598 			aux_ch = AUX_CH_USBC1;
3599 		else
3600 			aux_ch = AUX_CH_F;
3601 		break;
3602 	case DP_AUX_G:
3603 		if (DISPLAY_VER(i915) == 13)
3604 			aux_ch = AUX_CH_USBC2;
3605 		else
3606 			aux_ch = AUX_CH_G;
3607 		break;
3608 	case DP_AUX_H:
3609 		if (DISPLAY_VER(i915) == 13)
3610 			aux_ch = AUX_CH_USBC3;
3611 		else
3612 			aux_ch = AUX_CH_H;
3613 		break;
3614 	case DP_AUX_I:
3615 		if (DISPLAY_VER(i915) == 13)
3616 			aux_ch = AUX_CH_USBC4;
3617 		else
3618 			aux_ch = AUX_CH_I;
3619 		break;
3620 	default:
3621 		MISSING_CASE(devdata->child.aux_channel);
3622 		aux_ch = AUX_CH_A;
3623 		break;
3624 	}
3625 
3626 	drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n",
3627 		    aux_ch_name(aux_ch), port_name(port));
3628 
3629 	return aux_ch;
3630 }
3631 
3632 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
3633 {
3634 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3635 	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
3636 
3637 	return _intel_bios_max_tmds_clock(devdata);
3638 }
3639 
3640 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
3641 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
3642 {
3643 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3644 	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
3645 
3646 	return _intel_bios_hdmi_level_shift(devdata);
3647 }
3648 
3649 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3650 {
3651 	if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
3652 		return 0;
3653 
3654 	return translate_iboost(devdata->child.dp_iboost_level);
3655 }
3656 
3657 int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3658 {
3659 	if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
3660 		return 0;
3661 
3662 	return translate_iboost(devdata->child.hdmi_iboost_level);
3663 }
3664 
3665 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
3666 {
3667 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3668 	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
3669 
3670 	return _intel_bios_dp_max_link_rate(devdata);
3671 }
3672 
3673 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
3674 {
3675 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3676 	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
3677 
3678 	if (!devdata || !devdata->child.ddc_pin)
3679 		return 0;
3680 
3681 	return map_ddc_pin(i915, devdata->child.ddc_pin);
3682 }
3683 
3684 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3685 {
3686 	return devdata->i915->vbt.version >= 195 && devdata->child.dp_usb_type_c;
3687 }
3688 
3689 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3690 {
3691 	return devdata->i915->vbt.version >= 209 && devdata->child.tbt;
3692 }
3693 
3694 const struct intel_bios_encoder_data *
3695 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3696 {
3697 	return i915->vbt.ports[port];
3698 }
3699