1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <drm/display/drm_dp_helper.h> 29 #include <drm/display/drm_dsc_helper.h> 30 31 #include "display/intel_display.h" 32 #include "display/intel_display_types.h" 33 #include "display/intel_gmbus.h" 34 35 #include "i915_drv.h" 36 #include "i915_reg.h" 37 38 #define _INTEL_BIOS_PRIVATE 39 #include "intel_vbt_defs.h" 40 41 /** 42 * DOC: Video BIOS Table (VBT) 43 * 44 * The Video BIOS Table, or VBT, provides platform and board specific 45 * configuration information to the driver that is not discoverable or available 46 * through other means. The configuration is mostly related to display 47 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 48 * the PCI ROM. 49 * 50 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 51 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 52 * contain the actual configuration information. The VBT Header, and thus the 53 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 54 * BDB Header. The data blocks are concatenated after the BDB Header. The data 55 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 56 * data. (Block 53, the MIPI Sequence Block is an exception.) 57 * 58 * The driver parses the VBT during load. The relevant information is stored in 59 * driver private data for ease of use, and the actual VBT is not read after 60 * that. 61 */ 62 63 /* Wrapper for VBT child device config */ 64 struct intel_bios_encoder_data { 65 struct drm_i915_private *i915; 66 67 struct child_device_config child; 68 struct dsc_compression_parameters_entry *dsc; 69 struct list_head node; 70 }; 71 72 #define SLAVE_ADDR1 0x70 73 #define SLAVE_ADDR2 0x72 74 75 /* Get BDB block size given a pointer to Block ID. */ 76 static u32 _get_blocksize(const u8 *block_base) 77 { 78 /* The MIPI Sequence Block v3+ has a separate size field. */ 79 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 80 return *((const u32 *)(block_base + 4)); 81 else 82 return *((const u16 *)(block_base + 1)); 83 } 84 85 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 86 static u32 get_blocksize(const void *block_data) 87 { 88 return _get_blocksize(block_data - 3); 89 } 90 91 static const void * 92 find_raw_section(const void *_bdb, enum bdb_block_id section_id) 93 { 94 const struct bdb_header *bdb = _bdb; 95 const u8 *base = _bdb; 96 int index = 0; 97 u32 total, current_size; 98 enum bdb_block_id current_id; 99 100 /* skip to first section */ 101 index += bdb->header_size; 102 total = bdb->bdb_size; 103 104 /* walk the sections looking for section_id */ 105 while (index + 3 < total) { 106 current_id = *(base + index); 107 current_size = _get_blocksize(base + index); 108 index += 3; 109 110 if (index + current_size > total) 111 return NULL; 112 113 if (current_id == section_id) 114 return base + index; 115 116 index += current_size; 117 } 118 119 return NULL; 120 } 121 122 /* 123 * Offset from the start of BDB to the start of the 124 * block data (just past the block header). 125 */ 126 static u32 block_offset(const void *bdb, enum bdb_block_id section_id) 127 { 128 const void *block; 129 130 block = find_raw_section(bdb, section_id); 131 if (!block) 132 return 0; 133 134 return block - bdb; 135 } 136 137 /* size of the block excluding the header */ 138 static u32 block_size(const void *bdb, enum bdb_block_id section_id) 139 { 140 const void *block; 141 142 block = find_raw_section(bdb, section_id); 143 if (!block) 144 return 0; 145 146 return get_blocksize(block); 147 } 148 149 struct bdb_block_entry { 150 struct list_head node; 151 enum bdb_block_id section_id; 152 u8 data[]; 153 }; 154 155 static const void * 156 find_section(struct drm_i915_private *i915, 157 enum bdb_block_id section_id) 158 { 159 struct bdb_block_entry *entry; 160 161 list_for_each_entry(entry, &i915->vbt.bdb_blocks, node) { 162 if (entry->section_id == section_id) 163 return entry->data + 3; 164 } 165 166 return NULL; 167 } 168 169 static const struct { 170 enum bdb_block_id section_id; 171 size_t min_size; 172 } bdb_blocks[] = { 173 { .section_id = BDB_GENERAL_FEATURES, 174 .min_size = sizeof(struct bdb_general_features), }, 175 { .section_id = BDB_GENERAL_DEFINITIONS, 176 .min_size = sizeof(struct bdb_general_definitions), }, 177 { .section_id = BDB_PSR, 178 .min_size = sizeof(struct bdb_psr), }, 179 { .section_id = BDB_DRIVER_FEATURES, 180 .min_size = sizeof(struct bdb_driver_features), }, 181 { .section_id = BDB_SDVO_LVDS_OPTIONS, 182 .min_size = sizeof(struct bdb_sdvo_lvds_options), }, 183 { .section_id = BDB_SDVO_PANEL_DTDS, 184 .min_size = sizeof(struct bdb_sdvo_panel_dtds), }, 185 { .section_id = BDB_EDP, 186 .min_size = sizeof(struct bdb_edp), }, 187 { .section_id = BDB_LVDS_OPTIONS, 188 .min_size = sizeof(struct bdb_lvds_options), }, 189 { .section_id = BDB_LVDS_LFP_DATA_PTRS, 190 .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), }, 191 { .section_id = BDB_LVDS_LFP_DATA, 192 .min_size = sizeof(struct bdb_lvds_lfp_data), }, 193 { .section_id = BDB_LVDS_BACKLIGHT, 194 .min_size = sizeof(struct bdb_lfp_backlight_data), }, 195 { .section_id = BDB_LFP_POWER, 196 .min_size = sizeof(struct bdb_lfp_power), }, 197 { .section_id = BDB_MIPI_CONFIG, 198 .min_size = sizeof(struct bdb_mipi_config), }, 199 { .section_id = BDB_MIPI_SEQUENCE, 200 .min_size = sizeof(struct bdb_mipi_sequence) }, 201 { .section_id = BDB_COMPRESSION_PARAMETERS, 202 .min_size = sizeof(struct bdb_compression_parameters), }, 203 { .section_id = BDB_GENERIC_DTD, 204 .min_size = sizeof(struct bdb_generic_dtd), }, 205 }; 206 207 static bool validate_lfp_data_ptrs(const void *bdb, 208 const struct bdb_lvds_lfp_data_ptrs *ptrs) 209 { 210 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size; 211 int data_block_size, lfp_data_size; 212 int i; 213 214 data_block_size = block_size(bdb, BDB_LVDS_LFP_DATA); 215 if (data_block_size == 0) 216 return false; 217 218 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */ 219 if (ptrs->lvds_entries != 3) 220 return false; 221 222 fp_timing_size = ptrs->ptr[0].fp_timing.table_size; 223 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size; 224 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size; 225 panel_name_size = ptrs->panel_name.table_size; 226 227 /* fp_timing has variable size */ 228 if (fp_timing_size < 32 || 229 dvo_timing_size != sizeof(struct lvds_dvo_timing) || 230 panel_pnp_id_size != sizeof(struct lvds_pnp_id)) 231 return false; 232 233 /* panel_name is not present in old VBTs */ 234 if (panel_name_size != 0 && 235 panel_name_size != sizeof(struct lvds_lfp_panel_name)) 236 return false; 237 238 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset; 239 if (16 * lfp_data_size > data_block_size) 240 return false; 241 242 /* 243 * Except for vlv/chv machines all real VBTs seem to have 6 244 * unaccounted bytes in the fp_timing table. And it doesn't 245 * appear to be a really intentional hole as the fp_timing 246 * 0xffff terminator is always within those 6 missing bytes. 247 */ 248 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size && 249 fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size != lfp_data_size) 250 return false; 251 252 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size > ptrs->ptr[0].dvo_timing.offset || 253 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset || 254 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size) 255 return false; 256 257 /* make sure the table entries have uniform size */ 258 for (i = 1; i < 16; i++) { 259 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size || 260 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size || 261 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size) 262 return false; 263 264 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size || 265 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size || 266 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size) 267 return false; 268 } 269 270 /* make sure the tables fit inside the data block */ 271 for (i = 0; i < 16; i++) { 272 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size || 273 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size || 274 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size) 275 return false; 276 } 277 278 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size) 279 return false; 280 281 return true; 282 } 283 284 /* make the data table offsets relative to the data block */ 285 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block) 286 { 287 struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block; 288 u32 offset; 289 int i; 290 291 offset = block_offset(bdb, BDB_LVDS_LFP_DATA); 292 293 for (i = 0; i < 16; i++) { 294 if (ptrs->ptr[i].fp_timing.offset < offset || 295 ptrs->ptr[i].dvo_timing.offset < offset || 296 ptrs->ptr[i].panel_pnp_id.offset < offset) 297 return false; 298 299 ptrs->ptr[i].fp_timing.offset -= offset; 300 ptrs->ptr[i].dvo_timing.offset -= offset; 301 ptrs->ptr[i].panel_pnp_id.offset -= offset; 302 } 303 304 if (ptrs->panel_name.table_size) { 305 if (ptrs->panel_name.offset < offset) 306 return false; 307 308 ptrs->panel_name.offset -= offset; 309 } 310 311 return validate_lfp_data_ptrs(bdb, ptrs); 312 } 313 314 static void 315 init_bdb_block(struct drm_i915_private *i915, 316 const void *bdb, enum bdb_block_id section_id, 317 size_t min_size) 318 { 319 struct bdb_block_entry *entry; 320 const void *block; 321 size_t block_size; 322 323 block = find_raw_section(bdb, section_id); 324 if (!block) 325 return; 326 327 drm_WARN(&i915->drm, min_size == 0, 328 "Block %d min_size is zero\n", section_id); 329 330 block_size = get_blocksize(block); 331 332 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3), 333 GFP_KERNEL); 334 if (!entry) 335 return; 336 337 entry->section_id = section_id; 338 memcpy(entry->data, block - 3, block_size + 3); 339 340 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n", 341 section_id, block_size, min_size); 342 343 if (section_id == BDB_LVDS_LFP_DATA_PTRS && 344 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) { 345 drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n"); 346 kfree(entry); 347 return; 348 } 349 350 list_add_tail(&entry->node, &i915->vbt.bdb_blocks); 351 } 352 353 static void init_bdb_blocks(struct drm_i915_private *i915, 354 const void *bdb) 355 { 356 int i; 357 358 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) { 359 enum bdb_block_id section_id = bdb_blocks[i].section_id; 360 size_t min_size = bdb_blocks[i].min_size; 361 362 init_bdb_block(i915, bdb, section_id, min_size); 363 } 364 } 365 366 static void 367 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 368 const struct lvds_dvo_timing *dvo_timing) 369 { 370 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 371 dvo_timing->hactive_lo; 372 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 373 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 374 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 375 ((dvo_timing->hsync_pulse_width_hi << 8) | 376 dvo_timing->hsync_pulse_width_lo); 377 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 378 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 379 380 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 381 dvo_timing->vactive_lo; 382 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 383 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 384 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 385 ((dvo_timing->vsync_pulse_width_hi << 4) | 386 dvo_timing->vsync_pulse_width_lo); 387 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 388 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 389 panel_fixed_mode->clock = dvo_timing->clock * 10; 390 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 391 392 if (dvo_timing->hsync_positive) 393 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 394 else 395 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 396 397 if (dvo_timing->vsync_positive) 398 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 399 else 400 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 401 402 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 403 dvo_timing->himage_lo; 404 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 405 dvo_timing->vimage_lo; 406 407 /* Some VBTs have bogus h/vtotal values */ 408 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 409 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 410 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 411 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 412 413 drm_mode_set_name(panel_fixed_mode); 414 } 415 416 static const struct lvds_dvo_timing * 417 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data, 418 const struct bdb_lvds_lfp_data_ptrs *ptrs, 419 int index) 420 { 421 return (const void *)data + ptrs->ptr[index].dvo_timing.offset; 422 } 423 424 static const struct lvds_fp_timing * 425 get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data, 426 const struct bdb_lvds_lfp_data_ptrs *ptrs, 427 int index) 428 { 429 return (const void *)data + ptrs->ptr[index].fp_timing.offset; 430 } 431 432 /* Parse general panel options */ 433 static void 434 parse_panel_options(struct drm_i915_private *i915) 435 { 436 const struct bdb_lvds_options *lvds_options; 437 int panel_type; 438 int drrs_mode; 439 int ret; 440 441 lvds_options = find_section(i915, BDB_LVDS_OPTIONS); 442 if (!lvds_options) 443 return; 444 445 i915->vbt.lvds_dither = lvds_options->pixel_dither; 446 447 ret = intel_opregion_get_panel_type(i915); 448 if (ret >= 0) { 449 drm_WARN_ON(&i915->drm, ret > 0xf); 450 panel_type = ret; 451 drm_dbg_kms(&i915->drm, "Panel type: %d (OpRegion)\n", 452 panel_type); 453 } else { 454 if (lvds_options->panel_type > 0xf) { 455 drm_dbg_kms(&i915->drm, 456 "Invalid VBT panel type 0x%x\n", 457 lvds_options->panel_type); 458 return; 459 } 460 panel_type = lvds_options->panel_type; 461 drm_dbg_kms(&i915->drm, "Panel type: %d (VBT)\n", 462 panel_type); 463 } 464 465 i915->vbt.panel_type = panel_type; 466 467 drrs_mode = (lvds_options->dps_panel_type_bits 468 >> (panel_type * 2)) & MODE_MASK; 469 /* 470 * VBT has static DRRS = 0 and seamless DRRS = 2. 471 * The below piece of code is required to adjust vbt.drrs_type 472 * to match the enum drrs_support_type. 473 */ 474 switch (drrs_mode) { 475 case 0: 476 i915->vbt.drrs_type = DRRS_TYPE_STATIC; 477 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n"); 478 break; 479 case 2: 480 i915->vbt.drrs_type = DRRS_TYPE_SEAMLESS; 481 drm_dbg_kms(&i915->drm, 482 "DRRS supported mode is seamless\n"); 483 break; 484 default: 485 i915->vbt.drrs_type = DRRS_TYPE_NONE; 486 drm_dbg_kms(&i915->drm, 487 "DRRS not supported (VBT input)\n"); 488 break; 489 } 490 } 491 492 /* Try to find integrated panel timing data */ 493 static void 494 parse_lfp_panel_dtd(struct drm_i915_private *i915) 495 { 496 const struct bdb_lvds_lfp_data *lvds_lfp_data; 497 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; 498 const struct lvds_dvo_timing *panel_dvo_timing; 499 const struct lvds_fp_timing *fp_timing; 500 struct drm_display_mode *panel_fixed_mode; 501 int panel_type = i915->vbt.panel_type; 502 503 lvds_lfp_data = find_section(i915, BDB_LVDS_LFP_DATA); 504 if (!lvds_lfp_data) 505 return; 506 507 lvds_lfp_data_ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS); 508 if (!lvds_lfp_data_ptrs) 509 return; 510 511 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 512 lvds_lfp_data_ptrs, 513 panel_type); 514 515 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 516 if (!panel_fixed_mode) 517 return; 518 519 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 520 521 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 522 523 drm_dbg_kms(&i915->drm, 524 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n", 525 DRM_MODE_ARG(panel_fixed_mode)); 526 527 fp_timing = get_lvds_fp_timing(lvds_lfp_data, 528 lvds_lfp_data_ptrs, 529 panel_type); 530 531 /* check the resolution, just to be sure */ 532 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 533 fp_timing->y_res == panel_fixed_mode->vdisplay) { 534 i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 535 drm_dbg_kms(&i915->drm, 536 "VBT initial LVDS value %x\n", 537 i915->vbt.bios_lvds_val); 538 } 539 } 540 541 static void 542 parse_generic_dtd(struct drm_i915_private *i915) 543 { 544 const struct bdb_generic_dtd *generic_dtd; 545 const struct generic_dtd_entry *dtd; 546 struct drm_display_mode *panel_fixed_mode; 547 int num_dtd; 548 549 generic_dtd = find_section(i915, BDB_GENERIC_DTD); 550 if (!generic_dtd) 551 return; 552 553 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 554 drm_err(&i915->drm, "GDTD size %u is too small.\n", 555 generic_dtd->gdtd_size); 556 return; 557 } else if (generic_dtd->gdtd_size != 558 sizeof(struct generic_dtd_entry)) { 559 drm_err(&i915->drm, "Unexpected GDTD size %u\n", 560 generic_dtd->gdtd_size); 561 /* DTD has unknown fields, but keep going */ 562 } 563 564 num_dtd = (get_blocksize(generic_dtd) - 565 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 566 if (i915->vbt.panel_type >= num_dtd) { 567 drm_err(&i915->drm, 568 "Panel type %d not found in table of %d DTD's\n", 569 i915->vbt.panel_type, num_dtd); 570 return; 571 } 572 573 dtd = &generic_dtd->dtd[i915->vbt.panel_type]; 574 575 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 576 if (!panel_fixed_mode) 577 return; 578 579 panel_fixed_mode->hdisplay = dtd->hactive; 580 panel_fixed_mode->hsync_start = 581 panel_fixed_mode->hdisplay + dtd->hfront_porch; 582 panel_fixed_mode->hsync_end = 583 panel_fixed_mode->hsync_start + dtd->hsync; 584 panel_fixed_mode->htotal = 585 panel_fixed_mode->hdisplay + dtd->hblank; 586 587 panel_fixed_mode->vdisplay = dtd->vactive; 588 panel_fixed_mode->vsync_start = 589 panel_fixed_mode->vdisplay + dtd->vfront_porch; 590 panel_fixed_mode->vsync_end = 591 panel_fixed_mode->vsync_start + dtd->vsync; 592 panel_fixed_mode->vtotal = 593 panel_fixed_mode->vdisplay + dtd->vblank; 594 595 panel_fixed_mode->clock = dtd->pixel_clock; 596 panel_fixed_mode->width_mm = dtd->width_mm; 597 panel_fixed_mode->height_mm = dtd->height_mm; 598 599 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 600 drm_mode_set_name(panel_fixed_mode); 601 602 if (dtd->hsync_positive_polarity) 603 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 604 else 605 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 606 607 if (dtd->vsync_positive_polarity) 608 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 609 else 610 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 611 612 drm_dbg_kms(&i915->drm, 613 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n", 614 DRM_MODE_ARG(panel_fixed_mode)); 615 616 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 617 } 618 619 static void 620 parse_panel_dtd(struct drm_i915_private *i915) 621 { 622 /* 623 * Older VBTs provided provided DTD information for internal displays 624 * through the "LFP panel DTD" block (42). As of VBT revision 229, 625 * that block is now deprecated and DTD information should be provided 626 * via a newer "generic DTD" block (58). Just to be safe, we'll 627 * try the new generic DTD block first on VBT >= 229, but still fall 628 * back to trying the old LFP block if that fails. 629 */ 630 if (i915->vbt.version >= 229) 631 parse_generic_dtd(i915); 632 if (!i915->vbt.lfp_lvds_vbt_mode) 633 parse_lfp_panel_dtd(i915); 634 } 635 636 static void 637 parse_lfp_backlight(struct drm_i915_private *i915) 638 { 639 const struct bdb_lfp_backlight_data *backlight_data; 640 const struct lfp_backlight_data_entry *entry; 641 int panel_type = i915->vbt.panel_type; 642 u16 level; 643 644 backlight_data = find_section(i915, BDB_LVDS_BACKLIGHT); 645 if (!backlight_data) 646 return; 647 648 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 649 drm_dbg_kms(&i915->drm, 650 "Unsupported backlight data entry size %u\n", 651 backlight_data->entry_size); 652 return; 653 } 654 655 entry = &backlight_data->data[panel_type]; 656 657 i915->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 658 if (!i915->vbt.backlight.present) { 659 drm_dbg_kms(&i915->drm, 660 "PWM backlight not present in VBT (type %u)\n", 661 entry->type); 662 return; 663 } 664 665 i915->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 666 if (i915->vbt.version >= 191) { 667 size_t exp_size; 668 669 if (i915->vbt.version >= 236) 670 exp_size = sizeof(struct bdb_lfp_backlight_data); 671 else if (i915->vbt.version >= 234) 672 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234; 673 else 674 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191; 675 676 if (get_blocksize(backlight_data) >= exp_size) { 677 const struct lfp_backlight_control_method *method; 678 679 method = &backlight_data->backlight_control[panel_type]; 680 i915->vbt.backlight.type = method->type; 681 i915->vbt.backlight.controller = method->controller; 682 } 683 } 684 685 i915->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 686 i915->vbt.backlight.active_low_pwm = entry->active_low_pwm; 687 688 if (i915->vbt.version >= 234) { 689 u16 min_level; 690 bool scale; 691 692 level = backlight_data->brightness_level[panel_type].level; 693 min_level = backlight_data->brightness_min_level[panel_type].level; 694 695 if (i915->vbt.version >= 236) 696 scale = backlight_data->brightness_precision_bits[panel_type] == 16; 697 else 698 scale = level > 255; 699 700 if (scale) 701 min_level = min_level / 255; 702 703 if (min_level > 255) { 704 drm_warn(&i915->drm, "Brightness min level > 255\n"); 705 level = 255; 706 } 707 i915->vbt.backlight.min_brightness = min_level; 708 709 i915->vbt.backlight.brightness_precision_bits = 710 backlight_data->brightness_precision_bits[panel_type]; 711 } else { 712 level = backlight_data->level[panel_type]; 713 i915->vbt.backlight.min_brightness = entry->min_brightness; 714 } 715 716 drm_dbg_kms(&i915->drm, 717 "VBT backlight PWM modulation frequency %u Hz, " 718 "active %s, min brightness %u, level %u, controller %u\n", 719 i915->vbt.backlight.pwm_freq_hz, 720 i915->vbt.backlight.active_low_pwm ? "low" : "high", 721 i915->vbt.backlight.min_brightness, 722 level, 723 i915->vbt.backlight.controller); 724 } 725 726 /* Try to find sdvo panel data */ 727 static void 728 parse_sdvo_panel_data(struct drm_i915_private *i915) 729 { 730 const struct bdb_sdvo_panel_dtds *dtds; 731 struct drm_display_mode *panel_fixed_mode; 732 int index; 733 734 index = i915->params.vbt_sdvo_panel_type; 735 if (index == -2) { 736 drm_dbg_kms(&i915->drm, 737 "Ignore SDVO panel mode from BIOS VBT tables.\n"); 738 return; 739 } 740 741 if (index == -1) { 742 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 743 744 sdvo_lvds_options = find_section(i915, BDB_SDVO_LVDS_OPTIONS); 745 if (!sdvo_lvds_options) 746 return; 747 748 index = sdvo_lvds_options->panel_type; 749 } 750 751 dtds = find_section(i915, BDB_SDVO_PANEL_DTDS); 752 if (!dtds) 753 return; 754 755 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 756 if (!panel_fixed_mode) 757 return; 758 759 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 760 761 i915->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 762 763 drm_dbg_kms(&i915->drm, 764 "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n", 765 DRM_MODE_ARG(panel_fixed_mode)); 766 } 767 768 static int intel_bios_ssc_frequency(struct drm_i915_private *i915, 769 bool alternate) 770 { 771 switch (DISPLAY_VER(i915)) { 772 case 2: 773 return alternate ? 66667 : 48000; 774 case 3: 775 case 4: 776 return alternate ? 100000 : 96000; 777 default: 778 return alternate ? 100000 : 120000; 779 } 780 } 781 782 static void 783 parse_general_features(struct drm_i915_private *i915) 784 { 785 const struct bdb_general_features *general; 786 787 general = find_section(i915, BDB_GENERAL_FEATURES); 788 if (!general) 789 return; 790 791 i915->vbt.int_tv_support = general->int_tv_support; 792 /* int_crt_support can't be trusted on earlier platforms */ 793 if (i915->vbt.version >= 155 && 794 (HAS_DDI(i915) || IS_VALLEYVIEW(i915))) 795 i915->vbt.int_crt_support = general->int_crt_support; 796 i915->vbt.lvds_use_ssc = general->enable_ssc; 797 i915->vbt.lvds_ssc_freq = 798 intel_bios_ssc_frequency(i915, general->ssc_freq); 799 i915->vbt.display_clock_mode = general->display_clock_mode; 800 i915->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 801 if (i915->vbt.version >= 181) { 802 i915->vbt.orientation = general->rotate_180 ? 803 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 804 DRM_MODE_PANEL_ORIENTATION_NORMAL; 805 } else { 806 i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 807 } 808 809 if (i915->vbt.version >= 249 && general->afc_startup_config) { 810 i915->vbt.override_afc_startup = true; 811 i915->vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7; 812 } 813 814 drm_dbg_kms(&i915->drm, 815 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 816 i915->vbt.int_tv_support, 817 i915->vbt.int_crt_support, 818 i915->vbt.lvds_use_ssc, 819 i915->vbt.lvds_ssc_freq, 820 i915->vbt.display_clock_mode, 821 i915->vbt.fdi_rx_polarity_inverted); 822 } 823 824 static const struct child_device_config * 825 child_device_ptr(const struct bdb_general_definitions *defs, int i) 826 { 827 return (const void *) &defs->devices[i * defs->child_dev_size]; 828 } 829 830 static void 831 parse_sdvo_device_mapping(struct drm_i915_private *i915) 832 { 833 struct sdvo_device_mapping *mapping; 834 const struct intel_bios_encoder_data *devdata; 835 const struct child_device_config *child; 836 int count = 0; 837 838 /* 839 * Only parse SDVO mappings on gens that could have SDVO. This isn't 840 * accurate and doesn't have to be, as long as it's not too strict. 841 */ 842 if (!IS_DISPLAY_VER(i915, 3, 7)) { 843 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n"); 844 return; 845 } 846 847 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 848 child = &devdata->child; 849 850 if (child->slave_addr != SLAVE_ADDR1 && 851 child->slave_addr != SLAVE_ADDR2) { 852 /* 853 * If the slave address is neither 0x70 nor 0x72, 854 * it is not a SDVO device. Skip it. 855 */ 856 continue; 857 } 858 if (child->dvo_port != DEVICE_PORT_DVOB && 859 child->dvo_port != DEVICE_PORT_DVOC) { 860 /* skip the incorrect SDVO port */ 861 drm_dbg_kms(&i915->drm, 862 "Incorrect SDVO port. Skip it\n"); 863 continue; 864 } 865 drm_dbg_kms(&i915->drm, 866 "the SDVO device with slave addr %2x is found on" 867 " %s port\n", 868 child->slave_addr, 869 (child->dvo_port == DEVICE_PORT_DVOB) ? 870 "SDVOB" : "SDVOC"); 871 mapping = &i915->vbt.sdvo_mappings[child->dvo_port - 1]; 872 if (!mapping->initialized) { 873 mapping->dvo_port = child->dvo_port; 874 mapping->slave_addr = child->slave_addr; 875 mapping->dvo_wiring = child->dvo_wiring; 876 mapping->ddc_pin = child->ddc_pin; 877 mapping->i2c_pin = child->i2c_pin; 878 mapping->initialized = 1; 879 drm_dbg_kms(&i915->drm, 880 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 881 mapping->dvo_port, mapping->slave_addr, 882 mapping->dvo_wiring, mapping->ddc_pin, 883 mapping->i2c_pin); 884 } else { 885 drm_dbg_kms(&i915->drm, 886 "Maybe one SDVO port is shared by " 887 "two SDVO device.\n"); 888 } 889 if (child->slave2_addr) { 890 /* Maybe this is a SDVO device with multiple inputs */ 891 /* And the mapping info is not added */ 892 drm_dbg_kms(&i915->drm, 893 "there exists the slave2_addr. Maybe this" 894 " is a SDVO device with multiple inputs.\n"); 895 } 896 count++; 897 } 898 899 if (!count) { 900 /* No SDVO device info is found */ 901 drm_dbg_kms(&i915->drm, 902 "No SDVO device info is found in VBT\n"); 903 } 904 } 905 906 static void 907 parse_driver_features(struct drm_i915_private *i915) 908 { 909 const struct bdb_driver_features *driver; 910 911 driver = find_section(i915, BDB_DRIVER_FEATURES); 912 if (!driver) 913 return; 914 915 if (DISPLAY_VER(i915) >= 5) { 916 /* 917 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 918 * to mean "eDP". The VBT spec doesn't agree with that 919 * interpretation, but real world VBTs seem to. 920 */ 921 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 922 i915->vbt.int_lvds_support = 0; 923 } else { 924 /* 925 * FIXME it's not clear which BDB version has the LVDS config 926 * bits defined. Revision history in the VBT spec says: 927 * "0.92 | Add two definitions for VBT value of LVDS Active 928 * Config (00b and 11b values defined) | 06/13/2005" 929 * but does not the specify the BDB version. 930 * 931 * So far version 134 (on i945gm) is the oldest VBT observed 932 * in the wild with the bits correctly populated. Version 933 * 108 (on i85x) does not have the bits correctly populated. 934 */ 935 if (i915->vbt.version >= 134 && 936 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 937 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 938 i915->vbt.int_lvds_support = 0; 939 } 940 941 if (i915->vbt.version < 228) { 942 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n", 943 driver->drrs_enabled); 944 /* 945 * If DRRS is not supported, drrs_type has to be set to 0. 946 * This is because, VBT is configured in such a way that 947 * static DRRS is 0 and DRRS not supported is represented by 948 * driver->drrs_enabled=false 949 */ 950 if (!driver->drrs_enabled) 951 i915->vbt.drrs_type = DRRS_TYPE_NONE; 952 953 i915->vbt.psr.enable = driver->psr_enabled; 954 } 955 } 956 957 static void 958 parse_power_conservation_features(struct drm_i915_private *i915) 959 { 960 const struct bdb_lfp_power *power; 961 u8 panel_type = i915->vbt.panel_type; 962 963 if (i915->vbt.version < 228) 964 return; 965 966 power = find_section(i915, BDB_LFP_POWER); 967 if (!power) 968 return; 969 970 i915->vbt.psr.enable = power->psr & BIT(panel_type); 971 972 /* 973 * If DRRS is not supported, drrs_type has to be set to 0. 974 * This is because, VBT is configured in such a way that 975 * static DRRS is 0 and DRRS not supported is represented by 976 * power->drrs & BIT(panel_type)=false 977 */ 978 if (!(power->drrs & BIT(panel_type))) 979 i915->vbt.drrs_type = DRRS_TYPE_NONE; 980 981 if (i915->vbt.version >= 232) 982 i915->vbt.edp.hobl = power->hobl & BIT(panel_type); 983 } 984 985 static void 986 parse_edp(struct drm_i915_private *i915) 987 { 988 const struct bdb_edp *edp; 989 const struct edp_power_seq *edp_pps; 990 const struct edp_fast_link_params *edp_link_params; 991 int panel_type = i915->vbt.panel_type; 992 993 edp = find_section(i915, BDB_EDP); 994 if (!edp) 995 return; 996 997 switch ((edp->color_depth >> (panel_type * 2)) & 3) { 998 case EDP_18BPP: 999 i915->vbt.edp.bpp = 18; 1000 break; 1001 case EDP_24BPP: 1002 i915->vbt.edp.bpp = 24; 1003 break; 1004 case EDP_30BPP: 1005 i915->vbt.edp.bpp = 30; 1006 break; 1007 } 1008 1009 /* Get the eDP sequencing and link info */ 1010 edp_pps = &edp->power_seqs[panel_type]; 1011 edp_link_params = &edp->fast_link_params[panel_type]; 1012 1013 i915->vbt.edp.pps = *edp_pps; 1014 1015 switch (edp_link_params->rate) { 1016 case EDP_RATE_1_62: 1017 i915->vbt.edp.rate = DP_LINK_BW_1_62; 1018 break; 1019 case EDP_RATE_2_7: 1020 i915->vbt.edp.rate = DP_LINK_BW_2_7; 1021 break; 1022 default: 1023 drm_dbg_kms(&i915->drm, 1024 "VBT has unknown eDP link rate value %u\n", 1025 edp_link_params->rate); 1026 break; 1027 } 1028 1029 switch (edp_link_params->lanes) { 1030 case EDP_LANE_1: 1031 i915->vbt.edp.lanes = 1; 1032 break; 1033 case EDP_LANE_2: 1034 i915->vbt.edp.lanes = 2; 1035 break; 1036 case EDP_LANE_4: 1037 i915->vbt.edp.lanes = 4; 1038 break; 1039 default: 1040 drm_dbg_kms(&i915->drm, 1041 "VBT has unknown eDP lane count value %u\n", 1042 edp_link_params->lanes); 1043 break; 1044 } 1045 1046 switch (edp_link_params->preemphasis) { 1047 case EDP_PREEMPHASIS_NONE: 1048 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 1049 break; 1050 case EDP_PREEMPHASIS_3_5dB: 1051 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 1052 break; 1053 case EDP_PREEMPHASIS_6dB: 1054 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 1055 break; 1056 case EDP_PREEMPHASIS_9_5dB: 1057 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 1058 break; 1059 default: 1060 drm_dbg_kms(&i915->drm, 1061 "VBT has unknown eDP pre-emphasis value %u\n", 1062 edp_link_params->preemphasis); 1063 break; 1064 } 1065 1066 switch (edp_link_params->vswing) { 1067 case EDP_VSWING_0_4V: 1068 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 1069 break; 1070 case EDP_VSWING_0_6V: 1071 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 1072 break; 1073 case EDP_VSWING_0_8V: 1074 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 1075 break; 1076 case EDP_VSWING_1_2V: 1077 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 1078 break; 1079 default: 1080 drm_dbg_kms(&i915->drm, 1081 "VBT has unknown eDP voltage swing value %u\n", 1082 edp_link_params->vswing); 1083 break; 1084 } 1085 1086 if (i915->vbt.version >= 173) { 1087 u8 vswing; 1088 1089 /* Don't read from VBT if module parameter has valid value*/ 1090 if (i915->params.edp_vswing) { 1091 i915->vbt.edp.low_vswing = 1092 i915->params.edp_vswing == 1; 1093 } else { 1094 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 1095 i915->vbt.edp.low_vswing = vswing == 0; 1096 } 1097 } 1098 1099 i915->vbt.edp.drrs_msa_timing_delay = 1100 (edp->sdrrs_msa_timing_delay >> (panel_type * 2)) & 3; 1101 } 1102 1103 static void 1104 parse_psr(struct drm_i915_private *i915) 1105 { 1106 const struct bdb_psr *psr; 1107 const struct psr_table *psr_table; 1108 int panel_type = i915->vbt.panel_type; 1109 1110 psr = find_section(i915, BDB_PSR); 1111 if (!psr) { 1112 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n"); 1113 return; 1114 } 1115 1116 psr_table = &psr->psr_table[panel_type]; 1117 1118 i915->vbt.psr.full_link = psr_table->full_link; 1119 i915->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 1120 1121 /* Allowed VBT values goes from 0 to 15 */ 1122 i915->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 1123 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 1124 1125 /* 1126 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 1127 * Old decimal value is wake up time in multiples of 100 us. 1128 */ 1129 if (i915->vbt.version >= 205 && 1130 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) { 1131 switch (psr_table->tp1_wakeup_time) { 1132 case 0: 1133 i915->vbt.psr.tp1_wakeup_time_us = 500; 1134 break; 1135 case 1: 1136 i915->vbt.psr.tp1_wakeup_time_us = 100; 1137 break; 1138 case 3: 1139 i915->vbt.psr.tp1_wakeup_time_us = 0; 1140 break; 1141 default: 1142 drm_dbg_kms(&i915->drm, 1143 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1144 psr_table->tp1_wakeup_time); 1145 fallthrough; 1146 case 2: 1147 i915->vbt.psr.tp1_wakeup_time_us = 2500; 1148 break; 1149 } 1150 1151 switch (psr_table->tp2_tp3_wakeup_time) { 1152 case 0: 1153 i915->vbt.psr.tp2_tp3_wakeup_time_us = 500; 1154 break; 1155 case 1: 1156 i915->vbt.psr.tp2_tp3_wakeup_time_us = 100; 1157 break; 1158 case 3: 1159 i915->vbt.psr.tp2_tp3_wakeup_time_us = 0; 1160 break; 1161 default: 1162 drm_dbg_kms(&i915->drm, 1163 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1164 psr_table->tp2_tp3_wakeup_time); 1165 fallthrough; 1166 case 2: 1167 i915->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 1168 break; 1169 } 1170 } else { 1171 i915->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 1172 i915->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 1173 } 1174 1175 if (i915->vbt.version >= 226) { 1176 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 1177 1178 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3; 1179 switch (wakeup_time) { 1180 case 0: 1181 wakeup_time = 500; 1182 break; 1183 case 1: 1184 wakeup_time = 100; 1185 break; 1186 case 3: 1187 wakeup_time = 50; 1188 break; 1189 default: 1190 case 2: 1191 wakeup_time = 2500; 1192 break; 1193 } 1194 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 1195 } else { 1196 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 1197 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = i915->vbt.psr.tp2_tp3_wakeup_time_us; 1198 } 1199 } 1200 1201 static void parse_dsi_backlight_ports(struct drm_i915_private *i915, 1202 u16 version, enum port port) 1203 { 1204 if (!i915->vbt.dsi.config->dual_link || version < 197) { 1205 i915->vbt.dsi.bl_ports = BIT(port); 1206 if (i915->vbt.dsi.config->cabc_supported) 1207 i915->vbt.dsi.cabc_ports = BIT(port); 1208 1209 return; 1210 } 1211 1212 switch (i915->vbt.dsi.config->dl_dcs_backlight_ports) { 1213 case DL_DCS_PORT_A: 1214 i915->vbt.dsi.bl_ports = BIT(PORT_A); 1215 break; 1216 case DL_DCS_PORT_C: 1217 i915->vbt.dsi.bl_ports = BIT(PORT_C); 1218 break; 1219 default: 1220 case DL_DCS_PORT_A_AND_C: 1221 i915->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C); 1222 break; 1223 } 1224 1225 if (!i915->vbt.dsi.config->cabc_supported) 1226 return; 1227 1228 switch (i915->vbt.dsi.config->dl_dcs_cabc_ports) { 1229 case DL_DCS_PORT_A: 1230 i915->vbt.dsi.cabc_ports = BIT(PORT_A); 1231 break; 1232 case DL_DCS_PORT_C: 1233 i915->vbt.dsi.cabc_ports = BIT(PORT_C); 1234 break; 1235 default: 1236 case DL_DCS_PORT_A_AND_C: 1237 i915->vbt.dsi.cabc_ports = 1238 BIT(PORT_A) | BIT(PORT_C); 1239 break; 1240 } 1241 } 1242 1243 static void 1244 parse_mipi_config(struct drm_i915_private *i915) 1245 { 1246 const struct bdb_mipi_config *start; 1247 const struct mipi_config *config; 1248 const struct mipi_pps_data *pps; 1249 int panel_type = i915->vbt.panel_type; 1250 enum port port; 1251 1252 /* parse MIPI blocks only if LFP type is MIPI */ 1253 if (!intel_bios_is_dsi_present(i915, &port)) 1254 return; 1255 1256 /* Initialize this to undefined indicating no generic MIPI support */ 1257 i915->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 1258 1259 /* Block #40 is already parsed and panel_fixed_mode is 1260 * stored in i915->lfp_lvds_vbt_mode 1261 * resuse this when needed 1262 */ 1263 1264 /* Parse #52 for panel index used from panel_type already 1265 * parsed 1266 */ 1267 start = find_section(i915, BDB_MIPI_CONFIG); 1268 if (!start) { 1269 drm_dbg_kms(&i915->drm, "No MIPI config BDB found"); 1270 return; 1271 } 1272 1273 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n", 1274 panel_type); 1275 1276 /* 1277 * get hold of the correct configuration block and pps data as per 1278 * the panel_type as index 1279 */ 1280 config = &start->config[panel_type]; 1281 pps = &start->pps[panel_type]; 1282 1283 /* store as of now full data. Trim when we realise all is not needed */ 1284 i915->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1285 if (!i915->vbt.dsi.config) 1286 return; 1287 1288 i915->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1289 if (!i915->vbt.dsi.pps) { 1290 kfree(i915->vbt.dsi.config); 1291 return; 1292 } 1293 1294 parse_dsi_backlight_ports(i915, i915->vbt.version, port); 1295 1296 /* FIXME is the 90 vs. 270 correct? */ 1297 switch (config->rotation) { 1298 case ENABLE_ROTATION_0: 1299 /* 1300 * Most (all?) VBTs claim 0 degrees despite having 1301 * an upside down panel, thus we do not trust this. 1302 */ 1303 i915->vbt.dsi.orientation = 1304 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1305 break; 1306 case ENABLE_ROTATION_90: 1307 i915->vbt.dsi.orientation = 1308 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1309 break; 1310 case ENABLE_ROTATION_180: 1311 i915->vbt.dsi.orientation = 1312 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1313 break; 1314 case ENABLE_ROTATION_270: 1315 i915->vbt.dsi.orientation = 1316 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1317 break; 1318 } 1319 1320 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1321 i915->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1322 } 1323 1324 /* Find the sequence block and size for the given panel. */ 1325 static const u8 * 1326 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 1327 u16 panel_id, u32 *seq_size) 1328 { 1329 u32 total = get_blocksize(sequence); 1330 const u8 *data = &sequence->data[0]; 1331 u8 current_id; 1332 u32 current_size; 1333 int header_size = sequence->version >= 3 ? 5 : 3; 1334 int index = 0; 1335 int i; 1336 1337 /* skip new block size */ 1338 if (sequence->version >= 3) 1339 data += 4; 1340 1341 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1342 if (index + header_size > total) { 1343 DRM_ERROR("Invalid sequence block (header)\n"); 1344 return NULL; 1345 } 1346 1347 current_id = *(data + index); 1348 if (sequence->version >= 3) 1349 current_size = *((const u32 *)(data + index + 1)); 1350 else 1351 current_size = *((const u16 *)(data + index + 1)); 1352 1353 index += header_size; 1354 1355 if (index + current_size > total) { 1356 DRM_ERROR("Invalid sequence block\n"); 1357 return NULL; 1358 } 1359 1360 if (current_id == panel_id) { 1361 *seq_size = current_size; 1362 return data + index; 1363 } 1364 1365 index += current_size; 1366 } 1367 1368 DRM_ERROR("Sequence block detected but no valid configuration\n"); 1369 1370 return NULL; 1371 } 1372 1373 static int goto_next_sequence(const u8 *data, int index, int total) 1374 { 1375 u16 len; 1376 1377 /* Skip Sequence Byte. */ 1378 for (index = index + 1; index < total; index += len) { 1379 u8 operation_byte = *(data + index); 1380 index++; 1381 1382 switch (operation_byte) { 1383 case MIPI_SEQ_ELEM_END: 1384 return index; 1385 case MIPI_SEQ_ELEM_SEND_PKT: 1386 if (index + 4 > total) 1387 return 0; 1388 1389 len = *((const u16 *)(data + index + 2)) + 4; 1390 break; 1391 case MIPI_SEQ_ELEM_DELAY: 1392 len = 4; 1393 break; 1394 case MIPI_SEQ_ELEM_GPIO: 1395 len = 2; 1396 break; 1397 case MIPI_SEQ_ELEM_I2C: 1398 if (index + 7 > total) 1399 return 0; 1400 len = *(data + index + 6) + 7; 1401 break; 1402 default: 1403 DRM_ERROR("Unknown operation byte\n"); 1404 return 0; 1405 } 1406 } 1407 1408 return 0; 1409 } 1410 1411 static int goto_next_sequence_v3(const u8 *data, int index, int total) 1412 { 1413 int seq_end; 1414 u16 len; 1415 u32 size_of_sequence; 1416 1417 /* 1418 * Could skip sequence based on Size of Sequence alone, but also do some 1419 * checking on the structure. 1420 */ 1421 if (total < 5) { 1422 DRM_ERROR("Too small sequence size\n"); 1423 return 0; 1424 } 1425 1426 /* Skip Sequence Byte. */ 1427 index++; 1428 1429 /* 1430 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1431 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1432 * byte. 1433 */ 1434 size_of_sequence = *((const u32 *)(data + index)); 1435 index += 4; 1436 1437 seq_end = index + size_of_sequence; 1438 if (seq_end > total) { 1439 DRM_ERROR("Invalid sequence size\n"); 1440 return 0; 1441 } 1442 1443 for (; index < total; index += len) { 1444 u8 operation_byte = *(data + index); 1445 index++; 1446 1447 if (operation_byte == MIPI_SEQ_ELEM_END) { 1448 if (index != seq_end) { 1449 DRM_ERROR("Invalid element structure\n"); 1450 return 0; 1451 } 1452 return index; 1453 } 1454 1455 len = *(data + index); 1456 index++; 1457 1458 /* 1459 * FIXME: Would be nice to check elements like for v1/v2 in 1460 * goto_next_sequence() above. 1461 */ 1462 switch (operation_byte) { 1463 case MIPI_SEQ_ELEM_SEND_PKT: 1464 case MIPI_SEQ_ELEM_DELAY: 1465 case MIPI_SEQ_ELEM_GPIO: 1466 case MIPI_SEQ_ELEM_I2C: 1467 case MIPI_SEQ_ELEM_SPI: 1468 case MIPI_SEQ_ELEM_PMIC: 1469 break; 1470 default: 1471 DRM_ERROR("Unknown operation byte %u\n", 1472 operation_byte); 1473 break; 1474 } 1475 } 1476 1477 return 0; 1478 } 1479 1480 /* 1481 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1482 * skip all delay + gpio operands and stop at the first DSI packet op. 1483 */ 1484 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915) 1485 { 1486 const u8 *data = i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1487 int index, len; 1488 1489 if (drm_WARN_ON(&i915->drm, 1490 !data || i915->vbt.dsi.seq_version != 1)) 1491 return 0; 1492 1493 /* index = 1 to skip sequence byte */ 1494 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1495 switch (data[index]) { 1496 case MIPI_SEQ_ELEM_SEND_PKT: 1497 return index == 1 ? 0 : index; 1498 case MIPI_SEQ_ELEM_DELAY: 1499 len = 5; /* 1 byte for operand + uint32 */ 1500 break; 1501 case MIPI_SEQ_ELEM_GPIO: 1502 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1503 break; 1504 default: 1505 return 0; 1506 } 1507 } 1508 1509 return 0; 1510 } 1511 1512 /* 1513 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1514 * The deassert must be done before calling intel_dsi_device_ready, so for 1515 * these devices we split the init OTP sequence into a deassert sequence and 1516 * the actual init OTP part. 1517 */ 1518 static void fixup_mipi_sequences(struct drm_i915_private *i915) 1519 { 1520 u8 *init_otp; 1521 int len; 1522 1523 /* Limit this to VLV for now. */ 1524 if (!IS_VALLEYVIEW(i915)) 1525 return; 1526 1527 /* Limit this to v1 vid-mode sequences */ 1528 if (i915->vbt.dsi.config->is_cmd_mode || 1529 i915->vbt.dsi.seq_version != 1) 1530 return; 1531 1532 /* Only do this if there are otp and assert seqs and no deassert seq */ 1533 if (!i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1534 !i915->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1535 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1536 return; 1537 1538 /* The deassert-sequence ends at the first DSI packet */ 1539 len = get_init_otp_deassert_fragment_len(i915); 1540 if (!len) 1541 return; 1542 1543 drm_dbg_kms(&i915->drm, 1544 "Using init OTP fragment to deassert reset\n"); 1545 1546 /* Copy the fragment, update seq byte and terminate it */ 1547 init_otp = (u8 *)i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1548 i915->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1549 if (!i915->vbt.dsi.deassert_seq) 1550 return; 1551 i915->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1552 i915->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1553 /* Use the copy for deassert */ 1554 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1555 i915->vbt.dsi.deassert_seq; 1556 /* Replace the last byte of the fragment with init OTP seq byte */ 1557 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1558 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1559 i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1560 } 1561 1562 static void 1563 parse_mipi_sequence(struct drm_i915_private *i915) 1564 { 1565 int panel_type = i915->vbt.panel_type; 1566 const struct bdb_mipi_sequence *sequence; 1567 const u8 *seq_data; 1568 u32 seq_size; 1569 u8 *data; 1570 int index = 0; 1571 1572 /* Only our generic panel driver uses the sequence block. */ 1573 if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 1574 return; 1575 1576 sequence = find_section(i915, BDB_MIPI_SEQUENCE); 1577 if (!sequence) { 1578 drm_dbg_kms(&i915->drm, 1579 "No MIPI Sequence found, parsing complete\n"); 1580 return; 1581 } 1582 1583 /* Fail gracefully for forward incompatible sequence block. */ 1584 if (sequence->version >= 4) { 1585 drm_err(&i915->drm, 1586 "Unable to parse MIPI Sequence Block v%u\n", 1587 sequence->version); 1588 return; 1589 } 1590 1591 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n", 1592 sequence->version); 1593 1594 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 1595 if (!seq_data) 1596 return; 1597 1598 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 1599 if (!data) 1600 return; 1601 1602 /* Parse the sequences, store pointers to each sequence. */ 1603 for (;;) { 1604 u8 seq_id = *(data + index); 1605 if (seq_id == MIPI_SEQ_END) 1606 break; 1607 1608 if (seq_id >= MIPI_SEQ_MAX) { 1609 drm_err(&i915->drm, "Unknown sequence %u\n", 1610 seq_id); 1611 goto err; 1612 } 1613 1614 /* Log about presence of sequences we won't run. */ 1615 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 1616 drm_dbg_kms(&i915->drm, 1617 "Unsupported sequence %u\n", seq_id); 1618 1619 i915->vbt.dsi.sequence[seq_id] = data + index; 1620 1621 if (sequence->version >= 3) 1622 index = goto_next_sequence_v3(data, index, seq_size); 1623 else 1624 index = goto_next_sequence(data, index, seq_size); 1625 if (!index) { 1626 drm_err(&i915->drm, "Invalid sequence %u\n", 1627 seq_id); 1628 goto err; 1629 } 1630 } 1631 1632 i915->vbt.dsi.data = data; 1633 i915->vbt.dsi.size = seq_size; 1634 i915->vbt.dsi.seq_version = sequence->version; 1635 1636 fixup_mipi_sequences(i915); 1637 1638 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n"); 1639 return; 1640 1641 err: 1642 kfree(data); 1643 memset(i915->vbt.dsi.sequence, 0, sizeof(i915->vbt.dsi.sequence)); 1644 } 1645 1646 static void 1647 parse_compression_parameters(struct drm_i915_private *i915) 1648 { 1649 const struct bdb_compression_parameters *params; 1650 struct intel_bios_encoder_data *devdata; 1651 const struct child_device_config *child; 1652 u16 block_size; 1653 int index; 1654 1655 if (i915->vbt.version < 198) 1656 return; 1657 1658 params = find_section(i915, BDB_COMPRESSION_PARAMETERS); 1659 if (params) { 1660 /* Sanity checks */ 1661 if (params->entry_size != sizeof(params->data[0])) { 1662 drm_dbg_kms(&i915->drm, 1663 "VBT: unsupported compression param entry size\n"); 1664 return; 1665 } 1666 1667 block_size = get_blocksize(params); 1668 if (block_size < sizeof(*params)) { 1669 drm_dbg_kms(&i915->drm, 1670 "VBT: expected 16 compression param entries\n"); 1671 return; 1672 } 1673 } 1674 1675 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 1676 child = &devdata->child; 1677 1678 if (!child->compression_enable) 1679 continue; 1680 1681 if (!params) { 1682 drm_dbg_kms(&i915->drm, 1683 "VBT: compression params not available\n"); 1684 continue; 1685 } 1686 1687 if (child->compression_method_cps) { 1688 drm_dbg_kms(&i915->drm, 1689 "VBT: CPS compression not supported\n"); 1690 continue; 1691 } 1692 1693 index = child->compression_structure_index; 1694 1695 devdata->dsc = kmemdup(¶ms->data[index], 1696 sizeof(*devdata->dsc), GFP_KERNEL); 1697 } 1698 } 1699 1700 static u8 translate_iboost(u8 val) 1701 { 1702 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 1703 1704 if (val >= ARRAY_SIZE(mapping)) { 1705 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 1706 return 0; 1707 } 1708 return mapping[val]; 1709 } 1710 1711 static const u8 cnp_ddc_pin_map[] = { 1712 [0] = 0, /* N/A */ 1713 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT, 1714 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT, 1715 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */ 1716 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */ 1717 }; 1718 1719 static const u8 icp_ddc_pin_map[] = { 1720 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1721 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1722 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT, 1723 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP, 1724 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP, 1725 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP, 1726 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP, 1727 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP, 1728 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, 1729 }; 1730 1731 static const u8 rkl_pch_tgp_ddc_pin_map[] = { 1732 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1733 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1734 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP, 1735 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP, 1736 }; 1737 1738 static const u8 adls_ddc_pin_map[] = { 1739 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1740 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP, 1741 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP, 1742 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP, 1743 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP, 1744 }; 1745 1746 static const u8 gen9bc_tgp_ddc_pin_map[] = { 1747 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1748 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP, 1749 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP, 1750 }; 1751 1752 static const u8 adlp_ddc_pin_map[] = { 1753 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1754 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1755 [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP, 1756 [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP, 1757 [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP, 1758 [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP, 1759 }; 1760 1761 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin) 1762 { 1763 const u8 *ddc_pin_map; 1764 int n_entries; 1765 1766 if (IS_ALDERLAKE_P(i915)) { 1767 ddc_pin_map = adlp_ddc_pin_map; 1768 n_entries = ARRAY_SIZE(adlp_ddc_pin_map); 1769 } else if (IS_ALDERLAKE_S(i915)) { 1770 ddc_pin_map = adls_ddc_pin_map; 1771 n_entries = ARRAY_SIZE(adls_ddc_pin_map); 1772 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) { 1773 return vbt_pin; 1774 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { 1775 ddc_pin_map = rkl_pch_tgp_ddc_pin_map; 1776 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map); 1777 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) { 1778 ddc_pin_map = gen9bc_tgp_ddc_pin_map; 1779 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map); 1780 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) { 1781 ddc_pin_map = icp_ddc_pin_map; 1782 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 1783 } else if (HAS_PCH_CNP(i915)) { 1784 ddc_pin_map = cnp_ddc_pin_map; 1785 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 1786 } else { 1787 /* Assuming direct map */ 1788 return vbt_pin; 1789 } 1790 1791 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0) 1792 return ddc_pin_map[vbt_pin]; 1793 1794 drm_dbg_kms(&i915->drm, 1795 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 1796 vbt_pin); 1797 return 0; 1798 } 1799 1800 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin) 1801 { 1802 const struct intel_bios_encoder_data *devdata; 1803 enum port port; 1804 1805 if (!ddc_pin) 1806 return PORT_NONE; 1807 1808 for_each_port(port) { 1809 devdata = i915->vbt.ports[port]; 1810 1811 if (devdata && ddc_pin == devdata->child.ddc_pin) 1812 return port; 1813 } 1814 1815 return PORT_NONE; 1816 } 1817 1818 static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata, 1819 enum port port) 1820 { 1821 struct drm_i915_private *i915 = devdata->i915; 1822 struct child_device_config *child; 1823 u8 mapped_ddc_pin; 1824 enum port p; 1825 1826 if (!devdata->child.ddc_pin) 1827 return; 1828 1829 mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin); 1830 if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) { 1831 drm_dbg_kms(&i915->drm, 1832 "Port %c has invalid DDC pin %d, " 1833 "sticking to defaults\n", 1834 port_name(port), mapped_ddc_pin); 1835 devdata->child.ddc_pin = 0; 1836 return; 1837 } 1838 1839 p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin); 1840 if (p == PORT_NONE) 1841 return; 1842 1843 drm_dbg_kms(&i915->drm, 1844 "port %c trying to use the same DDC pin (0x%x) as port %c, " 1845 "disabling port %c DVI/HDMI support\n", 1846 port_name(port), mapped_ddc_pin, 1847 port_name(p), port_name(p)); 1848 1849 /* 1850 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi 1851 * couldn't exist on the shared port. Otherwise they share the same ddc 1852 * pin and system couldn't communicate with them separately. 1853 * 1854 * Give inverse child device order the priority, last one wins. Yes, 1855 * there are real machines (eg. Asrock B250M-HDV) where VBT has both 1856 * port A and port E with the same AUX ch and we must pick port E :( 1857 */ 1858 child = &i915->vbt.ports[p]->child; 1859 1860 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 1861 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 1862 1863 child->ddc_pin = 0; 1864 } 1865 1866 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch) 1867 { 1868 const struct intel_bios_encoder_data *devdata; 1869 enum port port; 1870 1871 if (!aux_ch) 1872 return PORT_NONE; 1873 1874 for_each_port(port) { 1875 devdata = i915->vbt.ports[port]; 1876 1877 if (devdata && aux_ch == devdata->child.aux_channel) 1878 return port; 1879 } 1880 1881 return PORT_NONE; 1882 } 1883 1884 static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata, 1885 enum port port) 1886 { 1887 struct drm_i915_private *i915 = devdata->i915; 1888 struct child_device_config *child; 1889 enum port p; 1890 1891 p = get_port_by_aux_ch(i915, devdata->child.aux_channel); 1892 if (p == PORT_NONE) 1893 return; 1894 1895 drm_dbg_kms(&i915->drm, 1896 "port %c trying to use the same AUX CH (0x%x) as port %c, " 1897 "disabling port %c DP support\n", 1898 port_name(port), devdata->child.aux_channel, 1899 port_name(p), port_name(p)); 1900 1901 /* 1902 * If we have multiple ports supposedly sharing the aux channel, then DP 1903 * couldn't exist on the shared port. Otherwise they share the same aux 1904 * channel and system couldn't communicate with them separately. 1905 * 1906 * Give inverse child device order the priority, last one wins. Yes, 1907 * there are real machines (eg. Asrock B250M-HDV) where VBT has both 1908 * port A and port E with the same AUX ch and we must pick port E :( 1909 */ 1910 child = &i915->vbt.ports[p]->child; 1911 1912 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT; 1913 child->aux_channel = 0; 1914 } 1915 1916 static u8 dvo_port_type(u8 dvo_port) 1917 { 1918 switch (dvo_port) { 1919 case DVO_PORT_HDMIA: 1920 case DVO_PORT_HDMIB: 1921 case DVO_PORT_HDMIC: 1922 case DVO_PORT_HDMID: 1923 case DVO_PORT_HDMIE: 1924 case DVO_PORT_HDMIF: 1925 case DVO_PORT_HDMIG: 1926 case DVO_PORT_HDMIH: 1927 case DVO_PORT_HDMII: 1928 return DVO_PORT_HDMIA; 1929 case DVO_PORT_DPA: 1930 case DVO_PORT_DPB: 1931 case DVO_PORT_DPC: 1932 case DVO_PORT_DPD: 1933 case DVO_PORT_DPE: 1934 case DVO_PORT_DPF: 1935 case DVO_PORT_DPG: 1936 case DVO_PORT_DPH: 1937 case DVO_PORT_DPI: 1938 return DVO_PORT_DPA; 1939 case DVO_PORT_MIPIA: 1940 case DVO_PORT_MIPIB: 1941 case DVO_PORT_MIPIC: 1942 case DVO_PORT_MIPID: 1943 return DVO_PORT_MIPIA; 1944 default: 1945 return dvo_port; 1946 } 1947 } 1948 1949 static enum port __dvo_port_to_port(int n_ports, int n_dvo, 1950 const int port_mapping[][3], u8 dvo_port) 1951 { 1952 enum port port; 1953 int i; 1954 1955 for (port = PORT_A; port < n_ports; port++) { 1956 for (i = 0; i < n_dvo; i++) { 1957 if (port_mapping[port][i] == -1) 1958 break; 1959 1960 if (dvo_port == port_mapping[port][i]) 1961 return port; 1962 } 1963 } 1964 1965 return PORT_NONE; 1966 } 1967 1968 static enum port dvo_port_to_port(struct drm_i915_private *i915, 1969 u8 dvo_port) 1970 { 1971 /* 1972 * Each DDI port can have more than one value on the "DVO Port" field, 1973 * so look for all the possible values for each port. 1974 */ 1975 static const int port_mapping[][3] = { 1976 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1977 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1978 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1979 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1980 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT }, 1981 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 1982 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 1983 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 1984 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 1985 }; 1986 /* 1987 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D 1988 * map to DDI A,B,TC1,TC2 respectively. 1989 */ 1990 static const int rkl_port_mapping[][3] = { 1991 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1992 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1993 [PORT_C] = { -1 }, 1994 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1995 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1996 }; 1997 /* 1998 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E, 1999 * PORT_F and PORT_G, we need to map that to correct VBT sections. 2000 */ 2001 static const int adls_port_mapping[][3] = { 2002 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2003 [PORT_B] = { -1 }, 2004 [PORT_C] = { -1 }, 2005 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2006 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2007 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2008 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2009 }; 2010 static const int xelpd_port_mapping[][3] = { 2011 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2012 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2013 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2014 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2015 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2016 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2017 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2018 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2019 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2020 }; 2021 2022 if (DISPLAY_VER(i915) == 13) 2023 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping), 2024 ARRAY_SIZE(xelpd_port_mapping[0]), 2025 xelpd_port_mapping, 2026 dvo_port); 2027 else if (IS_ALDERLAKE_S(i915)) 2028 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping), 2029 ARRAY_SIZE(adls_port_mapping[0]), 2030 adls_port_mapping, 2031 dvo_port); 2032 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 2033 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), 2034 ARRAY_SIZE(rkl_port_mapping[0]), 2035 rkl_port_mapping, 2036 dvo_port); 2037 else 2038 return __dvo_port_to_port(ARRAY_SIZE(port_mapping), 2039 ARRAY_SIZE(port_mapping[0]), 2040 port_mapping, 2041 dvo_port); 2042 } 2043 2044 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate) 2045 { 2046 switch (vbt_max_link_rate) { 2047 default: 2048 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF: 2049 return 0; 2050 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20: 2051 return 2000000; 2052 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5: 2053 return 1350000; 2054 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10: 2055 return 1000000; 2056 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3: 2057 return 810000; 2058 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2: 2059 return 540000; 2060 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR: 2061 return 270000; 2062 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR: 2063 return 162000; 2064 } 2065 } 2066 2067 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate) 2068 { 2069 switch (vbt_max_link_rate) { 2070 default: 2071 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3: 2072 return 810000; 2073 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2: 2074 return 540000; 2075 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR: 2076 return 270000; 2077 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR: 2078 return 162000; 2079 } 2080 } 2081 2082 static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata) 2083 { 2084 if (!devdata || devdata->i915->vbt.version < 216) 2085 return 0; 2086 2087 if (devdata->i915->vbt.version >= 230) 2088 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate); 2089 else 2090 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate); 2091 } 2092 2093 static void sanitize_device_type(struct intel_bios_encoder_data *devdata, 2094 enum port port) 2095 { 2096 struct drm_i915_private *i915 = devdata->i915; 2097 bool is_hdmi; 2098 2099 if (port != PORT_A || DISPLAY_VER(i915) >= 12) 2100 return; 2101 2102 if (!(devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING)) 2103 return; 2104 2105 is_hdmi = !(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT); 2106 2107 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n", 2108 is_hdmi ? "/HDMI" : ""); 2109 2110 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 2111 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 2112 } 2113 2114 static bool 2115 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata) 2116 { 2117 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT; 2118 } 2119 2120 bool 2121 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata) 2122 { 2123 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 2124 } 2125 2126 bool 2127 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata) 2128 { 2129 return intel_bios_encoder_supports_dvi(devdata) && 2130 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 2131 } 2132 2133 bool 2134 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata) 2135 { 2136 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2137 } 2138 2139 static bool 2140 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata) 2141 { 2142 return intel_bios_encoder_supports_dp(devdata) && 2143 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR; 2144 } 2145 2146 static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata) 2147 { 2148 if (!devdata || devdata->i915->vbt.version < 158) 2149 return -1; 2150 2151 return devdata->child.hdmi_level_shifter_value; 2152 } 2153 2154 static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devdata) 2155 { 2156 if (!devdata || devdata->i915->vbt.version < 204) 2157 return 0; 2158 2159 switch (devdata->child.hdmi_max_data_rate) { 2160 default: 2161 MISSING_CASE(devdata->child.hdmi_max_data_rate); 2162 fallthrough; 2163 case HDMI_MAX_DATA_RATE_PLATFORM: 2164 return 0; 2165 case HDMI_MAX_DATA_RATE_594: 2166 return 594000; 2167 case HDMI_MAX_DATA_RATE_340: 2168 return 340000; 2169 case HDMI_MAX_DATA_RATE_300: 2170 return 300000; 2171 case HDMI_MAX_DATA_RATE_297: 2172 return 297000; 2173 case HDMI_MAX_DATA_RATE_165: 2174 return 165000; 2175 } 2176 } 2177 2178 static bool is_port_valid(struct drm_i915_private *i915, enum port port) 2179 { 2180 /* 2181 * On some ICL SKUs port F is not present, but broken VBTs mark 2182 * the port as present. Only try to initialize port F for the 2183 * SKUs that may actually have it. 2184 */ 2185 if (port == PORT_F && IS_ICELAKE(i915)) 2186 return IS_ICL_WITH_PORT_F(i915); 2187 2188 return true; 2189 } 2190 2191 static void parse_ddi_port(struct drm_i915_private *i915, 2192 struct intel_bios_encoder_data *devdata) 2193 { 2194 const struct child_device_config *child = &devdata->child; 2195 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt; 2196 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock; 2197 enum port port; 2198 2199 port = dvo_port_to_port(i915, child->dvo_port); 2200 if (port == PORT_NONE) 2201 return; 2202 2203 if (!is_port_valid(i915, port)) { 2204 drm_dbg_kms(&i915->drm, 2205 "VBT reports port %c as supported, but that can't be true: skipping\n", 2206 port_name(port)); 2207 return; 2208 } 2209 2210 if (i915->vbt.ports[port]) { 2211 drm_dbg_kms(&i915->drm, 2212 "More than one child device for port %c in VBT, using the first.\n", 2213 port_name(port)); 2214 return; 2215 } 2216 2217 sanitize_device_type(devdata, port); 2218 2219 is_dvi = intel_bios_encoder_supports_dvi(devdata); 2220 is_dp = intel_bios_encoder_supports_dp(devdata); 2221 is_crt = intel_bios_encoder_supports_crt(devdata); 2222 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2223 is_edp = intel_bios_encoder_supports_edp(devdata); 2224 2225 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata); 2226 supports_tbt = intel_bios_encoder_supports_tbt(devdata); 2227 2228 drm_dbg_kms(&i915->drm, 2229 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 2230 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, 2231 HAS_LSPCON(i915) && child->lspcon, 2232 supports_typec_usb, supports_tbt, 2233 devdata->dsc != NULL); 2234 2235 if (is_dvi) 2236 sanitize_ddc_pin(devdata, port); 2237 2238 if (is_dp) 2239 sanitize_aux_ch(devdata, port); 2240 2241 hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata); 2242 if (hdmi_level_shift >= 0) { 2243 drm_dbg_kms(&i915->drm, 2244 "Port %c VBT HDMI level shift: %d\n", 2245 port_name(port), hdmi_level_shift); 2246 } 2247 2248 max_tmds_clock = _intel_bios_max_tmds_clock(devdata); 2249 if (max_tmds_clock) 2250 drm_dbg_kms(&i915->drm, 2251 "Port %c VBT HDMI max TMDS clock: %d kHz\n", 2252 port_name(port), max_tmds_clock); 2253 2254 /* I_boost config for SKL and above */ 2255 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata); 2256 if (dp_boost_level) 2257 drm_dbg_kms(&i915->drm, 2258 "Port %c VBT (e)DP boost level: %d\n", 2259 port_name(port), dp_boost_level); 2260 2261 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata); 2262 if (hdmi_boost_level) 2263 drm_dbg_kms(&i915->drm, 2264 "Port %c VBT HDMI boost level: %d\n", 2265 port_name(port), hdmi_boost_level); 2266 2267 dp_max_link_rate = _intel_bios_dp_max_link_rate(devdata); 2268 if (dp_max_link_rate) 2269 drm_dbg_kms(&i915->drm, 2270 "Port %c VBT DP max link rate: %d\n", 2271 port_name(port), dp_max_link_rate); 2272 2273 i915->vbt.ports[port] = devdata; 2274 } 2275 2276 static bool has_ddi_port_info(struct drm_i915_private *i915) 2277 { 2278 return DISPLAY_VER(i915) >= 5 || IS_G4X(i915); 2279 } 2280 2281 static void parse_ddi_ports(struct drm_i915_private *i915) 2282 { 2283 struct intel_bios_encoder_data *devdata; 2284 2285 if (!has_ddi_port_info(i915)) 2286 return; 2287 2288 list_for_each_entry(devdata, &i915->vbt.display_devices, node) 2289 parse_ddi_port(i915, devdata); 2290 } 2291 2292 static void 2293 parse_general_definitions(struct drm_i915_private *i915) 2294 { 2295 const struct bdb_general_definitions *defs; 2296 struct intel_bios_encoder_data *devdata; 2297 const struct child_device_config *child; 2298 int i, child_device_num; 2299 u8 expected_size; 2300 u16 block_size; 2301 int bus_pin; 2302 2303 defs = find_section(i915, BDB_GENERAL_DEFINITIONS); 2304 if (!defs) { 2305 drm_dbg_kms(&i915->drm, 2306 "No general definition block is found, no devices defined.\n"); 2307 return; 2308 } 2309 2310 block_size = get_blocksize(defs); 2311 if (block_size < sizeof(*defs)) { 2312 drm_dbg_kms(&i915->drm, 2313 "General definitions block too small (%u)\n", 2314 block_size); 2315 return; 2316 } 2317 2318 bus_pin = defs->crt_ddc_gmbus_pin; 2319 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin); 2320 if (intel_gmbus_is_valid_pin(i915, bus_pin)) 2321 i915->vbt.crt_ddc_pin = bus_pin; 2322 2323 if (i915->vbt.version < 106) { 2324 expected_size = 22; 2325 } else if (i915->vbt.version < 111) { 2326 expected_size = 27; 2327 } else if (i915->vbt.version < 195) { 2328 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 2329 } else if (i915->vbt.version == 195) { 2330 expected_size = 37; 2331 } else if (i915->vbt.version <= 215) { 2332 expected_size = 38; 2333 } else if (i915->vbt.version <= 237) { 2334 expected_size = 39; 2335 } else { 2336 expected_size = sizeof(*child); 2337 BUILD_BUG_ON(sizeof(*child) < 39); 2338 drm_dbg(&i915->drm, 2339 "Expected child device config size for VBT version %u not known; assuming %u\n", 2340 i915->vbt.version, expected_size); 2341 } 2342 2343 /* Flag an error for unexpected size, but continue anyway. */ 2344 if (defs->child_dev_size != expected_size) 2345 drm_err(&i915->drm, 2346 "Unexpected child device config size %u (expected %u for VBT version %u)\n", 2347 defs->child_dev_size, expected_size, i915->vbt.version); 2348 2349 /* The legacy sized child device config is the minimum we need. */ 2350 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 2351 drm_dbg_kms(&i915->drm, 2352 "Child device config size %u is too small.\n", 2353 defs->child_dev_size); 2354 return; 2355 } 2356 2357 /* get the number of child device */ 2358 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 2359 2360 for (i = 0; i < child_device_num; i++) { 2361 child = child_device_ptr(defs, i); 2362 if (!child->device_type) 2363 continue; 2364 2365 drm_dbg_kms(&i915->drm, 2366 "Found VBT child device with type 0x%x\n", 2367 child->device_type); 2368 2369 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2370 if (!devdata) 2371 break; 2372 2373 devdata->i915 = i915; 2374 2375 /* 2376 * Copy as much as we know (sizeof) and is available 2377 * (child_dev_size) of the child device config. Accessing the 2378 * data must depend on VBT version. 2379 */ 2380 memcpy(&devdata->child, child, 2381 min_t(size_t, defs->child_dev_size, sizeof(*child))); 2382 2383 list_add_tail(&devdata->node, &i915->vbt.display_devices); 2384 } 2385 2386 if (list_empty(&i915->vbt.display_devices)) 2387 drm_dbg_kms(&i915->drm, 2388 "no child dev is parsed from VBT\n"); 2389 } 2390 2391 /* Common defaults which may be overridden by VBT. */ 2392 static void 2393 init_vbt_defaults(struct drm_i915_private *i915) 2394 { 2395 i915->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 2396 2397 /* Default to having backlight */ 2398 i915->vbt.backlight.present = true; 2399 2400 /* LFP panel data */ 2401 i915->vbt.lvds_dither = 1; 2402 2403 /* SDVO panel data */ 2404 i915->vbt.sdvo_lvds_vbt_mode = NULL; 2405 2406 /* general features */ 2407 i915->vbt.int_tv_support = 1; 2408 i915->vbt.int_crt_support = 1; 2409 2410 /* driver features */ 2411 i915->vbt.int_lvds_support = 1; 2412 2413 /* Default to using SSC */ 2414 i915->vbt.lvds_use_ssc = 1; 2415 /* 2416 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 2417 * clock for LVDS. 2418 */ 2419 i915->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915, 2420 !HAS_PCH_SPLIT(i915)); 2421 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n", 2422 i915->vbt.lvds_ssc_freq); 2423 } 2424 2425 /* Defaults to initialize only if there is no VBT. */ 2426 static void 2427 init_vbt_missing_defaults(struct drm_i915_private *i915) 2428 { 2429 enum port port; 2430 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | 2431 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F); 2432 2433 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915)) 2434 return; 2435 2436 for_each_port_masked(port, ports) { 2437 struct intel_bios_encoder_data *devdata; 2438 struct child_device_config *child; 2439 enum phy phy = intel_port_to_phy(i915, port); 2440 2441 /* 2442 * VBT has the TypeC mode (native,TBT/USB) and we don't want 2443 * to detect it. 2444 */ 2445 if (intel_phy_is_tc(i915, phy)) 2446 continue; 2447 2448 /* Create fake child device config */ 2449 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2450 if (!devdata) 2451 break; 2452 2453 devdata->i915 = i915; 2454 child = &devdata->child; 2455 2456 if (port == PORT_F) 2457 child->dvo_port = DVO_PORT_HDMIF; 2458 else if (port == PORT_E) 2459 child->dvo_port = DVO_PORT_HDMIE; 2460 else 2461 child->dvo_port = DVO_PORT_HDMIA + port; 2462 2463 if (port != PORT_A && port != PORT_E) 2464 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING; 2465 2466 if (port != PORT_E) 2467 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2468 2469 if (port == PORT_A) 2470 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR; 2471 2472 list_add_tail(&devdata->node, &i915->vbt.display_devices); 2473 2474 drm_dbg_kms(&i915->drm, 2475 "Generating default VBT child device with type 0x04%x on port %c\n", 2476 child->device_type, port_name(port)); 2477 } 2478 2479 /* Bypass some minimum baseline VBT version checks */ 2480 i915->vbt.version = 155; 2481 } 2482 2483 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 2484 { 2485 const void *_vbt = vbt; 2486 2487 return _vbt + vbt->bdb_offset; 2488 } 2489 2490 /** 2491 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 2492 * @buf: pointer to a buffer to validate 2493 * @size: size of the buffer 2494 * 2495 * Returns true on valid VBT. 2496 */ 2497 bool intel_bios_is_valid_vbt(const void *buf, size_t size) 2498 { 2499 const struct vbt_header *vbt = buf; 2500 const struct bdb_header *bdb; 2501 2502 if (!vbt) 2503 return false; 2504 2505 if (sizeof(struct vbt_header) > size) { 2506 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 2507 return false; 2508 } 2509 2510 if (memcmp(vbt->signature, "$VBT", 4)) { 2511 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 2512 return false; 2513 } 2514 2515 if (vbt->vbt_size > size) { 2516 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 2517 return false; 2518 } 2519 2520 size = vbt->vbt_size; 2521 2522 if (range_overflows_t(size_t, 2523 vbt->bdb_offset, 2524 sizeof(struct bdb_header), 2525 size)) { 2526 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 2527 return false; 2528 } 2529 2530 bdb = get_bdb_header(vbt); 2531 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 2532 DRM_DEBUG_DRIVER("BDB incomplete\n"); 2533 return false; 2534 } 2535 2536 return vbt; 2537 } 2538 2539 static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915) 2540 { 2541 u32 count, data, found, store = 0; 2542 u32 static_region, oprom_offset; 2543 u32 oprom_size = 0x200000; 2544 u16 vbt_size; 2545 u32 *vbt; 2546 2547 static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS); 2548 static_region &= OPTIONROM_SPI_REGIONID_MASK; 2549 intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region); 2550 2551 oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET); 2552 oprom_offset &= OROM_OFFSET_MASK; 2553 2554 for (count = 0; count < oprom_size; count += 4) { 2555 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, oprom_offset + count); 2556 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER); 2557 2558 if (data == *((const u32 *)"$VBT")) { 2559 found = oprom_offset + count; 2560 break; 2561 } 2562 } 2563 2564 if (count >= oprom_size) 2565 goto err_not_found; 2566 2567 /* Get VBT size and allocate space for the VBT */ 2568 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + 2569 offsetof(struct vbt_header, vbt_size)); 2570 vbt_size = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER); 2571 vbt_size &= 0xffff; 2572 2573 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL); 2574 if (!vbt) 2575 goto err_not_found; 2576 2577 for (count = 0; count < vbt_size; count += 4) { 2578 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + count); 2579 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER); 2580 *(vbt + store++) = data; 2581 } 2582 2583 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2584 goto err_free_vbt; 2585 2586 drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n"); 2587 2588 return (struct vbt_header *)vbt; 2589 2590 err_free_vbt: 2591 kfree(vbt); 2592 err_not_found: 2593 return NULL; 2594 } 2595 2596 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) 2597 { 2598 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); 2599 void __iomem *p = NULL, *oprom; 2600 struct vbt_header *vbt; 2601 u16 vbt_size; 2602 size_t i, size; 2603 2604 oprom = pci_map_rom(pdev, &size); 2605 if (!oprom) 2606 return NULL; 2607 2608 /* Scour memory looking for the VBT signature. */ 2609 for (i = 0; i + 4 < size; i += 4) { 2610 if (ioread32(oprom + i) != *((const u32 *)"$VBT")) 2611 continue; 2612 2613 p = oprom + i; 2614 size -= i; 2615 break; 2616 } 2617 2618 if (!p) 2619 goto err_unmap_oprom; 2620 2621 if (sizeof(struct vbt_header) > size) { 2622 drm_dbg(&i915->drm, "VBT header incomplete\n"); 2623 goto err_unmap_oprom; 2624 } 2625 2626 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size)); 2627 if (vbt_size > size) { 2628 drm_dbg(&i915->drm, 2629 "VBT incomplete (vbt_size overflows)\n"); 2630 goto err_unmap_oprom; 2631 } 2632 2633 /* The rest will be validated by intel_bios_is_valid_vbt() */ 2634 vbt = kmalloc(vbt_size, GFP_KERNEL); 2635 if (!vbt) 2636 goto err_unmap_oprom; 2637 2638 memcpy_fromio(vbt, p, vbt_size); 2639 2640 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2641 goto err_free_vbt; 2642 2643 pci_unmap_rom(pdev, oprom); 2644 2645 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n"); 2646 2647 return vbt; 2648 2649 err_free_vbt: 2650 kfree(vbt); 2651 err_unmap_oprom: 2652 pci_unmap_rom(pdev, oprom); 2653 2654 return NULL; 2655 } 2656 2657 /** 2658 * intel_bios_init - find VBT and initialize settings from the BIOS 2659 * @i915: i915 device instance 2660 * 2661 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 2662 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 2663 * initialize some defaults if the VBT is not present at all. 2664 */ 2665 void intel_bios_init(struct drm_i915_private *i915) 2666 { 2667 const struct vbt_header *vbt = i915->opregion.vbt; 2668 struct vbt_header *oprom_vbt = NULL; 2669 const struct bdb_header *bdb; 2670 2671 INIT_LIST_HEAD(&i915->vbt.display_devices); 2672 INIT_LIST_HEAD(&i915->vbt.bdb_blocks); 2673 2674 if (!HAS_DISPLAY(i915)) { 2675 drm_dbg_kms(&i915->drm, 2676 "Skipping VBT init due to disabled display.\n"); 2677 return; 2678 } 2679 2680 init_vbt_defaults(i915); 2681 2682 /* 2683 * If the OpRegion does not have VBT, look in SPI flash through MMIO or 2684 * PCI mapping 2685 */ 2686 if (!vbt && IS_DGFX(i915)) { 2687 oprom_vbt = spi_oprom_get_vbt(i915); 2688 vbt = oprom_vbt; 2689 } 2690 2691 if (!vbt) { 2692 oprom_vbt = oprom_get_vbt(i915); 2693 vbt = oprom_vbt; 2694 } 2695 2696 if (!vbt) 2697 goto out; 2698 2699 bdb = get_bdb_header(vbt); 2700 i915->vbt.version = bdb->version; 2701 2702 drm_dbg_kms(&i915->drm, 2703 "VBT signature \"%.*s\", BDB version %d\n", 2704 (int)sizeof(vbt->signature), vbt->signature, i915->vbt.version); 2705 2706 init_bdb_blocks(i915, bdb); 2707 2708 /* Grab useful general definitions */ 2709 parse_general_features(i915); 2710 parse_general_definitions(i915); 2711 parse_panel_options(i915); 2712 parse_panel_dtd(i915); 2713 parse_lfp_backlight(i915); 2714 parse_sdvo_panel_data(i915); 2715 parse_driver_features(i915); 2716 parse_power_conservation_features(i915); 2717 parse_edp(i915); 2718 parse_psr(i915); 2719 parse_mipi_config(i915); 2720 parse_mipi_sequence(i915); 2721 2722 /* Depends on child device list */ 2723 parse_compression_parameters(i915); 2724 2725 out: 2726 if (!vbt) { 2727 drm_info(&i915->drm, 2728 "Failed to find VBIOS tables (VBT)\n"); 2729 init_vbt_missing_defaults(i915); 2730 } 2731 2732 /* Further processing on pre-parsed or generated child device data */ 2733 parse_sdvo_device_mapping(i915); 2734 parse_ddi_ports(i915); 2735 2736 kfree(oprom_vbt); 2737 } 2738 2739 /** 2740 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 2741 * @i915: i915 device instance 2742 */ 2743 void intel_bios_driver_remove(struct drm_i915_private *i915) 2744 { 2745 struct intel_bios_encoder_data *devdata, *nd; 2746 struct bdb_block_entry *entry, *ne; 2747 2748 list_for_each_entry_safe(devdata, nd, &i915->vbt.display_devices, node) { 2749 list_del(&devdata->node); 2750 kfree(devdata->dsc); 2751 kfree(devdata); 2752 } 2753 2754 list_for_each_entry_safe(entry, ne, &i915->vbt.bdb_blocks, node) { 2755 list_del(&entry->node); 2756 kfree(entry); 2757 } 2758 2759 kfree(i915->vbt.sdvo_lvds_vbt_mode); 2760 i915->vbt.sdvo_lvds_vbt_mode = NULL; 2761 kfree(i915->vbt.lfp_lvds_vbt_mode); 2762 i915->vbt.lfp_lvds_vbt_mode = NULL; 2763 kfree(i915->vbt.dsi.data); 2764 i915->vbt.dsi.data = NULL; 2765 kfree(i915->vbt.dsi.pps); 2766 i915->vbt.dsi.pps = NULL; 2767 kfree(i915->vbt.dsi.config); 2768 i915->vbt.dsi.config = NULL; 2769 kfree(i915->vbt.dsi.deassert_seq); 2770 i915->vbt.dsi.deassert_seq = NULL; 2771 } 2772 2773 /** 2774 * intel_bios_is_tv_present - is integrated TV present in VBT 2775 * @i915: i915 device instance 2776 * 2777 * Return true if TV is present. If no child devices were parsed from VBT, 2778 * assume TV is present. 2779 */ 2780 bool intel_bios_is_tv_present(struct drm_i915_private *i915) 2781 { 2782 const struct intel_bios_encoder_data *devdata; 2783 const struct child_device_config *child; 2784 2785 if (!i915->vbt.int_tv_support) 2786 return false; 2787 2788 if (list_empty(&i915->vbt.display_devices)) 2789 return true; 2790 2791 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2792 child = &devdata->child; 2793 2794 /* 2795 * If the device type is not TV, continue. 2796 */ 2797 switch (child->device_type) { 2798 case DEVICE_TYPE_INT_TV: 2799 case DEVICE_TYPE_TV: 2800 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 2801 break; 2802 default: 2803 continue; 2804 } 2805 /* Only when the addin_offset is non-zero, it is regarded 2806 * as present. 2807 */ 2808 if (child->addin_offset) 2809 return true; 2810 } 2811 2812 return false; 2813 } 2814 2815 /** 2816 * intel_bios_is_lvds_present - is LVDS present in VBT 2817 * @i915: i915 device instance 2818 * @i2c_pin: i2c pin for LVDS if present 2819 * 2820 * Return true if LVDS is present. If no child devices were parsed from VBT, 2821 * assume LVDS is present. 2822 */ 2823 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin) 2824 { 2825 const struct intel_bios_encoder_data *devdata; 2826 const struct child_device_config *child; 2827 2828 if (list_empty(&i915->vbt.display_devices)) 2829 return true; 2830 2831 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2832 child = &devdata->child; 2833 2834 /* If the device type is not LFP, continue. 2835 * We have to check both the new identifiers as well as the 2836 * old for compatibility with some BIOSes. 2837 */ 2838 if (child->device_type != DEVICE_TYPE_INT_LFP && 2839 child->device_type != DEVICE_TYPE_LFP) 2840 continue; 2841 2842 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin)) 2843 *i2c_pin = child->i2c_pin; 2844 2845 /* However, we cannot trust the BIOS writers to populate 2846 * the VBT correctly. Since LVDS requires additional 2847 * information from AIM blocks, a non-zero addin offset is 2848 * a good indicator that the LVDS is actually present. 2849 */ 2850 if (child->addin_offset) 2851 return true; 2852 2853 /* But even then some BIOS writers perform some black magic 2854 * and instantiate the device without reference to any 2855 * additional data. Trust that if the VBT was written into 2856 * the OpRegion then they have validated the LVDS's existence. 2857 */ 2858 if (i915->opregion.vbt) 2859 return true; 2860 } 2861 2862 return false; 2863 } 2864 2865 /** 2866 * intel_bios_is_port_present - is the specified digital port present 2867 * @i915: i915 device instance 2868 * @port: port to check 2869 * 2870 * Return true if the device in %port is present. 2871 */ 2872 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port) 2873 { 2874 if (WARN_ON(!has_ddi_port_info(i915))) 2875 return true; 2876 2877 return i915->vbt.ports[port]; 2878 } 2879 2880 /** 2881 * intel_bios_is_port_edp - is the device in given port eDP 2882 * @i915: i915 device instance 2883 * @port: port to check 2884 * 2885 * Return true if the device in %port is eDP. 2886 */ 2887 bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port) 2888 { 2889 const struct intel_bios_encoder_data *devdata = 2890 intel_bios_encoder_data_lookup(i915, port); 2891 2892 return devdata && intel_bios_encoder_supports_edp(devdata); 2893 } 2894 2895 static bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata) 2896 { 2897 const struct child_device_config *child = &devdata->child; 2898 2899 if (!intel_bios_encoder_supports_dp(devdata) || 2900 !intel_bios_encoder_supports_hdmi(devdata)) 2901 return false; 2902 2903 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA) 2904 return true; 2905 2906 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 2907 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA && 2908 child->aux_channel != 0) 2909 return true; 2910 2911 return false; 2912 } 2913 2914 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915, 2915 enum port port) 2916 { 2917 const struct intel_bios_encoder_data *devdata = 2918 intel_bios_encoder_data_lookup(i915, port); 2919 2920 return devdata && intel_bios_encoder_supports_dp_dual_mode(devdata); 2921 } 2922 2923 /** 2924 * intel_bios_is_dsi_present - is DSI present in VBT 2925 * @i915: i915 device instance 2926 * @port: port for DSI if present 2927 * 2928 * Return true if DSI is present, and return the port in %port. 2929 */ 2930 bool intel_bios_is_dsi_present(struct drm_i915_private *i915, 2931 enum port *port) 2932 { 2933 const struct intel_bios_encoder_data *devdata; 2934 const struct child_device_config *child; 2935 u8 dvo_port; 2936 2937 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2938 child = &devdata->child; 2939 2940 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2941 continue; 2942 2943 dvo_port = child->dvo_port; 2944 2945 if (dvo_port == DVO_PORT_MIPIA || 2946 (dvo_port == DVO_PORT_MIPIB && DISPLAY_VER(i915) >= 11) || 2947 (dvo_port == DVO_PORT_MIPIC && DISPLAY_VER(i915) < 11)) { 2948 if (port) 2949 *port = dvo_port - DVO_PORT_MIPIA; 2950 return true; 2951 } else if (dvo_port == DVO_PORT_MIPIB || 2952 dvo_port == DVO_PORT_MIPIC || 2953 dvo_port == DVO_PORT_MIPID) { 2954 drm_dbg_kms(&i915->drm, 2955 "VBT has unsupported DSI port %c\n", 2956 port_name(dvo_port - DVO_PORT_MIPIA)); 2957 } 2958 } 2959 2960 return false; 2961 } 2962 2963 static void fill_dsc(struct intel_crtc_state *crtc_state, 2964 struct dsc_compression_parameters_entry *dsc, 2965 int dsc_max_bpc) 2966 { 2967 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 2968 int bpc = 8; 2969 2970 vdsc_cfg->dsc_version_major = dsc->version_major; 2971 vdsc_cfg->dsc_version_minor = dsc->version_minor; 2972 2973 if (dsc->support_12bpc && dsc_max_bpc >= 12) 2974 bpc = 12; 2975 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 2976 bpc = 10; 2977 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 2978 bpc = 8; 2979 else 2980 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n", 2981 dsc_max_bpc); 2982 2983 crtc_state->pipe_bpp = bpc * 3; 2984 2985 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp, 2986 VBT_DSC_MAX_BPP(dsc->max_bpp)); 2987 2988 /* 2989 * FIXME: This is ugly, and slice count should take DSC engine 2990 * throughput etc. into account. 2991 * 2992 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 2993 */ 2994 if (dsc->slices_per_line & BIT(2)) { 2995 crtc_state->dsc.slice_count = 4; 2996 } else if (dsc->slices_per_line & BIT(1)) { 2997 crtc_state->dsc.slice_count = 2; 2998 } else { 2999 /* FIXME */ 3000 if (!(dsc->slices_per_line & BIT(0))) 3001 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n"); 3002 3003 crtc_state->dsc.slice_count = 1; 3004 } 3005 3006 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 3007 crtc_state->dsc.slice_count != 0) 3008 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n", 3009 crtc_state->hw.adjusted_mode.crtc_hdisplay, 3010 crtc_state->dsc.slice_count); 3011 3012 /* 3013 * The VBT rc_buffer_block_size and rc_buffer_size definitions 3014 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. 3015 */ 3016 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, 3017 dsc->rc_buffer_size); 3018 3019 /* FIXME: DSI spec says bpc + 1 for this one */ 3020 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 3021 3022 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 3023 3024 vdsc_cfg->slice_height = dsc->slice_height; 3025 } 3026 3027 /* FIXME: initially DSI specific */ 3028 bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 3029 struct intel_crtc_state *crtc_state, 3030 int dsc_max_bpc) 3031 { 3032 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3033 const struct intel_bios_encoder_data *devdata; 3034 const struct child_device_config *child; 3035 3036 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 3037 child = &devdata->child; 3038 3039 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3040 continue; 3041 3042 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) { 3043 if (!devdata->dsc) 3044 return false; 3045 3046 if (crtc_state) 3047 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 3048 3049 return true; 3050 } 3051 } 3052 3053 return false; 3054 } 3055 3056 /** 3057 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port 3058 * @i915: i915 device instance 3059 * @port: port to check 3060 * 3061 * Return true if HPD should be inverted for %port. 3062 */ 3063 bool 3064 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, 3065 enum port port) 3066 { 3067 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 3068 3069 if (drm_WARN_ON_ONCE(&i915->drm, 3070 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915))) 3071 return false; 3072 3073 return devdata && devdata->child.hpd_invert; 3074 } 3075 3076 /** 3077 * intel_bios_is_lspcon_present - if LSPCON is attached on %port 3078 * @i915: i915 device instance 3079 * @port: port to check 3080 * 3081 * Return true if LSPCON is present on this port 3082 */ 3083 bool 3084 intel_bios_is_lspcon_present(const struct drm_i915_private *i915, 3085 enum port port) 3086 { 3087 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 3088 3089 return HAS_LSPCON(i915) && devdata && devdata->child.lspcon; 3090 } 3091 3092 /** 3093 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port 3094 * @i915: i915 device instance 3095 * @port: port to check 3096 * 3097 * Return true if port requires lane reversal 3098 */ 3099 bool 3100 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915, 3101 enum port port) 3102 { 3103 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 3104 3105 return devdata && devdata->child.lane_reversal; 3106 } 3107 3108 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915, 3109 enum port port) 3110 { 3111 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 3112 enum aux_ch aux_ch; 3113 3114 if (!devdata || !devdata->child.aux_channel) { 3115 aux_ch = (enum aux_ch)port; 3116 3117 drm_dbg_kms(&i915->drm, 3118 "using AUX %c for port %c (platform default)\n", 3119 aux_ch_name(aux_ch), port_name(port)); 3120 return aux_ch; 3121 } 3122 3123 /* 3124 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D 3125 * map to DDI A,B,TC1,TC2 respectively. 3126 * 3127 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E 3128 * map to DDI A,TC1,TC2,TC3,TC4 respectively. 3129 */ 3130 switch (devdata->child.aux_channel) { 3131 case DP_AUX_A: 3132 aux_ch = AUX_CH_A; 3133 break; 3134 case DP_AUX_B: 3135 if (IS_ALDERLAKE_S(i915)) 3136 aux_ch = AUX_CH_USBC1; 3137 else 3138 aux_ch = AUX_CH_B; 3139 break; 3140 case DP_AUX_C: 3141 if (IS_ALDERLAKE_S(i915)) 3142 aux_ch = AUX_CH_USBC2; 3143 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 3144 aux_ch = AUX_CH_USBC1; 3145 else 3146 aux_ch = AUX_CH_C; 3147 break; 3148 case DP_AUX_D: 3149 if (DISPLAY_VER(i915) == 13) 3150 aux_ch = AUX_CH_D_XELPD; 3151 else if (IS_ALDERLAKE_S(i915)) 3152 aux_ch = AUX_CH_USBC3; 3153 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 3154 aux_ch = AUX_CH_USBC2; 3155 else 3156 aux_ch = AUX_CH_D; 3157 break; 3158 case DP_AUX_E: 3159 if (DISPLAY_VER(i915) == 13) 3160 aux_ch = AUX_CH_E_XELPD; 3161 else if (IS_ALDERLAKE_S(i915)) 3162 aux_ch = AUX_CH_USBC4; 3163 else 3164 aux_ch = AUX_CH_E; 3165 break; 3166 case DP_AUX_F: 3167 if (DISPLAY_VER(i915) == 13) 3168 aux_ch = AUX_CH_USBC1; 3169 else 3170 aux_ch = AUX_CH_F; 3171 break; 3172 case DP_AUX_G: 3173 if (DISPLAY_VER(i915) == 13) 3174 aux_ch = AUX_CH_USBC2; 3175 else 3176 aux_ch = AUX_CH_G; 3177 break; 3178 case DP_AUX_H: 3179 if (DISPLAY_VER(i915) == 13) 3180 aux_ch = AUX_CH_USBC3; 3181 else 3182 aux_ch = AUX_CH_H; 3183 break; 3184 case DP_AUX_I: 3185 if (DISPLAY_VER(i915) == 13) 3186 aux_ch = AUX_CH_USBC4; 3187 else 3188 aux_ch = AUX_CH_I; 3189 break; 3190 default: 3191 MISSING_CASE(devdata->child.aux_channel); 3192 aux_ch = AUX_CH_A; 3193 break; 3194 } 3195 3196 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n", 3197 aux_ch_name(aux_ch), port_name(port)); 3198 3199 return aux_ch; 3200 } 3201 3202 int intel_bios_max_tmds_clock(struct intel_encoder *encoder) 3203 { 3204 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3205 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3206 3207 return _intel_bios_max_tmds_clock(devdata); 3208 } 3209 3210 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */ 3211 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder) 3212 { 3213 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3214 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3215 3216 return _intel_bios_hdmi_level_shift(devdata); 3217 } 3218 3219 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata) 3220 { 3221 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost) 3222 return 0; 3223 3224 return translate_iboost(devdata->child.dp_iboost_level); 3225 } 3226 3227 int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata) 3228 { 3229 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost) 3230 return 0; 3231 3232 return translate_iboost(devdata->child.hdmi_iboost_level); 3233 } 3234 3235 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder) 3236 { 3237 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3238 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3239 3240 return _intel_bios_dp_max_link_rate(devdata); 3241 } 3242 3243 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder) 3244 { 3245 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3246 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3247 3248 if (!devdata || !devdata->child.ddc_pin) 3249 return 0; 3250 3251 return map_ddc_pin(i915, devdata->child.ddc_pin); 3252 } 3253 3254 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata) 3255 { 3256 return devdata->i915->vbt.version >= 195 && devdata->child.dp_usb_type_c; 3257 } 3258 3259 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata) 3260 { 3261 return devdata->i915->vbt.version >= 209 && devdata->child.tbt; 3262 } 3263 3264 const struct intel_bios_encoder_data * 3265 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port) 3266 { 3267 return i915->vbt.ports[port]; 3268 } 3269