1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <drm/drm_dp_helper.h> 29 30 #include "display/intel_display.h" 31 #include "display/intel_display_types.h" 32 #include "display/intel_gmbus.h" 33 34 #include "i915_drv.h" 35 36 #define _INTEL_BIOS_PRIVATE 37 #include "intel_vbt_defs.h" 38 39 /** 40 * DOC: Video BIOS Table (VBT) 41 * 42 * The Video BIOS Table, or VBT, provides platform and board specific 43 * configuration information to the driver that is not discoverable or available 44 * through other means. The configuration is mostly related to display 45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 46 * the PCI ROM. 47 * 48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 50 * contain the actual configuration information. The VBT Header, and thus the 51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 52 * BDB Header. The data blocks are concatenated after the BDB Header. The data 53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 54 * data. (Block 53, the MIPI Sequence Block is an exception.) 55 * 56 * The driver parses the VBT during load. The relevant information is stored in 57 * driver private data for ease of use, and the actual VBT is not read after 58 * that. 59 */ 60 61 /* Wrapper for VBT child device config */ 62 struct intel_bios_encoder_data { 63 struct drm_i915_private *i915; 64 65 struct child_device_config child; 66 struct dsc_compression_parameters_entry *dsc; 67 struct list_head node; 68 }; 69 70 #define SLAVE_ADDR1 0x70 71 #define SLAVE_ADDR2 0x72 72 73 /* Get BDB block size given a pointer to Block ID. */ 74 static u32 _get_blocksize(const u8 *block_base) 75 { 76 /* The MIPI Sequence Block v3+ has a separate size field. */ 77 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 78 return *((const u32 *)(block_base + 4)); 79 else 80 return *((const u16 *)(block_base + 1)); 81 } 82 83 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 84 static u32 get_blocksize(const void *block_data) 85 { 86 return _get_blocksize(block_data - 3); 87 } 88 89 static const void * 90 find_section(const void *_bdb, enum bdb_block_id section_id) 91 { 92 const struct bdb_header *bdb = _bdb; 93 const u8 *base = _bdb; 94 int index = 0; 95 u32 total, current_size; 96 enum bdb_block_id current_id; 97 98 /* skip to first section */ 99 index += bdb->header_size; 100 total = bdb->bdb_size; 101 102 /* walk the sections looking for section_id */ 103 while (index + 3 < total) { 104 current_id = *(base + index); 105 current_size = _get_blocksize(base + index); 106 index += 3; 107 108 if (index + current_size > total) 109 return NULL; 110 111 if (current_id == section_id) 112 return base + index; 113 114 index += current_size; 115 } 116 117 return NULL; 118 } 119 120 static void 121 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 122 const struct lvds_dvo_timing *dvo_timing) 123 { 124 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 125 dvo_timing->hactive_lo; 126 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 127 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 128 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 129 ((dvo_timing->hsync_pulse_width_hi << 8) | 130 dvo_timing->hsync_pulse_width_lo); 131 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 132 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 133 134 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 135 dvo_timing->vactive_lo; 136 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 137 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 138 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 139 ((dvo_timing->vsync_pulse_width_hi << 4) | 140 dvo_timing->vsync_pulse_width_lo); 141 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 142 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 143 panel_fixed_mode->clock = dvo_timing->clock * 10; 144 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 145 146 if (dvo_timing->hsync_positive) 147 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 148 else 149 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 150 151 if (dvo_timing->vsync_positive) 152 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 153 else 154 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 155 156 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 157 dvo_timing->himage_lo; 158 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 159 dvo_timing->vimage_lo; 160 161 /* Some VBTs have bogus h/vtotal values */ 162 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 163 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 164 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 165 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 166 167 drm_mode_set_name(panel_fixed_mode); 168 } 169 170 static const struct lvds_dvo_timing * 171 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, 172 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, 173 int index) 174 { 175 /* 176 * the size of fp_timing varies on the different platform. 177 * So calculate the DVO timing relative offset in LVDS data 178 * entry to get the DVO timing entry 179 */ 180 181 int lfp_data_size = 182 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - 183 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; 184 int dvo_timing_offset = 185 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - 186 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; 187 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; 188 189 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); 190 } 191 192 /* get lvds_fp_timing entry 193 * this function may return NULL if the corresponding entry is invalid 194 */ 195 static const struct lvds_fp_timing * 196 get_lvds_fp_timing(const struct bdb_header *bdb, 197 const struct bdb_lvds_lfp_data *data, 198 const struct bdb_lvds_lfp_data_ptrs *ptrs, 199 int index) 200 { 201 size_t data_ofs = (const u8 *)data - (const u8 *)bdb; 202 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ 203 size_t ofs; 204 205 if (index >= ARRAY_SIZE(ptrs->ptr)) 206 return NULL; 207 ofs = ptrs->ptr[index].fp_timing_offset; 208 if (ofs < data_ofs || 209 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) 210 return NULL; 211 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); 212 } 213 214 /* Parse general panel options */ 215 static void 216 parse_panel_options(struct drm_i915_private *i915, 217 const struct bdb_header *bdb) 218 { 219 const struct bdb_lvds_options *lvds_options; 220 int panel_type; 221 int drrs_mode; 222 int ret; 223 224 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); 225 if (!lvds_options) 226 return; 227 228 i915->vbt.lvds_dither = lvds_options->pixel_dither; 229 230 ret = intel_opregion_get_panel_type(i915); 231 if (ret >= 0) { 232 drm_WARN_ON(&i915->drm, ret > 0xf); 233 panel_type = ret; 234 drm_dbg_kms(&i915->drm, "Panel type: %d (OpRegion)\n", 235 panel_type); 236 } else { 237 if (lvds_options->panel_type > 0xf) { 238 drm_dbg_kms(&i915->drm, 239 "Invalid VBT panel type 0x%x\n", 240 lvds_options->panel_type); 241 return; 242 } 243 panel_type = lvds_options->panel_type; 244 drm_dbg_kms(&i915->drm, "Panel type: %d (VBT)\n", 245 panel_type); 246 } 247 248 i915->vbt.panel_type = panel_type; 249 250 drrs_mode = (lvds_options->dps_panel_type_bits 251 >> (panel_type * 2)) & MODE_MASK; 252 /* 253 * VBT has static DRRS = 0 and seamless DRRS = 2. 254 * The below piece of code is required to adjust vbt.drrs_type 255 * to match the enum drrs_support_type. 256 */ 257 switch (drrs_mode) { 258 case 0: 259 i915->vbt.drrs_type = STATIC_DRRS_SUPPORT; 260 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n"); 261 break; 262 case 2: 263 i915->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; 264 drm_dbg_kms(&i915->drm, 265 "DRRS supported mode is seamless\n"); 266 break; 267 default: 268 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED; 269 drm_dbg_kms(&i915->drm, 270 "DRRS not supported (VBT input)\n"); 271 break; 272 } 273 } 274 275 /* Try to find integrated panel timing data */ 276 static void 277 parse_lfp_panel_dtd(struct drm_i915_private *i915, 278 const struct bdb_header *bdb) 279 { 280 const struct bdb_lvds_lfp_data *lvds_lfp_data; 281 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; 282 const struct lvds_dvo_timing *panel_dvo_timing; 283 const struct lvds_fp_timing *fp_timing; 284 struct drm_display_mode *panel_fixed_mode; 285 int panel_type = i915->vbt.panel_type; 286 287 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); 288 if (!lvds_lfp_data) 289 return; 290 291 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); 292 if (!lvds_lfp_data_ptrs) 293 return; 294 295 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 296 lvds_lfp_data_ptrs, 297 panel_type); 298 299 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 300 if (!panel_fixed_mode) 301 return; 302 303 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 304 305 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 306 307 drm_dbg_kms(&i915->drm, 308 "Found panel mode in BIOS VBT legacy lfp table:\n"); 309 drm_mode_debug_printmodeline(panel_fixed_mode); 310 311 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, 312 lvds_lfp_data_ptrs, 313 panel_type); 314 if (fp_timing) { 315 /* check the resolution, just to be sure */ 316 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 317 fp_timing->y_res == panel_fixed_mode->vdisplay) { 318 i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 319 drm_dbg_kms(&i915->drm, 320 "VBT initial LVDS value %x\n", 321 i915->vbt.bios_lvds_val); 322 } 323 } 324 } 325 326 static void 327 parse_generic_dtd(struct drm_i915_private *i915, 328 const struct bdb_header *bdb) 329 { 330 const struct bdb_generic_dtd *generic_dtd; 331 const struct generic_dtd_entry *dtd; 332 struct drm_display_mode *panel_fixed_mode; 333 int num_dtd; 334 335 generic_dtd = find_section(bdb, BDB_GENERIC_DTD); 336 if (!generic_dtd) 337 return; 338 339 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 340 drm_err(&i915->drm, "GDTD size %u is too small.\n", 341 generic_dtd->gdtd_size); 342 return; 343 } else if (generic_dtd->gdtd_size != 344 sizeof(struct generic_dtd_entry)) { 345 drm_err(&i915->drm, "Unexpected GDTD size %u\n", 346 generic_dtd->gdtd_size); 347 /* DTD has unknown fields, but keep going */ 348 } 349 350 num_dtd = (get_blocksize(generic_dtd) - 351 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 352 if (i915->vbt.panel_type >= num_dtd) { 353 drm_err(&i915->drm, 354 "Panel type %d not found in table of %d DTD's\n", 355 i915->vbt.panel_type, num_dtd); 356 return; 357 } 358 359 dtd = &generic_dtd->dtd[i915->vbt.panel_type]; 360 361 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 362 if (!panel_fixed_mode) 363 return; 364 365 panel_fixed_mode->hdisplay = dtd->hactive; 366 panel_fixed_mode->hsync_start = 367 panel_fixed_mode->hdisplay + dtd->hfront_porch; 368 panel_fixed_mode->hsync_end = 369 panel_fixed_mode->hsync_start + dtd->hsync; 370 panel_fixed_mode->htotal = 371 panel_fixed_mode->hdisplay + dtd->hblank; 372 373 panel_fixed_mode->vdisplay = dtd->vactive; 374 panel_fixed_mode->vsync_start = 375 panel_fixed_mode->vdisplay + dtd->vfront_porch; 376 panel_fixed_mode->vsync_end = 377 panel_fixed_mode->vsync_start + dtd->vsync; 378 panel_fixed_mode->vtotal = 379 panel_fixed_mode->vdisplay + dtd->vblank; 380 381 panel_fixed_mode->clock = dtd->pixel_clock; 382 panel_fixed_mode->width_mm = dtd->width_mm; 383 panel_fixed_mode->height_mm = dtd->height_mm; 384 385 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 386 drm_mode_set_name(panel_fixed_mode); 387 388 if (dtd->hsync_positive_polarity) 389 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 390 else 391 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 392 393 if (dtd->vsync_positive_polarity) 394 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 395 else 396 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 397 398 drm_dbg_kms(&i915->drm, 399 "Found panel mode in BIOS VBT generic dtd table:\n"); 400 drm_mode_debug_printmodeline(panel_fixed_mode); 401 402 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 403 } 404 405 static void 406 parse_panel_dtd(struct drm_i915_private *i915, 407 const struct bdb_header *bdb) 408 { 409 /* 410 * Older VBTs provided provided DTD information for internal displays 411 * through the "LFP panel DTD" block (42). As of VBT revision 229, 412 * that block is now deprecated and DTD information should be provided 413 * via a newer "generic DTD" block (58). Just to be safe, we'll 414 * try the new generic DTD block first on VBT >= 229, but still fall 415 * back to trying the old LFP block if that fails. 416 */ 417 if (bdb->version >= 229) 418 parse_generic_dtd(i915, bdb); 419 if (!i915->vbt.lfp_lvds_vbt_mode) 420 parse_lfp_panel_dtd(i915, bdb); 421 } 422 423 static void 424 parse_lfp_backlight(struct drm_i915_private *i915, 425 const struct bdb_header *bdb) 426 { 427 const struct bdb_lfp_backlight_data *backlight_data; 428 const struct lfp_backlight_data_entry *entry; 429 int panel_type = i915->vbt.panel_type; 430 u16 level; 431 432 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); 433 if (!backlight_data) 434 return; 435 436 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 437 drm_dbg_kms(&i915->drm, 438 "Unsupported backlight data entry size %u\n", 439 backlight_data->entry_size); 440 return; 441 } 442 443 entry = &backlight_data->data[panel_type]; 444 445 i915->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 446 if (!i915->vbt.backlight.present) { 447 drm_dbg_kms(&i915->drm, 448 "PWM backlight not present in VBT (type %u)\n", 449 entry->type); 450 return; 451 } 452 453 i915->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 454 if (bdb->version >= 191) { 455 size_t exp_size; 456 457 if (bdb->version >= 236) 458 exp_size = sizeof(struct bdb_lfp_backlight_data); 459 else if (bdb->version >= 234) 460 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234; 461 else 462 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191; 463 464 if (get_blocksize(backlight_data) >= exp_size) { 465 const struct lfp_backlight_control_method *method; 466 467 method = &backlight_data->backlight_control[panel_type]; 468 i915->vbt.backlight.type = method->type; 469 i915->vbt.backlight.controller = method->controller; 470 } 471 } 472 473 i915->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 474 i915->vbt.backlight.active_low_pwm = entry->active_low_pwm; 475 476 if (bdb->version >= 234) { 477 u16 min_level; 478 bool scale; 479 480 level = backlight_data->brightness_level[panel_type].level; 481 min_level = backlight_data->brightness_min_level[panel_type].level; 482 483 if (bdb->version >= 236) 484 scale = backlight_data->brightness_precision_bits[panel_type] == 16; 485 else 486 scale = level > 255; 487 488 if (scale) 489 min_level = min_level / 255; 490 491 if (min_level > 255) { 492 drm_warn(&i915->drm, "Brightness min level > 255\n"); 493 level = 255; 494 } 495 i915->vbt.backlight.min_brightness = min_level; 496 497 i915->vbt.backlight.brightness_precision_bits = 498 backlight_data->brightness_precision_bits[panel_type]; 499 } else { 500 level = backlight_data->level[panel_type]; 501 i915->vbt.backlight.min_brightness = entry->min_brightness; 502 } 503 504 drm_dbg_kms(&i915->drm, 505 "VBT backlight PWM modulation frequency %u Hz, " 506 "active %s, min brightness %u, level %u, controller %u\n", 507 i915->vbt.backlight.pwm_freq_hz, 508 i915->vbt.backlight.active_low_pwm ? "low" : "high", 509 i915->vbt.backlight.min_brightness, 510 level, 511 i915->vbt.backlight.controller); 512 } 513 514 /* Try to find sdvo panel data */ 515 static void 516 parse_sdvo_panel_data(struct drm_i915_private *i915, 517 const struct bdb_header *bdb) 518 { 519 const struct bdb_sdvo_panel_dtds *dtds; 520 struct drm_display_mode *panel_fixed_mode; 521 int index; 522 523 index = i915->params.vbt_sdvo_panel_type; 524 if (index == -2) { 525 drm_dbg_kms(&i915->drm, 526 "Ignore SDVO panel mode from BIOS VBT tables.\n"); 527 return; 528 } 529 530 if (index == -1) { 531 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 532 533 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); 534 if (!sdvo_lvds_options) 535 return; 536 537 index = sdvo_lvds_options->panel_type; 538 } 539 540 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS); 541 if (!dtds) 542 return; 543 544 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 545 if (!panel_fixed_mode) 546 return; 547 548 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 549 550 i915->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 551 552 drm_dbg_kms(&i915->drm, 553 "Found SDVO panel mode in BIOS VBT tables:\n"); 554 drm_mode_debug_printmodeline(panel_fixed_mode); 555 } 556 557 static int intel_bios_ssc_frequency(struct drm_i915_private *i915, 558 bool alternate) 559 { 560 switch (DISPLAY_VER(i915)) { 561 case 2: 562 return alternate ? 66667 : 48000; 563 case 3: 564 case 4: 565 return alternate ? 100000 : 96000; 566 default: 567 return alternate ? 100000 : 120000; 568 } 569 } 570 571 static void 572 parse_general_features(struct drm_i915_private *i915, 573 const struct bdb_header *bdb) 574 { 575 const struct bdb_general_features *general; 576 577 general = find_section(bdb, BDB_GENERAL_FEATURES); 578 if (!general) 579 return; 580 581 i915->vbt.int_tv_support = general->int_tv_support; 582 /* int_crt_support can't be trusted on earlier platforms */ 583 if (bdb->version >= 155 && 584 (HAS_DDI(i915) || IS_VALLEYVIEW(i915))) 585 i915->vbt.int_crt_support = general->int_crt_support; 586 i915->vbt.lvds_use_ssc = general->enable_ssc; 587 i915->vbt.lvds_ssc_freq = 588 intel_bios_ssc_frequency(i915, general->ssc_freq); 589 i915->vbt.display_clock_mode = general->display_clock_mode; 590 i915->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 591 if (bdb->version >= 181) { 592 i915->vbt.orientation = general->rotate_180 ? 593 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 594 DRM_MODE_PANEL_ORIENTATION_NORMAL; 595 } else { 596 i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 597 } 598 drm_dbg_kms(&i915->drm, 599 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 600 i915->vbt.int_tv_support, 601 i915->vbt.int_crt_support, 602 i915->vbt.lvds_use_ssc, 603 i915->vbt.lvds_ssc_freq, 604 i915->vbt.display_clock_mode, 605 i915->vbt.fdi_rx_polarity_inverted); 606 } 607 608 static const struct child_device_config * 609 child_device_ptr(const struct bdb_general_definitions *defs, int i) 610 { 611 return (const void *) &defs->devices[i * defs->child_dev_size]; 612 } 613 614 static void 615 parse_sdvo_device_mapping(struct drm_i915_private *i915) 616 { 617 struct sdvo_device_mapping *mapping; 618 const struct intel_bios_encoder_data *devdata; 619 const struct child_device_config *child; 620 int count = 0; 621 622 /* 623 * Only parse SDVO mappings on gens that could have SDVO. This isn't 624 * accurate and doesn't have to be, as long as it's not too strict. 625 */ 626 if (!IS_DISPLAY_VER(i915, 3, 7)) { 627 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n"); 628 return; 629 } 630 631 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 632 child = &devdata->child; 633 634 if (child->slave_addr != SLAVE_ADDR1 && 635 child->slave_addr != SLAVE_ADDR2) { 636 /* 637 * If the slave address is neither 0x70 nor 0x72, 638 * it is not a SDVO device. Skip it. 639 */ 640 continue; 641 } 642 if (child->dvo_port != DEVICE_PORT_DVOB && 643 child->dvo_port != DEVICE_PORT_DVOC) { 644 /* skip the incorrect SDVO port */ 645 drm_dbg_kms(&i915->drm, 646 "Incorrect SDVO port. Skip it\n"); 647 continue; 648 } 649 drm_dbg_kms(&i915->drm, 650 "the SDVO device with slave addr %2x is found on" 651 " %s port\n", 652 child->slave_addr, 653 (child->dvo_port == DEVICE_PORT_DVOB) ? 654 "SDVOB" : "SDVOC"); 655 mapping = &i915->vbt.sdvo_mappings[child->dvo_port - 1]; 656 if (!mapping->initialized) { 657 mapping->dvo_port = child->dvo_port; 658 mapping->slave_addr = child->slave_addr; 659 mapping->dvo_wiring = child->dvo_wiring; 660 mapping->ddc_pin = child->ddc_pin; 661 mapping->i2c_pin = child->i2c_pin; 662 mapping->initialized = 1; 663 drm_dbg_kms(&i915->drm, 664 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 665 mapping->dvo_port, mapping->slave_addr, 666 mapping->dvo_wiring, mapping->ddc_pin, 667 mapping->i2c_pin); 668 } else { 669 drm_dbg_kms(&i915->drm, 670 "Maybe one SDVO port is shared by " 671 "two SDVO device.\n"); 672 } 673 if (child->slave2_addr) { 674 /* Maybe this is a SDVO device with multiple inputs */ 675 /* And the mapping info is not added */ 676 drm_dbg_kms(&i915->drm, 677 "there exists the slave2_addr. Maybe this" 678 " is a SDVO device with multiple inputs.\n"); 679 } 680 count++; 681 } 682 683 if (!count) { 684 /* No SDVO device info is found */ 685 drm_dbg_kms(&i915->drm, 686 "No SDVO device info is found in VBT\n"); 687 } 688 } 689 690 static void 691 parse_driver_features(struct drm_i915_private *i915, 692 const struct bdb_header *bdb) 693 { 694 const struct bdb_driver_features *driver; 695 696 driver = find_section(bdb, BDB_DRIVER_FEATURES); 697 if (!driver) 698 return; 699 700 if (DISPLAY_VER(i915) >= 5) { 701 /* 702 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 703 * to mean "eDP". The VBT spec doesn't agree with that 704 * interpretation, but real world VBTs seem to. 705 */ 706 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 707 i915->vbt.int_lvds_support = 0; 708 } else { 709 /* 710 * FIXME it's not clear which BDB version has the LVDS config 711 * bits defined. Revision history in the VBT spec says: 712 * "0.92 | Add two definitions for VBT value of LVDS Active 713 * Config (00b and 11b values defined) | 06/13/2005" 714 * but does not the specify the BDB version. 715 * 716 * So far version 134 (on i945gm) is the oldest VBT observed 717 * in the wild with the bits correctly populated. Version 718 * 108 (on i85x) does not have the bits correctly populated. 719 */ 720 if (bdb->version >= 134 && 721 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 722 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 723 i915->vbt.int_lvds_support = 0; 724 } 725 726 if (bdb->version < 228) { 727 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n", 728 driver->drrs_enabled); 729 /* 730 * If DRRS is not supported, drrs_type has to be set to 0. 731 * This is because, VBT is configured in such a way that 732 * static DRRS is 0 and DRRS not supported is represented by 733 * driver->drrs_enabled=false 734 */ 735 if (!driver->drrs_enabled) 736 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED; 737 738 i915->vbt.psr.enable = driver->psr_enabled; 739 } 740 } 741 742 static void 743 parse_power_conservation_features(struct drm_i915_private *i915, 744 const struct bdb_header *bdb) 745 { 746 const struct bdb_lfp_power *power; 747 u8 panel_type = i915->vbt.panel_type; 748 749 if (bdb->version < 228) 750 return; 751 752 power = find_section(bdb, BDB_LFP_POWER); 753 if (!power) 754 return; 755 756 i915->vbt.psr.enable = power->psr & BIT(panel_type); 757 758 /* 759 * If DRRS is not supported, drrs_type has to be set to 0. 760 * This is because, VBT is configured in such a way that 761 * static DRRS is 0 and DRRS not supported is represented by 762 * power->drrs & BIT(panel_type)=false 763 */ 764 if (!(power->drrs & BIT(panel_type))) 765 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED; 766 767 if (bdb->version >= 232) 768 i915->vbt.edp.hobl = power->hobl & BIT(panel_type); 769 } 770 771 static void 772 parse_edp(struct drm_i915_private *i915, const struct bdb_header *bdb) 773 { 774 const struct bdb_edp *edp; 775 const struct edp_power_seq *edp_pps; 776 const struct edp_fast_link_params *edp_link_params; 777 int panel_type = i915->vbt.panel_type; 778 779 edp = find_section(bdb, BDB_EDP); 780 if (!edp) 781 return; 782 783 switch ((edp->color_depth >> (panel_type * 2)) & 3) { 784 case EDP_18BPP: 785 i915->vbt.edp.bpp = 18; 786 break; 787 case EDP_24BPP: 788 i915->vbt.edp.bpp = 24; 789 break; 790 case EDP_30BPP: 791 i915->vbt.edp.bpp = 30; 792 break; 793 } 794 795 /* Get the eDP sequencing and link info */ 796 edp_pps = &edp->power_seqs[panel_type]; 797 edp_link_params = &edp->fast_link_params[panel_type]; 798 799 i915->vbt.edp.pps = *edp_pps; 800 801 switch (edp_link_params->rate) { 802 case EDP_RATE_1_62: 803 i915->vbt.edp.rate = DP_LINK_BW_1_62; 804 break; 805 case EDP_RATE_2_7: 806 i915->vbt.edp.rate = DP_LINK_BW_2_7; 807 break; 808 default: 809 drm_dbg_kms(&i915->drm, 810 "VBT has unknown eDP link rate value %u\n", 811 edp_link_params->rate); 812 break; 813 } 814 815 switch (edp_link_params->lanes) { 816 case EDP_LANE_1: 817 i915->vbt.edp.lanes = 1; 818 break; 819 case EDP_LANE_2: 820 i915->vbt.edp.lanes = 2; 821 break; 822 case EDP_LANE_4: 823 i915->vbt.edp.lanes = 4; 824 break; 825 default: 826 drm_dbg_kms(&i915->drm, 827 "VBT has unknown eDP lane count value %u\n", 828 edp_link_params->lanes); 829 break; 830 } 831 832 switch (edp_link_params->preemphasis) { 833 case EDP_PREEMPHASIS_NONE: 834 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 835 break; 836 case EDP_PREEMPHASIS_3_5dB: 837 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 838 break; 839 case EDP_PREEMPHASIS_6dB: 840 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 841 break; 842 case EDP_PREEMPHASIS_9_5dB: 843 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 844 break; 845 default: 846 drm_dbg_kms(&i915->drm, 847 "VBT has unknown eDP pre-emphasis value %u\n", 848 edp_link_params->preemphasis); 849 break; 850 } 851 852 switch (edp_link_params->vswing) { 853 case EDP_VSWING_0_4V: 854 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 855 break; 856 case EDP_VSWING_0_6V: 857 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 858 break; 859 case EDP_VSWING_0_8V: 860 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 861 break; 862 case EDP_VSWING_1_2V: 863 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 864 break; 865 default: 866 drm_dbg_kms(&i915->drm, 867 "VBT has unknown eDP voltage swing value %u\n", 868 edp_link_params->vswing); 869 break; 870 } 871 872 if (bdb->version >= 173) { 873 u8 vswing; 874 875 /* Don't read from VBT if module parameter has valid value*/ 876 if (i915->params.edp_vswing) { 877 i915->vbt.edp.low_vswing = 878 i915->params.edp_vswing == 1; 879 } else { 880 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 881 i915->vbt.edp.low_vswing = vswing == 0; 882 } 883 } 884 } 885 886 static void 887 parse_psr(struct drm_i915_private *i915, const struct bdb_header *bdb) 888 { 889 const struct bdb_psr *psr; 890 const struct psr_table *psr_table; 891 int panel_type = i915->vbt.panel_type; 892 893 psr = find_section(bdb, BDB_PSR); 894 if (!psr) { 895 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n"); 896 return; 897 } 898 899 psr_table = &psr->psr_table[panel_type]; 900 901 i915->vbt.psr.full_link = psr_table->full_link; 902 i915->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 903 904 /* Allowed VBT values goes from 0 to 15 */ 905 i915->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 906 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 907 908 switch (psr_table->lines_to_wait) { 909 case 0: 910 i915->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT; 911 break; 912 case 1: 913 i915->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT; 914 break; 915 case 2: 916 i915->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT; 917 break; 918 case 3: 919 i915->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT; 920 break; 921 default: 922 drm_dbg_kms(&i915->drm, 923 "VBT has unknown PSR lines to wait %u\n", 924 psr_table->lines_to_wait); 925 break; 926 } 927 928 /* 929 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 930 * Old decimal value is wake up time in multiples of 100 us. 931 */ 932 if (bdb->version >= 205 && 933 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) { 934 switch (psr_table->tp1_wakeup_time) { 935 case 0: 936 i915->vbt.psr.tp1_wakeup_time_us = 500; 937 break; 938 case 1: 939 i915->vbt.psr.tp1_wakeup_time_us = 100; 940 break; 941 case 3: 942 i915->vbt.psr.tp1_wakeup_time_us = 0; 943 break; 944 default: 945 drm_dbg_kms(&i915->drm, 946 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 947 psr_table->tp1_wakeup_time); 948 fallthrough; 949 case 2: 950 i915->vbt.psr.tp1_wakeup_time_us = 2500; 951 break; 952 } 953 954 switch (psr_table->tp2_tp3_wakeup_time) { 955 case 0: 956 i915->vbt.psr.tp2_tp3_wakeup_time_us = 500; 957 break; 958 case 1: 959 i915->vbt.psr.tp2_tp3_wakeup_time_us = 100; 960 break; 961 case 3: 962 i915->vbt.psr.tp2_tp3_wakeup_time_us = 0; 963 break; 964 default: 965 drm_dbg_kms(&i915->drm, 966 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 967 psr_table->tp2_tp3_wakeup_time); 968 fallthrough; 969 case 2: 970 i915->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 971 break; 972 } 973 } else { 974 i915->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 975 i915->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 976 } 977 978 if (bdb->version >= 226) { 979 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 980 981 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3; 982 switch (wakeup_time) { 983 case 0: 984 wakeup_time = 500; 985 break; 986 case 1: 987 wakeup_time = 100; 988 break; 989 case 3: 990 wakeup_time = 50; 991 break; 992 default: 993 case 2: 994 wakeup_time = 2500; 995 break; 996 } 997 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 998 } else { 999 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 1000 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = i915->vbt.psr.tp2_tp3_wakeup_time_us; 1001 } 1002 } 1003 1004 static void parse_dsi_backlight_ports(struct drm_i915_private *i915, 1005 u16 version, enum port port) 1006 { 1007 if (!i915->vbt.dsi.config->dual_link || version < 197) { 1008 i915->vbt.dsi.bl_ports = BIT(port); 1009 if (i915->vbt.dsi.config->cabc_supported) 1010 i915->vbt.dsi.cabc_ports = BIT(port); 1011 1012 return; 1013 } 1014 1015 switch (i915->vbt.dsi.config->dl_dcs_backlight_ports) { 1016 case DL_DCS_PORT_A: 1017 i915->vbt.dsi.bl_ports = BIT(PORT_A); 1018 break; 1019 case DL_DCS_PORT_C: 1020 i915->vbt.dsi.bl_ports = BIT(PORT_C); 1021 break; 1022 default: 1023 case DL_DCS_PORT_A_AND_C: 1024 i915->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C); 1025 break; 1026 } 1027 1028 if (!i915->vbt.dsi.config->cabc_supported) 1029 return; 1030 1031 switch (i915->vbt.dsi.config->dl_dcs_cabc_ports) { 1032 case DL_DCS_PORT_A: 1033 i915->vbt.dsi.cabc_ports = BIT(PORT_A); 1034 break; 1035 case DL_DCS_PORT_C: 1036 i915->vbt.dsi.cabc_ports = BIT(PORT_C); 1037 break; 1038 default: 1039 case DL_DCS_PORT_A_AND_C: 1040 i915->vbt.dsi.cabc_ports = 1041 BIT(PORT_A) | BIT(PORT_C); 1042 break; 1043 } 1044 } 1045 1046 static void 1047 parse_mipi_config(struct drm_i915_private *i915, 1048 const struct bdb_header *bdb) 1049 { 1050 const struct bdb_mipi_config *start; 1051 const struct mipi_config *config; 1052 const struct mipi_pps_data *pps; 1053 int panel_type = i915->vbt.panel_type; 1054 enum port port; 1055 1056 /* parse MIPI blocks only if LFP type is MIPI */ 1057 if (!intel_bios_is_dsi_present(i915, &port)) 1058 return; 1059 1060 /* Initialize this to undefined indicating no generic MIPI support */ 1061 i915->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 1062 1063 /* Block #40 is already parsed and panel_fixed_mode is 1064 * stored in i915->lfp_lvds_vbt_mode 1065 * resuse this when needed 1066 */ 1067 1068 /* Parse #52 for panel index used from panel_type already 1069 * parsed 1070 */ 1071 start = find_section(bdb, BDB_MIPI_CONFIG); 1072 if (!start) { 1073 drm_dbg_kms(&i915->drm, "No MIPI config BDB found"); 1074 return; 1075 } 1076 1077 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n", 1078 panel_type); 1079 1080 /* 1081 * get hold of the correct configuration block and pps data as per 1082 * the panel_type as index 1083 */ 1084 config = &start->config[panel_type]; 1085 pps = &start->pps[panel_type]; 1086 1087 /* store as of now full data. Trim when we realise all is not needed */ 1088 i915->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1089 if (!i915->vbt.dsi.config) 1090 return; 1091 1092 i915->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1093 if (!i915->vbt.dsi.pps) { 1094 kfree(i915->vbt.dsi.config); 1095 return; 1096 } 1097 1098 parse_dsi_backlight_ports(i915, bdb->version, port); 1099 1100 /* FIXME is the 90 vs. 270 correct? */ 1101 switch (config->rotation) { 1102 case ENABLE_ROTATION_0: 1103 /* 1104 * Most (all?) VBTs claim 0 degrees despite having 1105 * an upside down panel, thus we do not trust this. 1106 */ 1107 i915->vbt.dsi.orientation = 1108 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1109 break; 1110 case ENABLE_ROTATION_90: 1111 i915->vbt.dsi.orientation = 1112 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1113 break; 1114 case ENABLE_ROTATION_180: 1115 i915->vbt.dsi.orientation = 1116 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1117 break; 1118 case ENABLE_ROTATION_270: 1119 i915->vbt.dsi.orientation = 1120 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1121 break; 1122 } 1123 1124 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1125 i915->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1126 } 1127 1128 /* Find the sequence block and size for the given panel. */ 1129 static const u8 * 1130 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 1131 u16 panel_id, u32 *seq_size) 1132 { 1133 u32 total = get_blocksize(sequence); 1134 const u8 *data = &sequence->data[0]; 1135 u8 current_id; 1136 u32 current_size; 1137 int header_size = sequence->version >= 3 ? 5 : 3; 1138 int index = 0; 1139 int i; 1140 1141 /* skip new block size */ 1142 if (sequence->version >= 3) 1143 data += 4; 1144 1145 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1146 if (index + header_size > total) { 1147 DRM_ERROR("Invalid sequence block (header)\n"); 1148 return NULL; 1149 } 1150 1151 current_id = *(data + index); 1152 if (sequence->version >= 3) 1153 current_size = *((const u32 *)(data + index + 1)); 1154 else 1155 current_size = *((const u16 *)(data + index + 1)); 1156 1157 index += header_size; 1158 1159 if (index + current_size > total) { 1160 DRM_ERROR("Invalid sequence block\n"); 1161 return NULL; 1162 } 1163 1164 if (current_id == panel_id) { 1165 *seq_size = current_size; 1166 return data + index; 1167 } 1168 1169 index += current_size; 1170 } 1171 1172 DRM_ERROR("Sequence block detected but no valid configuration\n"); 1173 1174 return NULL; 1175 } 1176 1177 static int goto_next_sequence(const u8 *data, int index, int total) 1178 { 1179 u16 len; 1180 1181 /* Skip Sequence Byte. */ 1182 for (index = index + 1; index < total; index += len) { 1183 u8 operation_byte = *(data + index); 1184 index++; 1185 1186 switch (operation_byte) { 1187 case MIPI_SEQ_ELEM_END: 1188 return index; 1189 case MIPI_SEQ_ELEM_SEND_PKT: 1190 if (index + 4 > total) 1191 return 0; 1192 1193 len = *((const u16 *)(data + index + 2)) + 4; 1194 break; 1195 case MIPI_SEQ_ELEM_DELAY: 1196 len = 4; 1197 break; 1198 case MIPI_SEQ_ELEM_GPIO: 1199 len = 2; 1200 break; 1201 case MIPI_SEQ_ELEM_I2C: 1202 if (index + 7 > total) 1203 return 0; 1204 len = *(data + index + 6) + 7; 1205 break; 1206 default: 1207 DRM_ERROR("Unknown operation byte\n"); 1208 return 0; 1209 } 1210 } 1211 1212 return 0; 1213 } 1214 1215 static int goto_next_sequence_v3(const u8 *data, int index, int total) 1216 { 1217 int seq_end; 1218 u16 len; 1219 u32 size_of_sequence; 1220 1221 /* 1222 * Could skip sequence based on Size of Sequence alone, but also do some 1223 * checking on the structure. 1224 */ 1225 if (total < 5) { 1226 DRM_ERROR("Too small sequence size\n"); 1227 return 0; 1228 } 1229 1230 /* Skip Sequence Byte. */ 1231 index++; 1232 1233 /* 1234 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1235 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1236 * byte. 1237 */ 1238 size_of_sequence = *((const u32 *)(data + index)); 1239 index += 4; 1240 1241 seq_end = index + size_of_sequence; 1242 if (seq_end > total) { 1243 DRM_ERROR("Invalid sequence size\n"); 1244 return 0; 1245 } 1246 1247 for (; index < total; index += len) { 1248 u8 operation_byte = *(data + index); 1249 index++; 1250 1251 if (operation_byte == MIPI_SEQ_ELEM_END) { 1252 if (index != seq_end) { 1253 DRM_ERROR("Invalid element structure\n"); 1254 return 0; 1255 } 1256 return index; 1257 } 1258 1259 len = *(data + index); 1260 index++; 1261 1262 /* 1263 * FIXME: Would be nice to check elements like for v1/v2 in 1264 * goto_next_sequence() above. 1265 */ 1266 switch (operation_byte) { 1267 case MIPI_SEQ_ELEM_SEND_PKT: 1268 case MIPI_SEQ_ELEM_DELAY: 1269 case MIPI_SEQ_ELEM_GPIO: 1270 case MIPI_SEQ_ELEM_I2C: 1271 case MIPI_SEQ_ELEM_SPI: 1272 case MIPI_SEQ_ELEM_PMIC: 1273 break; 1274 default: 1275 DRM_ERROR("Unknown operation byte %u\n", 1276 operation_byte); 1277 break; 1278 } 1279 } 1280 1281 return 0; 1282 } 1283 1284 /* 1285 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1286 * skip all delay + gpio operands and stop at the first DSI packet op. 1287 */ 1288 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915) 1289 { 1290 const u8 *data = i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1291 int index, len; 1292 1293 if (drm_WARN_ON(&i915->drm, 1294 !data || i915->vbt.dsi.seq_version != 1)) 1295 return 0; 1296 1297 /* index = 1 to skip sequence byte */ 1298 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1299 switch (data[index]) { 1300 case MIPI_SEQ_ELEM_SEND_PKT: 1301 return index == 1 ? 0 : index; 1302 case MIPI_SEQ_ELEM_DELAY: 1303 len = 5; /* 1 byte for operand + uint32 */ 1304 break; 1305 case MIPI_SEQ_ELEM_GPIO: 1306 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1307 break; 1308 default: 1309 return 0; 1310 } 1311 } 1312 1313 return 0; 1314 } 1315 1316 /* 1317 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1318 * The deassert must be done before calling intel_dsi_device_ready, so for 1319 * these devices we split the init OTP sequence into a deassert sequence and 1320 * the actual init OTP part. 1321 */ 1322 static void fixup_mipi_sequences(struct drm_i915_private *i915) 1323 { 1324 u8 *init_otp; 1325 int len; 1326 1327 /* Limit this to VLV for now. */ 1328 if (!IS_VALLEYVIEW(i915)) 1329 return; 1330 1331 /* Limit this to v1 vid-mode sequences */ 1332 if (i915->vbt.dsi.config->is_cmd_mode || 1333 i915->vbt.dsi.seq_version != 1) 1334 return; 1335 1336 /* Only do this if there are otp and assert seqs and no deassert seq */ 1337 if (!i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1338 !i915->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1339 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1340 return; 1341 1342 /* The deassert-sequence ends at the first DSI packet */ 1343 len = get_init_otp_deassert_fragment_len(i915); 1344 if (!len) 1345 return; 1346 1347 drm_dbg_kms(&i915->drm, 1348 "Using init OTP fragment to deassert reset\n"); 1349 1350 /* Copy the fragment, update seq byte and terminate it */ 1351 init_otp = (u8 *)i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1352 i915->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1353 if (!i915->vbt.dsi.deassert_seq) 1354 return; 1355 i915->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1356 i915->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1357 /* Use the copy for deassert */ 1358 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1359 i915->vbt.dsi.deassert_seq; 1360 /* Replace the last byte of the fragment with init OTP seq byte */ 1361 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1362 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1363 i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1364 } 1365 1366 static void 1367 parse_mipi_sequence(struct drm_i915_private *i915, 1368 const struct bdb_header *bdb) 1369 { 1370 int panel_type = i915->vbt.panel_type; 1371 const struct bdb_mipi_sequence *sequence; 1372 const u8 *seq_data; 1373 u32 seq_size; 1374 u8 *data; 1375 int index = 0; 1376 1377 /* Only our generic panel driver uses the sequence block. */ 1378 if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 1379 return; 1380 1381 sequence = find_section(bdb, BDB_MIPI_SEQUENCE); 1382 if (!sequence) { 1383 drm_dbg_kms(&i915->drm, 1384 "No MIPI Sequence found, parsing complete\n"); 1385 return; 1386 } 1387 1388 /* Fail gracefully for forward incompatible sequence block. */ 1389 if (sequence->version >= 4) { 1390 drm_err(&i915->drm, 1391 "Unable to parse MIPI Sequence Block v%u\n", 1392 sequence->version); 1393 return; 1394 } 1395 1396 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n", 1397 sequence->version); 1398 1399 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 1400 if (!seq_data) 1401 return; 1402 1403 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 1404 if (!data) 1405 return; 1406 1407 /* Parse the sequences, store pointers to each sequence. */ 1408 for (;;) { 1409 u8 seq_id = *(data + index); 1410 if (seq_id == MIPI_SEQ_END) 1411 break; 1412 1413 if (seq_id >= MIPI_SEQ_MAX) { 1414 drm_err(&i915->drm, "Unknown sequence %u\n", 1415 seq_id); 1416 goto err; 1417 } 1418 1419 /* Log about presence of sequences we won't run. */ 1420 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 1421 drm_dbg_kms(&i915->drm, 1422 "Unsupported sequence %u\n", seq_id); 1423 1424 i915->vbt.dsi.sequence[seq_id] = data + index; 1425 1426 if (sequence->version >= 3) 1427 index = goto_next_sequence_v3(data, index, seq_size); 1428 else 1429 index = goto_next_sequence(data, index, seq_size); 1430 if (!index) { 1431 drm_err(&i915->drm, "Invalid sequence %u\n", 1432 seq_id); 1433 goto err; 1434 } 1435 } 1436 1437 i915->vbt.dsi.data = data; 1438 i915->vbt.dsi.size = seq_size; 1439 i915->vbt.dsi.seq_version = sequence->version; 1440 1441 fixup_mipi_sequences(i915); 1442 1443 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n"); 1444 return; 1445 1446 err: 1447 kfree(data); 1448 memset(i915->vbt.dsi.sequence, 0, sizeof(i915->vbt.dsi.sequence)); 1449 } 1450 1451 static void 1452 parse_compression_parameters(struct drm_i915_private *i915, 1453 const struct bdb_header *bdb) 1454 { 1455 const struct bdb_compression_parameters *params; 1456 struct intel_bios_encoder_data *devdata; 1457 const struct child_device_config *child; 1458 u16 block_size; 1459 int index; 1460 1461 if (bdb->version < 198) 1462 return; 1463 1464 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS); 1465 if (params) { 1466 /* Sanity checks */ 1467 if (params->entry_size != sizeof(params->data[0])) { 1468 drm_dbg_kms(&i915->drm, 1469 "VBT: unsupported compression param entry size\n"); 1470 return; 1471 } 1472 1473 block_size = get_blocksize(params); 1474 if (block_size < sizeof(*params)) { 1475 drm_dbg_kms(&i915->drm, 1476 "VBT: expected 16 compression param entries\n"); 1477 return; 1478 } 1479 } 1480 1481 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 1482 child = &devdata->child; 1483 1484 if (!child->compression_enable) 1485 continue; 1486 1487 if (!params) { 1488 drm_dbg_kms(&i915->drm, 1489 "VBT: compression params not available\n"); 1490 continue; 1491 } 1492 1493 if (child->compression_method_cps) { 1494 drm_dbg_kms(&i915->drm, 1495 "VBT: CPS compression not supported\n"); 1496 continue; 1497 } 1498 1499 index = child->compression_structure_index; 1500 1501 devdata->dsc = kmemdup(¶ms->data[index], 1502 sizeof(*devdata->dsc), GFP_KERNEL); 1503 } 1504 } 1505 1506 static u8 translate_iboost(u8 val) 1507 { 1508 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 1509 1510 if (val >= ARRAY_SIZE(mapping)) { 1511 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 1512 return 0; 1513 } 1514 return mapping[val]; 1515 } 1516 1517 static const u8 cnp_ddc_pin_map[] = { 1518 [0] = 0, /* N/A */ 1519 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT, 1520 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT, 1521 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */ 1522 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */ 1523 }; 1524 1525 static const u8 icp_ddc_pin_map[] = { 1526 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1527 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1528 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT, 1529 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP, 1530 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP, 1531 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP, 1532 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP, 1533 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP, 1534 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, 1535 }; 1536 1537 static const u8 rkl_pch_tgp_ddc_pin_map[] = { 1538 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1539 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1540 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP, 1541 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP, 1542 }; 1543 1544 static const u8 adls_ddc_pin_map[] = { 1545 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1546 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP, 1547 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP, 1548 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP, 1549 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP, 1550 }; 1551 1552 static const u8 gen9bc_tgp_ddc_pin_map[] = { 1553 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1554 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP, 1555 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP, 1556 }; 1557 1558 static const u8 adlp_ddc_pin_map[] = { 1559 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1560 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1561 [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP, 1562 [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP, 1563 [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP, 1564 [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP, 1565 }; 1566 1567 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin) 1568 { 1569 const u8 *ddc_pin_map; 1570 int n_entries; 1571 1572 if (IS_ALDERLAKE_P(i915)) { 1573 ddc_pin_map = adlp_ddc_pin_map; 1574 n_entries = ARRAY_SIZE(adlp_ddc_pin_map); 1575 } else if (IS_ALDERLAKE_S(i915)) { 1576 ddc_pin_map = adls_ddc_pin_map; 1577 n_entries = ARRAY_SIZE(adls_ddc_pin_map); 1578 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) { 1579 return vbt_pin; 1580 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { 1581 ddc_pin_map = rkl_pch_tgp_ddc_pin_map; 1582 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map); 1583 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) { 1584 ddc_pin_map = gen9bc_tgp_ddc_pin_map; 1585 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map); 1586 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) { 1587 ddc_pin_map = icp_ddc_pin_map; 1588 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 1589 } else if (HAS_PCH_CNP(i915)) { 1590 ddc_pin_map = cnp_ddc_pin_map; 1591 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 1592 } else { 1593 /* Assuming direct map */ 1594 return vbt_pin; 1595 } 1596 1597 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0) 1598 return ddc_pin_map[vbt_pin]; 1599 1600 drm_dbg_kms(&i915->drm, 1601 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 1602 vbt_pin); 1603 return 0; 1604 } 1605 1606 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin) 1607 { 1608 const struct intel_bios_encoder_data *devdata; 1609 enum port port; 1610 1611 if (!ddc_pin) 1612 return PORT_NONE; 1613 1614 for_each_port(port) { 1615 devdata = i915->vbt.ports[port]; 1616 1617 if (devdata && ddc_pin == devdata->child.ddc_pin) 1618 return port; 1619 } 1620 1621 return PORT_NONE; 1622 } 1623 1624 static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata, 1625 enum port port) 1626 { 1627 struct drm_i915_private *i915 = devdata->i915; 1628 struct child_device_config *child; 1629 u8 mapped_ddc_pin; 1630 enum port p; 1631 1632 if (!devdata->child.ddc_pin) 1633 return; 1634 1635 mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin); 1636 if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) { 1637 drm_dbg_kms(&i915->drm, 1638 "Port %c has invalid DDC pin %d, " 1639 "sticking to defaults\n", 1640 port_name(port), mapped_ddc_pin); 1641 devdata->child.ddc_pin = 0; 1642 return; 1643 } 1644 1645 p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin); 1646 if (p == PORT_NONE) 1647 return; 1648 1649 drm_dbg_kms(&i915->drm, 1650 "port %c trying to use the same DDC pin (0x%x) as port %c, " 1651 "disabling port %c DVI/HDMI support\n", 1652 port_name(port), mapped_ddc_pin, 1653 port_name(p), port_name(p)); 1654 1655 /* 1656 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi 1657 * couldn't exist on the shared port. Otherwise they share the same ddc 1658 * pin and system couldn't communicate with them separately. 1659 * 1660 * Give inverse child device order the priority, last one wins. Yes, 1661 * there are real machines (eg. Asrock B250M-HDV) where VBT has both 1662 * port A and port E with the same AUX ch and we must pick port E :( 1663 */ 1664 child = &i915->vbt.ports[p]->child; 1665 1666 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 1667 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 1668 1669 child->ddc_pin = 0; 1670 } 1671 1672 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch) 1673 { 1674 const struct intel_bios_encoder_data *devdata; 1675 enum port port; 1676 1677 if (!aux_ch) 1678 return PORT_NONE; 1679 1680 for_each_port(port) { 1681 devdata = i915->vbt.ports[port]; 1682 1683 if (devdata && aux_ch == devdata->child.aux_channel) 1684 return port; 1685 } 1686 1687 return PORT_NONE; 1688 } 1689 1690 static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata, 1691 enum port port) 1692 { 1693 struct drm_i915_private *i915 = devdata->i915; 1694 struct child_device_config *child; 1695 enum port p; 1696 1697 p = get_port_by_aux_ch(i915, devdata->child.aux_channel); 1698 if (p == PORT_NONE) 1699 return; 1700 1701 drm_dbg_kms(&i915->drm, 1702 "port %c trying to use the same AUX CH (0x%x) as port %c, " 1703 "disabling port %c DP support\n", 1704 port_name(port), devdata->child.aux_channel, 1705 port_name(p), port_name(p)); 1706 1707 /* 1708 * If we have multiple ports supposedly sharing the aux channel, then DP 1709 * couldn't exist on the shared port. Otherwise they share the same aux 1710 * channel and system couldn't communicate with them separately. 1711 * 1712 * Give inverse child device order the priority, last one wins. Yes, 1713 * there are real machines (eg. Asrock B250M-HDV) where VBT has both 1714 * port A and port E with the same AUX ch and we must pick port E :( 1715 */ 1716 child = &i915->vbt.ports[p]->child; 1717 1718 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT; 1719 child->aux_channel = 0; 1720 } 1721 1722 static u8 dvo_port_type(u8 dvo_port) 1723 { 1724 switch (dvo_port) { 1725 case DVO_PORT_HDMIA: 1726 case DVO_PORT_HDMIB: 1727 case DVO_PORT_HDMIC: 1728 case DVO_PORT_HDMID: 1729 case DVO_PORT_HDMIE: 1730 case DVO_PORT_HDMIF: 1731 case DVO_PORT_HDMIG: 1732 case DVO_PORT_HDMIH: 1733 case DVO_PORT_HDMII: 1734 return DVO_PORT_HDMIA; 1735 case DVO_PORT_DPA: 1736 case DVO_PORT_DPB: 1737 case DVO_PORT_DPC: 1738 case DVO_PORT_DPD: 1739 case DVO_PORT_DPE: 1740 case DVO_PORT_DPF: 1741 case DVO_PORT_DPG: 1742 case DVO_PORT_DPH: 1743 case DVO_PORT_DPI: 1744 return DVO_PORT_DPA; 1745 case DVO_PORT_MIPIA: 1746 case DVO_PORT_MIPIB: 1747 case DVO_PORT_MIPIC: 1748 case DVO_PORT_MIPID: 1749 return DVO_PORT_MIPIA; 1750 default: 1751 return dvo_port; 1752 } 1753 } 1754 1755 static enum port __dvo_port_to_port(int n_ports, int n_dvo, 1756 const int port_mapping[][3], u8 dvo_port) 1757 { 1758 enum port port; 1759 int i; 1760 1761 for (port = PORT_A; port < n_ports; port++) { 1762 for (i = 0; i < n_dvo; i++) { 1763 if (port_mapping[port][i] == -1) 1764 break; 1765 1766 if (dvo_port == port_mapping[port][i]) 1767 return port; 1768 } 1769 } 1770 1771 return PORT_NONE; 1772 } 1773 1774 static enum port dvo_port_to_port(struct drm_i915_private *i915, 1775 u8 dvo_port) 1776 { 1777 /* 1778 * Each DDI port can have more than one value on the "DVO Port" field, 1779 * so look for all the possible values for each port. 1780 */ 1781 static const int port_mapping[][3] = { 1782 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1783 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1784 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1785 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1786 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT }, 1787 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 1788 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 1789 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 1790 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 1791 }; 1792 /* 1793 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D 1794 * map to DDI A,B,TC1,TC2 respectively. 1795 */ 1796 static const int rkl_port_mapping[][3] = { 1797 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1798 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1799 [PORT_C] = { -1 }, 1800 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1801 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1802 }; 1803 /* 1804 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E, 1805 * PORT_F and PORT_G, we need to map that to correct VBT sections. 1806 */ 1807 static const int adls_port_mapping[][3] = { 1808 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1809 [PORT_B] = { -1 }, 1810 [PORT_C] = { -1 }, 1811 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1812 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1813 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1814 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 1815 }; 1816 static const int xelpd_port_mapping[][3] = { 1817 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1818 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1819 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1820 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1821 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 1822 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 1823 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 1824 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 1825 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 1826 }; 1827 1828 if (DISPLAY_VER(i915) == 13) 1829 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping), 1830 ARRAY_SIZE(xelpd_port_mapping[0]), 1831 xelpd_port_mapping, 1832 dvo_port); 1833 else if (IS_ALDERLAKE_S(i915)) 1834 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping), 1835 ARRAY_SIZE(adls_port_mapping[0]), 1836 adls_port_mapping, 1837 dvo_port); 1838 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 1839 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), 1840 ARRAY_SIZE(rkl_port_mapping[0]), 1841 rkl_port_mapping, 1842 dvo_port); 1843 else 1844 return __dvo_port_to_port(ARRAY_SIZE(port_mapping), 1845 ARRAY_SIZE(port_mapping[0]), 1846 port_mapping, 1847 dvo_port); 1848 } 1849 1850 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate) 1851 { 1852 switch (vbt_max_link_rate) { 1853 default: 1854 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF: 1855 return 0; 1856 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20: 1857 return 2000000; 1858 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5: 1859 return 1350000; 1860 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10: 1861 return 1000000; 1862 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3: 1863 return 810000; 1864 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2: 1865 return 540000; 1866 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR: 1867 return 270000; 1868 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR: 1869 return 162000; 1870 } 1871 } 1872 1873 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate) 1874 { 1875 switch (vbt_max_link_rate) { 1876 default: 1877 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3: 1878 return 810000; 1879 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2: 1880 return 540000; 1881 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR: 1882 return 270000; 1883 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR: 1884 return 162000; 1885 } 1886 } 1887 1888 static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata) 1889 { 1890 if (!devdata || devdata->i915->vbt.version < 216) 1891 return 0; 1892 1893 if (devdata->i915->vbt.version >= 230) 1894 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate); 1895 else 1896 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate); 1897 } 1898 1899 static void sanitize_device_type(struct intel_bios_encoder_data *devdata, 1900 enum port port) 1901 { 1902 struct drm_i915_private *i915 = devdata->i915; 1903 bool is_hdmi; 1904 1905 if (port != PORT_A || DISPLAY_VER(i915) >= 12) 1906 return; 1907 1908 if (!(devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING)) 1909 return; 1910 1911 is_hdmi = !(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT); 1912 1913 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n", 1914 is_hdmi ? "/HDMI" : ""); 1915 1916 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 1917 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 1918 } 1919 1920 static bool 1921 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata) 1922 { 1923 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT; 1924 } 1925 1926 bool 1927 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata) 1928 { 1929 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 1930 } 1931 1932 bool 1933 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata) 1934 { 1935 return intel_bios_encoder_supports_dvi(devdata) && 1936 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 1937 } 1938 1939 bool 1940 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata) 1941 { 1942 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 1943 } 1944 1945 static bool 1946 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata) 1947 { 1948 return intel_bios_encoder_supports_dp(devdata) && 1949 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR; 1950 } 1951 1952 static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata) 1953 { 1954 if (!devdata || devdata->i915->vbt.version < 158) 1955 return -1; 1956 1957 return devdata->child.hdmi_level_shifter_value; 1958 } 1959 1960 static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devdata) 1961 { 1962 if (!devdata || devdata->i915->vbt.version < 204) 1963 return 0; 1964 1965 switch (devdata->child.hdmi_max_data_rate) { 1966 default: 1967 MISSING_CASE(devdata->child.hdmi_max_data_rate); 1968 fallthrough; 1969 case HDMI_MAX_DATA_RATE_PLATFORM: 1970 return 0; 1971 case HDMI_MAX_DATA_RATE_297: 1972 return 297000; 1973 case HDMI_MAX_DATA_RATE_165: 1974 return 165000; 1975 } 1976 } 1977 1978 static bool is_port_valid(struct drm_i915_private *i915, enum port port) 1979 { 1980 /* 1981 * On some ICL SKUs port F is not present, but broken VBTs mark 1982 * the port as present. Only try to initialize port F for the 1983 * SKUs that may actually have it. 1984 */ 1985 if (port == PORT_F && IS_ICELAKE(i915)) 1986 return IS_ICL_WITH_PORT_F(i915); 1987 1988 return true; 1989 } 1990 1991 static void parse_ddi_port(struct drm_i915_private *i915, 1992 struct intel_bios_encoder_data *devdata) 1993 { 1994 const struct child_device_config *child = &devdata->child; 1995 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt; 1996 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock; 1997 enum port port; 1998 1999 port = dvo_port_to_port(i915, child->dvo_port); 2000 if (port == PORT_NONE) 2001 return; 2002 2003 if (!is_port_valid(i915, port)) { 2004 drm_dbg_kms(&i915->drm, 2005 "VBT reports port %c as supported, but that can't be true: skipping\n", 2006 port_name(port)); 2007 return; 2008 } 2009 2010 if (i915->vbt.ports[port]) { 2011 drm_dbg_kms(&i915->drm, 2012 "More than one child device for port %c in VBT, using the first.\n", 2013 port_name(port)); 2014 return; 2015 } 2016 2017 sanitize_device_type(devdata, port); 2018 2019 is_dvi = intel_bios_encoder_supports_dvi(devdata); 2020 is_dp = intel_bios_encoder_supports_dp(devdata); 2021 is_crt = intel_bios_encoder_supports_crt(devdata); 2022 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2023 is_edp = intel_bios_encoder_supports_edp(devdata); 2024 2025 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata); 2026 supports_tbt = intel_bios_encoder_supports_tbt(devdata); 2027 2028 drm_dbg_kms(&i915->drm, 2029 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 2030 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, 2031 HAS_LSPCON(i915) && child->lspcon, 2032 supports_typec_usb, supports_tbt, 2033 devdata->dsc != NULL); 2034 2035 if (is_dvi) 2036 sanitize_ddc_pin(devdata, port); 2037 2038 if (is_dp) 2039 sanitize_aux_ch(devdata, port); 2040 2041 hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata); 2042 if (hdmi_level_shift >= 0) { 2043 drm_dbg_kms(&i915->drm, 2044 "Port %c VBT HDMI level shift: %d\n", 2045 port_name(port), hdmi_level_shift); 2046 } 2047 2048 max_tmds_clock = _intel_bios_max_tmds_clock(devdata); 2049 if (max_tmds_clock) 2050 drm_dbg_kms(&i915->drm, 2051 "Port %c VBT HDMI max TMDS clock: %d kHz\n", 2052 port_name(port), max_tmds_clock); 2053 2054 /* I_boost config for SKL and above */ 2055 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata); 2056 if (dp_boost_level) 2057 drm_dbg_kms(&i915->drm, 2058 "Port %c VBT (e)DP boost level: %d\n", 2059 port_name(port), dp_boost_level); 2060 2061 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata); 2062 if (hdmi_boost_level) 2063 drm_dbg_kms(&i915->drm, 2064 "Port %c VBT HDMI boost level: %d\n", 2065 port_name(port), hdmi_boost_level); 2066 2067 dp_max_link_rate = _intel_bios_dp_max_link_rate(devdata); 2068 if (dp_max_link_rate) 2069 drm_dbg_kms(&i915->drm, 2070 "Port %c VBT DP max link rate: %d\n", 2071 port_name(port), dp_max_link_rate); 2072 2073 i915->vbt.ports[port] = devdata; 2074 } 2075 2076 static void parse_ddi_ports(struct drm_i915_private *i915) 2077 { 2078 struct intel_bios_encoder_data *devdata; 2079 2080 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915)) 2081 return; 2082 2083 if (i915->vbt.version < 155) 2084 return; 2085 2086 list_for_each_entry(devdata, &i915->vbt.display_devices, node) 2087 parse_ddi_port(i915, devdata); 2088 } 2089 2090 static void 2091 parse_general_definitions(struct drm_i915_private *i915, 2092 const struct bdb_header *bdb) 2093 { 2094 const struct bdb_general_definitions *defs; 2095 struct intel_bios_encoder_data *devdata; 2096 const struct child_device_config *child; 2097 int i, child_device_num; 2098 u8 expected_size; 2099 u16 block_size; 2100 int bus_pin; 2101 2102 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); 2103 if (!defs) { 2104 drm_dbg_kms(&i915->drm, 2105 "No general definition block is found, no devices defined.\n"); 2106 return; 2107 } 2108 2109 block_size = get_blocksize(defs); 2110 if (block_size < sizeof(*defs)) { 2111 drm_dbg_kms(&i915->drm, 2112 "General definitions block too small (%u)\n", 2113 block_size); 2114 return; 2115 } 2116 2117 bus_pin = defs->crt_ddc_gmbus_pin; 2118 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin); 2119 if (intel_gmbus_is_valid_pin(i915, bus_pin)) 2120 i915->vbt.crt_ddc_pin = bus_pin; 2121 2122 if (bdb->version < 106) { 2123 expected_size = 22; 2124 } else if (bdb->version < 111) { 2125 expected_size = 27; 2126 } else if (bdb->version < 195) { 2127 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 2128 } else if (bdb->version == 195) { 2129 expected_size = 37; 2130 } else if (bdb->version <= 215) { 2131 expected_size = 38; 2132 } else if (bdb->version <= 237) { 2133 expected_size = 39; 2134 } else { 2135 expected_size = sizeof(*child); 2136 BUILD_BUG_ON(sizeof(*child) < 39); 2137 drm_dbg(&i915->drm, 2138 "Expected child device config size for VBT version %u not known; assuming %u\n", 2139 bdb->version, expected_size); 2140 } 2141 2142 /* Flag an error for unexpected size, but continue anyway. */ 2143 if (defs->child_dev_size != expected_size) 2144 drm_err(&i915->drm, 2145 "Unexpected child device config size %u (expected %u for VBT version %u)\n", 2146 defs->child_dev_size, expected_size, bdb->version); 2147 2148 /* The legacy sized child device config is the minimum we need. */ 2149 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 2150 drm_dbg_kms(&i915->drm, 2151 "Child device config size %u is too small.\n", 2152 defs->child_dev_size); 2153 return; 2154 } 2155 2156 /* get the number of child device */ 2157 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 2158 2159 for (i = 0; i < child_device_num; i++) { 2160 child = child_device_ptr(defs, i); 2161 if (!child->device_type) 2162 continue; 2163 2164 drm_dbg_kms(&i915->drm, 2165 "Found VBT child device with type 0x%x\n", 2166 child->device_type); 2167 2168 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2169 if (!devdata) 2170 break; 2171 2172 devdata->i915 = i915; 2173 2174 /* 2175 * Copy as much as we know (sizeof) and is available 2176 * (child_dev_size) of the child device config. Accessing the 2177 * data must depend on VBT version. 2178 */ 2179 memcpy(&devdata->child, child, 2180 min_t(size_t, defs->child_dev_size, sizeof(*child))); 2181 2182 list_add_tail(&devdata->node, &i915->vbt.display_devices); 2183 } 2184 2185 if (list_empty(&i915->vbt.display_devices)) 2186 drm_dbg_kms(&i915->drm, 2187 "no child dev is parsed from VBT\n"); 2188 } 2189 2190 /* Common defaults which may be overridden by VBT. */ 2191 static void 2192 init_vbt_defaults(struct drm_i915_private *i915) 2193 { 2194 i915->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 2195 2196 /* Default to having backlight */ 2197 i915->vbt.backlight.present = true; 2198 2199 /* LFP panel data */ 2200 i915->vbt.lvds_dither = 1; 2201 2202 /* SDVO panel data */ 2203 i915->vbt.sdvo_lvds_vbt_mode = NULL; 2204 2205 /* general features */ 2206 i915->vbt.int_tv_support = 1; 2207 i915->vbt.int_crt_support = 1; 2208 2209 /* driver features */ 2210 i915->vbt.int_lvds_support = 1; 2211 2212 /* Default to using SSC */ 2213 i915->vbt.lvds_use_ssc = 1; 2214 /* 2215 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 2216 * clock for LVDS. 2217 */ 2218 i915->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915, 2219 !HAS_PCH_SPLIT(i915)); 2220 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n", 2221 i915->vbt.lvds_ssc_freq); 2222 } 2223 2224 /* Defaults to initialize only if there is no VBT. */ 2225 static void 2226 init_vbt_missing_defaults(struct drm_i915_private *i915) 2227 { 2228 enum port port; 2229 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | 2230 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F); 2231 2232 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915)) 2233 return; 2234 2235 for_each_port_masked(port, ports) { 2236 struct intel_bios_encoder_data *devdata; 2237 struct child_device_config *child; 2238 enum phy phy = intel_port_to_phy(i915, port); 2239 2240 /* 2241 * VBT has the TypeC mode (native,TBT/USB) and we don't want 2242 * to detect it. 2243 */ 2244 if (intel_phy_is_tc(i915, phy)) 2245 continue; 2246 2247 /* Create fake child device config */ 2248 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2249 if (!devdata) 2250 break; 2251 2252 devdata->i915 = i915; 2253 child = &devdata->child; 2254 2255 if (port == PORT_F) 2256 child->dvo_port = DVO_PORT_HDMIF; 2257 else if (port == PORT_E) 2258 child->dvo_port = DVO_PORT_HDMIE; 2259 else 2260 child->dvo_port = DVO_PORT_HDMIA + port; 2261 2262 if (port != PORT_A && port != PORT_E) 2263 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING; 2264 2265 if (port != PORT_E) 2266 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2267 2268 if (port == PORT_A) 2269 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR; 2270 2271 list_add_tail(&devdata->node, &i915->vbt.display_devices); 2272 2273 drm_dbg_kms(&i915->drm, 2274 "Generating default VBT child device with type 0x04%x on port %c\n", 2275 child->device_type, port_name(port)); 2276 } 2277 2278 /* Bypass some minimum baseline VBT version checks */ 2279 i915->vbt.version = 155; 2280 } 2281 2282 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 2283 { 2284 const void *_vbt = vbt; 2285 2286 return _vbt + vbt->bdb_offset; 2287 } 2288 2289 /** 2290 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 2291 * @buf: pointer to a buffer to validate 2292 * @size: size of the buffer 2293 * 2294 * Returns true on valid VBT. 2295 */ 2296 bool intel_bios_is_valid_vbt(const void *buf, size_t size) 2297 { 2298 const struct vbt_header *vbt = buf; 2299 const struct bdb_header *bdb; 2300 2301 if (!vbt) 2302 return false; 2303 2304 if (sizeof(struct vbt_header) > size) { 2305 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 2306 return false; 2307 } 2308 2309 if (memcmp(vbt->signature, "$VBT", 4)) { 2310 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 2311 return false; 2312 } 2313 2314 if (vbt->vbt_size > size) { 2315 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 2316 return false; 2317 } 2318 2319 size = vbt->vbt_size; 2320 2321 if (range_overflows_t(size_t, 2322 vbt->bdb_offset, 2323 sizeof(struct bdb_header), 2324 size)) { 2325 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 2326 return false; 2327 } 2328 2329 bdb = get_bdb_header(vbt); 2330 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 2331 DRM_DEBUG_DRIVER("BDB incomplete\n"); 2332 return false; 2333 } 2334 2335 return vbt; 2336 } 2337 2338 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) 2339 { 2340 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); 2341 void __iomem *p = NULL, *oprom; 2342 struct vbt_header *vbt; 2343 u16 vbt_size; 2344 size_t i, size; 2345 2346 oprom = pci_map_rom(pdev, &size); 2347 if (!oprom) 2348 return NULL; 2349 2350 /* Scour memory looking for the VBT signature. */ 2351 for (i = 0; i + 4 < size; i += 4) { 2352 if (ioread32(oprom + i) != *((const u32 *)"$VBT")) 2353 continue; 2354 2355 p = oprom + i; 2356 size -= i; 2357 break; 2358 } 2359 2360 if (!p) 2361 goto err_unmap_oprom; 2362 2363 if (sizeof(struct vbt_header) > size) { 2364 drm_dbg(&i915->drm, "VBT header incomplete\n"); 2365 goto err_unmap_oprom; 2366 } 2367 2368 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size)); 2369 if (vbt_size > size) { 2370 drm_dbg(&i915->drm, 2371 "VBT incomplete (vbt_size overflows)\n"); 2372 goto err_unmap_oprom; 2373 } 2374 2375 /* The rest will be validated by intel_bios_is_valid_vbt() */ 2376 vbt = kmalloc(vbt_size, GFP_KERNEL); 2377 if (!vbt) 2378 goto err_unmap_oprom; 2379 2380 memcpy_fromio(vbt, p, vbt_size); 2381 2382 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2383 goto err_free_vbt; 2384 2385 pci_unmap_rom(pdev, oprom); 2386 2387 return vbt; 2388 2389 err_free_vbt: 2390 kfree(vbt); 2391 err_unmap_oprom: 2392 pci_unmap_rom(pdev, oprom); 2393 2394 return NULL; 2395 } 2396 2397 /** 2398 * intel_bios_init - find VBT and initialize settings from the BIOS 2399 * @i915: i915 device instance 2400 * 2401 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 2402 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 2403 * initialize some defaults if the VBT is not present at all. 2404 */ 2405 void intel_bios_init(struct drm_i915_private *i915) 2406 { 2407 const struct vbt_header *vbt = i915->opregion.vbt; 2408 struct vbt_header *oprom_vbt = NULL; 2409 const struct bdb_header *bdb; 2410 2411 INIT_LIST_HEAD(&i915->vbt.display_devices); 2412 2413 if (!HAS_DISPLAY(i915)) { 2414 drm_dbg_kms(&i915->drm, 2415 "Skipping VBT init due to disabled display.\n"); 2416 return; 2417 } 2418 2419 init_vbt_defaults(i915); 2420 2421 /* If the OpRegion does not have VBT, look in PCI ROM. */ 2422 if (!vbt) { 2423 oprom_vbt = oprom_get_vbt(i915); 2424 if (!oprom_vbt) 2425 goto out; 2426 2427 vbt = oprom_vbt; 2428 2429 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n"); 2430 } 2431 2432 bdb = get_bdb_header(vbt); 2433 i915->vbt.version = bdb->version; 2434 2435 drm_dbg_kms(&i915->drm, 2436 "VBT signature \"%.*s\", BDB version %d\n", 2437 (int)sizeof(vbt->signature), vbt->signature, bdb->version); 2438 2439 /* Grab useful general definitions */ 2440 parse_general_features(i915, bdb); 2441 parse_general_definitions(i915, bdb); 2442 parse_panel_options(i915, bdb); 2443 parse_panel_dtd(i915, bdb); 2444 parse_lfp_backlight(i915, bdb); 2445 parse_sdvo_panel_data(i915, bdb); 2446 parse_driver_features(i915, bdb); 2447 parse_power_conservation_features(i915, bdb); 2448 parse_edp(i915, bdb); 2449 parse_psr(i915, bdb); 2450 parse_mipi_config(i915, bdb); 2451 parse_mipi_sequence(i915, bdb); 2452 2453 /* Depends on child device list */ 2454 parse_compression_parameters(i915, bdb); 2455 2456 out: 2457 if (!vbt) { 2458 drm_info(&i915->drm, 2459 "Failed to find VBIOS tables (VBT)\n"); 2460 init_vbt_missing_defaults(i915); 2461 } 2462 2463 /* Further processing on pre-parsed or generated child device data */ 2464 parse_sdvo_device_mapping(i915); 2465 parse_ddi_ports(i915); 2466 2467 kfree(oprom_vbt); 2468 } 2469 2470 /** 2471 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 2472 * @i915: i915 device instance 2473 */ 2474 void intel_bios_driver_remove(struct drm_i915_private *i915) 2475 { 2476 struct intel_bios_encoder_data *devdata, *n; 2477 2478 list_for_each_entry_safe(devdata, n, &i915->vbt.display_devices, node) { 2479 list_del(&devdata->node); 2480 kfree(devdata->dsc); 2481 kfree(devdata); 2482 } 2483 2484 kfree(i915->vbt.sdvo_lvds_vbt_mode); 2485 i915->vbt.sdvo_lvds_vbt_mode = NULL; 2486 kfree(i915->vbt.lfp_lvds_vbt_mode); 2487 i915->vbt.lfp_lvds_vbt_mode = NULL; 2488 kfree(i915->vbt.dsi.data); 2489 i915->vbt.dsi.data = NULL; 2490 kfree(i915->vbt.dsi.pps); 2491 i915->vbt.dsi.pps = NULL; 2492 kfree(i915->vbt.dsi.config); 2493 i915->vbt.dsi.config = NULL; 2494 kfree(i915->vbt.dsi.deassert_seq); 2495 i915->vbt.dsi.deassert_seq = NULL; 2496 } 2497 2498 /** 2499 * intel_bios_is_tv_present - is integrated TV present in VBT 2500 * @i915: i915 device instance 2501 * 2502 * Return true if TV is present. If no child devices were parsed from VBT, 2503 * assume TV is present. 2504 */ 2505 bool intel_bios_is_tv_present(struct drm_i915_private *i915) 2506 { 2507 const struct intel_bios_encoder_data *devdata; 2508 const struct child_device_config *child; 2509 2510 if (!i915->vbt.int_tv_support) 2511 return false; 2512 2513 if (list_empty(&i915->vbt.display_devices)) 2514 return true; 2515 2516 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2517 child = &devdata->child; 2518 2519 /* 2520 * If the device type is not TV, continue. 2521 */ 2522 switch (child->device_type) { 2523 case DEVICE_TYPE_INT_TV: 2524 case DEVICE_TYPE_TV: 2525 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 2526 break; 2527 default: 2528 continue; 2529 } 2530 /* Only when the addin_offset is non-zero, it is regarded 2531 * as present. 2532 */ 2533 if (child->addin_offset) 2534 return true; 2535 } 2536 2537 return false; 2538 } 2539 2540 /** 2541 * intel_bios_is_lvds_present - is LVDS present in VBT 2542 * @i915: i915 device instance 2543 * @i2c_pin: i2c pin for LVDS if present 2544 * 2545 * Return true if LVDS is present. If no child devices were parsed from VBT, 2546 * assume LVDS is present. 2547 */ 2548 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin) 2549 { 2550 const struct intel_bios_encoder_data *devdata; 2551 const struct child_device_config *child; 2552 2553 if (list_empty(&i915->vbt.display_devices)) 2554 return true; 2555 2556 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2557 child = &devdata->child; 2558 2559 /* If the device type is not LFP, continue. 2560 * We have to check both the new identifiers as well as the 2561 * old for compatibility with some BIOSes. 2562 */ 2563 if (child->device_type != DEVICE_TYPE_INT_LFP && 2564 child->device_type != DEVICE_TYPE_LFP) 2565 continue; 2566 2567 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin)) 2568 *i2c_pin = child->i2c_pin; 2569 2570 /* However, we cannot trust the BIOS writers to populate 2571 * the VBT correctly. Since LVDS requires additional 2572 * information from AIM blocks, a non-zero addin offset is 2573 * a good indicator that the LVDS is actually present. 2574 */ 2575 if (child->addin_offset) 2576 return true; 2577 2578 /* But even then some BIOS writers perform some black magic 2579 * and instantiate the device without reference to any 2580 * additional data. Trust that if the VBT was written into 2581 * the OpRegion then they have validated the LVDS's existence. 2582 */ 2583 if (i915->opregion.vbt) 2584 return true; 2585 } 2586 2587 return false; 2588 } 2589 2590 /** 2591 * intel_bios_is_port_present - is the specified digital port present 2592 * @i915: i915 device instance 2593 * @port: port to check 2594 * 2595 * Return true if the device in %port is present. 2596 */ 2597 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port) 2598 { 2599 const struct intel_bios_encoder_data *devdata; 2600 const struct child_device_config *child; 2601 static const struct { 2602 u16 dp, hdmi; 2603 } port_mapping[] = { 2604 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2605 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2606 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2607 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2608 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2609 }; 2610 2611 if (HAS_DDI(i915)) 2612 return i915->vbt.ports[port]; 2613 2614 /* FIXME maybe deal with port A as well? */ 2615 if (drm_WARN_ON(&i915->drm, 2616 port == PORT_A) || port >= ARRAY_SIZE(port_mapping)) 2617 return false; 2618 2619 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2620 child = &devdata->child; 2621 2622 if ((child->dvo_port == port_mapping[port].dp || 2623 child->dvo_port == port_mapping[port].hdmi) && 2624 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING | 2625 DEVICE_TYPE_DISPLAYPORT_OUTPUT))) 2626 return true; 2627 } 2628 2629 return false; 2630 } 2631 2632 /** 2633 * intel_bios_is_port_edp - is the device in given port eDP 2634 * @i915: i915 device instance 2635 * @port: port to check 2636 * 2637 * Return true if the device in %port is eDP. 2638 */ 2639 bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port) 2640 { 2641 const struct intel_bios_encoder_data *devdata; 2642 const struct child_device_config *child; 2643 static const short port_mapping[] = { 2644 [PORT_B] = DVO_PORT_DPB, 2645 [PORT_C] = DVO_PORT_DPC, 2646 [PORT_D] = DVO_PORT_DPD, 2647 [PORT_E] = DVO_PORT_DPE, 2648 [PORT_F] = DVO_PORT_DPF, 2649 }; 2650 2651 if (HAS_DDI(i915)) { 2652 const struct intel_bios_encoder_data *devdata; 2653 2654 devdata = intel_bios_encoder_data_lookup(i915, port); 2655 2656 return devdata && intel_bios_encoder_supports_edp(devdata); 2657 } 2658 2659 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2660 child = &devdata->child; 2661 2662 if (child->dvo_port == port_mapping[port] && 2663 (child->device_type & DEVICE_TYPE_eDP_BITS) == 2664 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS)) 2665 return true; 2666 } 2667 2668 return false; 2669 } 2670 2671 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child) 2672 { 2673 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) != 2674 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS)) 2675 return false; 2676 2677 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA) 2678 return true; 2679 2680 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 2681 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA && 2682 child->aux_channel != 0) 2683 return true; 2684 2685 return false; 2686 } 2687 2688 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915, 2689 enum port port) 2690 { 2691 static const struct { 2692 u16 dp, hdmi; 2693 } port_mapping[] = { 2694 /* 2695 * Buggy VBTs may declare DP ports as having 2696 * HDMI type dvo_port :( So let's check both. 2697 */ 2698 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2699 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2700 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2701 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2702 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2703 }; 2704 const struct intel_bios_encoder_data *devdata; 2705 2706 if (HAS_DDI(i915)) { 2707 const struct intel_bios_encoder_data *devdata; 2708 2709 devdata = intel_bios_encoder_data_lookup(i915, port); 2710 2711 return devdata && child_dev_is_dp_dual_mode(&devdata->child); 2712 } 2713 2714 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping)) 2715 return false; 2716 2717 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2718 if ((devdata->child.dvo_port == port_mapping[port].dp || 2719 devdata->child.dvo_port == port_mapping[port].hdmi) && 2720 child_dev_is_dp_dual_mode(&devdata->child)) 2721 return true; 2722 } 2723 2724 return false; 2725 } 2726 2727 /** 2728 * intel_bios_is_dsi_present - is DSI present in VBT 2729 * @i915: i915 device instance 2730 * @port: port for DSI if present 2731 * 2732 * Return true if DSI is present, and return the port in %port. 2733 */ 2734 bool intel_bios_is_dsi_present(struct drm_i915_private *i915, 2735 enum port *port) 2736 { 2737 const struct intel_bios_encoder_data *devdata; 2738 const struct child_device_config *child; 2739 u8 dvo_port; 2740 2741 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2742 child = &devdata->child; 2743 2744 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2745 continue; 2746 2747 dvo_port = child->dvo_port; 2748 2749 if (dvo_port == DVO_PORT_MIPIA || 2750 (dvo_port == DVO_PORT_MIPIB && DISPLAY_VER(i915) >= 11) || 2751 (dvo_port == DVO_PORT_MIPIC && DISPLAY_VER(i915) < 11)) { 2752 if (port) 2753 *port = dvo_port - DVO_PORT_MIPIA; 2754 return true; 2755 } else if (dvo_port == DVO_PORT_MIPIB || 2756 dvo_port == DVO_PORT_MIPIC || 2757 dvo_port == DVO_PORT_MIPID) { 2758 drm_dbg_kms(&i915->drm, 2759 "VBT has unsupported DSI port %c\n", 2760 port_name(dvo_port - DVO_PORT_MIPIA)); 2761 } 2762 } 2763 2764 return false; 2765 } 2766 2767 static void fill_dsc(struct intel_crtc_state *crtc_state, 2768 struct dsc_compression_parameters_entry *dsc, 2769 int dsc_max_bpc) 2770 { 2771 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 2772 int bpc = 8; 2773 2774 vdsc_cfg->dsc_version_major = dsc->version_major; 2775 vdsc_cfg->dsc_version_minor = dsc->version_minor; 2776 2777 if (dsc->support_12bpc && dsc_max_bpc >= 12) 2778 bpc = 12; 2779 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 2780 bpc = 10; 2781 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 2782 bpc = 8; 2783 else 2784 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n", 2785 dsc_max_bpc); 2786 2787 crtc_state->pipe_bpp = bpc * 3; 2788 2789 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp, 2790 VBT_DSC_MAX_BPP(dsc->max_bpp)); 2791 2792 /* 2793 * FIXME: This is ugly, and slice count should take DSC engine 2794 * throughput etc. into account. 2795 * 2796 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 2797 */ 2798 if (dsc->slices_per_line & BIT(2)) { 2799 crtc_state->dsc.slice_count = 4; 2800 } else if (dsc->slices_per_line & BIT(1)) { 2801 crtc_state->dsc.slice_count = 2; 2802 } else { 2803 /* FIXME */ 2804 if (!(dsc->slices_per_line & BIT(0))) 2805 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n"); 2806 2807 crtc_state->dsc.slice_count = 1; 2808 } 2809 2810 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 2811 crtc_state->dsc.slice_count != 0) 2812 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n", 2813 crtc_state->hw.adjusted_mode.crtc_hdisplay, 2814 crtc_state->dsc.slice_count); 2815 2816 /* 2817 * The VBT rc_buffer_block_size and rc_buffer_size definitions 2818 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. 2819 */ 2820 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, 2821 dsc->rc_buffer_size); 2822 2823 /* FIXME: DSI spec says bpc + 1 for this one */ 2824 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 2825 2826 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 2827 2828 vdsc_cfg->slice_height = dsc->slice_height; 2829 } 2830 2831 /* FIXME: initially DSI specific */ 2832 bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 2833 struct intel_crtc_state *crtc_state, 2834 int dsc_max_bpc) 2835 { 2836 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2837 const struct intel_bios_encoder_data *devdata; 2838 const struct child_device_config *child; 2839 2840 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2841 child = &devdata->child; 2842 2843 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2844 continue; 2845 2846 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) { 2847 if (!devdata->dsc) 2848 return false; 2849 2850 if (crtc_state) 2851 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 2852 2853 return true; 2854 } 2855 } 2856 2857 return false; 2858 } 2859 2860 /** 2861 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port 2862 * @i915: i915 device instance 2863 * @port: port to check 2864 * 2865 * Return true if HPD should be inverted for %port. 2866 */ 2867 bool 2868 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, 2869 enum port port) 2870 { 2871 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 2872 2873 if (drm_WARN_ON_ONCE(&i915->drm, 2874 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915))) 2875 return false; 2876 2877 return devdata && devdata->child.hpd_invert; 2878 } 2879 2880 /** 2881 * intel_bios_is_lspcon_present - if LSPCON is attached on %port 2882 * @i915: i915 device instance 2883 * @port: port to check 2884 * 2885 * Return true if LSPCON is present on this port 2886 */ 2887 bool 2888 intel_bios_is_lspcon_present(const struct drm_i915_private *i915, 2889 enum port port) 2890 { 2891 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 2892 2893 return HAS_LSPCON(i915) && devdata && devdata->child.lspcon; 2894 } 2895 2896 /** 2897 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port 2898 * @i915: i915 device instance 2899 * @port: port to check 2900 * 2901 * Return true if port requires lane reversal 2902 */ 2903 bool 2904 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915, 2905 enum port port) 2906 { 2907 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 2908 2909 return devdata && devdata->child.lane_reversal; 2910 } 2911 2912 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915, 2913 enum port port) 2914 { 2915 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 2916 enum aux_ch aux_ch; 2917 2918 if (!devdata || !devdata->child.aux_channel) { 2919 aux_ch = (enum aux_ch)port; 2920 2921 drm_dbg_kms(&i915->drm, 2922 "using AUX %c for port %c (platform default)\n", 2923 aux_ch_name(aux_ch), port_name(port)); 2924 return aux_ch; 2925 } 2926 2927 /* 2928 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D 2929 * map to DDI A,B,TC1,TC2 respectively. 2930 * 2931 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E 2932 * map to DDI A,TC1,TC2,TC3,TC4 respectively. 2933 */ 2934 switch (devdata->child.aux_channel) { 2935 case DP_AUX_A: 2936 aux_ch = AUX_CH_A; 2937 break; 2938 case DP_AUX_B: 2939 if (IS_ALDERLAKE_S(i915)) 2940 aux_ch = AUX_CH_USBC1; 2941 else 2942 aux_ch = AUX_CH_B; 2943 break; 2944 case DP_AUX_C: 2945 if (IS_ALDERLAKE_S(i915)) 2946 aux_ch = AUX_CH_USBC2; 2947 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 2948 aux_ch = AUX_CH_USBC1; 2949 else 2950 aux_ch = AUX_CH_C; 2951 break; 2952 case DP_AUX_D: 2953 if (DISPLAY_VER(i915) == 13) 2954 aux_ch = AUX_CH_D_XELPD; 2955 else if (IS_ALDERLAKE_S(i915)) 2956 aux_ch = AUX_CH_USBC3; 2957 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 2958 aux_ch = AUX_CH_USBC2; 2959 else 2960 aux_ch = AUX_CH_D; 2961 break; 2962 case DP_AUX_E: 2963 if (DISPLAY_VER(i915) == 13) 2964 aux_ch = AUX_CH_E_XELPD; 2965 else if (IS_ALDERLAKE_S(i915)) 2966 aux_ch = AUX_CH_USBC4; 2967 else 2968 aux_ch = AUX_CH_E; 2969 break; 2970 case DP_AUX_F: 2971 if (DISPLAY_VER(i915) == 13) 2972 aux_ch = AUX_CH_USBC1; 2973 else 2974 aux_ch = AUX_CH_F; 2975 break; 2976 case DP_AUX_G: 2977 if (DISPLAY_VER(i915) == 13) 2978 aux_ch = AUX_CH_USBC2; 2979 else 2980 aux_ch = AUX_CH_G; 2981 break; 2982 case DP_AUX_H: 2983 if (DISPLAY_VER(i915) == 13) 2984 aux_ch = AUX_CH_USBC3; 2985 else 2986 aux_ch = AUX_CH_H; 2987 break; 2988 case DP_AUX_I: 2989 if (DISPLAY_VER(i915) == 13) 2990 aux_ch = AUX_CH_USBC4; 2991 else 2992 aux_ch = AUX_CH_I; 2993 break; 2994 default: 2995 MISSING_CASE(devdata->child.aux_channel); 2996 aux_ch = AUX_CH_A; 2997 break; 2998 } 2999 3000 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n", 3001 aux_ch_name(aux_ch), port_name(port)); 3002 3003 return aux_ch; 3004 } 3005 3006 int intel_bios_max_tmds_clock(struct intel_encoder *encoder) 3007 { 3008 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3009 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3010 3011 return _intel_bios_max_tmds_clock(devdata); 3012 } 3013 3014 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */ 3015 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder) 3016 { 3017 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3018 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3019 3020 return _intel_bios_hdmi_level_shift(devdata); 3021 } 3022 3023 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata) 3024 { 3025 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost) 3026 return 0; 3027 3028 return translate_iboost(devdata->child.dp_iboost_level); 3029 } 3030 3031 int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata) 3032 { 3033 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost) 3034 return 0; 3035 3036 return translate_iboost(devdata->child.hdmi_iboost_level); 3037 } 3038 3039 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder) 3040 { 3041 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3042 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3043 3044 return _intel_bios_dp_max_link_rate(devdata); 3045 } 3046 3047 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder) 3048 { 3049 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3050 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3051 3052 if (!devdata || !devdata->child.ddc_pin) 3053 return 0; 3054 3055 return map_ddc_pin(i915, devdata->child.ddc_pin); 3056 } 3057 3058 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata) 3059 { 3060 return devdata->i915->vbt.version >= 195 && devdata->child.dp_usb_type_c; 3061 } 3062 3063 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata) 3064 { 3065 return devdata->i915->vbt.version >= 209 && devdata->child.tbt; 3066 } 3067 3068 const struct intel_bios_encoder_data * 3069 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port) 3070 { 3071 return i915->vbt.ports[port]; 3072 } 3073