1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <drm/display/drm_dp_helper.h> 29 #include <drm/display/drm_dsc_helper.h> 30 #include <drm/drm_edid.h> 31 32 #include "i915_drv.h" 33 #include "i915_reg.h" 34 #include "intel_display.h" 35 #include "intel_display_types.h" 36 #include "intel_gmbus.h" 37 38 #define _INTEL_BIOS_PRIVATE 39 #include "intel_vbt_defs.h" 40 41 /** 42 * DOC: Video BIOS Table (VBT) 43 * 44 * The Video BIOS Table, or VBT, provides platform and board specific 45 * configuration information to the driver that is not discoverable or available 46 * through other means. The configuration is mostly related to display 47 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 48 * the PCI ROM. 49 * 50 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 51 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 52 * contain the actual configuration information. The VBT Header, and thus the 53 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 54 * BDB Header. The data blocks are concatenated after the BDB Header. The data 55 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 56 * data. (Block 53, the MIPI Sequence Block is an exception.) 57 * 58 * The driver parses the VBT during load. The relevant information is stored in 59 * driver private data for ease of use, and the actual VBT is not read after 60 * that. 61 */ 62 63 /* Wrapper for VBT child device config */ 64 struct intel_bios_encoder_data { 65 struct drm_i915_private *i915; 66 67 struct child_device_config child; 68 struct dsc_compression_parameters_entry *dsc; 69 struct list_head node; 70 }; 71 72 #define SLAVE_ADDR1 0x70 73 #define SLAVE_ADDR2 0x72 74 75 /* Get BDB block size given a pointer to Block ID. */ 76 static u32 _get_blocksize(const u8 *block_base) 77 { 78 /* The MIPI Sequence Block v3+ has a separate size field. */ 79 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 80 return *((const u32 *)(block_base + 4)); 81 else 82 return *((const u16 *)(block_base + 1)); 83 } 84 85 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 86 static u32 get_blocksize(const void *block_data) 87 { 88 return _get_blocksize(block_data - 3); 89 } 90 91 static const void * 92 find_raw_section(const void *_bdb, enum bdb_block_id section_id) 93 { 94 const struct bdb_header *bdb = _bdb; 95 const u8 *base = _bdb; 96 int index = 0; 97 u32 total, current_size; 98 enum bdb_block_id current_id; 99 100 /* skip to first section */ 101 index += bdb->header_size; 102 total = bdb->bdb_size; 103 104 /* walk the sections looking for section_id */ 105 while (index + 3 < total) { 106 current_id = *(base + index); 107 current_size = _get_blocksize(base + index); 108 index += 3; 109 110 if (index + current_size > total) 111 return NULL; 112 113 if (current_id == section_id) 114 return base + index; 115 116 index += current_size; 117 } 118 119 return NULL; 120 } 121 122 /* 123 * Offset from the start of BDB to the start of the 124 * block data (just past the block header). 125 */ 126 static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id) 127 { 128 const void *block; 129 130 block = find_raw_section(bdb, section_id); 131 if (!block) 132 return 0; 133 134 return block - bdb; 135 } 136 137 struct bdb_block_entry { 138 struct list_head node; 139 enum bdb_block_id section_id; 140 u8 data[]; 141 }; 142 143 static const void * 144 find_section(struct drm_i915_private *i915, 145 enum bdb_block_id section_id) 146 { 147 struct bdb_block_entry *entry; 148 149 list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) { 150 if (entry->section_id == section_id) 151 return entry->data + 3; 152 } 153 154 return NULL; 155 } 156 157 static const struct { 158 enum bdb_block_id section_id; 159 size_t min_size; 160 } bdb_blocks[] = { 161 { .section_id = BDB_GENERAL_FEATURES, 162 .min_size = sizeof(struct bdb_general_features), }, 163 { .section_id = BDB_GENERAL_DEFINITIONS, 164 .min_size = sizeof(struct bdb_general_definitions), }, 165 { .section_id = BDB_PSR, 166 .min_size = sizeof(struct bdb_psr), }, 167 { .section_id = BDB_DRIVER_FEATURES, 168 .min_size = sizeof(struct bdb_driver_features), }, 169 { .section_id = BDB_SDVO_LVDS_OPTIONS, 170 .min_size = sizeof(struct bdb_sdvo_lvds_options), }, 171 { .section_id = BDB_SDVO_PANEL_DTDS, 172 .min_size = sizeof(struct bdb_sdvo_panel_dtds), }, 173 { .section_id = BDB_EDP, 174 .min_size = sizeof(struct bdb_edp), }, 175 { .section_id = BDB_LVDS_OPTIONS, 176 .min_size = sizeof(struct bdb_lvds_options), }, 177 /* 178 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS, 179 * so keep the two ordered. 180 */ 181 { .section_id = BDB_LVDS_LFP_DATA_PTRS, 182 .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), }, 183 { .section_id = BDB_LVDS_LFP_DATA, 184 .min_size = 0, /* special case */ }, 185 { .section_id = BDB_LVDS_BACKLIGHT, 186 .min_size = sizeof(struct bdb_lfp_backlight_data), }, 187 { .section_id = BDB_LFP_POWER, 188 .min_size = sizeof(struct bdb_lfp_power), }, 189 { .section_id = BDB_MIPI_CONFIG, 190 .min_size = sizeof(struct bdb_mipi_config), }, 191 { .section_id = BDB_MIPI_SEQUENCE, 192 .min_size = sizeof(struct bdb_mipi_sequence) }, 193 { .section_id = BDB_COMPRESSION_PARAMETERS, 194 .min_size = sizeof(struct bdb_compression_parameters), }, 195 { .section_id = BDB_GENERIC_DTD, 196 .min_size = sizeof(struct bdb_generic_dtd), }, 197 }; 198 199 static size_t lfp_data_min_size(struct drm_i915_private *i915) 200 { 201 const struct bdb_lvds_lfp_data_ptrs *ptrs; 202 size_t size; 203 204 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS); 205 if (!ptrs) 206 return 0; 207 208 size = sizeof(struct bdb_lvds_lfp_data); 209 if (ptrs->panel_name.table_size) 210 size = max(size, ptrs->panel_name.offset + 211 sizeof(struct bdb_lvds_lfp_data_tail)); 212 213 return size; 214 } 215 216 static bool validate_lfp_data_ptrs(const void *bdb, 217 const struct bdb_lvds_lfp_data_ptrs *ptrs) 218 { 219 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size; 220 int data_block_size, lfp_data_size; 221 const void *data_block; 222 int i; 223 224 data_block = find_raw_section(bdb, BDB_LVDS_LFP_DATA); 225 if (!data_block) 226 return false; 227 228 data_block_size = get_blocksize(data_block); 229 if (data_block_size == 0) 230 return false; 231 232 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */ 233 if (ptrs->lvds_entries != 3) 234 return false; 235 236 fp_timing_size = ptrs->ptr[0].fp_timing.table_size; 237 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size; 238 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size; 239 panel_name_size = ptrs->panel_name.table_size; 240 241 /* fp_timing has variable size */ 242 if (fp_timing_size < 32 || 243 dvo_timing_size != sizeof(struct lvds_dvo_timing) || 244 panel_pnp_id_size != sizeof(struct lvds_pnp_id)) 245 return false; 246 247 /* panel_name is not present in old VBTs */ 248 if (panel_name_size != 0 && 249 panel_name_size != sizeof(struct lvds_lfp_panel_name)) 250 return false; 251 252 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset; 253 if (16 * lfp_data_size > data_block_size) 254 return false; 255 256 /* make sure the table entries have uniform size */ 257 for (i = 1; i < 16; i++) { 258 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size || 259 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size || 260 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size) 261 return false; 262 263 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size || 264 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size || 265 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size) 266 return false; 267 } 268 269 /* 270 * Except for vlv/chv machines all real VBTs seem to have 6 271 * unaccounted bytes in the fp_timing table. And it doesn't 272 * appear to be a really intentional hole as the fp_timing 273 * 0xffff terminator is always within those 6 missing bytes. 274 */ 275 if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size) 276 fp_timing_size += 6; 277 278 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size) 279 return false; 280 281 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset || 282 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset || 283 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size) 284 return false; 285 286 /* make sure the tables fit inside the data block */ 287 for (i = 0; i < 16; i++) { 288 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size || 289 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size || 290 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size) 291 return false; 292 } 293 294 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size) 295 return false; 296 297 /* make sure fp_timing terminators are present at expected locations */ 298 for (i = 0; i < 16; i++) { 299 const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset + 300 fp_timing_size - 2; 301 302 if (*t != 0xffff) 303 return false; 304 } 305 306 return true; 307 } 308 309 /* make the data table offsets relative to the data block */ 310 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block) 311 { 312 struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block; 313 u32 offset; 314 int i; 315 316 offset = raw_block_offset(bdb, BDB_LVDS_LFP_DATA); 317 318 for (i = 0; i < 16; i++) { 319 if (ptrs->ptr[i].fp_timing.offset < offset || 320 ptrs->ptr[i].dvo_timing.offset < offset || 321 ptrs->ptr[i].panel_pnp_id.offset < offset) 322 return false; 323 324 ptrs->ptr[i].fp_timing.offset -= offset; 325 ptrs->ptr[i].dvo_timing.offset -= offset; 326 ptrs->ptr[i].panel_pnp_id.offset -= offset; 327 } 328 329 if (ptrs->panel_name.table_size) { 330 if (ptrs->panel_name.offset < offset) 331 return false; 332 333 ptrs->panel_name.offset -= offset; 334 } 335 336 return validate_lfp_data_ptrs(bdb, ptrs); 337 } 338 339 static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table, 340 int table_size, int total_size) 341 { 342 if (total_size < table_size) 343 return total_size; 344 345 table->table_size = table_size; 346 table->offset = total_size - table_size; 347 348 return total_size - table_size; 349 } 350 351 static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next, 352 const struct lvds_lfp_data_ptr_table *prev, 353 int size) 354 { 355 next->table_size = prev->table_size; 356 next->offset = prev->offset + size; 357 } 358 359 static void *generate_lfp_data_ptrs(struct drm_i915_private *i915, 360 const void *bdb) 361 { 362 int i, size, table_size, block_size, offset, fp_timing_size; 363 struct bdb_lvds_lfp_data_ptrs *ptrs; 364 const void *block; 365 void *ptrs_block; 366 367 /* 368 * The hardcoded fp_timing_size is only valid for 369 * modernish VBTs. All older VBTs definitely should 370 * include block 41 and thus we don't need to 371 * generate one. 372 */ 373 if (i915->display.vbt.version < 155) 374 return NULL; 375 376 fp_timing_size = 38; 377 378 block = find_raw_section(bdb, BDB_LVDS_LFP_DATA); 379 if (!block) 380 return NULL; 381 382 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n"); 383 384 block_size = get_blocksize(block); 385 386 size = fp_timing_size + sizeof(struct lvds_dvo_timing) + 387 sizeof(struct lvds_pnp_id); 388 if (size * 16 > block_size) 389 return NULL; 390 391 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL); 392 if (!ptrs_block) 393 return NULL; 394 395 *(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS; 396 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs); 397 ptrs = ptrs_block + 3; 398 399 table_size = sizeof(struct lvds_pnp_id); 400 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size); 401 402 table_size = sizeof(struct lvds_dvo_timing); 403 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size); 404 405 table_size = fp_timing_size; 406 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size); 407 408 if (ptrs->ptr[0].fp_timing.table_size) 409 ptrs->lvds_entries++; 410 if (ptrs->ptr[0].dvo_timing.table_size) 411 ptrs->lvds_entries++; 412 if (ptrs->ptr[0].panel_pnp_id.table_size) 413 ptrs->lvds_entries++; 414 415 if (size != 0 || ptrs->lvds_entries != 3) { 416 kfree(ptrs_block); 417 return NULL; 418 } 419 420 size = fp_timing_size + sizeof(struct lvds_dvo_timing) + 421 sizeof(struct lvds_pnp_id); 422 for (i = 1; i < 16; i++) { 423 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size); 424 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size); 425 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size); 426 } 427 428 table_size = sizeof(struct lvds_lfp_panel_name); 429 430 if (16 * (size + table_size) <= block_size) { 431 ptrs->panel_name.table_size = table_size; 432 ptrs->panel_name.offset = size * 16; 433 } 434 435 offset = block - bdb; 436 437 for (i = 0; i < 16; i++) { 438 ptrs->ptr[i].fp_timing.offset += offset; 439 ptrs->ptr[i].dvo_timing.offset += offset; 440 ptrs->ptr[i].panel_pnp_id.offset += offset; 441 } 442 443 if (ptrs->panel_name.table_size) 444 ptrs->panel_name.offset += offset; 445 446 return ptrs_block; 447 } 448 449 static void 450 init_bdb_block(struct drm_i915_private *i915, 451 const void *bdb, enum bdb_block_id section_id, 452 size_t min_size) 453 { 454 struct bdb_block_entry *entry; 455 void *temp_block = NULL; 456 const void *block; 457 size_t block_size; 458 459 block = find_raw_section(bdb, section_id); 460 461 /* Modern VBTs lack the LFP data table pointers block, make one up */ 462 if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) { 463 temp_block = generate_lfp_data_ptrs(i915, bdb); 464 if (temp_block) 465 block = temp_block + 3; 466 } 467 if (!block) 468 return; 469 470 drm_WARN(&i915->drm, min_size == 0, 471 "Block %d min_size is zero\n", section_id); 472 473 block_size = get_blocksize(block); 474 475 /* 476 * Version number and new block size are considered 477 * part of the header for MIPI sequenece block v3+. 478 */ 479 if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3) 480 block_size += 5; 481 482 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3), 483 GFP_KERNEL); 484 if (!entry) { 485 kfree(temp_block); 486 return; 487 } 488 489 entry->section_id = section_id; 490 memcpy(entry->data, block - 3, block_size + 3); 491 492 kfree(temp_block); 493 494 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n", 495 section_id, block_size, min_size); 496 497 if (section_id == BDB_LVDS_LFP_DATA_PTRS && 498 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) { 499 drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n"); 500 kfree(entry); 501 return; 502 } 503 504 list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks); 505 } 506 507 static void init_bdb_blocks(struct drm_i915_private *i915, 508 const void *bdb) 509 { 510 int i; 511 512 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) { 513 enum bdb_block_id section_id = bdb_blocks[i].section_id; 514 size_t min_size = bdb_blocks[i].min_size; 515 516 if (section_id == BDB_LVDS_LFP_DATA) 517 min_size = lfp_data_min_size(i915); 518 519 init_bdb_block(i915, bdb, section_id, min_size); 520 } 521 } 522 523 static void 524 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 525 const struct lvds_dvo_timing *dvo_timing) 526 { 527 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 528 dvo_timing->hactive_lo; 529 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 530 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 531 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 532 ((dvo_timing->hsync_pulse_width_hi << 8) | 533 dvo_timing->hsync_pulse_width_lo); 534 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 535 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 536 537 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 538 dvo_timing->vactive_lo; 539 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 540 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 541 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 542 ((dvo_timing->vsync_pulse_width_hi << 4) | 543 dvo_timing->vsync_pulse_width_lo); 544 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 545 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 546 panel_fixed_mode->clock = dvo_timing->clock * 10; 547 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 548 549 if (dvo_timing->hsync_positive) 550 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 551 else 552 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 553 554 if (dvo_timing->vsync_positive) 555 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 556 else 557 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 558 559 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 560 dvo_timing->himage_lo; 561 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 562 dvo_timing->vimage_lo; 563 564 /* Some VBTs have bogus h/vtotal values */ 565 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 566 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 567 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 568 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 569 570 drm_mode_set_name(panel_fixed_mode); 571 } 572 573 static const struct lvds_dvo_timing * 574 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data, 575 const struct bdb_lvds_lfp_data_ptrs *ptrs, 576 int index) 577 { 578 return (const void *)data + ptrs->ptr[index].dvo_timing.offset; 579 } 580 581 static const struct lvds_fp_timing * 582 get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data, 583 const struct bdb_lvds_lfp_data_ptrs *ptrs, 584 int index) 585 { 586 return (const void *)data + ptrs->ptr[index].fp_timing.offset; 587 } 588 589 static const struct lvds_pnp_id * 590 get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data, 591 const struct bdb_lvds_lfp_data_ptrs *ptrs, 592 int index) 593 { 594 return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset; 595 } 596 597 static const struct bdb_lvds_lfp_data_tail * 598 get_lfp_data_tail(const struct bdb_lvds_lfp_data *data, 599 const struct bdb_lvds_lfp_data_ptrs *ptrs) 600 { 601 if (ptrs->panel_name.table_size) 602 return (const void *)data + ptrs->panel_name.offset; 603 else 604 return NULL; 605 } 606 607 static void dump_pnp_id(struct drm_i915_private *i915, 608 const struct lvds_pnp_id *pnp_id, 609 const char *name) 610 { 611 u16 mfg_name = be16_to_cpu((__force __be16)pnp_id->mfg_name); 612 char vend[4]; 613 614 drm_dbg_kms(&i915->drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n", 615 name, drm_edid_decode_mfg_id(mfg_name, vend), 616 pnp_id->mfg_name, pnp_id->product_code, pnp_id->serial, 617 pnp_id->mfg_week, pnp_id->mfg_year + 1990); 618 } 619 620 static int opregion_get_panel_type(struct drm_i915_private *i915, 621 const struct intel_bios_encoder_data *devdata, 622 const struct drm_edid *drm_edid, bool use_fallback) 623 { 624 return intel_opregion_get_panel_type(i915); 625 } 626 627 static int vbt_get_panel_type(struct drm_i915_private *i915, 628 const struct intel_bios_encoder_data *devdata, 629 const struct drm_edid *drm_edid, bool use_fallback) 630 { 631 const struct bdb_lvds_options *lvds_options; 632 633 lvds_options = find_section(i915, BDB_LVDS_OPTIONS); 634 if (!lvds_options) 635 return -1; 636 637 if (lvds_options->panel_type > 0xf && 638 lvds_options->panel_type != 0xff) { 639 drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n", 640 lvds_options->panel_type); 641 return -1; 642 } 643 644 if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2) 645 return lvds_options->panel_type2; 646 647 drm_WARN_ON(&i915->drm, devdata && devdata->child.handle != DEVICE_HANDLE_LFP1); 648 649 return lvds_options->panel_type; 650 } 651 652 static int pnpid_get_panel_type(struct drm_i915_private *i915, 653 const struct intel_bios_encoder_data *devdata, 654 const struct drm_edid *drm_edid, bool use_fallback) 655 { 656 const struct bdb_lvds_lfp_data *data; 657 const struct bdb_lvds_lfp_data_ptrs *ptrs; 658 const struct lvds_pnp_id *edid_id; 659 struct lvds_pnp_id edid_id_nodate; 660 const struct edid *edid = drm_edid_raw(drm_edid); /* FIXME */ 661 int i, best = -1; 662 663 if (!edid) 664 return -1; 665 666 edid_id = (const void *)&edid->mfg_id[0]; 667 668 edid_id_nodate = *edid_id; 669 edid_id_nodate.mfg_week = 0; 670 edid_id_nodate.mfg_year = 0; 671 672 dump_pnp_id(i915, edid_id, "EDID"); 673 674 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS); 675 if (!ptrs) 676 return -1; 677 678 data = find_section(i915, BDB_LVDS_LFP_DATA); 679 if (!data) 680 return -1; 681 682 for (i = 0; i < 16; i++) { 683 const struct lvds_pnp_id *vbt_id = 684 get_lvds_pnp_id(data, ptrs, i); 685 686 /* full match? */ 687 if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id))) 688 return i; 689 690 /* 691 * Accept a match w/o date if no full match is found, 692 * and the VBT entry does not specify a date. 693 */ 694 if (best < 0 && 695 !memcmp(vbt_id, &edid_id_nodate, sizeof(*vbt_id))) 696 best = i; 697 } 698 699 return best; 700 } 701 702 static int fallback_get_panel_type(struct drm_i915_private *i915, 703 const struct intel_bios_encoder_data *devdata, 704 const struct drm_edid *drm_edid, bool use_fallback) 705 { 706 return use_fallback ? 0 : -1; 707 } 708 709 enum panel_type { 710 PANEL_TYPE_OPREGION, 711 PANEL_TYPE_VBT, 712 PANEL_TYPE_PNPID, 713 PANEL_TYPE_FALLBACK, 714 }; 715 716 static int get_panel_type(struct drm_i915_private *i915, 717 const struct intel_bios_encoder_data *devdata, 718 const struct drm_edid *drm_edid, bool use_fallback) 719 { 720 struct { 721 const char *name; 722 int (*get_panel_type)(struct drm_i915_private *i915, 723 const struct intel_bios_encoder_data *devdata, 724 const struct drm_edid *drm_edid, bool use_fallback); 725 int panel_type; 726 } panel_types[] = { 727 [PANEL_TYPE_OPREGION] = { 728 .name = "OpRegion", 729 .get_panel_type = opregion_get_panel_type, 730 }, 731 [PANEL_TYPE_VBT] = { 732 .name = "VBT", 733 .get_panel_type = vbt_get_panel_type, 734 }, 735 [PANEL_TYPE_PNPID] = { 736 .name = "PNPID", 737 .get_panel_type = pnpid_get_panel_type, 738 }, 739 [PANEL_TYPE_FALLBACK] = { 740 .name = "fallback", 741 .get_panel_type = fallback_get_panel_type, 742 }, 743 }; 744 int i; 745 746 for (i = 0; i < ARRAY_SIZE(panel_types); i++) { 747 panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata, 748 drm_edid, use_fallback); 749 750 drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf && 751 panel_types[i].panel_type != 0xff); 752 753 if (panel_types[i].panel_type >= 0) 754 drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n", 755 panel_types[i].name, panel_types[i].panel_type); 756 } 757 758 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0) 759 i = PANEL_TYPE_OPREGION; 760 else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff && 761 panel_types[PANEL_TYPE_PNPID].panel_type >= 0) 762 i = PANEL_TYPE_PNPID; 763 else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff && 764 panel_types[PANEL_TYPE_VBT].panel_type >= 0) 765 i = PANEL_TYPE_VBT; 766 else 767 i = PANEL_TYPE_FALLBACK; 768 769 drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n", 770 panel_types[i].name, panel_types[i].panel_type); 771 772 return panel_types[i].panel_type; 773 } 774 775 static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits) 776 { 777 return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1); 778 } 779 780 static bool panel_bool(unsigned int value, int panel_type) 781 { 782 return panel_bits(value, panel_type, 1); 783 } 784 785 /* Parse general panel options */ 786 static void 787 parse_panel_options(struct drm_i915_private *i915, 788 struct intel_panel *panel) 789 { 790 const struct bdb_lvds_options *lvds_options; 791 int panel_type = panel->vbt.panel_type; 792 int drrs_mode; 793 794 lvds_options = find_section(i915, BDB_LVDS_OPTIONS); 795 if (!lvds_options) 796 return; 797 798 panel->vbt.lvds_dither = lvds_options->pixel_dither; 799 800 /* 801 * Empirical evidence indicates the block size can be 802 * either 4,14,16,24+ bytes. For older VBTs no clear 803 * relationship between the block size vs. BDB version. 804 */ 805 if (get_blocksize(lvds_options) < 16) 806 return; 807 808 drrs_mode = panel_bits(lvds_options->dps_panel_type_bits, 809 panel_type, 2); 810 /* 811 * VBT has static DRRS = 0 and seamless DRRS = 2. 812 * The below piece of code is required to adjust vbt.drrs_type 813 * to match the enum drrs_support_type. 814 */ 815 switch (drrs_mode) { 816 case 0: 817 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 818 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n"); 819 break; 820 case 2: 821 panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS; 822 drm_dbg_kms(&i915->drm, 823 "DRRS supported mode is seamless\n"); 824 break; 825 default: 826 panel->vbt.drrs_type = DRRS_TYPE_NONE; 827 drm_dbg_kms(&i915->drm, 828 "DRRS not supported (VBT input)\n"); 829 break; 830 } 831 } 832 833 static void 834 parse_lfp_panel_dtd(struct drm_i915_private *i915, 835 struct intel_panel *panel, 836 const struct bdb_lvds_lfp_data *lvds_lfp_data, 837 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs) 838 { 839 const struct lvds_dvo_timing *panel_dvo_timing; 840 const struct lvds_fp_timing *fp_timing; 841 struct drm_display_mode *panel_fixed_mode; 842 int panel_type = panel->vbt.panel_type; 843 844 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 845 lvds_lfp_data_ptrs, 846 panel_type); 847 848 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 849 if (!panel_fixed_mode) 850 return; 851 852 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 853 854 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 855 856 drm_dbg_kms(&i915->drm, 857 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n", 858 DRM_MODE_ARG(panel_fixed_mode)); 859 860 fp_timing = get_lvds_fp_timing(lvds_lfp_data, 861 lvds_lfp_data_ptrs, 862 panel_type); 863 864 /* check the resolution, just to be sure */ 865 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 866 fp_timing->y_res == panel_fixed_mode->vdisplay) { 867 panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 868 drm_dbg_kms(&i915->drm, 869 "VBT initial LVDS value %x\n", 870 panel->vbt.bios_lvds_val); 871 } 872 } 873 874 static void 875 parse_lfp_data(struct drm_i915_private *i915, 876 struct intel_panel *panel) 877 { 878 const struct bdb_lvds_lfp_data *data; 879 const struct bdb_lvds_lfp_data_tail *tail; 880 const struct bdb_lvds_lfp_data_ptrs *ptrs; 881 const struct lvds_pnp_id *pnp_id; 882 int panel_type = panel->vbt.panel_type; 883 884 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS); 885 if (!ptrs) 886 return; 887 888 data = find_section(i915, BDB_LVDS_LFP_DATA); 889 if (!data) 890 return; 891 892 if (!panel->vbt.lfp_lvds_vbt_mode) 893 parse_lfp_panel_dtd(i915, panel, data, ptrs); 894 895 pnp_id = get_lvds_pnp_id(data, ptrs, panel_type); 896 dump_pnp_id(i915, pnp_id, "Panel"); 897 898 tail = get_lfp_data_tail(data, ptrs); 899 if (!tail) 900 return; 901 902 drm_dbg_kms(&i915->drm, "Panel name: %.*s\n", 903 (int)sizeof(tail->panel_name[0].name), 904 tail->panel_name[panel_type].name); 905 906 if (i915->display.vbt.version >= 188) { 907 panel->vbt.seamless_drrs_min_refresh_rate = 908 tail->seamless_drrs_min_refresh_rate[panel_type]; 909 drm_dbg_kms(&i915->drm, 910 "Seamless DRRS min refresh rate: %d Hz\n", 911 panel->vbt.seamless_drrs_min_refresh_rate); 912 } 913 } 914 915 static void 916 parse_generic_dtd(struct drm_i915_private *i915, 917 struct intel_panel *panel) 918 { 919 const struct bdb_generic_dtd *generic_dtd; 920 const struct generic_dtd_entry *dtd; 921 struct drm_display_mode *panel_fixed_mode; 922 int num_dtd; 923 924 /* 925 * Older VBTs provided DTD information for internal displays through 926 * the "LFP panel tables" block (42). As of VBT revision 229 the 927 * DTD information should be provided via a newer "generic DTD" 928 * block (58). Just to be safe, we'll try the new generic DTD block 929 * first on VBT >= 229, but still fall back to trying the old LFP 930 * block if that fails. 931 */ 932 if (i915->display.vbt.version < 229) 933 return; 934 935 generic_dtd = find_section(i915, BDB_GENERIC_DTD); 936 if (!generic_dtd) 937 return; 938 939 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 940 drm_err(&i915->drm, "GDTD size %u is too small.\n", 941 generic_dtd->gdtd_size); 942 return; 943 } else if (generic_dtd->gdtd_size != 944 sizeof(struct generic_dtd_entry)) { 945 drm_err(&i915->drm, "Unexpected GDTD size %u\n", 946 generic_dtd->gdtd_size); 947 /* DTD has unknown fields, but keep going */ 948 } 949 950 num_dtd = (get_blocksize(generic_dtd) - 951 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 952 if (panel->vbt.panel_type >= num_dtd) { 953 drm_err(&i915->drm, 954 "Panel type %d not found in table of %d DTD's\n", 955 panel->vbt.panel_type, num_dtd); 956 return; 957 } 958 959 dtd = &generic_dtd->dtd[panel->vbt.panel_type]; 960 961 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 962 if (!panel_fixed_mode) 963 return; 964 965 panel_fixed_mode->hdisplay = dtd->hactive; 966 panel_fixed_mode->hsync_start = 967 panel_fixed_mode->hdisplay + dtd->hfront_porch; 968 panel_fixed_mode->hsync_end = 969 panel_fixed_mode->hsync_start + dtd->hsync; 970 panel_fixed_mode->htotal = 971 panel_fixed_mode->hdisplay + dtd->hblank; 972 973 panel_fixed_mode->vdisplay = dtd->vactive; 974 panel_fixed_mode->vsync_start = 975 panel_fixed_mode->vdisplay + dtd->vfront_porch; 976 panel_fixed_mode->vsync_end = 977 panel_fixed_mode->vsync_start + dtd->vsync; 978 panel_fixed_mode->vtotal = 979 panel_fixed_mode->vdisplay + dtd->vblank; 980 981 panel_fixed_mode->clock = dtd->pixel_clock; 982 panel_fixed_mode->width_mm = dtd->width_mm; 983 panel_fixed_mode->height_mm = dtd->height_mm; 984 985 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 986 drm_mode_set_name(panel_fixed_mode); 987 988 if (dtd->hsync_positive_polarity) 989 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 990 else 991 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 992 993 if (dtd->vsync_positive_polarity) 994 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 995 else 996 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 997 998 drm_dbg_kms(&i915->drm, 999 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n", 1000 DRM_MODE_ARG(panel_fixed_mode)); 1001 1002 panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 1003 } 1004 1005 static void 1006 parse_lfp_backlight(struct drm_i915_private *i915, 1007 struct intel_panel *panel) 1008 { 1009 const struct bdb_lfp_backlight_data *backlight_data; 1010 const struct lfp_backlight_data_entry *entry; 1011 int panel_type = panel->vbt.panel_type; 1012 u16 level; 1013 1014 backlight_data = find_section(i915, BDB_LVDS_BACKLIGHT); 1015 if (!backlight_data) 1016 return; 1017 1018 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 1019 drm_dbg_kms(&i915->drm, 1020 "Unsupported backlight data entry size %u\n", 1021 backlight_data->entry_size); 1022 return; 1023 } 1024 1025 entry = &backlight_data->data[panel_type]; 1026 1027 panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 1028 if (!panel->vbt.backlight.present) { 1029 drm_dbg_kms(&i915->drm, 1030 "PWM backlight not present in VBT (type %u)\n", 1031 entry->type); 1032 return; 1033 } 1034 1035 panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 1036 if (i915->display.vbt.version >= 191) { 1037 size_t exp_size; 1038 1039 if (i915->display.vbt.version >= 236) 1040 exp_size = sizeof(struct bdb_lfp_backlight_data); 1041 else if (i915->display.vbt.version >= 234) 1042 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234; 1043 else 1044 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191; 1045 1046 if (get_blocksize(backlight_data) >= exp_size) { 1047 const struct lfp_backlight_control_method *method; 1048 1049 method = &backlight_data->backlight_control[panel_type]; 1050 panel->vbt.backlight.type = method->type; 1051 panel->vbt.backlight.controller = method->controller; 1052 } 1053 } 1054 1055 panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 1056 panel->vbt.backlight.active_low_pwm = entry->active_low_pwm; 1057 1058 if (i915->display.vbt.version >= 234) { 1059 u16 min_level; 1060 bool scale; 1061 1062 level = backlight_data->brightness_level[panel_type].level; 1063 min_level = backlight_data->brightness_min_level[panel_type].level; 1064 1065 if (i915->display.vbt.version >= 236) 1066 scale = backlight_data->brightness_precision_bits[panel_type] == 16; 1067 else 1068 scale = level > 255; 1069 1070 if (scale) 1071 min_level = min_level / 255; 1072 1073 if (min_level > 255) { 1074 drm_warn(&i915->drm, "Brightness min level > 255\n"); 1075 level = 255; 1076 } 1077 panel->vbt.backlight.min_brightness = min_level; 1078 1079 panel->vbt.backlight.brightness_precision_bits = 1080 backlight_data->brightness_precision_bits[panel_type]; 1081 } else { 1082 level = backlight_data->level[panel_type]; 1083 panel->vbt.backlight.min_brightness = entry->min_brightness; 1084 } 1085 1086 drm_dbg_kms(&i915->drm, 1087 "VBT backlight PWM modulation frequency %u Hz, " 1088 "active %s, min brightness %u, level %u, controller %u\n", 1089 panel->vbt.backlight.pwm_freq_hz, 1090 panel->vbt.backlight.active_low_pwm ? "low" : "high", 1091 panel->vbt.backlight.min_brightness, 1092 level, 1093 panel->vbt.backlight.controller); 1094 } 1095 1096 /* Try to find sdvo panel data */ 1097 static void 1098 parse_sdvo_panel_data(struct drm_i915_private *i915, 1099 struct intel_panel *panel) 1100 { 1101 const struct bdb_sdvo_panel_dtds *dtds; 1102 struct drm_display_mode *panel_fixed_mode; 1103 int index; 1104 1105 index = i915->params.vbt_sdvo_panel_type; 1106 if (index == -2) { 1107 drm_dbg_kms(&i915->drm, 1108 "Ignore SDVO panel mode from BIOS VBT tables.\n"); 1109 return; 1110 } 1111 1112 if (index == -1) { 1113 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 1114 1115 sdvo_lvds_options = find_section(i915, BDB_SDVO_LVDS_OPTIONS); 1116 if (!sdvo_lvds_options) 1117 return; 1118 1119 index = sdvo_lvds_options->panel_type; 1120 } 1121 1122 dtds = find_section(i915, BDB_SDVO_PANEL_DTDS); 1123 if (!dtds) 1124 return; 1125 1126 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 1127 if (!panel_fixed_mode) 1128 return; 1129 1130 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 1131 1132 panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 1133 1134 drm_dbg_kms(&i915->drm, 1135 "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n", 1136 DRM_MODE_ARG(panel_fixed_mode)); 1137 } 1138 1139 static int intel_bios_ssc_frequency(struct drm_i915_private *i915, 1140 bool alternate) 1141 { 1142 switch (DISPLAY_VER(i915)) { 1143 case 2: 1144 return alternate ? 66667 : 48000; 1145 case 3: 1146 case 4: 1147 return alternate ? 100000 : 96000; 1148 default: 1149 return alternate ? 100000 : 120000; 1150 } 1151 } 1152 1153 static void 1154 parse_general_features(struct drm_i915_private *i915) 1155 { 1156 const struct bdb_general_features *general; 1157 1158 general = find_section(i915, BDB_GENERAL_FEATURES); 1159 if (!general) 1160 return; 1161 1162 i915->display.vbt.int_tv_support = general->int_tv_support; 1163 /* int_crt_support can't be trusted on earlier platforms */ 1164 if (i915->display.vbt.version >= 155 && 1165 (HAS_DDI(i915) || IS_VALLEYVIEW(i915))) 1166 i915->display.vbt.int_crt_support = general->int_crt_support; 1167 i915->display.vbt.lvds_use_ssc = general->enable_ssc; 1168 i915->display.vbt.lvds_ssc_freq = 1169 intel_bios_ssc_frequency(i915, general->ssc_freq); 1170 i915->display.vbt.display_clock_mode = general->display_clock_mode; 1171 i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 1172 if (i915->display.vbt.version >= 181) { 1173 i915->display.vbt.orientation = general->rotate_180 ? 1174 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 1175 DRM_MODE_PANEL_ORIENTATION_NORMAL; 1176 } else { 1177 i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1178 } 1179 1180 if (i915->display.vbt.version >= 249 && general->afc_startup_config) { 1181 i915->display.vbt.override_afc_startup = true; 1182 i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7; 1183 } 1184 1185 drm_dbg_kms(&i915->drm, 1186 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 1187 i915->display.vbt.int_tv_support, 1188 i915->display.vbt.int_crt_support, 1189 i915->display.vbt.lvds_use_ssc, 1190 i915->display.vbt.lvds_ssc_freq, 1191 i915->display.vbt.display_clock_mode, 1192 i915->display.vbt.fdi_rx_polarity_inverted); 1193 } 1194 1195 static const struct child_device_config * 1196 child_device_ptr(const struct bdb_general_definitions *defs, int i) 1197 { 1198 return (const void *) &defs->devices[i * defs->child_dev_size]; 1199 } 1200 1201 static void 1202 parse_sdvo_device_mapping(struct drm_i915_private *i915) 1203 { 1204 struct sdvo_device_mapping *mapping; 1205 const struct intel_bios_encoder_data *devdata; 1206 const struct child_device_config *child; 1207 int count = 0; 1208 1209 /* 1210 * Only parse SDVO mappings on gens that could have SDVO. This isn't 1211 * accurate and doesn't have to be, as long as it's not too strict. 1212 */ 1213 if (!IS_DISPLAY_VER(i915, 3, 7)) { 1214 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n"); 1215 return; 1216 } 1217 1218 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 1219 child = &devdata->child; 1220 1221 if (child->slave_addr != SLAVE_ADDR1 && 1222 child->slave_addr != SLAVE_ADDR2) { 1223 /* 1224 * If the slave address is neither 0x70 nor 0x72, 1225 * it is not a SDVO device. Skip it. 1226 */ 1227 continue; 1228 } 1229 if (child->dvo_port != DEVICE_PORT_DVOB && 1230 child->dvo_port != DEVICE_PORT_DVOC) { 1231 /* skip the incorrect SDVO port */ 1232 drm_dbg_kms(&i915->drm, 1233 "Incorrect SDVO port. Skip it\n"); 1234 continue; 1235 } 1236 drm_dbg_kms(&i915->drm, 1237 "the SDVO device with slave addr %2x is found on" 1238 " %s port\n", 1239 child->slave_addr, 1240 (child->dvo_port == DEVICE_PORT_DVOB) ? 1241 "SDVOB" : "SDVOC"); 1242 mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1]; 1243 if (!mapping->initialized) { 1244 mapping->dvo_port = child->dvo_port; 1245 mapping->slave_addr = child->slave_addr; 1246 mapping->dvo_wiring = child->dvo_wiring; 1247 mapping->ddc_pin = child->ddc_pin; 1248 mapping->i2c_pin = child->i2c_pin; 1249 mapping->initialized = 1; 1250 drm_dbg_kms(&i915->drm, 1251 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 1252 mapping->dvo_port, mapping->slave_addr, 1253 mapping->dvo_wiring, mapping->ddc_pin, 1254 mapping->i2c_pin); 1255 } else { 1256 drm_dbg_kms(&i915->drm, 1257 "Maybe one SDVO port is shared by " 1258 "two SDVO device.\n"); 1259 } 1260 if (child->slave2_addr) { 1261 /* Maybe this is a SDVO device with multiple inputs */ 1262 /* And the mapping info is not added */ 1263 drm_dbg_kms(&i915->drm, 1264 "there exists the slave2_addr. Maybe this" 1265 " is a SDVO device with multiple inputs.\n"); 1266 } 1267 count++; 1268 } 1269 1270 if (!count) { 1271 /* No SDVO device info is found */ 1272 drm_dbg_kms(&i915->drm, 1273 "No SDVO device info is found in VBT\n"); 1274 } 1275 } 1276 1277 static void 1278 parse_driver_features(struct drm_i915_private *i915) 1279 { 1280 const struct bdb_driver_features *driver; 1281 1282 driver = find_section(i915, BDB_DRIVER_FEATURES); 1283 if (!driver) 1284 return; 1285 1286 if (DISPLAY_VER(i915) >= 5) { 1287 /* 1288 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 1289 * to mean "eDP". The VBT spec doesn't agree with that 1290 * interpretation, but real world VBTs seem to. 1291 */ 1292 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 1293 i915->display.vbt.int_lvds_support = 0; 1294 } else { 1295 /* 1296 * FIXME it's not clear which BDB version has the LVDS config 1297 * bits defined. Revision history in the VBT spec says: 1298 * "0.92 | Add two definitions for VBT value of LVDS Active 1299 * Config (00b and 11b values defined) | 06/13/2005" 1300 * but does not the specify the BDB version. 1301 * 1302 * So far version 134 (on i945gm) is the oldest VBT observed 1303 * in the wild with the bits correctly populated. Version 1304 * 108 (on i85x) does not have the bits correctly populated. 1305 */ 1306 if (i915->display.vbt.version >= 134 && 1307 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 1308 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 1309 i915->display.vbt.int_lvds_support = 0; 1310 } 1311 } 1312 1313 static void 1314 parse_panel_driver_features(struct drm_i915_private *i915, 1315 struct intel_panel *panel) 1316 { 1317 const struct bdb_driver_features *driver; 1318 1319 driver = find_section(i915, BDB_DRIVER_FEATURES); 1320 if (!driver) 1321 return; 1322 1323 if (i915->display.vbt.version < 228) { 1324 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n", 1325 driver->drrs_enabled); 1326 /* 1327 * If DRRS is not supported, drrs_type has to be set to 0. 1328 * This is because, VBT is configured in such a way that 1329 * static DRRS is 0 and DRRS not supported is represented by 1330 * driver->drrs_enabled=false 1331 */ 1332 if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) { 1333 /* 1334 * FIXME Should DMRRS perhaps be treated as seamless 1335 * but without the automatic downclocking? 1336 */ 1337 if (driver->dmrrs_enabled) 1338 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 1339 else 1340 panel->vbt.drrs_type = DRRS_TYPE_NONE; 1341 } 1342 1343 panel->vbt.psr.enable = driver->psr_enabled; 1344 } 1345 } 1346 1347 static void 1348 parse_power_conservation_features(struct drm_i915_private *i915, 1349 struct intel_panel *panel) 1350 { 1351 const struct bdb_lfp_power *power; 1352 u8 panel_type = panel->vbt.panel_type; 1353 1354 panel->vbt.vrr = true; /* matches Windows behaviour */ 1355 1356 if (i915->display.vbt.version < 228) 1357 return; 1358 1359 power = find_section(i915, BDB_LFP_POWER); 1360 if (!power) 1361 return; 1362 1363 panel->vbt.psr.enable = panel_bool(power->psr, panel_type); 1364 1365 /* 1366 * If DRRS is not supported, drrs_type has to be set to 0. 1367 * This is because, VBT is configured in such a way that 1368 * static DRRS is 0 and DRRS not supported is represented by 1369 * power->drrs & BIT(panel_type)=false 1370 */ 1371 if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) { 1372 /* 1373 * FIXME Should DMRRS perhaps be treated as seamless 1374 * but without the automatic downclocking? 1375 */ 1376 if (panel_bool(power->dmrrs, panel_type)) 1377 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 1378 else 1379 panel->vbt.drrs_type = DRRS_TYPE_NONE; 1380 } 1381 1382 if (i915->display.vbt.version >= 232) 1383 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type); 1384 1385 if (i915->display.vbt.version >= 233) 1386 panel->vbt.vrr = panel_bool(power->vrr_feature_enabled, 1387 panel_type); 1388 } 1389 1390 static void 1391 parse_edp(struct drm_i915_private *i915, 1392 struct intel_panel *panel) 1393 { 1394 const struct bdb_edp *edp; 1395 const struct edp_power_seq *edp_pps; 1396 const struct edp_fast_link_params *edp_link_params; 1397 int panel_type = panel->vbt.panel_type; 1398 1399 edp = find_section(i915, BDB_EDP); 1400 if (!edp) 1401 return; 1402 1403 switch (panel_bits(edp->color_depth, panel_type, 2)) { 1404 case EDP_18BPP: 1405 panel->vbt.edp.bpp = 18; 1406 break; 1407 case EDP_24BPP: 1408 panel->vbt.edp.bpp = 24; 1409 break; 1410 case EDP_30BPP: 1411 panel->vbt.edp.bpp = 30; 1412 break; 1413 } 1414 1415 /* Get the eDP sequencing and link info */ 1416 edp_pps = &edp->power_seqs[panel_type]; 1417 edp_link_params = &edp->fast_link_params[panel_type]; 1418 1419 panel->vbt.edp.pps = *edp_pps; 1420 1421 if (i915->display.vbt.version >= 224) { 1422 panel->vbt.edp.rate = 1423 edp->edp_fast_link_training_rate[panel_type] * 20; 1424 } else { 1425 switch (edp_link_params->rate) { 1426 case EDP_RATE_1_62: 1427 panel->vbt.edp.rate = 162000; 1428 break; 1429 case EDP_RATE_2_7: 1430 panel->vbt.edp.rate = 270000; 1431 break; 1432 case EDP_RATE_5_4: 1433 panel->vbt.edp.rate = 540000; 1434 break; 1435 default: 1436 drm_dbg_kms(&i915->drm, 1437 "VBT has unknown eDP link rate value %u\n", 1438 edp_link_params->rate); 1439 break; 1440 } 1441 } 1442 1443 switch (edp_link_params->lanes) { 1444 case EDP_LANE_1: 1445 panel->vbt.edp.lanes = 1; 1446 break; 1447 case EDP_LANE_2: 1448 panel->vbt.edp.lanes = 2; 1449 break; 1450 case EDP_LANE_4: 1451 panel->vbt.edp.lanes = 4; 1452 break; 1453 default: 1454 drm_dbg_kms(&i915->drm, 1455 "VBT has unknown eDP lane count value %u\n", 1456 edp_link_params->lanes); 1457 break; 1458 } 1459 1460 switch (edp_link_params->preemphasis) { 1461 case EDP_PREEMPHASIS_NONE: 1462 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 1463 break; 1464 case EDP_PREEMPHASIS_3_5dB: 1465 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 1466 break; 1467 case EDP_PREEMPHASIS_6dB: 1468 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 1469 break; 1470 case EDP_PREEMPHASIS_9_5dB: 1471 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 1472 break; 1473 default: 1474 drm_dbg_kms(&i915->drm, 1475 "VBT has unknown eDP pre-emphasis value %u\n", 1476 edp_link_params->preemphasis); 1477 break; 1478 } 1479 1480 switch (edp_link_params->vswing) { 1481 case EDP_VSWING_0_4V: 1482 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 1483 break; 1484 case EDP_VSWING_0_6V: 1485 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 1486 break; 1487 case EDP_VSWING_0_8V: 1488 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 1489 break; 1490 case EDP_VSWING_1_2V: 1491 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 1492 break; 1493 default: 1494 drm_dbg_kms(&i915->drm, 1495 "VBT has unknown eDP voltage swing value %u\n", 1496 edp_link_params->vswing); 1497 break; 1498 } 1499 1500 if (i915->display.vbt.version >= 173) { 1501 u8 vswing; 1502 1503 /* Don't read from VBT if module parameter has valid value*/ 1504 if (i915->params.edp_vswing) { 1505 panel->vbt.edp.low_vswing = 1506 i915->params.edp_vswing == 1; 1507 } else { 1508 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 1509 panel->vbt.edp.low_vswing = vswing == 0; 1510 } 1511 } 1512 1513 panel->vbt.edp.drrs_msa_timing_delay = 1514 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2); 1515 1516 if (i915->display.vbt.version >= 244) 1517 panel->vbt.edp.max_link_rate = 1518 edp->edp_max_port_link_rate[panel_type] * 20; 1519 } 1520 1521 static void 1522 parse_psr(struct drm_i915_private *i915, 1523 struct intel_panel *panel) 1524 { 1525 const struct bdb_psr *psr; 1526 const struct psr_table *psr_table; 1527 int panel_type = panel->vbt.panel_type; 1528 1529 psr = find_section(i915, BDB_PSR); 1530 if (!psr) { 1531 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n"); 1532 return; 1533 } 1534 1535 psr_table = &psr->psr_table[panel_type]; 1536 1537 panel->vbt.psr.full_link = psr_table->full_link; 1538 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 1539 1540 /* Allowed VBT values goes from 0 to 15 */ 1541 panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 1542 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 1543 1544 /* 1545 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 1546 * Old decimal value is wake up time in multiples of 100 us. 1547 */ 1548 if (i915->display.vbt.version >= 205 && 1549 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) { 1550 switch (psr_table->tp1_wakeup_time) { 1551 case 0: 1552 panel->vbt.psr.tp1_wakeup_time_us = 500; 1553 break; 1554 case 1: 1555 panel->vbt.psr.tp1_wakeup_time_us = 100; 1556 break; 1557 case 3: 1558 panel->vbt.psr.tp1_wakeup_time_us = 0; 1559 break; 1560 default: 1561 drm_dbg_kms(&i915->drm, 1562 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1563 psr_table->tp1_wakeup_time); 1564 fallthrough; 1565 case 2: 1566 panel->vbt.psr.tp1_wakeup_time_us = 2500; 1567 break; 1568 } 1569 1570 switch (psr_table->tp2_tp3_wakeup_time) { 1571 case 0: 1572 panel->vbt.psr.tp2_tp3_wakeup_time_us = 500; 1573 break; 1574 case 1: 1575 panel->vbt.psr.tp2_tp3_wakeup_time_us = 100; 1576 break; 1577 case 3: 1578 panel->vbt.psr.tp2_tp3_wakeup_time_us = 0; 1579 break; 1580 default: 1581 drm_dbg_kms(&i915->drm, 1582 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1583 psr_table->tp2_tp3_wakeup_time); 1584 fallthrough; 1585 case 2: 1586 panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 1587 break; 1588 } 1589 } else { 1590 panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 1591 panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 1592 } 1593 1594 if (i915->display.vbt.version >= 226) { 1595 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 1596 1597 wakeup_time = panel_bits(wakeup_time, panel_type, 2); 1598 switch (wakeup_time) { 1599 case 0: 1600 wakeup_time = 500; 1601 break; 1602 case 1: 1603 wakeup_time = 100; 1604 break; 1605 case 3: 1606 wakeup_time = 50; 1607 break; 1608 default: 1609 case 2: 1610 wakeup_time = 2500; 1611 break; 1612 } 1613 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 1614 } else { 1615 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 1616 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us; 1617 } 1618 } 1619 1620 static void parse_dsi_backlight_ports(struct drm_i915_private *i915, 1621 struct intel_panel *panel, 1622 enum port port) 1623 { 1624 enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C; 1625 1626 if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) { 1627 panel->vbt.dsi.bl_ports = BIT(port); 1628 if (panel->vbt.dsi.config->cabc_supported) 1629 panel->vbt.dsi.cabc_ports = BIT(port); 1630 1631 return; 1632 } 1633 1634 switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) { 1635 case DL_DCS_PORT_A: 1636 panel->vbt.dsi.bl_ports = BIT(PORT_A); 1637 break; 1638 case DL_DCS_PORT_C: 1639 panel->vbt.dsi.bl_ports = BIT(port_bc); 1640 break; 1641 default: 1642 case DL_DCS_PORT_A_AND_C: 1643 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc); 1644 break; 1645 } 1646 1647 if (!panel->vbt.dsi.config->cabc_supported) 1648 return; 1649 1650 switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) { 1651 case DL_DCS_PORT_A: 1652 panel->vbt.dsi.cabc_ports = BIT(PORT_A); 1653 break; 1654 case DL_DCS_PORT_C: 1655 panel->vbt.dsi.cabc_ports = BIT(port_bc); 1656 break; 1657 default: 1658 case DL_DCS_PORT_A_AND_C: 1659 panel->vbt.dsi.cabc_ports = 1660 BIT(PORT_A) | BIT(port_bc); 1661 break; 1662 } 1663 } 1664 1665 static void 1666 parse_mipi_config(struct drm_i915_private *i915, 1667 struct intel_panel *panel) 1668 { 1669 const struct bdb_mipi_config *start; 1670 const struct mipi_config *config; 1671 const struct mipi_pps_data *pps; 1672 int panel_type = panel->vbt.panel_type; 1673 enum port port; 1674 1675 /* parse MIPI blocks only if LFP type is MIPI */ 1676 if (!intel_bios_is_dsi_present(i915, &port)) 1677 return; 1678 1679 /* Initialize this to undefined indicating no generic MIPI support */ 1680 panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 1681 1682 /* Block #40 is already parsed and panel_fixed_mode is 1683 * stored in i915->lfp_lvds_vbt_mode 1684 * resuse this when needed 1685 */ 1686 1687 /* Parse #52 for panel index used from panel_type already 1688 * parsed 1689 */ 1690 start = find_section(i915, BDB_MIPI_CONFIG); 1691 if (!start) { 1692 drm_dbg_kms(&i915->drm, "No MIPI config BDB found"); 1693 return; 1694 } 1695 1696 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n", 1697 panel_type); 1698 1699 /* 1700 * get hold of the correct configuration block and pps data as per 1701 * the panel_type as index 1702 */ 1703 config = &start->config[panel_type]; 1704 pps = &start->pps[panel_type]; 1705 1706 /* store as of now full data. Trim when we realise all is not needed */ 1707 panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1708 if (!panel->vbt.dsi.config) 1709 return; 1710 1711 panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1712 if (!panel->vbt.dsi.pps) { 1713 kfree(panel->vbt.dsi.config); 1714 return; 1715 } 1716 1717 parse_dsi_backlight_ports(i915, panel, port); 1718 1719 /* FIXME is the 90 vs. 270 correct? */ 1720 switch (config->rotation) { 1721 case ENABLE_ROTATION_0: 1722 /* 1723 * Most (all?) VBTs claim 0 degrees despite having 1724 * an upside down panel, thus we do not trust this. 1725 */ 1726 panel->vbt.dsi.orientation = 1727 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1728 break; 1729 case ENABLE_ROTATION_90: 1730 panel->vbt.dsi.orientation = 1731 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1732 break; 1733 case ENABLE_ROTATION_180: 1734 panel->vbt.dsi.orientation = 1735 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1736 break; 1737 case ENABLE_ROTATION_270: 1738 panel->vbt.dsi.orientation = 1739 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1740 break; 1741 } 1742 1743 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1744 panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1745 } 1746 1747 /* Find the sequence block and size for the given panel. */ 1748 static const u8 * 1749 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 1750 u16 panel_id, u32 *seq_size) 1751 { 1752 u32 total = get_blocksize(sequence); 1753 const u8 *data = &sequence->data[0]; 1754 u8 current_id; 1755 u32 current_size; 1756 int header_size = sequence->version >= 3 ? 5 : 3; 1757 int index = 0; 1758 int i; 1759 1760 /* skip new block size */ 1761 if (sequence->version >= 3) 1762 data += 4; 1763 1764 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1765 if (index + header_size > total) { 1766 DRM_ERROR("Invalid sequence block (header)\n"); 1767 return NULL; 1768 } 1769 1770 current_id = *(data + index); 1771 if (sequence->version >= 3) 1772 current_size = *((const u32 *)(data + index + 1)); 1773 else 1774 current_size = *((const u16 *)(data + index + 1)); 1775 1776 index += header_size; 1777 1778 if (index + current_size > total) { 1779 DRM_ERROR("Invalid sequence block\n"); 1780 return NULL; 1781 } 1782 1783 if (current_id == panel_id) { 1784 *seq_size = current_size; 1785 return data + index; 1786 } 1787 1788 index += current_size; 1789 } 1790 1791 DRM_ERROR("Sequence block detected but no valid configuration\n"); 1792 1793 return NULL; 1794 } 1795 1796 static int goto_next_sequence(const u8 *data, int index, int total) 1797 { 1798 u16 len; 1799 1800 /* Skip Sequence Byte. */ 1801 for (index = index + 1; index < total; index += len) { 1802 u8 operation_byte = *(data + index); 1803 index++; 1804 1805 switch (operation_byte) { 1806 case MIPI_SEQ_ELEM_END: 1807 return index; 1808 case MIPI_SEQ_ELEM_SEND_PKT: 1809 if (index + 4 > total) 1810 return 0; 1811 1812 len = *((const u16 *)(data + index + 2)) + 4; 1813 break; 1814 case MIPI_SEQ_ELEM_DELAY: 1815 len = 4; 1816 break; 1817 case MIPI_SEQ_ELEM_GPIO: 1818 len = 2; 1819 break; 1820 case MIPI_SEQ_ELEM_I2C: 1821 if (index + 7 > total) 1822 return 0; 1823 len = *(data + index + 6) + 7; 1824 break; 1825 default: 1826 DRM_ERROR("Unknown operation byte\n"); 1827 return 0; 1828 } 1829 } 1830 1831 return 0; 1832 } 1833 1834 static int goto_next_sequence_v3(const u8 *data, int index, int total) 1835 { 1836 int seq_end; 1837 u16 len; 1838 u32 size_of_sequence; 1839 1840 /* 1841 * Could skip sequence based on Size of Sequence alone, but also do some 1842 * checking on the structure. 1843 */ 1844 if (total < 5) { 1845 DRM_ERROR("Too small sequence size\n"); 1846 return 0; 1847 } 1848 1849 /* Skip Sequence Byte. */ 1850 index++; 1851 1852 /* 1853 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1854 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1855 * byte. 1856 */ 1857 size_of_sequence = *((const u32 *)(data + index)); 1858 index += 4; 1859 1860 seq_end = index + size_of_sequence; 1861 if (seq_end > total) { 1862 DRM_ERROR("Invalid sequence size\n"); 1863 return 0; 1864 } 1865 1866 for (; index < total; index += len) { 1867 u8 operation_byte = *(data + index); 1868 index++; 1869 1870 if (operation_byte == MIPI_SEQ_ELEM_END) { 1871 if (index != seq_end) { 1872 DRM_ERROR("Invalid element structure\n"); 1873 return 0; 1874 } 1875 return index; 1876 } 1877 1878 len = *(data + index); 1879 index++; 1880 1881 /* 1882 * FIXME: Would be nice to check elements like for v1/v2 in 1883 * goto_next_sequence() above. 1884 */ 1885 switch (operation_byte) { 1886 case MIPI_SEQ_ELEM_SEND_PKT: 1887 case MIPI_SEQ_ELEM_DELAY: 1888 case MIPI_SEQ_ELEM_GPIO: 1889 case MIPI_SEQ_ELEM_I2C: 1890 case MIPI_SEQ_ELEM_SPI: 1891 case MIPI_SEQ_ELEM_PMIC: 1892 break; 1893 default: 1894 DRM_ERROR("Unknown operation byte %u\n", 1895 operation_byte); 1896 break; 1897 } 1898 } 1899 1900 return 0; 1901 } 1902 1903 /* 1904 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1905 * skip all delay + gpio operands and stop at the first DSI packet op. 1906 */ 1907 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915, 1908 struct intel_panel *panel) 1909 { 1910 const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1911 int index, len; 1912 1913 if (drm_WARN_ON(&i915->drm, 1914 !data || panel->vbt.dsi.seq_version != 1)) 1915 return 0; 1916 1917 /* index = 1 to skip sequence byte */ 1918 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1919 switch (data[index]) { 1920 case MIPI_SEQ_ELEM_SEND_PKT: 1921 return index == 1 ? 0 : index; 1922 case MIPI_SEQ_ELEM_DELAY: 1923 len = 5; /* 1 byte for operand + uint32 */ 1924 break; 1925 case MIPI_SEQ_ELEM_GPIO: 1926 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1927 break; 1928 default: 1929 return 0; 1930 } 1931 } 1932 1933 return 0; 1934 } 1935 1936 /* 1937 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1938 * The deassert must be done before calling intel_dsi_device_ready, so for 1939 * these devices we split the init OTP sequence into a deassert sequence and 1940 * the actual init OTP part. 1941 */ 1942 static void fixup_mipi_sequences(struct drm_i915_private *i915, 1943 struct intel_panel *panel) 1944 { 1945 u8 *init_otp; 1946 int len; 1947 1948 /* Limit this to VLV for now. */ 1949 if (!IS_VALLEYVIEW(i915)) 1950 return; 1951 1952 /* Limit this to v1 vid-mode sequences */ 1953 if (panel->vbt.dsi.config->is_cmd_mode || 1954 panel->vbt.dsi.seq_version != 1) 1955 return; 1956 1957 /* Only do this if there are otp and assert seqs and no deassert seq */ 1958 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1959 !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1960 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1961 return; 1962 1963 /* The deassert-sequence ends at the first DSI packet */ 1964 len = get_init_otp_deassert_fragment_len(i915, panel); 1965 if (!len) 1966 return; 1967 1968 drm_dbg_kms(&i915->drm, 1969 "Using init OTP fragment to deassert reset\n"); 1970 1971 /* Copy the fragment, update seq byte and terminate it */ 1972 init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1973 panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1974 if (!panel->vbt.dsi.deassert_seq) 1975 return; 1976 panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1977 panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1978 /* Use the copy for deassert */ 1979 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1980 panel->vbt.dsi.deassert_seq; 1981 /* Replace the last byte of the fragment with init OTP seq byte */ 1982 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1983 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1984 panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1985 } 1986 1987 static void 1988 parse_mipi_sequence(struct drm_i915_private *i915, 1989 struct intel_panel *panel) 1990 { 1991 int panel_type = panel->vbt.panel_type; 1992 const struct bdb_mipi_sequence *sequence; 1993 const u8 *seq_data; 1994 u32 seq_size; 1995 u8 *data; 1996 int index = 0; 1997 1998 /* Only our generic panel driver uses the sequence block. */ 1999 if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 2000 return; 2001 2002 sequence = find_section(i915, BDB_MIPI_SEQUENCE); 2003 if (!sequence) { 2004 drm_dbg_kms(&i915->drm, 2005 "No MIPI Sequence found, parsing complete\n"); 2006 return; 2007 } 2008 2009 /* Fail gracefully for forward incompatible sequence block. */ 2010 if (sequence->version >= 4) { 2011 drm_err(&i915->drm, 2012 "Unable to parse MIPI Sequence Block v%u\n", 2013 sequence->version); 2014 return; 2015 } 2016 2017 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n", 2018 sequence->version); 2019 2020 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 2021 if (!seq_data) 2022 return; 2023 2024 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 2025 if (!data) 2026 return; 2027 2028 /* Parse the sequences, store pointers to each sequence. */ 2029 for (;;) { 2030 u8 seq_id = *(data + index); 2031 if (seq_id == MIPI_SEQ_END) 2032 break; 2033 2034 if (seq_id >= MIPI_SEQ_MAX) { 2035 drm_err(&i915->drm, "Unknown sequence %u\n", 2036 seq_id); 2037 goto err; 2038 } 2039 2040 /* Log about presence of sequences we won't run. */ 2041 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 2042 drm_dbg_kms(&i915->drm, 2043 "Unsupported sequence %u\n", seq_id); 2044 2045 panel->vbt.dsi.sequence[seq_id] = data + index; 2046 2047 if (sequence->version >= 3) 2048 index = goto_next_sequence_v3(data, index, seq_size); 2049 else 2050 index = goto_next_sequence(data, index, seq_size); 2051 if (!index) { 2052 drm_err(&i915->drm, "Invalid sequence %u\n", 2053 seq_id); 2054 goto err; 2055 } 2056 } 2057 2058 panel->vbt.dsi.data = data; 2059 panel->vbt.dsi.size = seq_size; 2060 panel->vbt.dsi.seq_version = sequence->version; 2061 2062 fixup_mipi_sequences(i915, panel); 2063 2064 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n"); 2065 return; 2066 2067 err: 2068 kfree(data); 2069 memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence)); 2070 } 2071 2072 static void 2073 parse_compression_parameters(struct drm_i915_private *i915) 2074 { 2075 const struct bdb_compression_parameters *params; 2076 struct intel_bios_encoder_data *devdata; 2077 const struct child_device_config *child; 2078 u16 block_size; 2079 int index; 2080 2081 if (i915->display.vbt.version < 198) 2082 return; 2083 2084 params = find_section(i915, BDB_COMPRESSION_PARAMETERS); 2085 if (params) { 2086 /* Sanity checks */ 2087 if (params->entry_size != sizeof(params->data[0])) { 2088 drm_dbg_kms(&i915->drm, 2089 "VBT: unsupported compression param entry size\n"); 2090 return; 2091 } 2092 2093 block_size = get_blocksize(params); 2094 if (block_size < sizeof(*params)) { 2095 drm_dbg_kms(&i915->drm, 2096 "VBT: expected 16 compression param entries\n"); 2097 return; 2098 } 2099 } 2100 2101 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 2102 child = &devdata->child; 2103 2104 if (!child->compression_enable) 2105 continue; 2106 2107 if (!params) { 2108 drm_dbg_kms(&i915->drm, 2109 "VBT: compression params not available\n"); 2110 continue; 2111 } 2112 2113 if (child->compression_method_cps) { 2114 drm_dbg_kms(&i915->drm, 2115 "VBT: CPS compression not supported\n"); 2116 continue; 2117 } 2118 2119 index = child->compression_structure_index; 2120 2121 devdata->dsc = kmemdup(¶ms->data[index], 2122 sizeof(*devdata->dsc), GFP_KERNEL); 2123 } 2124 } 2125 2126 static u8 translate_iboost(u8 val) 2127 { 2128 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 2129 2130 if (val >= ARRAY_SIZE(mapping)) { 2131 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 2132 return 0; 2133 } 2134 return mapping[val]; 2135 } 2136 2137 static const u8 cnp_ddc_pin_map[] = { 2138 [0] = 0, /* N/A */ 2139 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT, 2140 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT, 2141 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */ 2142 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */ 2143 }; 2144 2145 static const u8 icp_ddc_pin_map[] = { 2146 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 2147 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 2148 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT, 2149 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP, 2150 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP, 2151 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP, 2152 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP, 2153 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP, 2154 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, 2155 }; 2156 2157 static const u8 rkl_pch_tgp_ddc_pin_map[] = { 2158 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 2159 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 2160 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP, 2161 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP, 2162 }; 2163 2164 static const u8 adls_ddc_pin_map[] = { 2165 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 2166 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP, 2167 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP, 2168 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP, 2169 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP, 2170 }; 2171 2172 static const u8 gen9bc_tgp_ddc_pin_map[] = { 2173 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 2174 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP, 2175 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP, 2176 }; 2177 2178 static const u8 adlp_ddc_pin_map[] = { 2179 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 2180 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 2181 [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP, 2182 [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP, 2183 [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP, 2184 [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP, 2185 }; 2186 2187 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin) 2188 { 2189 const u8 *ddc_pin_map; 2190 int n_entries; 2191 2192 if (HAS_PCH_MTP(i915) || IS_ALDERLAKE_P(i915)) { 2193 ddc_pin_map = adlp_ddc_pin_map; 2194 n_entries = ARRAY_SIZE(adlp_ddc_pin_map); 2195 } else if (IS_ALDERLAKE_S(i915)) { 2196 ddc_pin_map = adls_ddc_pin_map; 2197 n_entries = ARRAY_SIZE(adls_ddc_pin_map); 2198 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) { 2199 return vbt_pin; 2200 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { 2201 ddc_pin_map = rkl_pch_tgp_ddc_pin_map; 2202 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map); 2203 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) { 2204 ddc_pin_map = gen9bc_tgp_ddc_pin_map; 2205 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map); 2206 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) { 2207 ddc_pin_map = icp_ddc_pin_map; 2208 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 2209 } else if (HAS_PCH_CNP(i915)) { 2210 ddc_pin_map = cnp_ddc_pin_map; 2211 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 2212 } else { 2213 /* Assuming direct map */ 2214 return vbt_pin; 2215 } 2216 2217 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0) 2218 return ddc_pin_map[vbt_pin]; 2219 2220 drm_dbg_kms(&i915->drm, 2221 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 2222 vbt_pin); 2223 return 0; 2224 } 2225 2226 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin) 2227 { 2228 const struct intel_bios_encoder_data *devdata; 2229 enum port port; 2230 2231 if (!ddc_pin) 2232 return PORT_NONE; 2233 2234 for_each_port(port) { 2235 devdata = i915->display.vbt.ports[port]; 2236 2237 if (devdata && ddc_pin == devdata->child.ddc_pin) 2238 return port; 2239 } 2240 2241 return PORT_NONE; 2242 } 2243 2244 static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata, 2245 enum port port) 2246 { 2247 struct drm_i915_private *i915 = devdata->i915; 2248 struct child_device_config *child; 2249 u8 mapped_ddc_pin; 2250 enum port p; 2251 2252 if (!devdata->child.ddc_pin) 2253 return; 2254 2255 mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin); 2256 if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) { 2257 drm_dbg_kms(&i915->drm, 2258 "Port %c has invalid DDC pin %d, " 2259 "sticking to defaults\n", 2260 port_name(port), mapped_ddc_pin); 2261 devdata->child.ddc_pin = 0; 2262 return; 2263 } 2264 2265 p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin); 2266 if (p == PORT_NONE) 2267 return; 2268 2269 drm_dbg_kms(&i915->drm, 2270 "port %c trying to use the same DDC pin (0x%x) as port %c, " 2271 "disabling port %c DVI/HDMI support\n", 2272 port_name(port), mapped_ddc_pin, 2273 port_name(p), port_name(p)); 2274 2275 /* 2276 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi 2277 * couldn't exist on the shared port. Otherwise they share the same ddc 2278 * pin and system couldn't communicate with them separately. 2279 * 2280 * Give inverse child device order the priority, last one wins. Yes, 2281 * there are real machines (eg. Asrock B250M-HDV) where VBT has both 2282 * port A and port E with the same AUX ch and we must pick port E :( 2283 */ 2284 child = &i915->display.vbt.ports[p]->child; 2285 2286 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 2287 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 2288 2289 child->ddc_pin = 0; 2290 } 2291 2292 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch) 2293 { 2294 const struct intel_bios_encoder_data *devdata; 2295 enum port port; 2296 2297 if (!aux_ch) 2298 return PORT_NONE; 2299 2300 for_each_port(port) { 2301 devdata = i915->display.vbt.ports[port]; 2302 2303 if (devdata && aux_ch == devdata->child.aux_channel) 2304 return port; 2305 } 2306 2307 return PORT_NONE; 2308 } 2309 2310 static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata, 2311 enum port port) 2312 { 2313 struct drm_i915_private *i915 = devdata->i915; 2314 struct child_device_config *child; 2315 enum port p; 2316 2317 p = get_port_by_aux_ch(i915, devdata->child.aux_channel); 2318 if (p == PORT_NONE) 2319 return; 2320 2321 drm_dbg_kms(&i915->drm, 2322 "port %c trying to use the same AUX CH (0x%x) as port %c, " 2323 "disabling port %c DP support\n", 2324 port_name(port), devdata->child.aux_channel, 2325 port_name(p), port_name(p)); 2326 2327 /* 2328 * If we have multiple ports supposedly sharing the aux channel, then DP 2329 * couldn't exist on the shared port. Otherwise they share the same aux 2330 * channel and system couldn't communicate with them separately. 2331 * 2332 * Give inverse child device order the priority, last one wins. Yes, 2333 * there are real machines (eg. Asrock B250M-HDV) where VBT has both 2334 * port A and port E with the same AUX ch and we must pick port E :( 2335 */ 2336 child = &i915->display.vbt.ports[p]->child; 2337 2338 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2339 child->aux_channel = 0; 2340 } 2341 2342 static u8 dvo_port_type(u8 dvo_port) 2343 { 2344 switch (dvo_port) { 2345 case DVO_PORT_HDMIA: 2346 case DVO_PORT_HDMIB: 2347 case DVO_PORT_HDMIC: 2348 case DVO_PORT_HDMID: 2349 case DVO_PORT_HDMIE: 2350 case DVO_PORT_HDMIF: 2351 case DVO_PORT_HDMIG: 2352 case DVO_PORT_HDMIH: 2353 case DVO_PORT_HDMII: 2354 return DVO_PORT_HDMIA; 2355 case DVO_PORT_DPA: 2356 case DVO_PORT_DPB: 2357 case DVO_PORT_DPC: 2358 case DVO_PORT_DPD: 2359 case DVO_PORT_DPE: 2360 case DVO_PORT_DPF: 2361 case DVO_PORT_DPG: 2362 case DVO_PORT_DPH: 2363 case DVO_PORT_DPI: 2364 return DVO_PORT_DPA; 2365 case DVO_PORT_MIPIA: 2366 case DVO_PORT_MIPIB: 2367 case DVO_PORT_MIPIC: 2368 case DVO_PORT_MIPID: 2369 return DVO_PORT_MIPIA; 2370 default: 2371 return dvo_port; 2372 } 2373 } 2374 2375 static enum port __dvo_port_to_port(int n_ports, int n_dvo, 2376 const int port_mapping[][3], u8 dvo_port) 2377 { 2378 enum port port; 2379 int i; 2380 2381 for (port = PORT_A; port < n_ports; port++) { 2382 for (i = 0; i < n_dvo; i++) { 2383 if (port_mapping[port][i] == -1) 2384 break; 2385 2386 if (dvo_port == port_mapping[port][i]) 2387 return port; 2388 } 2389 } 2390 2391 return PORT_NONE; 2392 } 2393 2394 static enum port dvo_port_to_port(struct drm_i915_private *i915, 2395 u8 dvo_port) 2396 { 2397 /* 2398 * Each DDI port can have more than one value on the "DVO Port" field, 2399 * so look for all the possible values for each port. 2400 */ 2401 static const int port_mapping[][3] = { 2402 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2403 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2404 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2405 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2406 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT }, 2407 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2408 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2409 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2410 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2411 }; 2412 /* 2413 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D 2414 * map to DDI A,B,TC1,TC2 respectively. 2415 */ 2416 static const int rkl_port_mapping[][3] = { 2417 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2418 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2419 [PORT_C] = { -1 }, 2420 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2421 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2422 }; 2423 /* 2424 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E, 2425 * PORT_F and PORT_G, we need to map that to correct VBT sections. 2426 */ 2427 static const int adls_port_mapping[][3] = { 2428 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2429 [PORT_B] = { -1 }, 2430 [PORT_C] = { -1 }, 2431 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2432 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2433 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2434 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2435 }; 2436 static const int xelpd_port_mapping[][3] = { 2437 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2438 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2439 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2440 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2441 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2442 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2443 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2444 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2445 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2446 }; 2447 2448 if (DISPLAY_VER(i915) >= 13) 2449 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping), 2450 ARRAY_SIZE(xelpd_port_mapping[0]), 2451 xelpd_port_mapping, 2452 dvo_port); 2453 else if (IS_ALDERLAKE_S(i915)) 2454 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping), 2455 ARRAY_SIZE(adls_port_mapping[0]), 2456 adls_port_mapping, 2457 dvo_port); 2458 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 2459 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), 2460 ARRAY_SIZE(rkl_port_mapping[0]), 2461 rkl_port_mapping, 2462 dvo_port); 2463 else 2464 return __dvo_port_to_port(ARRAY_SIZE(port_mapping), 2465 ARRAY_SIZE(port_mapping[0]), 2466 port_mapping, 2467 dvo_port); 2468 } 2469 2470 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate) 2471 { 2472 switch (vbt_max_link_rate) { 2473 default: 2474 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF: 2475 return 0; 2476 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20: 2477 return 2000000; 2478 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5: 2479 return 1350000; 2480 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10: 2481 return 1000000; 2482 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3: 2483 return 810000; 2484 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2: 2485 return 540000; 2486 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR: 2487 return 270000; 2488 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR: 2489 return 162000; 2490 } 2491 } 2492 2493 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate) 2494 { 2495 switch (vbt_max_link_rate) { 2496 default: 2497 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3: 2498 return 810000; 2499 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2: 2500 return 540000; 2501 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR: 2502 return 270000; 2503 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR: 2504 return 162000; 2505 } 2506 } 2507 2508 static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata) 2509 { 2510 if (!devdata || devdata->i915->display.vbt.version < 216) 2511 return 0; 2512 2513 if (devdata->i915->display.vbt.version >= 230) 2514 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate); 2515 else 2516 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate); 2517 } 2518 2519 static int _intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata) 2520 { 2521 if (!devdata || devdata->i915->display.vbt.version < 244) 2522 return 0; 2523 2524 return devdata->child.dp_max_lane_count + 1; 2525 } 2526 2527 static void sanitize_device_type(struct intel_bios_encoder_data *devdata, 2528 enum port port) 2529 { 2530 struct drm_i915_private *i915 = devdata->i915; 2531 bool is_hdmi; 2532 2533 if (port != PORT_A || DISPLAY_VER(i915) >= 12) 2534 return; 2535 2536 if (!intel_bios_encoder_supports_dvi(devdata)) 2537 return; 2538 2539 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2540 2541 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n", 2542 is_hdmi ? "/HDMI" : ""); 2543 2544 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 2545 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 2546 } 2547 2548 static bool 2549 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata) 2550 { 2551 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT; 2552 } 2553 2554 bool 2555 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata) 2556 { 2557 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 2558 } 2559 2560 bool 2561 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata) 2562 { 2563 return intel_bios_encoder_supports_dvi(devdata) && 2564 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 2565 } 2566 2567 bool 2568 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata) 2569 { 2570 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2571 } 2572 2573 static bool 2574 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata) 2575 { 2576 return intel_bios_encoder_supports_dp(devdata) && 2577 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR; 2578 } 2579 2580 static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata) 2581 { 2582 if (!devdata || devdata->i915->display.vbt.version < 158) 2583 return -1; 2584 2585 return devdata->child.hdmi_level_shifter_value; 2586 } 2587 2588 static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devdata) 2589 { 2590 if (!devdata || devdata->i915->display.vbt.version < 204) 2591 return 0; 2592 2593 switch (devdata->child.hdmi_max_data_rate) { 2594 default: 2595 MISSING_CASE(devdata->child.hdmi_max_data_rate); 2596 fallthrough; 2597 case HDMI_MAX_DATA_RATE_PLATFORM: 2598 return 0; 2599 case HDMI_MAX_DATA_RATE_594: 2600 return 594000; 2601 case HDMI_MAX_DATA_RATE_340: 2602 return 340000; 2603 case HDMI_MAX_DATA_RATE_300: 2604 return 300000; 2605 case HDMI_MAX_DATA_RATE_297: 2606 return 297000; 2607 case HDMI_MAX_DATA_RATE_165: 2608 return 165000; 2609 } 2610 } 2611 2612 static bool is_port_valid(struct drm_i915_private *i915, enum port port) 2613 { 2614 /* 2615 * On some ICL SKUs port F is not present, but broken VBTs mark 2616 * the port as present. Only try to initialize port F for the 2617 * SKUs that may actually have it. 2618 */ 2619 if (port == PORT_F && IS_ICELAKE(i915)) 2620 return IS_ICL_WITH_PORT_F(i915); 2621 2622 return true; 2623 } 2624 2625 static void print_ddi_port(const struct intel_bios_encoder_data *devdata, 2626 enum port port) 2627 { 2628 struct drm_i915_private *i915 = devdata->i915; 2629 const struct child_device_config *child = &devdata->child; 2630 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt; 2631 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock; 2632 2633 is_dvi = intel_bios_encoder_supports_dvi(devdata); 2634 is_dp = intel_bios_encoder_supports_dp(devdata); 2635 is_crt = intel_bios_encoder_supports_crt(devdata); 2636 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2637 is_edp = intel_bios_encoder_supports_edp(devdata); 2638 2639 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata); 2640 supports_tbt = intel_bios_encoder_supports_tbt(devdata); 2641 2642 drm_dbg_kms(&i915->drm, 2643 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 2644 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, 2645 HAS_LSPCON(i915) && child->lspcon, 2646 supports_typec_usb, supports_tbt, 2647 devdata->dsc != NULL); 2648 2649 hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata); 2650 if (hdmi_level_shift >= 0) { 2651 drm_dbg_kms(&i915->drm, 2652 "Port %c VBT HDMI level shift: %d\n", 2653 port_name(port), hdmi_level_shift); 2654 } 2655 2656 max_tmds_clock = _intel_bios_max_tmds_clock(devdata); 2657 if (max_tmds_clock) 2658 drm_dbg_kms(&i915->drm, 2659 "Port %c VBT HDMI max TMDS clock: %d kHz\n", 2660 port_name(port), max_tmds_clock); 2661 2662 /* I_boost config for SKL and above */ 2663 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata); 2664 if (dp_boost_level) 2665 drm_dbg_kms(&i915->drm, 2666 "Port %c VBT (e)DP boost level: %d\n", 2667 port_name(port), dp_boost_level); 2668 2669 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata); 2670 if (hdmi_boost_level) 2671 drm_dbg_kms(&i915->drm, 2672 "Port %c VBT HDMI boost level: %d\n", 2673 port_name(port), hdmi_boost_level); 2674 2675 dp_max_link_rate = _intel_bios_dp_max_link_rate(devdata); 2676 if (dp_max_link_rate) 2677 drm_dbg_kms(&i915->drm, 2678 "Port %c VBT DP max link rate: %d\n", 2679 port_name(port), dp_max_link_rate); 2680 2681 /* 2682 * FIXME need to implement support for VBT 2683 * vswing/preemph tables should this ever trigger. 2684 */ 2685 drm_WARN(&i915->drm, child->use_vbt_vswing, 2686 "Port %c asks to use VBT vswing/preemph tables\n", 2687 port_name(port)); 2688 } 2689 2690 static void parse_ddi_port(struct intel_bios_encoder_data *devdata) 2691 { 2692 struct drm_i915_private *i915 = devdata->i915; 2693 const struct child_device_config *child = &devdata->child; 2694 enum port port; 2695 2696 port = dvo_port_to_port(i915, child->dvo_port); 2697 if (port == PORT_NONE) 2698 return; 2699 2700 if (!is_port_valid(i915, port)) { 2701 drm_dbg_kms(&i915->drm, 2702 "VBT reports port %c as supported, but that can't be true: skipping\n", 2703 port_name(port)); 2704 return; 2705 } 2706 2707 if (i915->display.vbt.ports[port]) { 2708 drm_dbg_kms(&i915->drm, 2709 "More than one child device for port %c in VBT, using the first.\n", 2710 port_name(port)); 2711 return; 2712 } 2713 2714 sanitize_device_type(devdata, port); 2715 2716 if (intel_bios_encoder_supports_dvi(devdata)) 2717 sanitize_ddc_pin(devdata, port); 2718 2719 if (intel_bios_encoder_supports_dp(devdata)) 2720 sanitize_aux_ch(devdata, port); 2721 2722 i915->display.vbt.ports[port] = devdata; 2723 } 2724 2725 static bool has_ddi_port_info(struct drm_i915_private *i915) 2726 { 2727 return DISPLAY_VER(i915) >= 5 || IS_G4X(i915); 2728 } 2729 2730 static void parse_ddi_ports(struct drm_i915_private *i915) 2731 { 2732 struct intel_bios_encoder_data *devdata; 2733 enum port port; 2734 2735 if (!has_ddi_port_info(i915)) 2736 return; 2737 2738 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) 2739 parse_ddi_port(devdata); 2740 2741 for_each_port(port) { 2742 if (i915->display.vbt.ports[port]) 2743 print_ddi_port(i915->display.vbt.ports[port], port); 2744 } 2745 } 2746 2747 static void 2748 parse_general_definitions(struct drm_i915_private *i915) 2749 { 2750 const struct bdb_general_definitions *defs; 2751 struct intel_bios_encoder_data *devdata; 2752 const struct child_device_config *child; 2753 int i, child_device_num; 2754 u8 expected_size; 2755 u16 block_size; 2756 int bus_pin; 2757 2758 defs = find_section(i915, BDB_GENERAL_DEFINITIONS); 2759 if (!defs) { 2760 drm_dbg_kms(&i915->drm, 2761 "No general definition block is found, no devices defined.\n"); 2762 return; 2763 } 2764 2765 block_size = get_blocksize(defs); 2766 if (block_size < sizeof(*defs)) { 2767 drm_dbg_kms(&i915->drm, 2768 "General definitions block too small (%u)\n", 2769 block_size); 2770 return; 2771 } 2772 2773 bus_pin = defs->crt_ddc_gmbus_pin; 2774 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin); 2775 if (intel_gmbus_is_valid_pin(i915, bus_pin)) 2776 i915->display.vbt.crt_ddc_pin = bus_pin; 2777 2778 if (i915->display.vbt.version < 106) { 2779 expected_size = 22; 2780 } else if (i915->display.vbt.version < 111) { 2781 expected_size = 27; 2782 } else if (i915->display.vbt.version < 195) { 2783 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 2784 } else if (i915->display.vbt.version == 195) { 2785 expected_size = 37; 2786 } else if (i915->display.vbt.version <= 215) { 2787 expected_size = 38; 2788 } else if (i915->display.vbt.version <= 237) { 2789 expected_size = 39; 2790 } else { 2791 expected_size = sizeof(*child); 2792 BUILD_BUG_ON(sizeof(*child) < 39); 2793 drm_dbg(&i915->drm, 2794 "Expected child device config size for VBT version %u not known; assuming %u\n", 2795 i915->display.vbt.version, expected_size); 2796 } 2797 2798 /* Flag an error for unexpected size, but continue anyway. */ 2799 if (defs->child_dev_size != expected_size) 2800 drm_err(&i915->drm, 2801 "Unexpected child device config size %u (expected %u for VBT version %u)\n", 2802 defs->child_dev_size, expected_size, i915->display.vbt.version); 2803 2804 /* The legacy sized child device config is the minimum we need. */ 2805 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 2806 drm_dbg_kms(&i915->drm, 2807 "Child device config size %u is too small.\n", 2808 defs->child_dev_size); 2809 return; 2810 } 2811 2812 /* get the number of child device */ 2813 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 2814 2815 for (i = 0; i < child_device_num; i++) { 2816 child = child_device_ptr(defs, i); 2817 if (!child->device_type) 2818 continue; 2819 2820 drm_dbg_kms(&i915->drm, 2821 "Found VBT child device with type 0x%x\n", 2822 child->device_type); 2823 2824 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2825 if (!devdata) 2826 break; 2827 2828 devdata->i915 = i915; 2829 2830 /* 2831 * Copy as much as we know (sizeof) and is available 2832 * (child_dev_size) of the child device config. Accessing the 2833 * data must depend on VBT version. 2834 */ 2835 memcpy(&devdata->child, child, 2836 min_t(size_t, defs->child_dev_size, sizeof(*child))); 2837 2838 list_add_tail(&devdata->node, &i915->display.vbt.display_devices); 2839 } 2840 2841 if (list_empty(&i915->display.vbt.display_devices)) 2842 drm_dbg_kms(&i915->drm, 2843 "no child dev is parsed from VBT\n"); 2844 } 2845 2846 /* Common defaults which may be overridden by VBT. */ 2847 static void 2848 init_vbt_defaults(struct drm_i915_private *i915) 2849 { 2850 i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 2851 2852 /* general features */ 2853 i915->display.vbt.int_tv_support = 1; 2854 i915->display.vbt.int_crt_support = 1; 2855 2856 /* driver features */ 2857 i915->display.vbt.int_lvds_support = 1; 2858 2859 /* Default to using SSC */ 2860 i915->display.vbt.lvds_use_ssc = 1; 2861 /* 2862 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 2863 * clock for LVDS. 2864 */ 2865 i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915, 2866 !HAS_PCH_SPLIT(i915)); 2867 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n", 2868 i915->display.vbt.lvds_ssc_freq); 2869 } 2870 2871 /* Common defaults which may be overridden by VBT. */ 2872 static void 2873 init_vbt_panel_defaults(struct intel_panel *panel) 2874 { 2875 /* Default to having backlight */ 2876 panel->vbt.backlight.present = true; 2877 2878 /* LFP panel data */ 2879 panel->vbt.lvds_dither = true; 2880 } 2881 2882 /* Defaults to initialize only if there is no VBT. */ 2883 static void 2884 init_vbt_missing_defaults(struct drm_i915_private *i915) 2885 { 2886 enum port port; 2887 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | 2888 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F); 2889 2890 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915)) 2891 return; 2892 2893 for_each_port_masked(port, ports) { 2894 struct intel_bios_encoder_data *devdata; 2895 struct child_device_config *child; 2896 enum phy phy = intel_port_to_phy(i915, port); 2897 2898 /* 2899 * VBT has the TypeC mode (native,TBT/USB) and we don't want 2900 * to detect it. 2901 */ 2902 if (intel_phy_is_tc(i915, phy)) 2903 continue; 2904 2905 /* Create fake child device config */ 2906 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2907 if (!devdata) 2908 break; 2909 2910 devdata->i915 = i915; 2911 child = &devdata->child; 2912 2913 if (port == PORT_F) 2914 child->dvo_port = DVO_PORT_HDMIF; 2915 else if (port == PORT_E) 2916 child->dvo_port = DVO_PORT_HDMIE; 2917 else 2918 child->dvo_port = DVO_PORT_HDMIA + port; 2919 2920 if (port != PORT_A && port != PORT_E) 2921 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING; 2922 2923 if (port != PORT_E) 2924 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2925 2926 if (port == PORT_A) 2927 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR; 2928 2929 list_add_tail(&devdata->node, &i915->display.vbt.display_devices); 2930 2931 drm_dbg_kms(&i915->drm, 2932 "Generating default VBT child device with type 0x04%x on port %c\n", 2933 child->device_type, port_name(port)); 2934 } 2935 2936 /* Bypass some minimum baseline VBT version checks */ 2937 i915->display.vbt.version = 155; 2938 } 2939 2940 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 2941 { 2942 const void *_vbt = vbt; 2943 2944 return _vbt + vbt->bdb_offset; 2945 } 2946 2947 /** 2948 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 2949 * @buf: pointer to a buffer to validate 2950 * @size: size of the buffer 2951 * 2952 * Returns true on valid VBT. 2953 */ 2954 bool intel_bios_is_valid_vbt(const void *buf, size_t size) 2955 { 2956 const struct vbt_header *vbt = buf; 2957 const struct bdb_header *bdb; 2958 2959 if (!vbt) 2960 return false; 2961 2962 if (sizeof(struct vbt_header) > size) { 2963 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 2964 return false; 2965 } 2966 2967 if (memcmp(vbt->signature, "$VBT", 4)) { 2968 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 2969 return false; 2970 } 2971 2972 if (vbt->vbt_size > size) { 2973 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 2974 return false; 2975 } 2976 2977 size = vbt->vbt_size; 2978 2979 if (range_overflows_t(size_t, 2980 vbt->bdb_offset, 2981 sizeof(struct bdb_header), 2982 size)) { 2983 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 2984 return false; 2985 } 2986 2987 bdb = get_bdb_header(vbt); 2988 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 2989 DRM_DEBUG_DRIVER("BDB incomplete\n"); 2990 return false; 2991 } 2992 2993 return vbt; 2994 } 2995 2996 static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915) 2997 { 2998 u32 count, data, found, store = 0; 2999 u32 static_region, oprom_offset; 3000 u32 oprom_size = 0x200000; 3001 u16 vbt_size; 3002 u32 *vbt; 3003 3004 static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS); 3005 static_region &= OPTIONROM_SPI_REGIONID_MASK; 3006 intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region); 3007 3008 oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET); 3009 oprom_offset &= OROM_OFFSET_MASK; 3010 3011 for (count = 0; count < oprom_size; count += 4) { 3012 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, oprom_offset + count); 3013 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER); 3014 3015 if (data == *((const u32 *)"$VBT")) { 3016 found = oprom_offset + count; 3017 break; 3018 } 3019 } 3020 3021 if (count >= oprom_size) 3022 goto err_not_found; 3023 3024 /* Get VBT size and allocate space for the VBT */ 3025 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + 3026 offsetof(struct vbt_header, vbt_size)); 3027 vbt_size = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER); 3028 vbt_size &= 0xffff; 3029 3030 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL); 3031 if (!vbt) 3032 goto err_not_found; 3033 3034 for (count = 0; count < vbt_size; count += 4) { 3035 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + count); 3036 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER); 3037 *(vbt + store++) = data; 3038 } 3039 3040 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 3041 goto err_free_vbt; 3042 3043 drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n"); 3044 3045 return (struct vbt_header *)vbt; 3046 3047 err_free_vbt: 3048 kfree(vbt); 3049 err_not_found: 3050 return NULL; 3051 } 3052 3053 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) 3054 { 3055 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); 3056 void __iomem *p = NULL, *oprom; 3057 struct vbt_header *vbt; 3058 u16 vbt_size; 3059 size_t i, size; 3060 3061 oprom = pci_map_rom(pdev, &size); 3062 if (!oprom) 3063 return NULL; 3064 3065 /* Scour memory looking for the VBT signature. */ 3066 for (i = 0; i + 4 < size; i += 4) { 3067 if (ioread32(oprom + i) != *((const u32 *)"$VBT")) 3068 continue; 3069 3070 p = oprom + i; 3071 size -= i; 3072 break; 3073 } 3074 3075 if (!p) 3076 goto err_unmap_oprom; 3077 3078 if (sizeof(struct vbt_header) > size) { 3079 drm_dbg(&i915->drm, "VBT header incomplete\n"); 3080 goto err_unmap_oprom; 3081 } 3082 3083 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size)); 3084 if (vbt_size > size) { 3085 drm_dbg(&i915->drm, 3086 "VBT incomplete (vbt_size overflows)\n"); 3087 goto err_unmap_oprom; 3088 } 3089 3090 /* The rest will be validated by intel_bios_is_valid_vbt() */ 3091 vbt = kmalloc(vbt_size, GFP_KERNEL); 3092 if (!vbt) 3093 goto err_unmap_oprom; 3094 3095 memcpy_fromio(vbt, p, vbt_size); 3096 3097 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 3098 goto err_free_vbt; 3099 3100 pci_unmap_rom(pdev, oprom); 3101 3102 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n"); 3103 3104 return vbt; 3105 3106 err_free_vbt: 3107 kfree(vbt); 3108 err_unmap_oprom: 3109 pci_unmap_rom(pdev, oprom); 3110 3111 return NULL; 3112 } 3113 3114 /** 3115 * intel_bios_init - find VBT and initialize settings from the BIOS 3116 * @i915: i915 device instance 3117 * 3118 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 3119 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 3120 * initialize some defaults if the VBT is not present at all. 3121 */ 3122 void intel_bios_init(struct drm_i915_private *i915) 3123 { 3124 const struct vbt_header *vbt = i915->display.opregion.vbt; 3125 struct vbt_header *oprom_vbt = NULL; 3126 const struct bdb_header *bdb; 3127 3128 INIT_LIST_HEAD(&i915->display.vbt.display_devices); 3129 INIT_LIST_HEAD(&i915->display.vbt.bdb_blocks); 3130 3131 if (!HAS_DISPLAY(i915)) { 3132 drm_dbg_kms(&i915->drm, 3133 "Skipping VBT init due to disabled display.\n"); 3134 return; 3135 } 3136 3137 init_vbt_defaults(i915); 3138 3139 /* 3140 * If the OpRegion does not have VBT, look in SPI flash through MMIO or 3141 * PCI mapping 3142 */ 3143 if (!vbt && IS_DGFX(i915)) { 3144 oprom_vbt = spi_oprom_get_vbt(i915); 3145 vbt = oprom_vbt; 3146 } 3147 3148 if (!vbt) { 3149 oprom_vbt = oprom_get_vbt(i915); 3150 vbt = oprom_vbt; 3151 } 3152 3153 if (!vbt) 3154 goto out; 3155 3156 bdb = get_bdb_header(vbt); 3157 i915->display.vbt.version = bdb->version; 3158 3159 drm_dbg_kms(&i915->drm, 3160 "VBT signature \"%.*s\", BDB version %d\n", 3161 (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version); 3162 3163 init_bdb_blocks(i915, bdb); 3164 3165 /* Grab useful general definitions */ 3166 parse_general_features(i915); 3167 parse_general_definitions(i915); 3168 parse_driver_features(i915); 3169 3170 /* Depends on child device list */ 3171 parse_compression_parameters(i915); 3172 3173 out: 3174 if (!vbt) { 3175 drm_info(&i915->drm, 3176 "Failed to find VBIOS tables (VBT)\n"); 3177 init_vbt_missing_defaults(i915); 3178 } 3179 3180 /* Further processing on pre-parsed or generated child device data */ 3181 parse_sdvo_device_mapping(i915); 3182 parse_ddi_ports(i915); 3183 3184 kfree(oprom_vbt); 3185 } 3186 3187 static void intel_bios_init_panel(struct drm_i915_private *i915, 3188 struct intel_panel *panel, 3189 const struct intel_bios_encoder_data *devdata, 3190 const struct drm_edid *drm_edid, 3191 bool use_fallback) 3192 { 3193 /* already have it? */ 3194 if (panel->vbt.panel_type >= 0) { 3195 drm_WARN_ON(&i915->drm, !use_fallback); 3196 return; 3197 } 3198 3199 panel->vbt.panel_type = get_panel_type(i915, devdata, 3200 drm_edid, use_fallback); 3201 if (panel->vbt.panel_type < 0) { 3202 drm_WARN_ON(&i915->drm, use_fallback); 3203 return; 3204 } 3205 3206 init_vbt_panel_defaults(panel); 3207 3208 parse_panel_options(i915, panel); 3209 parse_generic_dtd(i915, panel); 3210 parse_lfp_data(i915, panel); 3211 parse_lfp_backlight(i915, panel); 3212 parse_sdvo_panel_data(i915, panel); 3213 parse_panel_driver_features(i915, panel); 3214 parse_power_conservation_features(i915, panel); 3215 parse_edp(i915, panel); 3216 parse_psr(i915, panel); 3217 parse_mipi_config(i915, panel); 3218 parse_mipi_sequence(i915, panel); 3219 } 3220 3221 void intel_bios_init_panel_early(struct drm_i915_private *i915, 3222 struct intel_panel *panel, 3223 const struct intel_bios_encoder_data *devdata) 3224 { 3225 intel_bios_init_panel(i915, panel, devdata, NULL, false); 3226 } 3227 3228 void intel_bios_init_panel_late(struct drm_i915_private *i915, 3229 struct intel_panel *panel, 3230 const struct intel_bios_encoder_data *devdata, 3231 const struct drm_edid *drm_edid) 3232 { 3233 intel_bios_init_panel(i915, panel, devdata, drm_edid, true); 3234 } 3235 3236 /** 3237 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 3238 * @i915: i915 device instance 3239 */ 3240 void intel_bios_driver_remove(struct drm_i915_private *i915) 3241 { 3242 struct intel_bios_encoder_data *devdata, *nd; 3243 struct bdb_block_entry *entry, *ne; 3244 3245 list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) { 3246 list_del(&devdata->node); 3247 kfree(devdata->dsc); 3248 kfree(devdata); 3249 } 3250 3251 list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) { 3252 list_del(&entry->node); 3253 kfree(entry); 3254 } 3255 } 3256 3257 void intel_bios_fini_panel(struct intel_panel *panel) 3258 { 3259 kfree(panel->vbt.sdvo_lvds_vbt_mode); 3260 panel->vbt.sdvo_lvds_vbt_mode = NULL; 3261 kfree(panel->vbt.lfp_lvds_vbt_mode); 3262 panel->vbt.lfp_lvds_vbt_mode = NULL; 3263 kfree(panel->vbt.dsi.data); 3264 panel->vbt.dsi.data = NULL; 3265 kfree(panel->vbt.dsi.pps); 3266 panel->vbt.dsi.pps = NULL; 3267 kfree(panel->vbt.dsi.config); 3268 panel->vbt.dsi.config = NULL; 3269 kfree(panel->vbt.dsi.deassert_seq); 3270 panel->vbt.dsi.deassert_seq = NULL; 3271 } 3272 3273 /** 3274 * intel_bios_is_tv_present - is integrated TV present in VBT 3275 * @i915: i915 device instance 3276 * 3277 * Return true if TV is present. If no child devices were parsed from VBT, 3278 * assume TV is present. 3279 */ 3280 bool intel_bios_is_tv_present(struct drm_i915_private *i915) 3281 { 3282 const struct intel_bios_encoder_data *devdata; 3283 const struct child_device_config *child; 3284 3285 if (!i915->display.vbt.int_tv_support) 3286 return false; 3287 3288 if (list_empty(&i915->display.vbt.display_devices)) 3289 return true; 3290 3291 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3292 child = &devdata->child; 3293 3294 /* 3295 * If the device type is not TV, continue. 3296 */ 3297 switch (child->device_type) { 3298 case DEVICE_TYPE_INT_TV: 3299 case DEVICE_TYPE_TV: 3300 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 3301 break; 3302 default: 3303 continue; 3304 } 3305 /* Only when the addin_offset is non-zero, it is regarded 3306 * as present. 3307 */ 3308 if (child->addin_offset) 3309 return true; 3310 } 3311 3312 return false; 3313 } 3314 3315 /** 3316 * intel_bios_is_lvds_present - is LVDS present in VBT 3317 * @i915: i915 device instance 3318 * @i2c_pin: i2c pin for LVDS if present 3319 * 3320 * Return true if LVDS is present. If no child devices were parsed from VBT, 3321 * assume LVDS is present. 3322 */ 3323 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin) 3324 { 3325 const struct intel_bios_encoder_data *devdata; 3326 const struct child_device_config *child; 3327 3328 if (list_empty(&i915->display.vbt.display_devices)) 3329 return true; 3330 3331 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3332 child = &devdata->child; 3333 3334 /* If the device type is not LFP, continue. 3335 * We have to check both the new identifiers as well as the 3336 * old for compatibility with some BIOSes. 3337 */ 3338 if (child->device_type != DEVICE_TYPE_INT_LFP && 3339 child->device_type != DEVICE_TYPE_LFP) 3340 continue; 3341 3342 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin)) 3343 *i2c_pin = child->i2c_pin; 3344 3345 /* However, we cannot trust the BIOS writers to populate 3346 * the VBT correctly. Since LVDS requires additional 3347 * information from AIM blocks, a non-zero addin offset is 3348 * a good indicator that the LVDS is actually present. 3349 */ 3350 if (child->addin_offset) 3351 return true; 3352 3353 /* But even then some BIOS writers perform some black magic 3354 * and instantiate the device without reference to any 3355 * additional data. Trust that if the VBT was written into 3356 * the OpRegion then they have validated the LVDS's existence. 3357 */ 3358 if (i915->display.opregion.vbt) 3359 return true; 3360 } 3361 3362 return false; 3363 } 3364 3365 /** 3366 * intel_bios_is_port_present - is the specified digital port present 3367 * @i915: i915 device instance 3368 * @port: port to check 3369 * 3370 * Return true if the device in %port is present. 3371 */ 3372 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port) 3373 { 3374 if (WARN_ON(!has_ddi_port_info(i915))) 3375 return true; 3376 3377 return i915->display.vbt.ports[port]; 3378 } 3379 3380 /** 3381 * intel_bios_is_port_edp - is the device in given port eDP 3382 * @i915: i915 device instance 3383 * @port: port to check 3384 * 3385 * Return true if the device in %port is eDP. 3386 */ 3387 bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port) 3388 { 3389 const struct intel_bios_encoder_data *devdata = 3390 intel_bios_encoder_data_lookup(i915, port); 3391 3392 return devdata && intel_bios_encoder_supports_edp(devdata); 3393 } 3394 3395 static bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata) 3396 { 3397 const struct child_device_config *child = &devdata->child; 3398 3399 if (!intel_bios_encoder_supports_dp(devdata) || 3400 !intel_bios_encoder_supports_hdmi(devdata)) 3401 return false; 3402 3403 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA) 3404 return true; 3405 3406 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 3407 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA && 3408 child->aux_channel != 0) 3409 return true; 3410 3411 return false; 3412 } 3413 3414 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915, 3415 enum port port) 3416 { 3417 const struct intel_bios_encoder_data *devdata = 3418 intel_bios_encoder_data_lookup(i915, port); 3419 3420 return devdata && intel_bios_encoder_supports_dp_dual_mode(devdata); 3421 } 3422 3423 /** 3424 * intel_bios_is_dsi_present - is DSI present in VBT 3425 * @i915: i915 device instance 3426 * @port: port for DSI if present 3427 * 3428 * Return true if DSI is present, and return the port in %port. 3429 */ 3430 bool intel_bios_is_dsi_present(struct drm_i915_private *i915, 3431 enum port *port) 3432 { 3433 const struct intel_bios_encoder_data *devdata; 3434 const struct child_device_config *child; 3435 u8 dvo_port; 3436 3437 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3438 child = &devdata->child; 3439 3440 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3441 continue; 3442 3443 dvo_port = child->dvo_port; 3444 3445 if (dvo_port == DVO_PORT_MIPIA || 3446 (dvo_port == DVO_PORT_MIPIB && DISPLAY_VER(i915) >= 11) || 3447 (dvo_port == DVO_PORT_MIPIC && DISPLAY_VER(i915) < 11)) { 3448 if (port) 3449 *port = dvo_port - DVO_PORT_MIPIA; 3450 return true; 3451 } else if (dvo_port == DVO_PORT_MIPIB || 3452 dvo_port == DVO_PORT_MIPIC || 3453 dvo_port == DVO_PORT_MIPID) { 3454 drm_dbg_kms(&i915->drm, 3455 "VBT has unsupported DSI port %c\n", 3456 port_name(dvo_port - DVO_PORT_MIPIA)); 3457 } 3458 } 3459 3460 return false; 3461 } 3462 3463 static void fill_dsc(struct intel_crtc_state *crtc_state, 3464 struct dsc_compression_parameters_entry *dsc, 3465 int dsc_max_bpc) 3466 { 3467 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 3468 int bpc = 8; 3469 3470 vdsc_cfg->dsc_version_major = dsc->version_major; 3471 vdsc_cfg->dsc_version_minor = dsc->version_minor; 3472 3473 if (dsc->support_12bpc && dsc_max_bpc >= 12) 3474 bpc = 12; 3475 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 3476 bpc = 10; 3477 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 3478 bpc = 8; 3479 else 3480 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n", 3481 dsc_max_bpc); 3482 3483 crtc_state->pipe_bpp = bpc * 3; 3484 3485 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp, 3486 VBT_DSC_MAX_BPP(dsc->max_bpp)); 3487 3488 /* 3489 * FIXME: This is ugly, and slice count should take DSC engine 3490 * throughput etc. into account. 3491 * 3492 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 3493 */ 3494 if (dsc->slices_per_line & BIT(2)) { 3495 crtc_state->dsc.slice_count = 4; 3496 } else if (dsc->slices_per_line & BIT(1)) { 3497 crtc_state->dsc.slice_count = 2; 3498 } else { 3499 /* FIXME */ 3500 if (!(dsc->slices_per_line & BIT(0))) 3501 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n"); 3502 3503 crtc_state->dsc.slice_count = 1; 3504 } 3505 3506 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 3507 crtc_state->dsc.slice_count != 0) 3508 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n", 3509 crtc_state->hw.adjusted_mode.crtc_hdisplay, 3510 crtc_state->dsc.slice_count); 3511 3512 /* 3513 * The VBT rc_buffer_block_size and rc_buffer_size definitions 3514 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. 3515 */ 3516 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, 3517 dsc->rc_buffer_size); 3518 3519 /* FIXME: DSI spec says bpc + 1 for this one */ 3520 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 3521 3522 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 3523 3524 vdsc_cfg->slice_height = dsc->slice_height; 3525 } 3526 3527 /* FIXME: initially DSI specific */ 3528 bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 3529 struct intel_crtc_state *crtc_state, 3530 int dsc_max_bpc) 3531 { 3532 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3533 const struct intel_bios_encoder_data *devdata; 3534 const struct child_device_config *child; 3535 3536 list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) { 3537 child = &devdata->child; 3538 3539 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3540 continue; 3541 3542 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) { 3543 if (!devdata->dsc) 3544 return false; 3545 3546 if (crtc_state) 3547 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 3548 3549 return true; 3550 } 3551 } 3552 3553 return false; 3554 } 3555 3556 /** 3557 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port 3558 * @i915: i915 device instance 3559 * @port: port to check 3560 * 3561 * Return true if HPD should be inverted for %port. 3562 */ 3563 bool 3564 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, 3565 enum port port) 3566 { 3567 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port]; 3568 3569 if (drm_WARN_ON_ONCE(&i915->drm, 3570 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915))) 3571 return false; 3572 3573 return devdata && devdata->child.hpd_invert; 3574 } 3575 3576 /** 3577 * intel_bios_is_lspcon_present - if LSPCON is attached on %port 3578 * @i915: i915 device instance 3579 * @port: port to check 3580 * 3581 * Return true if LSPCON is present on this port 3582 */ 3583 bool 3584 intel_bios_is_lspcon_present(const struct drm_i915_private *i915, 3585 enum port port) 3586 { 3587 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port]; 3588 3589 return HAS_LSPCON(i915) && devdata && devdata->child.lspcon; 3590 } 3591 3592 /** 3593 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port 3594 * @i915: i915 device instance 3595 * @port: port to check 3596 * 3597 * Return true if port requires lane reversal 3598 */ 3599 bool 3600 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915, 3601 enum port port) 3602 { 3603 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port]; 3604 3605 return devdata && devdata->child.lane_reversal; 3606 } 3607 3608 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915, 3609 enum port port) 3610 { 3611 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[port]; 3612 enum aux_ch aux_ch; 3613 3614 if (!devdata || !devdata->child.aux_channel) { 3615 aux_ch = (enum aux_ch)port; 3616 3617 drm_dbg_kms(&i915->drm, 3618 "using AUX %c for port %c (platform default)\n", 3619 aux_ch_name(aux_ch), port_name(port)); 3620 return aux_ch; 3621 } 3622 3623 /* 3624 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D 3625 * map to DDI A,B,TC1,TC2 respectively. 3626 * 3627 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E 3628 * map to DDI A,TC1,TC2,TC3,TC4 respectively. 3629 */ 3630 switch (devdata->child.aux_channel) { 3631 case DP_AUX_A: 3632 aux_ch = AUX_CH_A; 3633 break; 3634 case DP_AUX_B: 3635 if (IS_ALDERLAKE_S(i915)) 3636 aux_ch = AUX_CH_USBC1; 3637 else 3638 aux_ch = AUX_CH_B; 3639 break; 3640 case DP_AUX_C: 3641 if (IS_ALDERLAKE_S(i915)) 3642 aux_ch = AUX_CH_USBC2; 3643 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 3644 aux_ch = AUX_CH_USBC1; 3645 else 3646 aux_ch = AUX_CH_C; 3647 break; 3648 case DP_AUX_D: 3649 if (DISPLAY_VER(i915) >= 13) 3650 aux_ch = AUX_CH_D_XELPD; 3651 else if (IS_ALDERLAKE_S(i915)) 3652 aux_ch = AUX_CH_USBC3; 3653 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 3654 aux_ch = AUX_CH_USBC2; 3655 else 3656 aux_ch = AUX_CH_D; 3657 break; 3658 case DP_AUX_E: 3659 if (DISPLAY_VER(i915) >= 13) 3660 aux_ch = AUX_CH_E_XELPD; 3661 else if (IS_ALDERLAKE_S(i915)) 3662 aux_ch = AUX_CH_USBC4; 3663 else 3664 aux_ch = AUX_CH_E; 3665 break; 3666 case DP_AUX_F: 3667 if (DISPLAY_VER(i915) >= 13) 3668 aux_ch = AUX_CH_USBC1; 3669 else 3670 aux_ch = AUX_CH_F; 3671 break; 3672 case DP_AUX_G: 3673 if (DISPLAY_VER(i915) >= 13) 3674 aux_ch = AUX_CH_USBC2; 3675 else 3676 aux_ch = AUX_CH_G; 3677 break; 3678 case DP_AUX_H: 3679 if (DISPLAY_VER(i915) >= 13) 3680 aux_ch = AUX_CH_USBC3; 3681 else 3682 aux_ch = AUX_CH_H; 3683 break; 3684 case DP_AUX_I: 3685 if (DISPLAY_VER(i915) >= 13) 3686 aux_ch = AUX_CH_USBC4; 3687 else 3688 aux_ch = AUX_CH_I; 3689 break; 3690 default: 3691 MISSING_CASE(devdata->child.aux_channel); 3692 aux_ch = AUX_CH_A; 3693 break; 3694 } 3695 3696 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n", 3697 aux_ch_name(aux_ch), port_name(port)); 3698 3699 return aux_ch; 3700 } 3701 3702 int intel_bios_max_tmds_clock(struct intel_encoder *encoder) 3703 { 3704 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3705 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port]; 3706 3707 return _intel_bios_max_tmds_clock(devdata); 3708 } 3709 3710 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */ 3711 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder) 3712 { 3713 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3714 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port]; 3715 3716 return _intel_bios_hdmi_level_shift(devdata); 3717 } 3718 3719 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata) 3720 { 3721 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost) 3722 return 0; 3723 3724 return translate_iboost(devdata->child.dp_iboost_level); 3725 } 3726 3727 int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata) 3728 { 3729 if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost) 3730 return 0; 3731 3732 return translate_iboost(devdata->child.hdmi_iboost_level); 3733 } 3734 3735 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder) 3736 { 3737 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3738 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port]; 3739 3740 return _intel_bios_dp_max_link_rate(devdata); 3741 } 3742 3743 int intel_bios_dp_max_lane_count(struct intel_encoder *encoder) 3744 { 3745 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3746 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port]; 3747 3748 return _intel_bios_dp_max_lane_count(devdata); 3749 } 3750 3751 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder) 3752 { 3753 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3754 const struct intel_bios_encoder_data *devdata = i915->display.vbt.ports[encoder->port]; 3755 3756 if (!devdata || !devdata->child.ddc_pin) 3757 return 0; 3758 3759 return map_ddc_pin(i915, devdata->child.ddc_pin); 3760 } 3761 3762 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata) 3763 { 3764 return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c; 3765 } 3766 3767 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata) 3768 { 3769 return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt; 3770 } 3771 3772 const struct intel_bios_encoder_data * 3773 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port) 3774 { 3775 return i915->display.vbt.ports[port]; 3776 } 3777