1 /*
2  * Copyright © 2006 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Authors:
24  *    Eric Anholt <eric@anholt.net>
25  *
26  */
27 
28 #include <drm/drm_dp_helper.h>
29 
30 #include "display/intel_display.h"
31 #include "display/intel_display_types.h"
32 #include "display/intel_gmbus.h"
33 
34 #include "i915_drv.h"
35 
36 #define _INTEL_BIOS_PRIVATE
37 #include "intel_vbt_defs.h"
38 
39 /**
40  * DOC: Video BIOS Table (VBT)
41  *
42  * The Video BIOS Table, or VBT, provides platform and board specific
43  * configuration information to the driver that is not discoverable or available
44  * through other means. The configuration is mostly related to display
45  * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
46  * the PCI ROM.
47  *
48  * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
49  * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
50  * contain the actual configuration information. The VBT Header, and thus the
51  * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
52  * BDB Header. The data blocks are concatenated after the BDB Header. The data
53  * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
54  * data. (Block 53, the MIPI Sequence Block is an exception.)
55  *
56  * The driver parses the VBT during load. The relevant information is stored in
57  * driver private data for ease of use, and the actual VBT is not read after
58  * that.
59  */
60 
61 /* Wrapper for VBT child device config */
62 struct display_device_data {
63 	struct child_device_config child;
64 	struct dsc_compression_parameters_entry *dsc;
65 	struct list_head node;
66 };
67 
68 #define	SLAVE_ADDR1	0x70
69 #define	SLAVE_ADDR2	0x72
70 
71 /* Get BDB block size given a pointer to Block ID. */
72 static u32 _get_blocksize(const u8 *block_base)
73 {
74 	/* The MIPI Sequence Block v3+ has a separate size field. */
75 	if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
76 		return *((const u32 *)(block_base + 4));
77 	else
78 		return *((const u16 *)(block_base + 1));
79 }
80 
81 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
82 static u32 get_blocksize(const void *block_data)
83 {
84 	return _get_blocksize(block_data - 3);
85 }
86 
87 static const void *
88 find_section(const void *_bdb, enum bdb_block_id section_id)
89 {
90 	const struct bdb_header *bdb = _bdb;
91 	const u8 *base = _bdb;
92 	int index = 0;
93 	u32 total, current_size;
94 	enum bdb_block_id current_id;
95 
96 	/* skip to first section */
97 	index += bdb->header_size;
98 	total = bdb->bdb_size;
99 
100 	/* walk the sections looking for section_id */
101 	while (index + 3 < total) {
102 		current_id = *(base + index);
103 		current_size = _get_blocksize(base + index);
104 		index += 3;
105 
106 		if (index + current_size > total)
107 			return NULL;
108 
109 		if (current_id == section_id)
110 			return base + index;
111 
112 		index += current_size;
113 	}
114 
115 	return NULL;
116 }
117 
118 static void
119 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
120 			const struct lvds_dvo_timing *dvo_timing)
121 {
122 	panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
123 		dvo_timing->hactive_lo;
124 	panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
125 		((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
126 	panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
127 		((dvo_timing->hsync_pulse_width_hi << 8) |
128 			dvo_timing->hsync_pulse_width_lo);
129 	panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
130 		((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
131 
132 	panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
133 		dvo_timing->vactive_lo;
134 	panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
135 		((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
136 	panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
137 		((dvo_timing->vsync_pulse_width_hi << 4) |
138 			dvo_timing->vsync_pulse_width_lo);
139 	panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
140 		((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
141 	panel_fixed_mode->clock = dvo_timing->clock * 10;
142 	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
143 
144 	if (dvo_timing->hsync_positive)
145 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
146 	else
147 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
148 
149 	if (dvo_timing->vsync_positive)
150 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
151 	else
152 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
153 
154 	panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
155 		dvo_timing->himage_lo;
156 	panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
157 		dvo_timing->vimage_lo;
158 
159 	/* Some VBTs have bogus h/vtotal values */
160 	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
161 		panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
162 	if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
163 		panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
164 
165 	drm_mode_set_name(panel_fixed_mode);
166 }
167 
168 static const struct lvds_dvo_timing *
169 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
170 		    const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
171 		    int index)
172 {
173 	/*
174 	 * the size of fp_timing varies on the different platform.
175 	 * So calculate the DVO timing relative offset in LVDS data
176 	 * entry to get the DVO timing entry
177 	 */
178 
179 	int lfp_data_size =
180 		lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
181 		lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
182 	int dvo_timing_offset =
183 		lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
184 		lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
185 	char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
186 
187 	return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
188 }
189 
190 /* get lvds_fp_timing entry
191  * this function may return NULL if the corresponding entry is invalid
192  */
193 static const struct lvds_fp_timing *
194 get_lvds_fp_timing(const struct bdb_header *bdb,
195 		   const struct bdb_lvds_lfp_data *data,
196 		   const struct bdb_lvds_lfp_data_ptrs *ptrs,
197 		   int index)
198 {
199 	size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
200 	u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
201 	size_t ofs;
202 
203 	if (index >= ARRAY_SIZE(ptrs->ptr))
204 		return NULL;
205 	ofs = ptrs->ptr[index].fp_timing_offset;
206 	if (ofs < data_ofs ||
207 	    ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
208 		return NULL;
209 	return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
210 }
211 
212 /* Parse general panel options */
213 static void
214 parse_panel_options(struct drm_i915_private *dev_priv,
215 		    const struct bdb_header *bdb)
216 {
217 	const struct bdb_lvds_options *lvds_options;
218 	int panel_type;
219 	int drrs_mode;
220 	int ret;
221 
222 	lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
223 	if (!lvds_options)
224 		return;
225 
226 	dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
227 
228 	ret = intel_opregion_get_panel_type(dev_priv);
229 	if (ret >= 0) {
230 		drm_WARN_ON(&dev_priv->drm, ret > 0xf);
231 		panel_type = ret;
232 		drm_dbg_kms(&dev_priv->drm, "Panel type: %d (OpRegion)\n",
233 			    panel_type);
234 	} else {
235 		if (lvds_options->panel_type > 0xf) {
236 			drm_dbg_kms(&dev_priv->drm,
237 				    "Invalid VBT panel type 0x%x\n",
238 				    lvds_options->panel_type);
239 			return;
240 		}
241 		panel_type = lvds_options->panel_type;
242 		drm_dbg_kms(&dev_priv->drm, "Panel type: %d (VBT)\n",
243 			    panel_type);
244 	}
245 
246 	dev_priv->vbt.panel_type = panel_type;
247 
248 	drrs_mode = (lvds_options->dps_panel_type_bits
249 				>> (panel_type * 2)) & MODE_MASK;
250 	/*
251 	 * VBT has static DRRS = 0 and seamless DRRS = 2.
252 	 * The below piece of code is required to adjust vbt.drrs_type
253 	 * to match the enum drrs_support_type.
254 	 */
255 	switch (drrs_mode) {
256 	case 0:
257 		dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
258 		drm_dbg_kms(&dev_priv->drm, "DRRS supported mode is static\n");
259 		break;
260 	case 2:
261 		dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
262 		drm_dbg_kms(&dev_priv->drm,
263 			    "DRRS supported mode is seamless\n");
264 		break;
265 	default:
266 		dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
267 		drm_dbg_kms(&dev_priv->drm,
268 			    "DRRS not supported (VBT input)\n");
269 		break;
270 	}
271 }
272 
273 /* Try to find integrated panel timing data */
274 static void
275 parse_lfp_panel_dtd(struct drm_i915_private *dev_priv,
276 		    const struct bdb_header *bdb)
277 {
278 	const struct bdb_lvds_lfp_data *lvds_lfp_data;
279 	const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
280 	const struct lvds_dvo_timing *panel_dvo_timing;
281 	const struct lvds_fp_timing *fp_timing;
282 	struct drm_display_mode *panel_fixed_mode;
283 	int panel_type = dev_priv->vbt.panel_type;
284 
285 	lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
286 	if (!lvds_lfp_data)
287 		return;
288 
289 	lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
290 	if (!lvds_lfp_data_ptrs)
291 		return;
292 
293 	panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
294 					       lvds_lfp_data_ptrs,
295 					       panel_type);
296 
297 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
298 	if (!panel_fixed_mode)
299 		return;
300 
301 	fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
302 
303 	dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
304 
305 	drm_dbg_kms(&dev_priv->drm,
306 		    "Found panel mode in BIOS VBT legacy lfp table:\n");
307 	drm_mode_debug_printmodeline(panel_fixed_mode);
308 
309 	fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
310 				       lvds_lfp_data_ptrs,
311 				       panel_type);
312 	if (fp_timing) {
313 		/* check the resolution, just to be sure */
314 		if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
315 		    fp_timing->y_res == panel_fixed_mode->vdisplay) {
316 			dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
317 			drm_dbg_kms(&dev_priv->drm,
318 				    "VBT initial LVDS value %x\n",
319 				    dev_priv->vbt.bios_lvds_val);
320 		}
321 	}
322 }
323 
324 static void
325 parse_generic_dtd(struct drm_i915_private *dev_priv,
326 		  const struct bdb_header *bdb)
327 {
328 	const struct bdb_generic_dtd *generic_dtd;
329 	const struct generic_dtd_entry *dtd;
330 	struct drm_display_mode *panel_fixed_mode;
331 	int num_dtd;
332 
333 	generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
334 	if (!generic_dtd)
335 		return;
336 
337 	if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
338 		drm_err(&dev_priv->drm, "GDTD size %u is too small.\n",
339 			generic_dtd->gdtd_size);
340 		return;
341 	} else if (generic_dtd->gdtd_size !=
342 		   sizeof(struct generic_dtd_entry)) {
343 		drm_err(&dev_priv->drm, "Unexpected GDTD size %u\n",
344 			generic_dtd->gdtd_size);
345 		/* DTD has unknown fields, but keep going */
346 	}
347 
348 	num_dtd = (get_blocksize(generic_dtd) -
349 		   sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
350 	if (dev_priv->vbt.panel_type >= num_dtd) {
351 		drm_err(&dev_priv->drm,
352 			"Panel type %d not found in table of %d DTD's\n",
353 			dev_priv->vbt.panel_type, num_dtd);
354 		return;
355 	}
356 
357 	dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type];
358 
359 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
360 	if (!panel_fixed_mode)
361 		return;
362 
363 	panel_fixed_mode->hdisplay = dtd->hactive;
364 	panel_fixed_mode->hsync_start =
365 		panel_fixed_mode->hdisplay + dtd->hfront_porch;
366 	panel_fixed_mode->hsync_end =
367 		panel_fixed_mode->hsync_start + dtd->hsync;
368 	panel_fixed_mode->htotal =
369 		panel_fixed_mode->hdisplay + dtd->hblank;
370 
371 	panel_fixed_mode->vdisplay = dtd->vactive;
372 	panel_fixed_mode->vsync_start =
373 		panel_fixed_mode->vdisplay + dtd->vfront_porch;
374 	panel_fixed_mode->vsync_end =
375 		panel_fixed_mode->vsync_start + dtd->vsync;
376 	panel_fixed_mode->vtotal =
377 		panel_fixed_mode->vdisplay + dtd->vblank;
378 
379 	panel_fixed_mode->clock = dtd->pixel_clock;
380 	panel_fixed_mode->width_mm = dtd->width_mm;
381 	panel_fixed_mode->height_mm = dtd->height_mm;
382 
383 	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
384 	drm_mode_set_name(panel_fixed_mode);
385 
386 	if (dtd->hsync_positive_polarity)
387 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
388 	else
389 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
390 
391 	if (dtd->vsync_positive_polarity)
392 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
393 	else
394 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
395 
396 	drm_dbg_kms(&dev_priv->drm,
397 		    "Found panel mode in BIOS VBT generic dtd table:\n");
398 	drm_mode_debug_printmodeline(panel_fixed_mode);
399 
400 	dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
401 }
402 
403 static void
404 parse_panel_dtd(struct drm_i915_private *dev_priv,
405 		const struct bdb_header *bdb)
406 {
407 	/*
408 	 * Older VBTs provided provided DTD information for internal displays
409 	 * through the "LFP panel DTD" block (42).  As of VBT revision 229,
410 	 * that block is now deprecated and DTD information should be provided
411 	 * via a newer "generic DTD" block (58).  Just to be safe, we'll
412 	 * try the new generic DTD block first on VBT >= 229, but still fall
413 	 * back to trying the old LFP block if that fails.
414 	 */
415 	if (bdb->version >= 229)
416 		parse_generic_dtd(dev_priv, bdb);
417 	if (!dev_priv->vbt.lfp_lvds_vbt_mode)
418 		parse_lfp_panel_dtd(dev_priv, bdb);
419 }
420 
421 static void
422 parse_lfp_backlight(struct drm_i915_private *dev_priv,
423 		    const struct bdb_header *bdb)
424 {
425 	const struct bdb_lfp_backlight_data *backlight_data;
426 	const struct lfp_backlight_data_entry *entry;
427 	int panel_type = dev_priv->vbt.panel_type;
428 	u16 level;
429 
430 	backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
431 	if (!backlight_data)
432 		return;
433 
434 	if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
435 		drm_dbg_kms(&dev_priv->drm,
436 			    "Unsupported backlight data entry size %u\n",
437 			    backlight_data->entry_size);
438 		return;
439 	}
440 
441 	entry = &backlight_data->data[panel_type];
442 
443 	dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
444 	if (!dev_priv->vbt.backlight.present) {
445 		drm_dbg_kms(&dev_priv->drm,
446 			    "PWM backlight not present in VBT (type %u)\n",
447 			    entry->type);
448 		return;
449 	}
450 
451 	dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
452 	if (bdb->version >= 191 &&
453 	    get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
454 		const struct lfp_backlight_control_method *method;
455 
456 		method = &backlight_data->backlight_control[panel_type];
457 		dev_priv->vbt.backlight.type = method->type;
458 		dev_priv->vbt.backlight.controller = method->controller;
459 	}
460 
461 	dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
462 	dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
463 
464 	if (bdb->version >= 234) {
465 		u16 min_level;
466 		bool scale;
467 
468 		level = backlight_data->brightness_level[panel_type].level;
469 		min_level = backlight_data->brightness_min_level[panel_type].level;
470 
471 		if (bdb->version >= 236)
472 			scale = backlight_data->brightness_precision_bits[panel_type] == 16;
473 		else
474 			scale = level > 255;
475 
476 		if (scale)
477 			min_level = min_level / 255;
478 
479 		if (min_level > 255) {
480 			drm_warn(&dev_priv->drm, "Brightness min level > 255\n");
481 			level = 255;
482 		}
483 		dev_priv->vbt.backlight.min_brightness = min_level;
484 	} else {
485 		level = backlight_data->level[panel_type];
486 		dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
487 	}
488 
489 	drm_dbg_kms(&dev_priv->drm,
490 		    "VBT backlight PWM modulation frequency %u Hz, "
491 		    "active %s, min brightness %u, level %u, controller %u\n",
492 		    dev_priv->vbt.backlight.pwm_freq_hz,
493 		    dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
494 		    dev_priv->vbt.backlight.min_brightness,
495 		    level,
496 		    dev_priv->vbt.backlight.controller);
497 }
498 
499 /* Try to find sdvo panel data */
500 static void
501 parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
502 		      const struct bdb_header *bdb)
503 {
504 	const struct bdb_sdvo_panel_dtds *dtds;
505 	struct drm_display_mode *panel_fixed_mode;
506 	int index;
507 
508 	index = dev_priv->params.vbt_sdvo_panel_type;
509 	if (index == -2) {
510 		drm_dbg_kms(&dev_priv->drm,
511 			    "Ignore SDVO panel mode from BIOS VBT tables.\n");
512 		return;
513 	}
514 
515 	if (index == -1) {
516 		const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
517 
518 		sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
519 		if (!sdvo_lvds_options)
520 			return;
521 
522 		index = sdvo_lvds_options->panel_type;
523 	}
524 
525 	dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
526 	if (!dtds)
527 		return;
528 
529 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
530 	if (!panel_fixed_mode)
531 		return;
532 
533 	fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
534 
535 	dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
536 
537 	drm_dbg_kms(&dev_priv->drm,
538 		    "Found SDVO panel mode in BIOS VBT tables:\n");
539 	drm_mode_debug_printmodeline(panel_fixed_mode);
540 }
541 
542 static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
543 				    bool alternate)
544 {
545 	switch (INTEL_GEN(dev_priv)) {
546 	case 2:
547 		return alternate ? 66667 : 48000;
548 	case 3:
549 	case 4:
550 		return alternate ? 100000 : 96000;
551 	default:
552 		return alternate ? 100000 : 120000;
553 	}
554 }
555 
556 static void
557 parse_general_features(struct drm_i915_private *dev_priv,
558 		       const struct bdb_header *bdb)
559 {
560 	const struct bdb_general_features *general;
561 
562 	general = find_section(bdb, BDB_GENERAL_FEATURES);
563 	if (!general)
564 		return;
565 
566 	dev_priv->vbt.int_tv_support = general->int_tv_support;
567 	/* int_crt_support can't be trusted on earlier platforms */
568 	if (bdb->version >= 155 &&
569 	    (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
570 		dev_priv->vbt.int_crt_support = general->int_crt_support;
571 	dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
572 	dev_priv->vbt.lvds_ssc_freq =
573 		intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
574 	dev_priv->vbt.display_clock_mode = general->display_clock_mode;
575 	dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
576 	if (bdb->version >= 181) {
577 		dev_priv->vbt.orientation = general->rotate_180 ?
578 			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
579 			DRM_MODE_PANEL_ORIENTATION_NORMAL;
580 	} else {
581 		dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
582 	}
583 	drm_dbg_kms(&dev_priv->drm,
584 		    "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
585 		    dev_priv->vbt.int_tv_support,
586 		    dev_priv->vbt.int_crt_support,
587 		    dev_priv->vbt.lvds_use_ssc,
588 		    dev_priv->vbt.lvds_ssc_freq,
589 		    dev_priv->vbt.display_clock_mode,
590 		    dev_priv->vbt.fdi_rx_polarity_inverted);
591 }
592 
593 static const struct child_device_config *
594 child_device_ptr(const struct bdb_general_definitions *defs, int i)
595 {
596 	return (const void *) &defs->devices[i * defs->child_dev_size];
597 }
598 
599 static void
600 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
601 {
602 	struct sdvo_device_mapping *mapping;
603 	const struct display_device_data *devdata;
604 	const struct child_device_config *child;
605 	int count = 0;
606 
607 	/*
608 	 * Only parse SDVO mappings on gens that could have SDVO. This isn't
609 	 * accurate and doesn't have to be, as long as it's not too strict.
610 	 */
611 	if (!IS_GEN_RANGE(dev_priv, 3, 7)) {
612 		drm_dbg_kms(&dev_priv->drm, "Skipping SDVO device mapping\n");
613 		return;
614 	}
615 
616 	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
617 		child = &devdata->child;
618 
619 		if (child->slave_addr != SLAVE_ADDR1 &&
620 		    child->slave_addr != SLAVE_ADDR2) {
621 			/*
622 			 * If the slave address is neither 0x70 nor 0x72,
623 			 * it is not a SDVO device. Skip it.
624 			 */
625 			continue;
626 		}
627 		if (child->dvo_port != DEVICE_PORT_DVOB &&
628 		    child->dvo_port != DEVICE_PORT_DVOC) {
629 			/* skip the incorrect SDVO port */
630 			drm_dbg_kms(&dev_priv->drm,
631 				    "Incorrect SDVO port. Skip it\n");
632 			continue;
633 		}
634 		drm_dbg_kms(&dev_priv->drm,
635 			    "the SDVO device with slave addr %2x is found on"
636 			    " %s port\n",
637 			    child->slave_addr,
638 			    (child->dvo_port == DEVICE_PORT_DVOB) ?
639 			    "SDVOB" : "SDVOC");
640 		mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
641 		if (!mapping->initialized) {
642 			mapping->dvo_port = child->dvo_port;
643 			mapping->slave_addr = child->slave_addr;
644 			mapping->dvo_wiring = child->dvo_wiring;
645 			mapping->ddc_pin = child->ddc_pin;
646 			mapping->i2c_pin = child->i2c_pin;
647 			mapping->initialized = 1;
648 			drm_dbg_kms(&dev_priv->drm,
649 				    "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
650 				    mapping->dvo_port, mapping->slave_addr,
651 				    mapping->dvo_wiring, mapping->ddc_pin,
652 				    mapping->i2c_pin);
653 		} else {
654 			drm_dbg_kms(&dev_priv->drm,
655 				    "Maybe one SDVO port is shared by "
656 				    "two SDVO device.\n");
657 		}
658 		if (child->slave2_addr) {
659 			/* Maybe this is a SDVO device with multiple inputs */
660 			/* And the mapping info is not added */
661 			drm_dbg_kms(&dev_priv->drm,
662 				    "there exists the slave2_addr. Maybe this"
663 				    " is a SDVO device with multiple inputs.\n");
664 		}
665 		count++;
666 	}
667 
668 	if (!count) {
669 		/* No SDVO device info is found */
670 		drm_dbg_kms(&dev_priv->drm,
671 			    "No SDVO device info is found in VBT\n");
672 	}
673 }
674 
675 static void
676 parse_driver_features(struct drm_i915_private *dev_priv,
677 		      const struct bdb_header *bdb)
678 {
679 	const struct bdb_driver_features *driver;
680 
681 	driver = find_section(bdb, BDB_DRIVER_FEATURES);
682 	if (!driver)
683 		return;
684 
685 	if (INTEL_GEN(dev_priv) >= 5) {
686 		/*
687 		 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
688 		 * to mean "eDP". The VBT spec doesn't agree with that
689 		 * interpretation, but real world VBTs seem to.
690 		 */
691 		if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
692 			dev_priv->vbt.int_lvds_support = 0;
693 	} else {
694 		/*
695 		 * FIXME it's not clear which BDB version has the LVDS config
696 		 * bits defined. Revision history in the VBT spec says:
697 		 * "0.92 | Add two definitions for VBT value of LVDS Active
698 		 *  Config (00b and 11b values defined) | 06/13/2005"
699 		 * but does not the specify the BDB version.
700 		 *
701 		 * So far version 134 (on i945gm) is the oldest VBT observed
702 		 * in the wild with the bits correctly populated. Version
703 		 * 108 (on i85x) does not have the bits correctly populated.
704 		 */
705 		if (bdb->version >= 134 &&
706 		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
707 		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
708 			dev_priv->vbt.int_lvds_support = 0;
709 	}
710 
711 	if (bdb->version < 228) {
712 		drm_dbg_kms(&dev_priv->drm, "DRRS State Enabled:%d\n",
713 			    driver->drrs_enabled);
714 		/*
715 		 * If DRRS is not supported, drrs_type has to be set to 0.
716 		 * This is because, VBT is configured in such a way that
717 		 * static DRRS is 0 and DRRS not supported is represented by
718 		 * driver->drrs_enabled=false
719 		 */
720 		if (!driver->drrs_enabled)
721 			dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
722 
723 		dev_priv->vbt.psr.enable = driver->psr_enabled;
724 	}
725 }
726 
727 static void
728 parse_power_conservation_features(struct drm_i915_private *dev_priv,
729 				  const struct bdb_header *bdb)
730 {
731 	const struct bdb_lfp_power *power;
732 	u8 panel_type = dev_priv->vbt.panel_type;
733 
734 	if (bdb->version < 228)
735 		return;
736 
737 	power = find_section(bdb, BDB_LFP_POWER);
738 	if (!power)
739 		return;
740 
741 	dev_priv->vbt.psr.enable = power->psr & BIT(panel_type);
742 
743 	/*
744 	 * If DRRS is not supported, drrs_type has to be set to 0.
745 	 * This is because, VBT is configured in such a way that
746 	 * static DRRS is 0 and DRRS not supported is represented by
747 	 * power->drrs & BIT(panel_type)=false
748 	 */
749 	if (!(power->drrs & BIT(panel_type)))
750 		dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
751 
752 	if (bdb->version >= 232)
753 		dev_priv->vbt.edp.hobl = power->hobl & BIT(panel_type);
754 }
755 
756 static void
757 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
758 {
759 	const struct bdb_edp *edp;
760 	const struct edp_power_seq *edp_pps;
761 	const struct edp_fast_link_params *edp_link_params;
762 	int panel_type = dev_priv->vbt.panel_type;
763 
764 	edp = find_section(bdb, BDB_EDP);
765 	if (!edp)
766 		return;
767 
768 	switch ((edp->color_depth >> (panel_type * 2)) & 3) {
769 	case EDP_18BPP:
770 		dev_priv->vbt.edp.bpp = 18;
771 		break;
772 	case EDP_24BPP:
773 		dev_priv->vbt.edp.bpp = 24;
774 		break;
775 	case EDP_30BPP:
776 		dev_priv->vbt.edp.bpp = 30;
777 		break;
778 	}
779 
780 	/* Get the eDP sequencing and link info */
781 	edp_pps = &edp->power_seqs[panel_type];
782 	edp_link_params = &edp->fast_link_params[panel_type];
783 
784 	dev_priv->vbt.edp.pps = *edp_pps;
785 
786 	switch (edp_link_params->rate) {
787 	case EDP_RATE_1_62:
788 		dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
789 		break;
790 	case EDP_RATE_2_7:
791 		dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
792 		break;
793 	default:
794 		drm_dbg_kms(&dev_priv->drm,
795 			    "VBT has unknown eDP link rate value %u\n",
796 			     edp_link_params->rate);
797 		break;
798 	}
799 
800 	switch (edp_link_params->lanes) {
801 	case EDP_LANE_1:
802 		dev_priv->vbt.edp.lanes = 1;
803 		break;
804 	case EDP_LANE_2:
805 		dev_priv->vbt.edp.lanes = 2;
806 		break;
807 	case EDP_LANE_4:
808 		dev_priv->vbt.edp.lanes = 4;
809 		break;
810 	default:
811 		drm_dbg_kms(&dev_priv->drm,
812 			    "VBT has unknown eDP lane count value %u\n",
813 			    edp_link_params->lanes);
814 		break;
815 	}
816 
817 	switch (edp_link_params->preemphasis) {
818 	case EDP_PREEMPHASIS_NONE:
819 		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
820 		break;
821 	case EDP_PREEMPHASIS_3_5dB:
822 		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
823 		break;
824 	case EDP_PREEMPHASIS_6dB:
825 		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
826 		break;
827 	case EDP_PREEMPHASIS_9_5dB:
828 		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
829 		break;
830 	default:
831 		drm_dbg_kms(&dev_priv->drm,
832 			    "VBT has unknown eDP pre-emphasis value %u\n",
833 			    edp_link_params->preemphasis);
834 		break;
835 	}
836 
837 	switch (edp_link_params->vswing) {
838 	case EDP_VSWING_0_4V:
839 		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
840 		break;
841 	case EDP_VSWING_0_6V:
842 		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
843 		break;
844 	case EDP_VSWING_0_8V:
845 		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
846 		break;
847 	case EDP_VSWING_1_2V:
848 		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
849 		break;
850 	default:
851 		drm_dbg_kms(&dev_priv->drm,
852 			    "VBT has unknown eDP voltage swing value %u\n",
853 			    edp_link_params->vswing);
854 		break;
855 	}
856 
857 	if (bdb->version >= 173) {
858 		u8 vswing;
859 
860 		/* Don't read from VBT if module parameter has valid value*/
861 		if (dev_priv->params.edp_vswing) {
862 			dev_priv->vbt.edp.low_vswing =
863 				dev_priv->params.edp_vswing == 1;
864 		} else {
865 			vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
866 			dev_priv->vbt.edp.low_vswing = vswing == 0;
867 		}
868 	}
869 }
870 
871 static void
872 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
873 {
874 	const struct bdb_psr *psr;
875 	const struct psr_table *psr_table;
876 	int panel_type = dev_priv->vbt.panel_type;
877 
878 	psr = find_section(bdb, BDB_PSR);
879 	if (!psr) {
880 		drm_dbg_kms(&dev_priv->drm, "No PSR BDB found.\n");
881 		return;
882 	}
883 
884 	psr_table = &psr->psr_table[panel_type];
885 
886 	dev_priv->vbt.psr.full_link = psr_table->full_link;
887 	dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
888 
889 	/* Allowed VBT values goes from 0 to 15 */
890 	dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
891 		psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
892 
893 	switch (psr_table->lines_to_wait) {
894 	case 0:
895 		dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
896 		break;
897 	case 1:
898 		dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
899 		break;
900 	case 2:
901 		dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
902 		break;
903 	case 3:
904 		dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
905 		break;
906 	default:
907 		drm_dbg_kms(&dev_priv->drm,
908 			    "VBT has unknown PSR lines to wait %u\n",
909 			    psr_table->lines_to_wait);
910 		break;
911 	}
912 
913 	/*
914 	 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
915 	 * Old decimal value is wake up time in multiples of 100 us.
916 	 */
917 	if (bdb->version >= 205 &&
918 	    (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) ||
919 	     INTEL_GEN(dev_priv) >= 10)) {
920 		switch (psr_table->tp1_wakeup_time) {
921 		case 0:
922 			dev_priv->vbt.psr.tp1_wakeup_time_us = 500;
923 			break;
924 		case 1:
925 			dev_priv->vbt.psr.tp1_wakeup_time_us = 100;
926 			break;
927 		case 3:
928 			dev_priv->vbt.psr.tp1_wakeup_time_us = 0;
929 			break;
930 		default:
931 			drm_dbg_kms(&dev_priv->drm,
932 				    "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
933 				    psr_table->tp1_wakeup_time);
934 			fallthrough;
935 		case 2:
936 			dev_priv->vbt.psr.tp1_wakeup_time_us = 2500;
937 			break;
938 		}
939 
940 		switch (psr_table->tp2_tp3_wakeup_time) {
941 		case 0:
942 			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500;
943 			break;
944 		case 1:
945 			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100;
946 			break;
947 		case 3:
948 			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0;
949 			break;
950 		default:
951 			drm_dbg_kms(&dev_priv->drm,
952 				    "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
953 				    psr_table->tp2_tp3_wakeup_time);
954 			fallthrough;
955 		case 2:
956 			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
957 		break;
958 		}
959 	} else {
960 		dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
961 		dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
962 	}
963 
964 	if (bdb->version >= 226) {
965 		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
966 
967 		wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
968 		switch (wakeup_time) {
969 		case 0:
970 			wakeup_time = 500;
971 			break;
972 		case 1:
973 			wakeup_time = 100;
974 			break;
975 		case 3:
976 			wakeup_time = 50;
977 			break;
978 		default:
979 		case 2:
980 			wakeup_time = 2500;
981 			break;
982 		}
983 		dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
984 	} else {
985 		/* Reusing PSR1 wakeup time for PSR2 in older VBTs */
986 		dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us;
987 	}
988 }
989 
990 static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,
991 				      u16 version, enum port port)
992 {
993 	if (!dev_priv->vbt.dsi.config->dual_link || version < 197) {
994 		dev_priv->vbt.dsi.bl_ports = BIT(port);
995 		if (dev_priv->vbt.dsi.config->cabc_supported)
996 			dev_priv->vbt.dsi.cabc_ports = BIT(port);
997 
998 		return;
999 	}
1000 
1001 	switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) {
1002 	case DL_DCS_PORT_A:
1003 		dev_priv->vbt.dsi.bl_ports = BIT(PORT_A);
1004 		break;
1005 	case DL_DCS_PORT_C:
1006 		dev_priv->vbt.dsi.bl_ports = BIT(PORT_C);
1007 		break;
1008 	default:
1009 	case DL_DCS_PORT_A_AND_C:
1010 		dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
1011 		break;
1012 	}
1013 
1014 	if (!dev_priv->vbt.dsi.config->cabc_supported)
1015 		return;
1016 
1017 	switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) {
1018 	case DL_DCS_PORT_A:
1019 		dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A);
1020 		break;
1021 	case DL_DCS_PORT_C:
1022 		dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C);
1023 		break;
1024 	default:
1025 	case DL_DCS_PORT_A_AND_C:
1026 		dev_priv->vbt.dsi.cabc_ports =
1027 					BIT(PORT_A) | BIT(PORT_C);
1028 		break;
1029 	}
1030 }
1031 
1032 static void
1033 parse_mipi_config(struct drm_i915_private *dev_priv,
1034 		  const struct bdb_header *bdb)
1035 {
1036 	const struct bdb_mipi_config *start;
1037 	const struct mipi_config *config;
1038 	const struct mipi_pps_data *pps;
1039 	int panel_type = dev_priv->vbt.panel_type;
1040 	enum port port;
1041 
1042 	/* parse MIPI blocks only if LFP type is MIPI */
1043 	if (!intel_bios_is_dsi_present(dev_priv, &port))
1044 		return;
1045 
1046 	/* Initialize this to undefined indicating no generic MIPI support */
1047 	dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1048 
1049 	/* Block #40 is already parsed and panel_fixed_mode is
1050 	 * stored in dev_priv->lfp_lvds_vbt_mode
1051 	 * resuse this when needed
1052 	 */
1053 
1054 	/* Parse #52 for panel index used from panel_type already
1055 	 * parsed
1056 	 */
1057 	start = find_section(bdb, BDB_MIPI_CONFIG);
1058 	if (!start) {
1059 		drm_dbg_kms(&dev_priv->drm, "No MIPI config BDB found");
1060 		return;
1061 	}
1062 
1063 	drm_dbg(&dev_priv->drm, "Found MIPI Config block, panel index = %d\n",
1064 		panel_type);
1065 
1066 	/*
1067 	 * get hold of the correct configuration block and pps data as per
1068 	 * the panel_type as index
1069 	 */
1070 	config = &start->config[panel_type];
1071 	pps = &start->pps[panel_type];
1072 
1073 	/* store as of now full data. Trim when we realise all is not needed */
1074 	dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1075 	if (!dev_priv->vbt.dsi.config)
1076 		return;
1077 
1078 	dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1079 	if (!dev_priv->vbt.dsi.pps) {
1080 		kfree(dev_priv->vbt.dsi.config);
1081 		return;
1082 	}
1083 
1084 	parse_dsi_backlight_ports(dev_priv, bdb->version, port);
1085 
1086 	/* FIXME is the 90 vs. 270 correct? */
1087 	switch (config->rotation) {
1088 	case ENABLE_ROTATION_0:
1089 		/*
1090 		 * Most (all?) VBTs claim 0 degrees despite having
1091 		 * an upside down panel, thus we do not trust this.
1092 		 */
1093 		dev_priv->vbt.dsi.orientation =
1094 			DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1095 		break;
1096 	case ENABLE_ROTATION_90:
1097 		dev_priv->vbt.dsi.orientation =
1098 			DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1099 		break;
1100 	case ENABLE_ROTATION_180:
1101 		dev_priv->vbt.dsi.orientation =
1102 			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1103 		break;
1104 	case ENABLE_ROTATION_270:
1105 		dev_priv->vbt.dsi.orientation =
1106 			DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1107 		break;
1108 	}
1109 
1110 	/* We have mandatory mipi config blocks. Initialize as generic panel */
1111 	dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1112 }
1113 
1114 /* Find the sequence block and size for the given panel. */
1115 static const u8 *
1116 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1117 			  u16 panel_id, u32 *seq_size)
1118 {
1119 	u32 total = get_blocksize(sequence);
1120 	const u8 *data = &sequence->data[0];
1121 	u8 current_id;
1122 	u32 current_size;
1123 	int header_size = sequence->version >= 3 ? 5 : 3;
1124 	int index = 0;
1125 	int i;
1126 
1127 	/* skip new block size */
1128 	if (sequence->version >= 3)
1129 		data += 4;
1130 
1131 	for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1132 		if (index + header_size > total) {
1133 			DRM_ERROR("Invalid sequence block (header)\n");
1134 			return NULL;
1135 		}
1136 
1137 		current_id = *(data + index);
1138 		if (sequence->version >= 3)
1139 			current_size = *((const u32 *)(data + index + 1));
1140 		else
1141 			current_size = *((const u16 *)(data + index + 1));
1142 
1143 		index += header_size;
1144 
1145 		if (index + current_size > total) {
1146 			DRM_ERROR("Invalid sequence block\n");
1147 			return NULL;
1148 		}
1149 
1150 		if (current_id == panel_id) {
1151 			*seq_size = current_size;
1152 			return data + index;
1153 		}
1154 
1155 		index += current_size;
1156 	}
1157 
1158 	DRM_ERROR("Sequence block detected but no valid configuration\n");
1159 
1160 	return NULL;
1161 }
1162 
1163 static int goto_next_sequence(const u8 *data, int index, int total)
1164 {
1165 	u16 len;
1166 
1167 	/* Skip Sequence Byte. */
1168 	for (index = index + 1; index < total; index += len) {
1169 		u8 operation_byte = *(data + index);
1170 		index++;
1171 
1172 		switch (operation_byte) {
1173 		case MIPI_SEQ_ELEM_END:
1174 			return index;
1175 		case MIPI_SEQ_ELEM_SEND_PKT:
1176 			if (index + 4 > total)
1177 				return 0;
1178 
1179 			len = *((const u16 *)(data + index + 2)) + 4;
1180 			break;
1181 		case MIPI_SEQ_ELEM_DELAY:
1182 			len = 4;
1183 			break;
1184 		case MIPI_SEQ_ELEM_GPIO:
1185 			len = 2;
1186 			break;
1187 		case MIPI_SEQ_ELEM_I2C:
1188 			if (index + 7 > total)
1189 				return 0;
1190 			len = *(data + index + 6) + 7;
1191 			break;
1192 		default:
1193 			DRM_ERROR("Unknown operation byte\n");
1194 			return 0;
1195 		}
1196 	}
1197 
1198 	return 0;
1199 }
1200 
1201 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1202 {
1203 	int seq_end;
1204 	u16 len;
1205 	u32 size_of_sequence;
1206 
1207 	/*
1208 	 * Could skip sequence based on Size of Sequence alone, but also do some
1209 	 * checking on the structure.
1210 	 */
1211 	if (total < 5) {
1212 		DRM_ERROR("Too small sequence size\n");
1213 		return 0;
1214 	}
1215 
1216 	/* Skip Sequence Byte. */
1217 	index++;
1218 
1219 	/*
1220 	 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1221 	 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1222 	 * byte.
1223 	 */
1224 	size_of_sequence = *((const u32 *)(data + index));
1225 	index += 4;
1226 
1227 	seq_end = index + size_of_sequence;
1228 	if (seq_end > total) {
1229 		DRM_ERROR("Invalid sequence size\n");
1230 		return 0;
1231 	}
1232 
1233 	for (; index < total; index += len) {
1234 		u8 operation_byte = *(data + index);
1235 		index++;
1236 
1237 		if (operation_byte == MIPI_SEQ_ELEM_END) {
1238 			if (index != seq_end) {
1239 				DRM_ERROR("Invalid element structure\n");
1240 				return 0;
1241 			}
1242 			return index;
1243 		}
1244 
1245 		len = *(data + index);
1246 		index++;
1247 
1248 		/*
1249 		 * FIXME: Would be nice to check elements like for v1/v2 in
1250 		 * goto_next_sequence() above.
1251 		 */
1252 		switch (operation_byte) {
1253 		case MIPI_SEQ_ELEM_SEND_PKT:
1254 		case MIPI_SEQ_ELEM_DELAY:
1255 		case MIPI_SEQ_ELEM_GPIO:
1256 		case MIPI_SEQ_ELEM_I2C:
1257 		case MIPI_SEQ_ELEM_SPI:
1258 		case MIPI_SEQ_ELEM_PMIC:
1259 			break;
1260 		default:
1261 			DRM_ERROR("Unknown operation byte %u\n",
1262 				  operation_byte);
1263 			break;
1264 		}
1265 	}
1266 
1267 	return 0;
1268 }
1269 
1270 /*
1271  * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1272  * skip all delay + gpio operands and stop at the first DSI packet op.
1273  */
1274 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv)
1275 {
1276 	const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1277 	int index, len;
1278 
1279 	if (drm_WARN_ON(&dev_priv->drm,
1280 			!data || dev_priv->vbt.dsi.seq_version != 1))
1281 		return 0;
1282 
1283 	/* index = 1 to skip sequence byte */
1284 	for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1285 		switch (data[index]) {
1286 		case MIPI_SEQ_ELEM_SEND_PKT:
1287 			return index == 1 ? 0 : index;
1288 		case MIPI_SEQ_ELEM_DELAY:
1289 			len = 5; /* 1 byte for operand + uint32 */
1290 			break;
1291 		case MIPI_SEQ_ELEM_GPIO:
1292 			len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1293 			break;
1294 		default:
1295 			return 0;
1296 		}
1297 	}
1298 
1299 	return 0;
1300 }
1301 
1302 /*
1303  * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1304  * The deassert must be done before calling intel_dsi_device_ready, so for
1305  * these devices we split the init OTP sequence into a deassert sequence and
1306  * the actual init OTP part.
1307  */
1308 static void fixup_mipi_sequences(struct drm_i915_private *dev_priv)
1309 {
1310 	u8 *init_otp;
1311 	int len;
1312 
1313 	/* Limit this to VLV for now. */
1314 	if (!IS_VALLEYVIEW(dev_priv))
1315 		return;
1316 
1317 	/* Limit this to v1 vid-mode sequences */
1318 	if (dev_priv->vbt.dsi.config->is_cmd_mode ||
1319 	    dev_priv->vbt.dsi.seq_version != 1)
1320 		return;
1321 
1322 	/* Only do this if there are otp and assert seqs and no deassert seq */
1323 	if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1324 	    !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1325 	    dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1326 		return;
1327 
1328 	/* The deassert-sequence ends at the first DSI packet */
1329 	len = get_init_otp_deassert_fragment_len(dev_priv);
1330 	if (!len)
1331 		return;
1332 
1333 	drm_dbg_kms(&dev_priv->drm,
1334 		    "Using init OTP fragment to deassert reset\n");
1335 
1336 	/* Copy the fragment, update seq byte and terminate it */
1337 	init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1338 	dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1339 	if (!dev_priv->vbt.dsi.deassert_seq)
1340 		return;
1341 	dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1342 	dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1343 	/* Use the copy for deassert */
1344 	dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1345 		dev_priv->vbt.dsi.deassert_seq;
1346 	/* Replace the last byte of the fragment with init OTP seq byte */
1347 	init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1348 	/* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1349 	dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1350 }
1351 
1352 static void
1353 parse_mipi_sequence(struct drm_i915_private *dev_priv,
1354 		    const struct bdb_header *bdb)
1355 {
1356 	int panel_type = dev_priv->vbt.panel_type;
1357 	const struct bdb_mipi_sequence *sequence;
1358 	const u8 *seq_data;
1359 	u32 seq_size;
1360 	u8 *data;
1361 	int index = 0;
1362 
1363 	/* Only our generic panel driver uses the sequence block. */
1364 	if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1365 		return;
1366 
1367 	sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1368 	if (!sequence) {
1369 		drm_dbg_kms(&dev_priv->drm,
1370 			    "No MIPI Sequence found, parsing complete\n");
1371 		return;
1372 	}
1373 
1374 	/* Fail gracefully for forward incompatible sequence block. */
1375 	if (sequence->version >= 4) {
1376 		drm_err(&dev_priv->drm,
1377 			"Unable to parse MIPI Sequence Block v%u\n",
1378 			sequence->version);
1379 		return;
1380 	}
1381 
1382 	drm_dbg(&dev_priv->drm, "Found MIPI sequence block v%u\n",
1383 		sequence->version);
1384 
1385 	seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1386 	if (!seq_data)
1387 		return;
1388 
1389 	data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1390 	if (!data)
1391 		return;
1392 
1393 	/* Parse the sequences, store pointers to each sequence. */
1394 	for (;;) {
1395 		u8 seq_id = *(data + index);
1396 		if (seq_id == MIPI_SEQ_END)
1397 			break;
1398 
1399 		if (seq_id >= MIPI_SEQ_MAX) {
1400 			drm_err(&dev_priv->drm, "Unknown sequence %u\n",
1401 				seq_id);
1402 			goto err;
1403 		}
1404 
1405 		/* Log about presence of sequences we won't run. */
1406 		if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1407 			drm_dbg_kms(&dev_priv->drm,
1408 				    "Unsupported sequence %u\n", seq_id);
1409 
1410 		dev_priv->vbt.dsi.sequence[seq_id] = data + index;
1411 
1412 		if (sequence->version >= 3)
1413 			index = goto_next_sequence_v3(data, index, seq_size);
1414 		else
1415 			index = goto_next_sequence(data, index, seq_size);
1416 		if (!index) {
1417 			drm_err(&dev_priv->drm, "Invalid sequence %u\n",
1418 				seq_id);
1419 			goto err;
1420 		}
1421 	}
1422 
1423 	dev_priv->vbt.dsi.data = data;
1424 	dev_priv->vbt.dsi.size = seq_size;
1425 	dev_priv->vbt.dsi.seq_version = sequence->version;
1426 
1427 	fixup_mipi_sequences(dev_priv);
1428 
1429 	drm_dbg(&dev_priv->drm, "MIPI related VBT parsing complete\n");
1430 	return;
1431 
1432 err:
1433 	kfree(data);
1434 	memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
1435 }
1436 
1437 static void
1438 parse_compression_parameters(struct drm_i915_private *i915,
1439 			     const struct bdb_header *bdb)
1440 {
1441 	const struct bdb_compression_parameters *params;
1442 	struct display_device_data *devdata;
1443 	const struct child_device_config *child;
1444 	u16 block_size;
1445 	int index;
1446 
1447 	if (bdb->version < 198)
1448 		return;
1449 
1450 	params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1451 	if (params) {
1452 		/* Sanity checks */
1453 		if (params->entry_size != sizeof(params->data[0])) {
1454 			drm_dbg_kms(&i915->drm,
1455 				    "VBT: unsupported compression param entry size\n");
1456 			return;
1457 		}
1458 
1459 		block_size = get_blocksize(params);
1460 		if (block_size < sizeof(*params)) {
1461 			drm_dbg_kms(&i915->drm,
1462 				    "VBT: expected 16 compression param entries\n");
1463 			return;
1464 		}
1465 	}
1466 
1467 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1468 		child = &devdata->child;
1469 
1470 		if (!child->compression_enable)
1471 			continue;
1472 
1473 		if (!params) {
1474 			drm_dbg_kms(&i915->drm,
1475 				    "VBT: compression params not available\n");
1476 			continue;
1477 		}
1478 
1479 		if (child->compression_method_cps) {
1480 			drm_dbg_kms(&i915->drm,
1481 				    "VBT: CPS compression not supported\n");
1482 			continue;
1483 		}
1484 
1485 		index = child->compression_structure_index;
1486 
1487 		devdata->dsc = kmemdup(&params->data[index],
1488 				       sizeof(*devdata->dsc), GFP_KERNEL);
1489 	}
1490 }
1491 
1492 static u8 translate_iboost(u8 val)
1493 {
1494 	static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1495 
1496 	if (val >= ARRAY_SIZE(mapping)) {
1497 		DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1498 		return 0;
1499 	}
1500 	return mapping[val];
1501 }
1502 
1503 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1504 {
1505 	const struct ddi_vbt_port_info *info;
1506 	enum port port;
1507 
1508 	for_each_port(port) {
1509 		info = &i915->vbt.ddi_port_info[port];
1510 
1511 		if (info->child && ddc_pin == info->alternate_ddc_pin)
1512 			return port;
1513 	}
1514 
1515 	return PORT_NONE;
1516 }
1517 
1518 static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1519 			     enum port port)
1520 {
1521 	struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1522 	enum port p;
1523 
1524 	if (!info->alternate_ddc_pin)
1525 		return;
1526 
1527 	p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin);
1528 	if (p != PORT_NONE) {
1529 		drm_dbg_kms(&dev_priv->drm,
1530 			    "port %c trying to use the same DDC pin (0x%x) as port %c, "
1531 			    "disabling port %c DVI/HDMI support\n",
1532 			    port_name(port), info->alternate_ddc_pin,
1533 			    port_name(p), port_name(p));
1534 
1535 		/*
1536 		 * If we have multiple ports supposedly sharing the
1537 		 * pin, then dvi/hdmi couldn't exist on the shared
1538 		 * port. Otherwise they share the same ddc bin and
1539 		 * system couldn't communicate with them separately.
1540 		 *
1541 		 * Give inverse child device order the priority,
1542 		 * last one wins. Yes, there are real machines
1543 		 * (eg. Asrock B250M-HDV) where VBT has both
1544 		 * port A and port E with the same AUX ch and
1545 		 * we must pick port E :(
1546 		 */
1547 		info = &dev_priv->vbt.ddi_port_info[p];
1548 
1549 		info->supports_dvi = false;
1550 		info->supports_hdmi = false;
1551 		info->alternate_ddc_pin = 0;
1552 	}
1553 }
1554 
1555 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1556 {
1557 	const struct ddi_vbt_port_info *info;
1558 	enum port port;
1559 
1560 	for_each_port(port) {
1561 		info = &i915->vbt.ddi_port_info[port];
1562 
1563 		if (info->child && aux_ch == info->alternate_aux_channel)
1564 			return port;
1565 	}
1566 
1567 	return PORT_NONE;
1568 }
1569 
1570 static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1571 			    enum port port)
1572 {
1573 	struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1574 	enum port p;
1575 
1576 	if (!info->alternate_aux_channel)
1577 		return;
1578 
1579 	p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel);
1580 	if (p != PORT_NONE) {
1581 		drm_dbg_kms(&dev_priv->drm,
1582 			    "port %c trying to use the same AUX CH (0x%x) as port %c, "
1583 			    "disabling port %c DP support\n",
1584 			    port_name(port), info->alternate_aux_channel,
1585 			    port_name(p), port_name(p));
1586 
1587 		/*
1588 		 * If we have multiple ports supposedlt sharing the
1589 		 * aux channel, then DP couldn't exist on the shared
1590 		 * port. Otherwise they share the same aux channel
1591 		 * and system couldn't communicate with them separately.
1592 		 *
1593 		 * Give inverse child device order the priority,
1594 		 * last one wins. Yes, there are real machines
1595 		 * (eg. Asrock B250M-HDV) where VBT has both
1596 		 * port A and port E with the same AUX ch and
1597 		 * we must pick port E :(
1598 		 */
1599 		info = &dev_priv->vbt.ddi_port_info[p];
1600 
1601 		info->supports_dp = false;
1602 		info->alternate_aux_channel = 0;
1603 	}
1604 }
1605 
1606 static const u8 cnp_ddc_pin_map[] = {
1607 	[0] = 0, /* N/A */
1608 	[DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1609 	[DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1610 	[DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1611 	[DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1612 };
1613 
1614 static const u8 icp_ddc_pin_map[] = {
1615 	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1616 	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1617 	[TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1618 	[ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1619 	[ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1620 	[ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1621 	[ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1622 	[TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1623 	[TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1624 };
1625 
1626 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
1627 	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1628 	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1629 	[RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
1630 	[RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
1631 };
1632 
1633 static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
1634 {
1635 	const u8 *ddc_pin_map;
1636 	int n_entries;
1637 
1638 	if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1) {
1639 		return vbt_pin;
1640 	} else if (IS_ROCKETLAKE(dev_priv) && INTEL_PCH_TYPE(dev_priv) == PCH_TGP) {
1641 		ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
1642 		n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
1643 	} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) {
1644 		ddc_pin_map = icp_ddc_pin_map;
1645 		n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1646 	} else if (HAS_PCH_CNP(dev_priv)) {
1647 		ddc_pin_map = cnp_ddc_pin_map;
1648 		n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1649 	} else {
1650 		/* Assuming direct map */
1651 		return vbt_pin;
1652 	}
1653 
1654 	if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1655 		return ddc_pin_map[vbt_pin];
1656 
1657 	drm_dbg_kms(&dev_priv->drm,
1658 		    "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1659 		    vbt_pin);
1660 	return 0;
1661 }
1662 
1663 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
1664 				    const int port_mapping[][3], u8 dvo_port)
1665 {
1666 	enum port port;
1667 	int i;
1668 
1669 	for (port = PORT_A; port < n_ports; port++) {
1670 		for (i = 0; i < n_dvo; i++) {
1671 			if (port_mapping[port][i] == -1)
1672 				break;
1673 
1674 			if (dvo_port == port_mapping[port][i])
1675 				return port;
1676 		}
1677 	}
1678 
1679 	return PORT_NONE;
1680 }
1681 
1682 static enum port dvo_port_to_port(struct drm_i915_private *dev_priv,
1683 				  u8 dvo_port)
1684 {
1685 	/*
1686 	 * Each DDI port can have more than one value on the "DVO Port" field,
1687 	 * so look for all the possible values for each port.
1688 	 */
1689 	static const int port_mapping[][3] = {
1690 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1691 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1692 		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1693 		[PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1694 		[PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
1695 		[PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1696 		[PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1697 		[PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1698 		[PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1699 	};
1700 	/*
1701 	 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
1702 	 * map to DDI A,B,TC1,TC2 respectively.
1703 	 */
1704 	static const int rkl_port_mapping[][3] = {
1705 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1706 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1707 		[PORT_C] = { -1 },
1708 		[PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1709 		[PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1710 	};
1711 
1712 	if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
1713 		return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
1714 					  ARRAY_SIZE(rkl_port_mapping[0]),
1715 					  rkl_port_mapping,
1716 					  dvo_port);
1717 	else
1718 		return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
1719 					  ARRAY_SIZE(port_mapping[0]),
1720 					  port_mapping,
1721 					  dvo_port);
1722 }
1723 
1724 static void parse_ddi_port(struct drm_i915_private *dev_priv,
1725 			   struct display_device_data *devdata,
1726 			   u8 bdb_version)
1727 {
1728 	const struct child_device_config *child = &devdata->child;
1729 	struct ddi_vbt_port_info *info;
1730 	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1731 	enum port port;
1732 
1733 	port = dvo_port_to_port(dev_priv, child->dvo_port);
1734 	if (port == PORT_NONE)
1735 		return;
1736 
1737 	info = &dev_priv->vbt.ddi_port_info[port];
1738 
1739 	if (info->child) {
1740 		drm_dbg_kms(&dev_priv->drm,
1741 			    "More than one child device for port %c in VBT, using the first.\n",
1742 			    port_name(port));
1743 		return;
1744 	}
1745 
1746 	is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1747 	is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1748 	is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1749 	is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1750 	is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1751 
1752 	if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) {
1753 		drm_dbg_kms(&dev_priv->drm,
1754 			    "VBT claims port A supports DVI%s, ignoring\n",
1755 			    is_hdmi ? "/HDMI" : "");
1756 		is_dvi = false;
1757 		is_hdmi = false;
1758 	}
1759 
1760 	info->supports_dvi = is_dvi;
1761 	info->supports_hdmi = is_hdmi;
1762 	info->supports_dp = is_dp;
1763 	info->supports_edp = is_edp;
1764 
1765 	if (bdb_version >= 195)
1766 		info->supports_typec_usb = child->dp_usb_type_c;
1767 
1768 	if (bdb_version >= 209)
1769 		info->supports_tbt = child->tbt;
1770 
1771 	drm_dbg_kms(&dev_priv->drm,
1772 		    "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1773 		    port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1774 		    HAS_LSPCON(dev_priv) && child->lspcon,
1775 		    info->supports_typec_usb, info->supports_tbt,
1776 		    devdata->dsc != NULL);
1777 
1778 	if (is_dvi) {
1779 		u8 ddc_pin;
1780 
1781 		ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin);
1782 		if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) {
1783 			info->alternate_ddc_pin = ddc_pin;
1784 			sanitize_ddc_pin(dev_priv, port);
1785 		} else {
1786 			drm_dbg_kms(&dev_priv->drm,
1787 				    "Port %c has invalid DDC pin %d, "
1788 				    "sticking to defaults\n",
1789 				    port_name(port), ddc_pin);
1790 		}
1791 	}
1792 
1793 	if (is_dp) {
1794 		info->alternate_aux_channel = child->aux_channel;
1795 
1796 		sanitize_aux_ch(dev_priv, port);
1797 	}
1798 
1799 	if (bdb_version >= 158) {
1800 		/* The VBT HDMI level shift values match the table we have. */
1801 		u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1802 		drm_dbg_kms(&dev_priv->drm,
1803 			    "VBT HDMI level shift for port %c: %d\n",
1804 			    port_name(port),
1805 			    hdmi_level_shift);
1806 		info->hdmi_level_shift = hdmi_level_shift;
1807 		info->hdmi_level_shift_set = true;
1808 	}
1809 
1810 	if (bdb_version >= 204) {
1811 		int max_tmds_clock;
1812 
1813 		switch (child->hdmi_max_data_rate) {
1814 		default:
1815 			MISSING_CASE(child->hdmi_max_data_rate);
1816 			fallthrough;
1817 		case HDMI_MAX_DATA_RATE_PLATFORM:
1818 			max_tmds_clock = 0;
1819 			break;
1820 		case HDMI_MAX_DATA_RATE_297:
1821 			max_tmds_clock = 297000;
1822 			break;
1823 		case HDMI_MAX_DATA_RATE_165:
1824 			max_tmds_clock = 165000;
1825 			break;
1826 		}
1827 
1828 		if (max_tmds_clock)
1829 			drm_dbg_kms(&dev_priv->drm,
1830 				    "VBT HDMI max TMDS clock for port %c: %d kHz\n",
1831 				    port_name(port), max_tmds_clock);
1832 		info->max_tmds_clock = max_tmds_clock;
1833 	}
1834 
1835 	/* Parse the I_boost config for SKL and above */
1836 	if (bdb_version >= 196 && child->iboost) {
1837 		info->dp_boost_level = translate_iboost(child->dp_iboost_level);
1838 		drm_dbg_kms(&dev_priv->drm,
1839 			    "VBT (e)DP boost level for port %c: %d\n",
1840 			    port_name(port), info->dp_boost_level);
1841 		info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
1842 		drm_dbg_kms(&dev_priv->drm,
1843 			    "VBT HDMI boost level for port %c: %d\n",
1844 			    port_name(port), info->hdmi_boost_level);
1845 	}
1846 
1847 	/* DP max link rate for CNL+ */
1848 	if (bdb_version >= 216) {
1849 		switch (child->dp_max_link_rate) {
1850 		default:
1851 		case VBT_DP_MAX_LINK_RATE_HBR3:
1852 			info->dp_max_link_rate = 810000;
1853 			break;
1854 		case VBT_DP_MAX_LINK_RATE_HBR2:
1855 			info->dp_max_link_rate = 540000;
1856 			break;
1857 		case VBT_DP_MAX_LINK_RATE_HBR:
1858 			info->dp_max_link_rate = 270000;
1859 			break;
1860 		case VBT_DP_MAX_LINK_RATE_LBR:
1861 			info->dp_max_link_rate = 162000;
1862 			break;
1863 		}
1864 		drm_dbg_kms(&dev_priv->drm,
1865 			    "VBT DP max link rate for port %c: %d\n",
1866 			    port_name(port), info->dp_max_link_rate);
1867 	}
1868 
1869 	info->child = child;
1870 }
1871 
1872 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
1873 {
1874 	struct display_device_data *devdata;
1875 
1876 	if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
1877 		return;
1878 
1879 	if (bdb_version < 155)
1880 		return;
1881 
1882 	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
1883 		parse_ddi_port(dev_priv, devdata, bdb_version);
1884 }
1885 
1886 static void
1887 parse_general_definitions(struct drm_i915_private *dev_priv,
1888 			  const struct bdb_header *bdb)
1889 {
1890 	const struct bdb_general_definitions *defs;
1891 	struct display_device_data *devdata;
1892 	const struct child_device_config *child;
1893 	int i, child_device_num;
1894 	u8 expected_size;
1895 	u16 block_size;
1896 	int bus_pin;
1897 
1898 	defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1899 	if (!defs) {
1900 		drm_dbg_kms(&dev_priv->drm,
1901 			    "No general definition block is found, no devices defined.\n");
1902 		return;
1903 	}
1904 
1905 	block_size = get_blocksize(defs);
1906 	if (block_size < sizeof(*defs)) {
1907 		drm_dbg_kms(&dev_priv->drm,
1908 			    "General definitions block too small (%u)\n",
1909 			    block_size);
1910 		return;
1911 	}
1912 
1913 	bus_pin = defs->crt_ddc_gmbus_pin;
1914 	drm_dbg_kms(&dev_priv->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
1915 	if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
1916 		dev_priv->vbt.crt_ddc_pin = bus_pin;
1917 
1918 	if (bdb->version < 106) {
1919 		expected_size = 22;
1920 	} else if (bdb->version < 111) {
1921 		expected_size = 27;
1922 	} else if (bdb->version < 195) {
1923 		expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
1924 	} else if (bdb->version == 195) {
1925 		expected_size = 37;
1926 	} else if (bdb->version <= 215) {
1927 		expected_size = 38;
1928 	} else if (bdb->version <= 237) {
1929 		expected_size = 39;
1930 	} else {
1931 		expected_size = sizeof(*child);
1932 		BUILD_BUG_ON(sizeof(*child) < 39);
1933 		drm_dbg(&dev_priv->drm,
1934 			"Expected child device config size for VBT version %u not known; assuming %u\n",
1935 			bdb->version, expected_size);
1936 	}
1937 
1938 	/* Flag an error for unexpected size, but continue anyway. */
1939 	if (defs->child_dev_size != expected_size)
1940 		drm_err(&dev_priv->drm,
1941 			"Unexpected child device config size %u (expected %u for VBT version %u)\n",
1942 			defs->child_dev_size, expected_size, bdb->version);
1943 
1944 	/* The legacy sized child device config is the minimum we need. */
1945 	if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
1946 		drm_dbg_kms(&dev_priv->drm,
1947 			    "Child device config size %u is too small.\n",
1948 			    defs->child_dev_size);
1949 		return;
1950 	}
1951 
1952 	/* get the number of child device */
1953 	child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
1954 
1955 	for (i = 0; i < child_device_num; i++) {
1956 		child = child_device_ptr(defs, i);
1957 		if (!child->device_type)
1958 			continue;
1959 
1960 		drm_dbg_kms(&dev_priv->drm,
1961 			    "Found VBT child device with type 0x%x\n",
1962 			    child->device_type);
1963 
1964 		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
1965 		if (!devdata)
1966 			break;
1967 
1968 		/*
1969 		 * Copy as much as we know (sizeof) and is available
1970 		 * (child_dev_size) of the child device config. Accessing the
1971 		 * data must depend on VBT version.
1972 		 */
1973 		memcpy(&devdata->child, child,
1974 		       min_t(size_t, defs->child_dev_size, sizeof(*child)));
1975 
1976 		list_add_tail(&devdata->node, &dev_priv->vbt.display_devices);
1977 	}
1978 
1979 	if (list_empty(&dev_priv->vbt.display_devices))
1980 		drm_dbg_kms(&dev_priv->drm,
1981 			    "no child dev is parsed from VBT\n");
1982 }
1983 
1984 /* Common defaults which may be overridden by VBT. */
1985 static void
1986 init_vbt_defaults(struct drm_i915_private *dev_priv)
1987 {
1988 	dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1989 
1990 	/* Default to having backlight */
1991 	dev_priv->vbt.backlight.present = true;
1992 
1993 	/* LFP panel data */
1994 	dev_priv->vbt.lvds_dither = 1;
1995 
1996 	/* SDVO panel data */
1997 	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1998 
1999 	/* general features */
2000 	dev_priv->vbt.int_tv_support = 1;
2001 	dev_priv->vbt.int_crt_support = 1;
2002 
2003 	/* driver features */
2004 	dev_priv->vbt.int_lvds_support = 1;
2005 
2006 	/* Default to using SSC */
2007 	dev_priv->vbt.lvds_use_ssc = 1;
2008 	/*
2009 	 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2010 	 * clock for LVDS.
2011 	 */
2012 	dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
2013 			!HAS_PCH_SPLIT(dev_priv));
2014 	drm_dbg_kms(&dev_priv->drm, "Set default to SSC at %d kHz\n",
2015 		    dev_priv->vbt.lvds_ssc_freq);
2016 }
2017 
2018 /* Defaults to initialize only if there is no VBT. */
2019 static void
2020 init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
2021 {
2022 	enum port port;
2023 
2024 	for_each_port(port) {
2025 		struct ddi_vbt_port_info *info =
2026 			&dev_priv->vbt.ddi_port_info[port];
2027 		enum phy phy = intel_port_to_phy(dev_priv, port);
2028 
2029 		/*
2030 		 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2031 		 * to detect it.
2032 		 */
2033 		if (intel_phy_is_tc(dev_priv, phy))
2034 			continue;
2035 
2036 		info->supports_dvi = (port != PORT_A && port != PORT_E);
2037 		info->supports_hdmi = info->supports_dvi;
2038 		info->supports_dp = (port != PORT_E);
2039 		info->supports_edp = (port == PORT_A);
2040 	}
2041 }
2042 
2043 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2044 {
2045 	const void *_vbt = vbt;
2046 
2047 	return _vbt + vbt->bdb_offset;
2048 }
2049 
2050 /**
2051  * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2052  * @buf:	pointer to a buffer to validate
2053  * @size:	size of the buffer
2054  *
2055  * Returns true on valid VBT.
2056  */
2057 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2058 {
2059 	const struct vbt_header *vbt = buf;
2060 	const struct bdb_header *bdb;
2061 
2062 	if (!vbt)
2063 		return false;
2064 
2065 	if (sizeof(struct vbt_header) > size) {
2066 		DRM_DEBUG_DRIVER("VBT header incomplete\n");
2067 		return false;
2068 	}
2069 
2070 	if (memcmp(vbt->signature, "$VBT", 4)) {
2071 		DRM_DEBUG_DRIVER("VBT invalid signature\n");
2072 		return false;
2073 	}
2074 
2075 	if (vbt->vbt_size > size) {
2076 		DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2077 		return false;
2078 	}
2079 
2080 	size = vbt->vbt_size;
2081 
2082 	if (range_overflows_t(size_t,
2083 			      vbt->bdb_offset,
2084 			      sizeof(struct bdb_header),
2085 			      size)) {
2086 		DRM_DEBUG_DRIVER("BDB header incomplete\n");
2087 		return false;
2088 	}
2089 
2090 	bdb = get_bdb_header(vbt);
2091 	if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2092 		DRM_DEBUG_DRIVER("BDB incomplete\n");
2093 		return false;
2094 	}
2095 
2096 	return vbt;
2097 }
2098 
2099 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv)
2100 {
2101 	struct pci_dev *pdev = dev_priv->drm.pdev;
2102 	void __iomem *p = NULL, *oprom;
2103 	struct vbt_header *vbt;
2104 	u16 vbt_size;
2105 	size_t i, size;
2106 
2107 	oprom = pci_map_rom(pdev, &size);
2108 	if (!oprom)
2109 		return NULL;
2110 
2111 	/* Scour memory looking for the VBT signature. */
2112 	for (i = 0; i + 4 < size; i += 4) {
2113 		if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2114 			continue;
2115 
2116 		p = oprom + i;
2117 		size -= i;
2118 		break;
2119 	}
2120 
2121 	if (!p)
2122 		goto err_unmap_oprom;
2123 
2124 	if (sizeof(struct vbt_header) > size) {
2125 		drm_dbg(&dev_priv->drm, "VBT header incomplete\n");
2126 		goto err_unmap_oprom;
2127 	}
2128 
2129 	vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2130 	if (vbt_size > size) {
2131 		drm_dbg(&dev_priv->drm,
2132 			"VBT incomplete (vbt_size overflows)\n");
2133 		goto err_unmap_oprom;
2134 	}
2135 
2136 	/* The rest will be validated by intel_bios_is_valid_vbt() */
2137 	vbt = kmalloc(vbt_size, GFP_KERNEL);
2138 	if (!vbt)
2139 		goto err_unmap_oprom;
2140 
2141 	memcpy_fromio(vbt, p, vbt_size);
2142 
2143 	if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2144 		goto err_free_vbt;
2145 
2146 	pci_unmap_rom(pdev, oprom);
2147 
2148 	return vbt;
2149 
2150 err_free_vbt:
2151 	kfree(vbt);
2152 err_unmap_oprom:
2153 	pci_unmap_rom(pdev, oprom);
2154 
2155 	return NULL;
2156 }
2157 
2158 /**
2159  * intel_bios_init - find VBT and initialize settings from the BIOS
2160  * @dev_priv: i915 device instance
2161  *
2162  * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2163  * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2164  * initialize some defaults if the VBT is not present at all.
2165  */
2166 void intel_bios_init(struct drm_i915_private *dev_priv)
2167 {
2168 	const struct vbt_header *vbt = dev_priv->opregion.vbt;
2169 	struct vbt_header *oprom_vbt = NULL;
2170 	const struct bdb_header *bdb;
2171 
2172 	INIT_LIST_HEAD(&dev_priv->vbt.display_devices);
2173 
2174 	if (!HAS_DISPLAY(dev_priv)) {
2175 		drm_dbg_kms(&dev_priv->drm,
2176 			    "Skipping VBT init due to disabled display.\n");
2177 		return;
2178 	}
2179 
2180 	init_vbt_defaults(dev_priv);
2181 
2182 	/* If the OpRegion does not have VBT, look in PCI ROM. */
2183 	if (!vbt) {
2184 		oprom_vbt = oprom_get_vbt(dev_priv);
2185 		if (!oprom_vbt)
2186 			goto out;
2187 
2188 		vbt = oprom_vbt;
2189 
2190 		drm_dbg_kms(&dev_priv->drm, "Found valid VBT in PCI ROM\n");
2191 	}
2192 
2193 	bdb = get_bdb_header(vbt);
2194 
2195 	drm_dbg_kms(&dev_priv->drm,
2196 		    "VBT signature \"%.*s\", BDB version %d\n",
2197 		    (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2198 
2199 	/* Grab useful general definitions */
2200 	parse_general_features(dev_priv, bdb);
2201 	parse_general_definitions(dev_priv, bdb);
2202 	parse_panel_options(dev_priv, bdb);
2203 	parse_panel_dtd(dev_priv, bdb);
2204 	parse_lfp_backlight(dev_priv, bdb);
2205 	parse_sdvo_panel_data(dev_priv, bdb);
2206 	parse_driver_features(dev_priv, bdb);
2207 	parse_power_conservation_features(dev_priv, bdb);
2208 	parse_edp(dev_priv, bdb);
2209 	parse_psr(dev_priv, bdb);
2210 	parse_mipi_config(dev_priv, bdb);
2211 	parse_mipi_sequence(dev_priv, bdb);
2212 
2213 	/* Depends on child device list */
2214 	parse_compression_parameters(dev_priv, bdb);
2215 
2216 	/* Further processing on pre-parsed data */
2217 	parse_sdvo_device_mapping(dev_priv, bdb->version);
2218 	parse_ddi_ports(dev_priv, bdb->version);
2219 
2220 out:
2221 	if (!vbt) {
2222 		drm_info(&dev_priv->drm,
2223 			 "Failed to find VBIOS tables (VBT)\n");
2224 		init_vbt_missing_defaults(dev_priv);
2225 	}
2226 
2227 	kfree(oprom_vbt);
2228 }
2229 
2230 /**
2231  * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2232  * @dev_priv: i915 device instance
2233  */
2234 void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
2235 {
2236 	struct display_device_data *devdata, *n;
2237 
2238 	list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
2239 		list_del(&devdata->node);
2240 		kfree(devdata->dsc);
2241 		kfree(devdata);
2242 	}
2243 
2244 	kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
2245 	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
2246 	kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
2247 	dev_priv->vbt.lfp_lvds_vbt_mode = NULL;
2248 	kfree(dev_priv->vbt.dsi.data);
2249 	dev_priv->vbt.dsi.data = NULL;
2250 	kfree(dev_priv->vbt.dsi.pps);
2251 	dev_priv->vbt.dsi.pps = NULL;
2252 	kfree(dev_priv->vbt.dsi.config);
2253 	dev_priv->vbt.dsi.config = NULL;
2254 	kfree(dev_priv->vbt.dsi.deassert_seq);
2255 	dev_priv->vbt.dsi.deassert_seq = NULL;
2256 }
2257 
2258 /**
2259  * intel_bios_is_tv_present - is integrated TV present in VBT
2260  * @dev_priv:	i915 device instance
2261  *
2262  * Return true if TV is present. If no child devices were parsed from VBT,
2263  * assume TV is present.
2264  */
2265 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
2266 {
2267 	const struct display_device_data *devdata;
2268 	const struct child_device_config *child;
2269 
2270 	if (!dev_priv->vbt.int_tv_support)
2271 		return false;
2272 
2273 	if (list_empty(&dev_priv->vbt.display_devices))
2274 		return true;
2275 
2276 	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2277 		child = &devdata->child;
2278 
2279 		/*
2280 		 * If the device type is not TV, continue.
2281 		 */
2282 		switch (child->device_type) {
2283 		case DEVICE_TYPE_INT_TV:
2284 		case DEVICE_TYPE_TV:
2285 		case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2286 			break;
2287 		default:
2288 			continue;
2289 		}
2290 		/* Only when the addin_offset is non-zero, it is regarded
2291 		 * as present.
2292 		 */
2293 		if (child->addin_offset)
2294 			return true;
2295 	}
2296 
2297 	return false;
2298 }
2299 
2300 /**
2301  * intel_bios_is_lvds_present - is LVDS present in VBT
2302  * @dev_priv:	i915 device instance
2303  * @i2c_pin:	i2c pin for LVDS if present
2304  *
2305  * Return true if LVDS is present. If no child devices were parsed from VBT,
2306  * assume LVDS is present.
2307  */
2308 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
2309 {
2310 	const struct display_device_data *devdata;
2311 	const struct child_device_config *child;
2312 
2313 	if (list_empty(&dev_priv->vbt.display_devices))
2314 		return true;
2315 
2316 	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2317 		child = &devdata->child;
2318 
2319 		/* If the device type is not LFP, continue.
2320 		 * We have to check both the new identifiers as well as the
2321 		 * old for compatibility with some BIOSes.
2322 		 */
2323 		if (child->device_type != DEVICE_TYPE_INT_LFP &&
2324 		    child->device_type != DEVICE_TYPE_LFP)
2325 			continue;
2326 
2327 		if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
2328 			*i2c_pin = child->i2c_pin;
2329 
2330 		/* However, we cannot trust the BIOS writers to populate
2331 		 * the VBT correctly.  Since LVDS requires additional
2332 		 * information from AIM blocks, a non-zero addin offset is
2333 		 * a good indicator that the LVDS is actually present.
2334 		 */
2335 		if (child->addin_offset)
2336 			return true;
2337 
2338 		/* But even then some BIOS writers perform some black magic
2339 		 * and instantiate the device without reference to any
2340 		 * additional data.  Trust that if the VBT was written into
2341 		 * the OpRegion then they have validated the LVDS's existence.
2342 		 */
2343 		if (dev_priv->opregion.vbt)
2344 			return true;
2345 	}
2346 
2347 	return false;
2348 }
2349 
2350 /**
2351  * intel_bios_is_port_present - is the specified digital port present
2352  * @dev_priv:	i915 device instance
2353  * @port:	port to check
2354  *
2355  * Return true if the device in %port is present.
2356  */
2357 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
2358 {
2359 	const struct display_device_data *devdata;
2360 	const struct child_device_config *child;
2361 	static const struct {
2362 		u16 dp, hdmi;
2363 	} port_mapping[] = {
2364 		[PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2365 		[PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2366 		[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2367 		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2368 		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2369 	};
2370 
2371 	if (HAS_DDI(dev_priv)) {
2372 		const struct ddi_vbt_port_info *port_info =
2373 			&dev_priv->vbt.ddi_port_info[port];
2374 
2375 		return port_info->child;
2376 	}
2377 
2378 	/* FIXME maybe deal with port A as well? */
2379 	if (drm_WARN_ON(&dev_priv->drm,
2380 			port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2381 		return false;
2382 
2383 	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2384 		child = &devdata->child;
2385 
2386 		if ((child->dvo_port == port_mapping[port].dp ||
2387 		     child->dvo_port == port_mapping[port].hdmi) &&
2388 		    (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2389 					   DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2390 			return true;
2391 	}
2392 
2393 	return false;
2394 }
2395 
2396 /**
2397  * intel_bios_is_port_edp - is the device in given port eDP
2398  * @dev_priv:	i915 device instance
2399  * @port:	port to check
2400  *
2401  * Return true if the device in %port is eDP.
2402  */
2403 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
2404 {
2405 	const struct display_device_data *devdata;
2406 	const struct child_device_config *child;
2407 	static const short port_mapping[] = {
2408 		[PORT_B] = DVO_PORT_DPB,
2409 		[PORT_C] = DVO_PORT_DPC,
2410 		[PORT_D] = DVO_PORT_DPD,
2411 		[PORT_E] = DVO_PORT_DPE,
2412 		[PORT_F] = DVO_PORT_DPF,
2413 	};
2414 
2415 	if (HAS_DDI(dev_priv))
2416 		return dev_priv->vbt.ddi_port_info[port].supports_edp;
2417 
2418 	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2419 		child = &devdata->child;
2420 
2421 		if (child->dvo_port == port_mapping[port] &&
2422 		    (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2423 		    (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2424 			return true;
2425 	}
2426 
2427 	return false;
2428 }
2429 
2430 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2431 				      enum port port)
2432 {
2433 	static const struct {
2434 		u16 dp, hdmi;
2435 	} port_mapping[] = {
2436 		/*
2437 		 * Buggy VBTs may declare DP ports as having
2438 		 * HDMI type dvo_port :( So let's check both.
2439 		 */
2440 		[PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2441 		[PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2442 		[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2443 		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2444 		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2445 	};
2446 
2447 	if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2448 		return false;
2449 
2450 	if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2451 	    (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2452 		return false;
2453 
2454 	if (child->dvo_port == port_mapping[port].dp)
2455 		return true;
2456 
2457 	/* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2458 	if (child->dvo_port == port_mapping[port].hdmi &&
2459 	    child->aux_channel != 0)
2460 		return true;
2461 
2462 	return false;
2463 }
2464 
2465 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
2466 				     enum port port)
2467 {
2468 	const struct display_device_data *devdata;
2469 
2470 	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2471 		if (child_dev_is_dp_dual_mode(&devdata->child, port))
2472 			return true;
2473 	}
2474 
2475 	return false;
2476 }
2477 
2478 /**
2479  * intel_bios_is_dsi_present - is DSI present in VBT
2480  * @dev_priv:	i915 device instance
2481  * @port:	port for DSI if present
2482  *
2483  * Return true if DSI is present, and return the port in %port.
2484  */
2485 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
2486 			       enum port *port)
2487 {
2488 	const struct display_device_data *devdata;
2489 	const struct child_device_config *child;
2490 	u8 dvo_port;
2491 
2492 	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2493 		child = &devdata->child;
2494 
2495 		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2496 			continue;
2497 
2498 		dvo_port = child->dvo_port;
2499 
2500 		if (dvo_port == DVO_PORT_MIPIA ||
2501 		    (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) ||
2502 		    (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) {
2503 			if (port)
2504 				*port = dvo_port - DVO_PORT_MIPIA;
2505 			return true;
2506 		} else if (dvo_port == DVO_PORT_MIPIB ||
2507 			   dvo_port == DVO_PORT_MIPIC ||
2508 			   dvo_port == DVO_PORT_MIPID) {
2509 			drm_dbg_kms(&dev_priv->drm,
2510 				    "VBT has unsupported DSI port %c\n",
2511 				    port_name(dvo_port - DVO_PORT_MIPIA));
2512 		}
2513 	}
2514 
2515 	return false;
2516 }
2517 
2518 static void fill_dsc(struct intel_crtc_state *crtc_state,
2519 		     struct dsc_compression_parameters_entry *dsc,
2520 		     int dsc_max_bpc)
2521 {
2522 	struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2523 	int bpc = 8;
2524 
2525 	vdsc_cfg->dsc_version_major = dsc->version_major;
2526 	vdsc_cfg->dsc_version_minor = dsc->version_minor;
2527 
2528 	if (dsc->support_12bpc && dsc_max_bpc >= 12)
2529 		bpc = 12;
2530 	else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2531 		bpc = 10;
2532 	else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2533 		bpc = 8;
2534 	else
2535 		DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2536 			      dsc_max_bpc);
2537 
2538 	crtc_state->pipe_bpp = bpc * 3;
2539 
2540 	crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2541 					     VBT_DSC_MAX_BPP(dsc->max_bpp));
2542 
2543 	/*
2544 	 * FIXME: This is ugly, and slice count should take DSC engine
2545 	 * throughput etc. into account.
2546 	 *
2547 	 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2548 	 */
2549 	if (dsc->slices_per_line & BIT(2)) {
2550 		crtc_state->dsc.slice_count = 4;
2551 	} else if (dsc->slices_per_line & BIT(1)) {
2552 		crtc_state->dsc.slice_count = 2;
2553 	} else {
2554 		/* FIXME */
2555 		if (!(dsc->slices_per_line & BIT(0)))
2556 			DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2557 
2558 		crtc_state->dsc.slice_count = 1;
2559 	}
2560 
2561 	if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2562 	    crtc_state->dsc.slice_count != 0)
2563 		DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2564 			      crtc_state->hw.adjusted_mode.crtc_hdisplay,
2565 			      crtc_state->dsc.slice_count);
2566 
2567 	/*
2568 	 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2569 	 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
2570 	 */
2571 	vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
2572 							    dsc->rc_buffer_size);
2573 
2574 	/* FIXME: DSI spec says bpc + 1 for this one */
2575 	vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2576 
2577 	vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2578 
2579 	vdsc_cfg->slice_height = dsc->slice_height;
2580 }
2581 
2582 /* FIXME: initially DSI specific */
2583 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2584 			       struct intel_crtc_state *crtc_state,
2585 			       int dsc_max_bpc)
2586 {
2587 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2588 	const struct display_device_data *devdata;
2589 	const struct child_device_config *child;
2590 
2591 	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2592 		child = &devdata->child;
2593 
2594 		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2595 			continue;
2596 
2597 		if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
2598 			if (!devdata->dsc)
2599 				return false;
2600 
2601 			if (crtc_state)
2602 				fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2603 
2604 			return true;
2605 		}
2606 	}
2607 
2608 	return false;
2609 }
2610 
2611 /**
2612  * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2613  * @i915:	i915 device instance
2614  * @port:	port to check
2615  *
2616  * Return true if HPD should be inverted for %port.
2617  */
2618 bool
2619 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2620 				enum port port)
2621 {
2622 	const struct child_device_config *child =
2623 		i915->vbt.ddi_port_info[port].child;
2624 
2625 	if (drm_WARN_ON_ONCE(&i915->drm, !IS_GEN9_LP(i915)))
2626 		return false;
2627 
2628 	return child && child->hpd_invert;
2629 }
2630 
2631 /**
2632  * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2633  * @i915:	i915 device instance
2634  * @port:	port to check
2635  *
2636  * Return true if LSPCON is present on this port
2637  */
2638 bool
2639 intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2640 			     enum port port)
2641 {
2642 	const struct child_device_config *child =
2643 		i915->vbt.ddi_port_info[port].child;
2644 
2645 	return HAS_LSPCON(i915) && child && child->lspcon;
2646 }
2647 
2648 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
2649 				   enum port port)
2650 {
2651 	const struct ddi_vbt_port_info *info =
2652 		&dev_priv->vbt.ddi_port_info[port];
2653 	enum aux_ch aux_ch;
2654 
2655 	if (!info->alternate_aux_channel) {
2656 		aux_ch = (enum aux_ch)port;
2657 
2658 		drm_dbg_kms(&dev_priv->drm,
2659 			    "using AUX %c for port %c (platform default)\n",
2660 			    aux_ch_name(aux_ch), port_name(port));
2661 		return aux_ch;
2662 	}
2663 
2664 	switch (info->alternate_aux_channel) {
2665 	case DP_AUX_A:
2666 		aux_ch = AUX_CH_A;
2667 		break;
2668 	case DP_AUX_B:
2669 		aux_ch = AUX_CH_B;
2670 		break;
2671 	case DP_AUX_C:
2672 		/*
2673 		 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
2674 		 * map to DDI A,B,TC1,TC2 respectively.
2675 		 */
2676 		aux_ch = (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) ?
2677 			AUX_CH_USBC1 : AUX_CH_C;
2678 		break;
2679 	case DP_AUX_D:
2680 		aux_ch = (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) ?
2681 			AUX_CH_USBC2 : AUX_CH_D;
2682 		break;
2683 	case DP_AUX_E:
2684 		aux_ch = AUX_CH_E;
2685 		break;
2686 	case DP_AUX_F:
2687 		aux_ch = AUX_CH_F;
2688 		break;
2689 	case DP_AUX_G:
2690 		aux_ch = AUX_CH_G;
2691 		break;
2692 	case DP_AUX_H:
2693 		aux_ch = AUX_CH_H;
2694 		break;
2695 	case DP_AUX_I:
2696 		aux_ch = AUX_CH_I;
2697 		break;
2698 	default:
2699 		MISSING_CASE(info->alternate_aux_channel);
2700 		aux_ch = AUX_CH_A;
2701 		break;
2702 	}
2703 
2704 	drm_dbg_kms(&dev_priv->drm, "using AUX %c for port %c (VBT)\n",
2705 		    aux_ch_name(aux_ch), port_name(port));
2706 
2707 	return aux_ch;
2708 }
2709 
2710 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
2711 {
2712 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2713 
2714 	return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
2715 }
2716 
2717 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
2718 {
2719 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2720 	const struct ddi_vbt_port_info *info =
2721 		&i915->vbt.ddi_port_info[encoder->port];
2722 
2723 	return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
2724 }
2725 
2726 int intel_bios_dp_boost_level(struct intel_encoder *encoder)
2727 {
2728 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2729 
2730 	return i915->vbt.ddi_port_info[encoder->port].dp_boost_level;
2731 }
2732 
2733 int intel_bios_hdmi_boost_level(struct intel_encoder *encoder)
2734 {
2735 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2736 
2737 	return i915->vbt.ddi_port_info[encoder->port].hdmi_boost_level;
2738 }
2739 
2740 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
2741 {
2742 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2743 
2744 	return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
2745 }
2746 
2747 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
2748 {
2749 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2750 
2751 	return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
2752 }
2753 
2754 bool intel_bios_port_supports_dvi(struct drm_i915_private *i915, enum port port)
2755 {
2756 	return i915->vbt.ddi_port_info[port].supports_dvi;
2757 }
2758 
2759 bool intel_bios_port_supports_hdmi(struct drm_i915_private *i915, enum port port)
2760 {
2761 	return i915->vbt.ddi_port_info[port].supports_hdmi;
2762 }
2763 
2764 bool intel_bios_port_supports_dp(struct drm_i915_private *i915, enum port port)
2765 {
2766 	return i915->vbt.ddi_port_info[port].supports_dp;
2767 }
2768 
2769 bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915,
2770 					enum port port)
2771 {
2772 	return i915->vbt.ddi_port_info[port].supports_typec_usb;
2773 }
2774 
2775 bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port)
2776 {
2777 	return i915->vbt.ddi_port_info[port].supports_tbt;
2778 }
2779