1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <drm/drm_dp_helper.h> 29 #include <drm/i915_drm.h> 30 31 #include "display/intel_display.h" 32 #include "display/intel_display_types.h" 33 #include "display/intel_gmbus.h" 34 35 #include "i915_drv.h" 36 37 #define _INTEL_BIOS_PRIVATE 38 #include "intel_vbt_defs.h" 39 40 /** 41 * DOC: Video BIOS Table (VBT) 42 * 43 * The Video BIOS Table, or VBT, provides platform and board specific 44 * configuration information to the driver that is not discoverable or available 45 * through other means. The configuration is mostly related to display 46 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 47 * the PCI ROM. 48 * 49 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 50 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 51 * contain the actual configuration information. The VBT Header, and thus the 52 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 53 * BDB Header. The data blocks are concatenated after the BDB Header. The data 54 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 55 * data. (Block 53, the MIPI Sequence Block is an exception.) 56 * 57 * The driver parses the VBT during load. The relevant information is stored in 58 * driver private data for ease of use, and the actual VBT is not read after 59 * that. 60 */ 61 62 /* Wrapper for VBT child device config */ 63 struct display_device_data { 64 struct child_device_config child; 65 struct dsc_compression_parameters_entry *dsc; 66 struct list_head node; 67 }; 68 69 #define SLAVE_ADDR1 0x70 70 #define SLAVE_ADDR2 0x72 71 72 /* Get BDB block size given a pointer to Block ID. */ 73 static u32 _get_blocksize(const u8 *block_base) 74 { 75 /* The MIPI Sequence Block v3+ has a separate size field. */ 76 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 77 return *((const u32 *)(block_base + 4)); 78 else 79 return *((const u16 *)(block_base + 1)); 80 } 81 82 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 83 static u32 get_blocksize(const void *block_data) 84 { 85 return _get_blocksize(block_data - 3); 86 } 87 88 static const void * 89 find_section(const void *_bdb, enum bdb_block_id section_id) 90 { 91 const struct bdb_header *bdb = _bdb; 92 const u8 *base = _bdb; 93 int index = 0; 94 u32 total, current_size; 95 enum bdb_block_id current_id; 96 97 /* skip to first section */ 98 index += bdb->header_size; 99 total = bdb->bdb_size; 100 101 /* walk the sections looking for section_id */ 102 while (index + 3 < total) { 103 current_id = *(base + index); 104 current_size = _get_blocksize(base + index); 105 index += 3; 106 107 if (index + current_size > total) 108 return NULL; 109 110 if (current_id == section_id) 111 return base + index; 112 113 index += current_size; 114 } 115 116 return NULL; 117 } 118 119 static void 120 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 121 const struct lvds_dvo_timing *dvo_timing) 122 { 123 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 124 dvo_timing->hactive_lo; 125 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 126 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 127 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 128 ((dvo_timing->hsync_pulse_width_hi << 8) | 129 dvo_timing->hsync_pulse_width_lo); 130 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 131 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 132 133 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 134 dvo_timing->vactive_lo; 135 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 136 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 137 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 138 ((dvo_timing->vsync_pulse_width_hi << 4) | 139 dvo_timing->vsync_pulse_width_lo); 140 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 141 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 142 panel_fixed_mode->clock = dvo_timing->clock * 10; 143 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 144 145 if (dvo_timing->hsync_positive) 146 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 147 else 148 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 149 150 if (dvo_timing->vsync_positive) 151 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 152 else 153 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 154 155 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 156 dvo_timing->himage_lo; 157 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 158 dvo_timing->vimage_lo; 159 160 /* Some VBTs have bogus h/vtotal values */ 161 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 162 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 163 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 164 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 165 166 drm_mode_set_name(panel_fixed_mode); 167 } 168 169 static const struct lvds_dvo_timing * 170 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, 171 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, 172 int index) 173 { 174 /* 175 * the size of fp_timing varies on the different platform. 176 * So calculate the DVO timing relative offset in LVDS data 177 * entry to get the DVO timing entry 178 */ 179 180 int lfp_data_size = 181 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - 182 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; 183 int dvo_timing_offset = 184 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - 185 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; 186 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; 187 188 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); 189 } 190 191 /* get lvds_fp_timing entry 192 * this function may return NULL if the corresponding entry is invalid 193 */ 194 static const struct lvds_fp_timing * 195 get_lvds_fp_timing(const struct bdb_header *bdb, 196 const struct bdb_lvds_lfp_data *data, 197 const struct bdb_lvds_lfp_data_ptrs *ptrs, 198 int index) 199 { 200 size_t data_ofs = (const u8 *)data - (const u8 *)bdb; 201 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ 202 size_t ofs; 203 204 if (index >= ARRAY_SIZE(ptrs->ptr)) 205 return NULL; 206 ofs = ptrs->ptr[index].fp_timing_offset; 207 if (ofs < data_ofs || 208 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) 209 return NULL; 210 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); 211 } 212 213 /* Parse general panel options */ 214 static void 215 parse_panel_options(struct drm_i915_private *dev_priv, 216 const struct bdb_header *bdb) 217 { 218 const struct bdb_lvds_options *lvds_options; 219 int panel_type; 220 int drrs_mode; 221 int ret; 222 223 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); 224 if (!lvds_options) 225 return; 226 227 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; 228 229 ret = intel_opregion_get_panel_type(dev_priv); 230 if (ret >= 0) { 231 drm_WARN_ON(&dev_priv->drm, ret > 0xf); 232 panel_type = ret; 233 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (OpRegion)\n", 234 panel_type); 235 } else { 236 if (lvds_options->panel_type > 0xf) { 237 drm_dbg_kms(&dev_priv->drm, 238 "Invalid VBT panel type 0x%x\n", 239 lvds_options->panel_type); 240 return; 241 } 242 panel_type = lvds_options->panel_type; 243 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (VBT)\n", 244 panel_type); 245 } 246 247 dev_priv->vbt.panel_type = panel_type; 248 249 drrs_mode = (lvds_options->dps_panel_type_bits 250 >> (panel_type * 2)) & MODE_MASK; 251 /* 252 * VBT has static DRRS = 0 and seamless DRRS = 2. 253 * The below piece of code is required to adjust vbt.drrs_type 254 * to match the enum drrs_support_type. 255 */ 256 switch (drrs_mode) { 257 case 0: 258 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; 259 drm_dbg_kms(&dev_priv->drm, "DRRS supported mode is static\n"); 260 break; 261 case 2: 262 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; 263 drm_dbg_kms(&dev_priv->drm, 264 "DRRS supported mode is seamless\n"); 265 break; 266 default: 267 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 268 drm_dbg_kms(&dev_priv->drm, 269 "DRRS not supported (VBT input)\n"); 270 break; 271 } 272 } 273 274 /* Try to find integrated panel timing data */ 275 static void 276 parse_lfp_panel_dtd(struct drm_i915_private *dev_priv, 277 const struct bdb_header *bdb) 278 { 279 const struct bdb_lvds_lfp_data *lvds_lfp_data; 280 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; 281 const struct lvds_dvo_timing *panel_dvo_timing; 282 const struct lvds_fp_timing *fp_timing; 283 struct drm_display_mode *panel_fixed_mode; 284 int panel_type = dev_priv->vbt.panel_type; 285 286 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); 287 if (!lvds_lfp_data) 288 return; 289 290 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); 291 if (!lvds_lfp_data_ptrs) 292 return; 293 294 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 295 lvds_lfp_data_ptrs, 296 panel_type); 297 298 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 299 if (!panel_fixed_mode) 300 return; 301 302 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 303 304 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 305 306 drm_dbg_kms(&dev_priv->drm, 307 "Found panel mode in BIOS VBT legacy lfp table:\n"); 308 drm_mode_debug_printmodeline(panel_fixed_mode); 309 310 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, 311 lvds_lfp_data_ptrs, 312 panel_type); 313 if (fp_timing) { 314 /* check the resolution, just to be sure */ 315 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 316 fp_timing->y_res == panel_fixed_mode->vdisplay) { 317 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 318 drm_dbg_kms(&dev_priv->drm, 319 "VBT initial LVDS value %x\n", 320 dev_priv->vbt.bios_lvds_val); 321 } 322 } 323 } 324 325 static void 326 parse_generic_dtd(struct drm_i915_private *dev_priv, 327 const struct bdb_header *bdb) 328 { 329 const struct bdb_generic_dtd *generic_dtd; 330 const struct generic_dtd_entry *dtd; 331 struct drm_display_mode *panel_fixed_mode; 332 int num_dtd; 333 334 generic_dtd = find_section(bdb, BDB_GENERIC_DTD); 335 if (!generic_dtd) 336 return; 337 338 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 339 drm_err(&dev_priv->drm, "GDTD size %u is too small.\n", 340 generic_dtd->gdtd_size); 341 return; 342 } else if (generic_dtd->gdtd_size != 343 sizeof(struct generic_dtd_entry)) { 344 drm_err(&dev_priv->drm, "Unexpected GDTD size %u\n", 345 generic_dtd->gdtd_size); 346 /* DTD has unknown fields, but keep going */ 347 } 348 349 num_dtd = (get_blocksize(generic_dtd) - 350 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 351 if (dev_priv->vbt.panel_type >= num_dtd) { 352 drm_err(&dev_priv->drm, 353 "Panel type %d not found in table of %d DTD's\n", 354 dev_priv->vbt.panel_type, num_dtd); 355 return; 356 } 357 358 dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type]; 359 360 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 361 if (!panel_fixed_mode) 362 return; 363 364 panel_fixed_mode->hdisplay = dtd->hactive; 365 panel_fixed_mode->hsync_start = 366 panel_fixed_mode->hdisplay + dtd->hfront_porch; 367 panel_fixed_mode->hsync_end = 368 panel_fixed_mode->hsync_start + dtd->hsync; 369 panel_fixed_mode->htotal = 370 panel_fixed_mode->hdisplay + dtd->hblank; 371 372 panel_fixed_mode->vdisplay = dtd->vactive; 373 panel_fixed_mode->vsync_start = 374 panel_fixed_mode->vdisplay + dtd->vfront_porch; 375 panel_fixed_mode->vsync_end = 376 panel_fixed_mode->vsync_start + dtd->vsync; 377 panel_fixed_mode->vtotal = 378 panel_fixed_mode->vdisplay + dtd->vblank; 379 380 panel_fixed_mode->clock = dtd->pixel_clock; 381 panel_fixed_mode->width_mm = dtd->width_mm; 382 panel_fixed_mode->height_mm = dtd->height_mm; 383 384 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 385 drm_mode_set_name(panel_fixed_mode); 386 387 if (dtd->hsync_positive_polarity) 388 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 389 else 390 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 391 392 if (dtd->vsync_positive_polarity) 393 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 394 else 395 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 396 397 drm_dbg_kms(&dev_priv->drm, 398 "Found panel mode in BIOS VBT generic dtd table:\n"); 399 drm_mode_debug_printmodeline(panel_fixed_mode); 400 401 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 402 } 403 404 static void 405 parse_panel_dtd(struct drm_i915_private *dev_priv, 406 const struct bdb_header *bdb) 407 { 408 /* 409 * Older VBTs provided provided DTD information for internal displays 410 * through the "LFP panel DTD" block (42). As of VBT revision 229, 411 * that block is now deprecated and DTD information should be provided 412 * via a newer "generic DTD" block (58). Just to be safe, we'll 413 * try the new generic DTD block first on VBT >= 229, but still fall 414 * back to trying the old LFP block if that fails. 415 */ 416 if (bdb->version >= 229) 417 parse_generic_dtd(dev_priv, bdb); 418 if (!dev_priv->vbt.lfp_lvds_vbt_mode) 419 parse_lfp_panel_dtd(dev_priv, bdb); 420 } 421 422 static void 423 parse_lfp_backlight(struct drm_i915_private *dev_priv, 424 const struct bdb_header *bdb) 425 { 426 const struct bdb_lfp_backlight_data *backlight_data; 427 const struct lfp_backlight_data_entry *entry; 428 int panel_type = dev_priv->vbt.panel_type; 429 430 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); 431 if (!backlight_data) 432 return; 433 434 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 435 drm_dbg_kms(&dev_priv->drm, 436 "Unsupported backlight data entry size %u\n", 437 backlight_data->entry_size); 438 return; 439 } 440 441 entry = &backlight_data->data[panel_type]; 442 443 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 444 if (!dev_priv->vbt.backlight.present) { 445 drm_dbg_kms(&dev_priv->drm, 446 "PWM backlight not present in VBT (type %u)\n", 447 entry->type); 448 return; 449 } 450 451 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 452 if (bdb->version >= 191 && 453 get_blocksize(backlight_data) >= sizeof(*backlight_data)) { 454 const struct lfp_backlight_control_method *method; 455 456 method = &backlight_data->backlight_control[panel_type]; 457 dev_priv->vbt.backlight.type = method->type; 458 dev_priv->vbt.backlight.controller = method->controller; 459 } 460 461 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 462 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; 463 dev_priv->vbt.backlight.min_brightness = entry->min_brightness; 464 drm_dbg_kms(&dev_priv->drm, 465 "VBT backlight PWM modulation frequency %u Hz, " 466 "active %s, min brightness %u, level %u, controller %u\n", 467 dev_priv->vbt.backlight.pwm_freq_hz, 468 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", 469 dev_priv->vbt.backlight.min_brightness, 470 backlight_data->level[panel_type], 471 dev_priv->vbt.backlight.controller); 472 } 473 474 /* Try to find sdvo panel data */ 475 static void 476 parse_sdvo_panel_data(struct drm_i915_private *dev_priv, 477 const struct bdb_header *bdb) 478 { 479 const struct bdb_sdvo_panel_dtds *dtds; 480 struct drm_display_mode *panel_fixed_mode; 481 int index; 482 483 index = i915_modparams.vbt_sdvo_panel_type; 484 if (index == -2) { 485 drm_dbg_kms(&dev_priv->drm, 486 "Ignore SDVO panel mode from BIOS VBT tables.\n"); 487 return; 488 } 489 490 if (index == -1) { 491 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 492 493 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); 494 if (!sdvo_lvds_options) 495 return; 496 497 index = sdvo_lvds_options->panel_type; 498 } 499 500 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS); 501 if (!dtds) 502 return; 503 504 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 505 if (!panel_fixed_mode) 506 return; 507 508 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 509 510 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 511 512 drm_dbg_kms(&dev_priv->drm, 513 "Found SDVO panel mode in BIOS VBT tables:\n"); 514 drm_mode_debug_printmodeline(panel_fixed_mode); 515 } 516 517 static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv, 518 bool alternate) 519 { 520 switch (INTEL_GEN(dev_priv)) { 521 case 2: 522 return alternate ? 66667 : 48000; 523 case 3: 524 case 4: 525 return alternate ? 100000 : 96000; 526 default: 527 return alternate ? 100000 : 120000; 528 } 529 } 530 531 static void 532 parse_general_features(struct drm_i915_private *dev_priv, 533 const struct bdb_header *bdb) 534 { 535 const struct bdb_general_features *general; 536 537 general = find_section(bdb, BDB_GENERAL_FEATURES); 538 if (!general) 539 return; 540 541 dev_priv->vbt.int_tv_support = general->int_tv_support; 542 /* int_crt_support can't be trusted on earlier platforms */ 543 if (bdb->version >= 155 && 544 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv))) 545 dev_priv->vbt.int_crt_support = general->int_crt_support; 546 dev_priv->vbt.lvds_use_ssc = general->enable_ssc; 547 dev_priv->vbt.lvds_ssc_freq = 548 intel_bios_ssc_frequency(dev_priv, general->ssc_freq); 549 dev_priv->vbt.display_clock_mode = general->display_clock_mode; 550 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 551 if (bdb->version >= 181) { 552 dev_priv->vbt.orientation = general->rotate_180 ? 553 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 554 DRM_MODE_PANEL_ORIENTATION_NORMAL; 555 } else { 556 dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 557 } 558 drm_dbg_kms(&dev_priv->drm, 559 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 560 dev_priv->vbt.int_tv_support, 561 dev_priv->vbt.int_crt_support, 562 dev_priv->vbt.lvds_use_ssc, 563 dev_priv->vbt.lvds_ssc_freq, 564 dev_priv->vbt.display_clock_mode, 565 dev_priv->vbt.fdi_rx_polarity_inverted); 566 } 567 568 static const struct child_device_config * 569 child_device_ptr(const struct bdb_general_definitions *defs, int i) 570 { 571 return (const void *) &defs->devices[i * defs->child_dev_size]; 572 } 573 574 static void 575 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version) 576 { 577 struct sdvo_device_mapping *mapping; 578 const struct display_device_data *devdata; 579 const struct child_device_config *child; 580 int count = 0; 581 582 /* 583 * Only parse SDVO mappings on gens that could have SDVO. This isn't 584 * accurate and doesn't have to be, as long as it's not too strict. 585 */ 586 if (!IS_GEN_RANGE(dev_priv, 3, 7)) { 587 drm_dbg_kms(&dev_priv->drm, "Skipping SDVO device mapping\n"); 588 return; 589 } 590 591 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 592 child = &devdata->child; 593 594 if (child->slave_addr != SLAVE_ADDR1 && 595 child->slave_addr != SLAVE_ADDR2) { 596 /* 597 * If the slave address is neither 0x70 nor 0x72, 598 * it is not a SDVO device. Skip it. 599 */ 600 continue; 601 } 602 if (child->dvo_port != DEVICE_PORT_DVOB && 603 child->dvo_port != DEVICE_PORT_DVOC) { 604 /* skip the incorrect SDVO port */ 605 drm_dbg_kms(&dev_priv->drm, 606 "Incorrect SDVO port. Skip it\n"); 607 continue; 608 } 609 drm_dbg_kms(&dev_priv->drm, 610 "the SDVO device with slave addr %2x is found on" 611 " %s port\n", 612 child->slave_addr, 613 (child->dvo_port == DEVICE_PORT_DVOB) ? 614 "SDVOB" : "SDVOC"); 615 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1]; 616 if (!mapping->initialized) { 617 mapping->dvo_port = child->dvo_port; 618 mapping->slave_addr = child->slave_addr; 619 mapping->dvo_wiring = child->dvo_wiring; 620 mapping->ddc_pin = child->ddc_pin; 621 mapping->i2c_pin = child->i2c_pin; 622 mapping->initialized = 1; 623 drm_dbg_kms(&dev_priv->drm, 624 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 625 mapping->dvo_port, mapping->slave_addr, 626 mapping->dvo_wiring, mapping->ddc_pin, 627 mapping->i2c_pin); 628 } else { 629 drm_dbg_kms(&dev_priv->drm, 630 "Maybe one SDVO port is shared by " 631 "two SDVO device.\n"); 632 } 633 if (child->slave2_addr) { 634 /* Maybe this is a SDVO device with multiple inputs */ 635 /* And the mapping info is not added */ 636 drm_dbg_kms(&dev_priv->drm, 637 "there exists the slave2_addr. Maybe this" 638 " is a SDVO device with multiple inputs.\n"); 639 } 640 count++; 641 } 642 643 if (!count) { 644 /* No SDVO device info is found */ 645 drm_dbg_kms(&dev_priv->drm, 646 "No SDVO device info is found in VBT\n"); 647 } 648 } 649 650 static void 651 parse_driver_features(struct drm_i915_private *dev_priv, 652 const struct bdb_header *bdb) 653 { 654 const struct bdb_driver_features *driver; 655 656 driver = find_section(bdb, BDB_DRIVER_FEATURES); 657 if (!driver) 658 return; 659 660 if (INTEL_GEN(dev_priv) >= 5) { 661 /* 662 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 663 * to mean "eDP". The VBT spec doesn't agree with that 664 * interpretation, but real world VBTs seem to. 665 */ 666 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 667 dev_priv->vbt.int_lvds_support = 0; 668 } else { 669 /* 670 * FIXME it's not clear which BDB version has the LVDS config 671 * bits defined. Revision history in the VBT spec says: 672 * "0.92 | Add two definitions for VBT value of LVDS Active 673 * Config (00b and 11b values defined) | 06/13/2005" 674 * but does not the specify the BDB version. 675 * 676 * So far version 134 (on i945gm) is the oldest VBT observed 677 * in the wild with the bits correctly populated. Version 678 * 108 (on i85x) does not have the bits correctly populated. 679 */ 680 if (bdb->version >= 134 && 681 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 682 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 683 dev_priv->vbt.int_lvds_support = 0; 684 } 685 686 if (bdb->version < 228) { 687 drm_dbg_kms(&dev_priv->drm, "DRRS State Enabled:%d\n", 688 driver->drrs_enabled); 689 /* 690 * If DRRS is not supported, drrs_type has to be set to 0. 691 * This is because, VBT is configured in such a way that 692 * static DRRS is 0 and DRRS not supported is represented by 693 * driver->drrs_enabled=false 694 */ 695 if (!driver->drrs_enabled) 696 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 697 698 dev_priv->vbt.psr.enable = driver->psr_enabled; 699 } 700 } 701 702 static void 703 parse_power_conservation_features(struct drm_i915_private *dev_priv, 704 const struct bdb_header *bdb) 705 { 706 const struct bdb_lfp_power *power; 707 u8 panel_type = dev_priv->vbt.panel_type; 708 709 if (bdb->version < 228) 710 return; 711 712 power = find_section(bdb, BDB_LFP_POWER); 713 if (!power) 714 return; 715 716 dev_priv->vbt.psr.enable = power->psr & BIT(panel_type); 717 718 /* 719 * If DRRS is not supported, drrs_type has to be set to 0. 720 * This is because, VBT is configured in such a way that 721 * static DRRS is 0 and DRRS not supported is represented by 722 * power->drrs & BIT(panel_type)=false 723 */ 724 if (!(power->drrs & BIT(panel_type))) 725 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 726 } 727 728 static void 729 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 730 { 731 const struct bdb_edp *edp; 732 const struct edp_power_seq *edp_pps; 733 const struct edp_fast_link_params *edp_link_params; 734 int panel_type = dev_priv->vbt.panel_type; 735 736 edp = find_section(bdb, BDB_EDP); 737 if (!edp) 738 return; 739 740 switch ((edp->color_depth >> (panel_type * 2)) & 3) { 741 case EDP_18BPP: 742 dev_priv->vbt.edp.bpp = 18; 743 break; 744 case EDP_24BPP: 745 dev_priv->vbt.edp.bpp = 24; 746 break; 747 case EDP_30BPP: 748 dev_priv->vbt.edp.bpp = 30; 749 break; 750 } 751 752 /* Get the eDP sequencing and link info */ 753 edp_pps = &edp->power_seqs[panel_type]; 754 edp_link_params = &edp->fast_link_params[panel_type]; 755 756 dev_priv->vbt.edp.pps = *edp_pps; 757 758 switch (edp_link_params->rate) { 759 case EDP_RATE_1_62: 760 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62; 761 break; 762 case EDP_RATE_2_7: 763 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7; 764 break; 765 default: 766 drm_dbg_kms(&dev_priv->drm, 767 "VBT has unknown eDP link rate value %u\n", 768 edp_link_params->rate); 769 break; 770 } 771 772 switch (edp_link_params->lanes) { 773 case EDP_LANE_1: 774 dev_priv->vbt.edp.lanes = 1; 775 break; 776 case EDP_LANE_2: 777 dev_priv->vbt.edp.lanes = 2; 778 break; 779 case EDP_LANE_4: 780 dev_priv->vbt.edp.lanes = 4; 781 break; 782 default: 783 drm_dbg_kms(&dev_priv->drm, 784 "VBT has unknown eDP lane count value %u\n", 785 edp_link_params->lanes); 786 break; 787 } 788 789 switch (edp_link_params->preemphasis) { 790 case EDP_PREEMPHASIS_NONE: 791 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 792 break; 793 case EDP_PREEMPHASIS_3_5dB: 794 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 795 break; 796 case EDP_PREEMPHASIS_6dB: 797 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 798 break; 799 case EDP_PREEMPHASIS_9_5dB: 800 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 801 break; 802 default: 803 drm_dbg_kms(&dev_priv->drm, 804 "VBT has unknown eDP pre-emphasis value %u\n", 805 edp_link_params->preemphasis); 806 break; 807 } 808 809 switch (edp_link_params->vswing) { 810 case EDP_VSWING_0_4V: 811 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 812 break; 813 case EDP_VSWING_0_6V: 814 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 815 break; 816 case EDP_VSWING_0_8V: 817 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 818 break; 819 case EDP_VSWING_1_2V: 820 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 821 break; 822 default: 823 drm_dbg_kms(&dev_priv->drm, 824 "VBT has unknown eDP voltage swing value %u\n", 825 edp_link_params->vswing); 826 break; 827 } 828 829 if (bdb->version >= 173) { 830 u8 vswing; 831 832 /* Don't read from VBT if module parameter has valid value*/ 833 if (i915_modparams.edp_vswing) { 834 dev_priv->vbt.edp.low_vswing = 835 i915_modparams.edp_vswing == 1; 836 } else { 837 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 838 dev_priv->vbt.edp.low_vswing = vswing == 0; 839 } 840 } 841 } 842 843 static void 844 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 845 { 846 const struct bdb_psr *psr; 847 const struct psr_table *psr_table; 848 int panel_type = dev_priv->vbt.panel_type; 849 850 psr = find_section(bdb, BDB_PSR); 851 if (!psr) { 852 drm_dbg_kms(&dev_priv->drm, "No PSR BDB found.\n"); 853 return; 854 } 855 856 psr_table = &psr->psr_table[panel_type]; 857 858 dev_priv->vbt.psr.full_link = psr_table->full_link; 859 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 860 861 /* Allowed VBT values goes from 0 to 15 */ 862 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 863 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 864 865 switch (psr_table->lines_to_wait) { 866 case 0: 867 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT; 868 break; 869 case 1: 870 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT; 871 break; 872 case 2: 873 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT; 874 break; 875 case 3: 876 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT; 877 break; 878 default: 879 drm_dbg_kms(&dev_priv->drm, 880 "VBT has unknown PSR lines to wait %u\n", 881 psr_table->lines_to_wait); 882 break; 883 } 884 885 /* 886 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 887 * Old decimal value is wake up time in multiples of 100 us. 888 */ 889 if (bdb->version >= 205 && 890 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) || 891 INTEL_GEN(dev_priv) >= 10)) { 892 switch (psr_table->tp1_wakeup_time) { 893 case 0: 894 dev_priv->vbt.psr.tp1_wakeup_time_us = 500; 895 break; 896 case 1: 897 dev_priv->vbt.psr.tp1_wakeup_time_us = 100; 898 break; 899 case 3: 900 dev_priv->vbt.psr.tp1_wakeup_time_us = 0; 901 break; 902 default: 903 drm_dbg_kms(&dev_priv->drm, 904 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 905 psr_table->tp1_wakeup_time); 906 /* fallthrough */ 907 case 2: 908 dev_priv->vbt.psr.tp1_wakeup_time_us = 2500; 909 break; 910 } 911 912 switch (psr_table->tp2_tp3_wakeup_time) { 913 case 0: 914 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500; 915 break; 916 case 1: 917 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100; 918 break; 919 case 3: 920 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0; 921 break; 922 default: 923 drm_dbg_kms(&dev_priv->drm, 924 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 925 psr_table->tp2_tp3_wakeup_time); 926 /* fallthrough */ 927 case 2: 928 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 929 break; 930 } 931 } else { 932 dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 933 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 934 } 935 936 if (bdb->version >= 226) { 937 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 938 939 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3; 940 switch (wakeup_time) { 941 case 0: 942 wakeup_time = 500; 943 break; 944 case 1: 945 wakeup_time = 100; 946 break; 947 case 3: 948 wakeup_time = 50; 949 break; 950 default: 951 case 2: 952 wakeup_time = 2500; 953 break; 954 } 955 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 956 } else { 957 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 958 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us; 959 } 960 } 961 962 static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv, 963 u16 version, enum port port) 964 { 965 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) { 966 dev_priv->vbt.dsi.bl_ports = BIT(port); 967 if (dev_priv->vbt.dsi.config->cabc_supported) 968 dev_priv->vbt.dsi.cabc_ports = BIT(port); 969 970 return; 971 } 972 973 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) { 974 case DL_DCS_PORT_A: 975 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A); 976 break; 977 case DL_DCS_PORT_C: 978 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C); 979 break; 980 default: 981 case DL_DCS_PORT_A_AND_C: 982 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C); 983 break; 984 } 985 986 if (!dev_priv->vbt.dsi.config->cabc_supported) 987 return; 988 989 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) { 990 case DL_DCS_PORT_A: 991 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A); 992 break; 993 case DL_DCS_PORT_C: 994 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C); 995 break; 996 default: 997 case DL_DCS_PORT_A_AND_C: 998 dev_priv->vbt.dsi.cabc_ports = 999 BIT(PORT_A) | BIT(PORT_C); 1000 break; 1001 } 1002 } 1003 1004 static void 1005 parse_mipi_config(struct drm_i915_private *dev_priv, 1006 const struct bdb_header *bdb) 1007 { 1008 const struct bdb_mipi_config *start; 1009 const struct mipi_config *config; 1010 const struct mipi_pps_data *pps; 1011 int panel_type = dev_priv->vbt.panel_type; 1012 enum port port; 1013 1014 /* parse MIPI blocks only if LFP type is MIPI */ 1015 if (!intel_bios_is_dsi_present(dev_priv, &port)) 1016 return; 1017 1018 /* Initialize this to undefined indicating no generic MIPI support */ 1019 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 1020 1021 /* Block #40 is already parsed and panel_fixed_mode is 1022 * stored in dev_priv->lfp_lvds_vbt_mode 1023 * resuse this when needed 1024 */ 1025 1026 /* Parse #52 for panel index used from panel_type already 1027 * parsed 1028 */ 1029 start = find_section(bdb, BDB_MIPI_CONFIG); 1030 if (!start) { 1031 drm_dbg_kms(&dev_priv->drm, "No MIPI config BDB found"); 1032 return; 1033 } 1034 1035 drm_dbg(&dev_priv->drm, "Found MIPI Config block, panel index = %d\n", 1036 panel_type); 1037 1038 /* 1039 * get hold of the correct configuration block and pps data as per 1040 * the panel_type as index 1041 */ 1042 config = &start->config[panel_type]; 1043 pps = &start->pps[panel_type]; 1044 1045 /* store as of now full data. Trim when we realise all is not needed */ 1046 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1047 if (!dev_priv->vbt.dsi.config) 1048 return; 1049 1050 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1051 if (!dev_priv->vbt.dsi.pps) { 1052 kfree(dev_priv->vbt.dsi.config); 1053 return; 1054 } 1055 1056 parse_dsi_backlight_ports(dev_priv, bdb->version, port); 1057 1058 /* FIXME is the 90 vs. 270 correct? */ 1059 switch (config->rotation) { 1060 case ENABLE_ROTATION_0: 1061 /* 1062 * Most (all?) VBTs claim 0 degrees despite having 1063 * an upside down panel, thus we do not trust this. 1064 */ 1065 dev_priv->vbt.dsi.orientation = 1066 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1067 break; 1068 case ENABLE_ROTATION_90: 1069 dev_priv->vbt.dsi.orientation = 1070 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1071 break; 1072 case ENABLE_ROTATION_180: 1073 dev_priv->vbt.dsi.orientation = 1074 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1075 break; 1076 case ENABLE_ROTATION_270: 1077 dev_priv->vbt.dsi.orientation = 1078 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1079 break; 1080 } 1081 1082 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1083 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1084 } 1085 1086 /* Find the sequence block and size for the given panel. */ 1087 static const u8 * 1088 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 1089 u16 panel_id, u32 *seq_size) 1090 { 1091 u32 total = get_blocksize(sequence); 1092 const u8 *data = &sequence->data[0]; 1093 u8 current_id; 1094 u32 current_size; 1095 int header_size = sequence->version >= 3 ? 5 : 3; 1096 int index = 0; 1097 int i; 1098 1099 /* skip new block size */ 1100 if (sequence->version >= 3) 1101 data += 4; 1102 1103 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1104 if (index + header_size > total) { 1105 DRM_ERROR("Invalid sequence block (header)\n"); 1106 return NULL; 1107 } 1108 1109 current_id = *(data + index); 1110 if (sequence->version >= 3) 1111 current_size = *((const u32 *)(data + index + 1)); 1112 else 1113 current_size = *((const u16 *)(data + index + 1)); 1114 1115 index += header_size; 1116 1117 if (index + current_size > total) { 1118 DRM_ERROR("Invalid sequence block\n"); 1119 return NULL; 1120 } 1121 1122 if (current_id == panel_id) { 1123 *seq_size = current_size; 1124 return data + index; 1125 } 1126 1127 index += current_size; 1128 } 1129 1130 DRM_ERROR("Sequence block detected but no valid configuration\n"); 1131 1132 return NULL; 1133 } 1134 1135 static int goto_next_sequence(const u8 *data, int index, int total) 1136 { 1137 u16 len; 1138 1139 /* Skip Sequence Byte. */ 1140 for (index = index + 1; index < total; index += len) { 1141 u8 operation_byte = *(data + index); 1142 index++; 1143 1144 switch (operation_byte) { 1145 case MIPI_SEQ_ELEM_END: 1146 return index; 1147 case MIPI_SEQ_ELEM_SEND_PKT: 1148 if (index + 4 > total) 1149 return 0; 1150 1151 len = *((const u16 *)(data + index + 2)) + 4; 1152 break; 1153 case MIPI_SEQ_ELEM_DELAY: 1154 len = 4; 1155 break; 1156 case MIPI_SEQ_ELEM_GPIO: 1157 len = 2; 1158 break; 1159 case MIPI_SEQ_ELEM_I2C: 1160 if (index + 7 > total) 1161 return 0; 1162 len = *(data + index + 6) + 7; 1163 break; 1164 default: 1165 DRM_ERROR("Unknown operation byte\n"); 1166 return 0; 1167 } 1168 } 1169 1170 return 0; 1171 } 1172 1173 static int goto_next_sequence_v3(const u8 *data, int index, int total) 1174 { 1175 int seq_end; 1176 u16 len; 1177 u32 size_of_sequence; 1178 1179 /* 1180 * Could skip sequence based on Size of Sequence alone, but also do some 1181 * checking on the structure. 1182 */ 1183 if (total < 5) { 1184 DRM_ERROR("Too small sequence size\n"); 1185 return 0; 1186 } 1187 1188 /* Skip Sequence Byte. */ 1189 index++; 1190 1191 /* 1192 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1193 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1194 * byte. 1195 */ 1196 size_of_sequence = *((const u32 *)(data + index)); 1197 index += 4; 1198 1199 seq_end = index + size_of_sequence; 1200 if (seq_end > total) { 1201 DRM_ERROR("Invalid sequence size\n"); 1202 return 0; 1203 } 1204 1205 for (; index < total; index += len) { 1206 u8 operation_byte = *(data + index); 1207 index++; 1208 1209 if (operation_byte == MIPI_SEQ_ELEM_END) { 1210 if (index != seq_end) { 1211 DRM_ERROR("Invalid element structure\n"); 1212 return 0; 1213 } 1214 return index; 1215 } 1216 1217 len = *(data + index); 1218 index++; 1219 1220 /* 1221 * FIXME: Would be nice to check elements like for v1/v2 in 1222 * goto_next_sequence() above. 1223 */ 1224 switch (operation_byte) { 1225 case MIPI_SEQ_ELEM_SEND_PKT: 1226 case MIPI_SEQ_ELEM_DELAY: 1227 case MIPI_SEQ_ELEM_GPIO: 1228 case MIPI_SEQ_ELEM_I2C: 1229 case MIPI_SEQ_ELEM_SPI: 1230 case MIPI_SEQ_ELEM_PMIC: 1231 break; 1232 default: 1233 DRM_ERROR("Unknown operation byte %u\n", 1234 operation_byte); 1235 break; 1236 } 1237 } 1238 1239 return 0; 1240 } 1241 1242 /* 1243 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1244 * skip all delay + gpio operands and stop at the first DSI packet op. 1245 */ 1246 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv) 1247 { 1248 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1249 int index, len; 1250 1251 if (drm_WARN_ON(&dev_priv->drm, 1252 !data || dev_priv->vbt.dsi.seq_version != 1)) 1253 return 0; 1254 1255 /* index = 1 to skip sequence byte */ 1256 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1257 switch (data[index]) { 1258 case MIPI_SEQ_ELEM_SEND_PKT: 1259 return index == 1 ? 0 : index; 1260 case MIPI_SEQ_ELEM_DELAY: 1261 len = 5; /* 1 byte for operand + uint32 */ 1262 break; 1263 case MIPI_SEQ_ELEM_GPIO: 1264 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1265 break; 1266 default: 1267 return 0; 1268 } 1269 } 1270 1271 return 0; 1272 } 1273 1274 /* 1275 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1276 * The deassert must be done before calling intel_dsi_device_ready, so for 1277 * these devices we split the init OTP sequence into a deassert sequence and 1278 * the actual init OTP part. 1279 */ 1280 static void fixup_mipi_sequences(struct drm_i915_private *dev_priv) 1281 { 1282 u8 *init_otp; 1283 int len; 1284 1285 /* Limit this to VLV for now. */ 1286 if (!IS_VALLEYVIEW(dev_priv)) 1287 return; 1288 1289 /* Limit this to v1 vid-mode sequences */ 1290 if (dev_priv->vbt.dsi.config->is_cmd_mode || 1291 dev_priv->vbt.dsi.seq_version != 1) 1292 return; 1293 1294 /* Only do this if there are otp and assert seqs and no deassert seq */ 1295 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1296 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1297 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1298 return; 1299 1300 /* The deassert-sequence ends at the first DSI packet */ 1301 len = get_init_otp_deassert_fragment_len(dev_priv); 1302 if (!len) 1303 return; 1304 1305 drm_dbg_kms(&dev_priv->drm, 1306 "Using init OTP fragment to deassert reset\n"); 1307 1308 /* Copy the fragment, update seq byte and terminate it */ 1309 init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1310 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1311 if (!dev_priv->vbt.dsi.deassert_seq) 1312 return; 1313 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1314 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1315 /* Use the copy for deassert */ 1316 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1317 dev_priv->vbt.dsi.deassert_seq; 1318 /* Replace the last byte of the fragment with init OTP seq byte */ 1319 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1320 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1321 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1322 } 1323 1324 static void 1325 parse_mipi_sequence(struct drm_i915_private *dev_priv, 1326 const struct bdb_header *bdb) 1327 { 1328 int panel_type = dev_priv->vbt.panel_type; 1329 const struct bdb_mipi_sequence *sequence; 1330 const u8 *seq_data; 1331 u32 seq_size; 1332 u8 *data; 1333 int index = 0; 1334 1335 /* Only our generic panel driver uses the sequence block. */ 1336 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 1337 return; 1338 1339 sequence = find_section(bdb, BDB_MIPI_SEQUENCE); 1340 if (!sequence) { 1341 drm_dbg_kms(&dev_priv->drm, 1342 "No MIPI Sequence found, parsing complete\n"); 1343 return; 1344 } 1345 1346 /* Fail gracefully for forward incompatible sequence block. */ 1347 if (sequence->version >= 4) { 1348 drm_err(&dev_priv->drm, 1349 "Unable to parse MIPI Sequence Block v%u\n", 1350 sequence->version); 1351 return; 1352 } 1353 1354 drm_dbg(&dev_priv->drm, "Found MIPI sequence block v%u\n", 1355 sequence->version); 1356 1357 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 1358 if (!seq_data) 1359 return; 1360 1361 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 1362 if (!data) 1363 return; 1364 1365 /* Parse the sequences, store pointers to each sequence. */ 1366 for (;;) { 1367 u8 seq_id = *(data + index); 1368 if (seq_id == MIPI_SEQ_END) 1369 break; 1370 1371 if (seq_id >= MIPI_SEQ_MAX) { 1372 drm_err(&dev_priv->drm, "Unknown sequence %u\n", 1373 seq_id); 1374 goto err; 1375 } 1376 1377 /* Log about presence of sequences we won't run. */ 1378 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 1379 drm_dbg_kms(&dev_priv->drm, 1380 "Unsupported sequence %u\n", seq_id); 1381 1382 dev_priv->vbt.dsi.sequence[seq_id] = data + index; 1383 1384 if (sequence->version >= 3) 1385 index = goto_next_sequence_v3(data, index, seq_size); 1386 else 1387 index = goto_next_sequence(data, index, seq_size); 1388 if (!index) { 1389 drm_err(&dev_priv->drm, "Invalid sequence %u\n", 1390 seq_id); 1391 goto err; 1392 } 1393 } 1394 1395 dev_priv->vbt.dsi.data = data; 1396 dev_priv->vbt.dsi.size = seq_size; 1397 dev_priv->vbt.dsi.seq_version = sequence->version; 1398 1399 fixup_mipi_sequences(dev_priv); 1400 1401 drm_dbg(&dev_priv->drm, "MIPI related VBT parsing complete\n"); 1402 return; 1403 1404 err: 1405 kfree(data); 1406 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence)); 1407 } 1408 1409 static void 1410 parse_compression_parameters(struct drm_i915_private *i915, 1411 const struct bdb_header *bdb) 1412 { 1413 const struct bdb_compression_parameters *params; 1414 struct display_device_data *devdata; 1415 const struct child_device_config *child; 1416 u16 block_size; 1417 int index; 1418 1419 if (bdb->version < 198) 1420 return; 1421 1422 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS); 1423 if (params) { 1424 /* Sanity checks */ 1425 if (params->entry_size != sizeof(params->data[0])) { 1426 drm_dbg_kms(&i915->drm, 1427 "VBT: unsupported compression param entry size\n"); 1428 return; 1429 } 1430 1431 block_size = get_blocksize(params); 1432 if (block_size < sizeof(*params)) { 1433 drm_dbg_kms(&i915->drm, 1434 "VBT: expected 16 compression param entries\n"); 1435 return; 1436 } 1437 } 1438 1439 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 1440 child = &devdata->child; 1441 1442 if (!child->compression_enable) 1443 continue; 1444 1445 if (!params) { 1446 drm_dbg_kms(&i915->drm, 1447 "VBT: compression params not available\n"); 1448 continue; 1449 } 1450 1451 if (child->compression_method_cps) { 1452 drm_dbg_kms(&i915->drm, 1453 "VBT: CPS compression not supported\n"); 1454 continue; 1455 } 1456 1457 index = child->compression_structure_index; 1458 1459 devdata->dsc = kmemdup(¶ms->data[index], 1460 sizeof(*devdata->dsc), GFP_KERNEL); 1461 } 1462 } 1463 1464 static u8 translate_iboost(u8 val) 1465 { 1466 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 1467 1468 if (val >= ARRAY_SIZE(mapping)) { 1469 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 1470 return 0; 1471 } 1472 return mapping[val]; 1473 } 1474 1475 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin) 1476 { 1477 const struct ddi_vbt_port_info *info; 1478 enum port port; 1479 1480 for_each_port(port) { 1481 info = &i915->vbt.ddi_port_info[port]; 1482 1483 if (info->child && ddc_pin == info->alternate_ddc_pin) 1484 return port; 1485 } 1486 1487 return PORT_NONE; 1488 } 1489 1490 static void sanitize_ddc_pin(struct drm_i915_private *dev_priv, 1491 enum port port) 1492 { 1493 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1494 enum port p; 1495 1496 if (!info->alternate_ddc_pin) 1497 return; 1498 1499 p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin); 1500 if (p != PORT_NONE) { 1501 drm_dbg_kms(&dev_priv->drm, 1502 "port %c trying to use the same DDC pin (0x%x) as port %c, " 1503 "disabling port %c DVI/HDMI support\n", 1504 port_name(port), info->alternate_ddc_pin, 1505 port_name(p), port_name(p)); 1506 1507 /* 1508 * If we have multiple ports supposedly sharing the 1509 * pin, then dvi/hdmi couldn't exist on the shared 1510 * port. Otherwise they share the same ddc bin and 1511 * system couldn't communicate with them separately. 1512 * 1513 * Give inverse child device order the priority, 1514 * last one wins. Yes, there are real machines 1515 * (eg. Asrock B250M-HDV) where VBT has both 1516 * port A and port E with the same AUX ch and 1517 * we must pick port E :( 1518 */ 1519 info = &dev_priv->vbt.ddi_port_info[p]; 1520 1521 info->supports_dvi = false; 1522 info->supports_hdmi = false; 1523 info->alternate_ddc_pin = 0; 1524 } 1525 } 1526 1527 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch) 1528 { 1529 const struct ddi_vbt_port_info *info; 1530 enum port port; 1531 1532 for_each_port(port) { 1533 info = &i915->vbt.ddi_port_info[port]; 1534 1535 if (info->child && aux_ch == info->alternate_aux_channel) 1536 return port; 1537 } 1538 1539 return PORT_NONE; 1540 } 1541 1542 static void sanitize_aux_ch(struct drm_i915_private *dev_priv, 1543 enum port port) 1544 { 1545 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1546 enum port p; 1547 1548 if (!info->alternate_aux_channel) 1549 return; 1550 1551 p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel); 1552 if (p != PORT_NONE) { 1553 drm_dbg_kms(&dev_priv->drm, 1554 "port %c trying to use the same AUX CH (0x%x) as port %c, " 1555 "disabling port %c DP support\n", 1556 port_name(port), info->alternate_aux_channel, 1557 port_name(p), port_name(p)); 1558 1559 /* 1560 * If we have multiple ports supposedlt sharing the 1561 * aux channel, then DP couldn't exist on the shared 1562 * port. Otherwise they share the same aux channel 1563 * and system couldn't communicate with them separately. 1564 * 1565 * Give inverse child device order the priority, 1566 * last one wins. Yes, there are real machines 1567 * (eg. Asrock B250M-HDV) where VBT has both 1568 * port A and port E with the same AUX ch and 1569 * we must pick port E :( 1570 */ 1571 info = &dev_priv->vbt.ddi_port_info[p]; 1572 1573 info->supports_dp = false; 1574 info->alternate_aux_channel = 0; 1575 } 1576 } 1577 1578 static const u8 cnp_ddc_pin_map[] = { 1579 [0] = 0, /* N/A */ 1580 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT, 1581 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT, 1582 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */ 1583 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */ 1584 }; 1585 1586 static const u8 icp_ddc_pin_map[] = { 1587 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1588 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1589 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT, 1590 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP, 1591 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP, 1592 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP, 1593 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP, 1594 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP, 1595 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, 1596 }; 1597 1598 static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin) 1599 { 1600 const u8 *ddc_pin_map; 1601 int n_entries; 1602 1603 if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) { 1604 ddc_pin_map = icp_ddc_pin_map; 1605 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 1606 } else if (HAS_PCH_CNP(dev_priv)) { 1607 ddc_pin_map = cnp_ddc_pin_map; 1608 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 1609 } else { 1610 /* Assuming direct map */ 1611 return vbt_pin; 1612 } 1613 1614 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0) 1615 return ddc_pin_map[vbt_pin]; 1616 1617 drm_dbg_kms(&dev_priv->drm, 1618 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 1619 vbt_pin); 1620 return 0; 1621 } 1622 1623 static enum port dvo_port_to_port(u8 dvo_port) 1624 { 1625 /* 1626 * Each DDI port can have more than one value on the "DVO Port" field, 1627 * so look for all the possible values for each port. 1628 */ 1629 static const int dvo_ports[][3] = { 1630 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1}, 1631 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1}, 1632 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1}, 1633 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1}, 1634 [PORT_E] = { DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE}, 1635 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1}, 1636 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1}, 1637 }; 1638 enum port port; 1639 int i; 1640 1641 for (port = PORT_A; port < ARRAY_SIZE(dvo_ports); port++) { 1642 for (i = 0; i < ARRAY_SIZE(dvo_ports[port]); i++) { 1643 if (dvo_ports[port][i] == -1) 1644 break; 1645 1646 if (dvo_port == dvo_ports[port][i]) 1647 return port; 1648 } 1649 } 1650 1651 return PORT_NONE; 1652 } 1653 1654 static void parse_ddi_port(struct drm_i915_private *dev_priv, 1655 struct display_device_data *devdata, 1656 u8 bdb_version) 1657 { 1658 const struct child_device_config *child = &devdata->child; 1659 struct ddi_vbt_port_info *info; 1660 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; 1661 enum port port; 1662 1663 port = dvo_port_to_port(child->dvo_port); 1664 if (port == PORT_NONE) 1665 return; 1666 1667 info = &dev_priv->vbt.ddi_port_info[port]; 1668 1669 if (info->child) { 1670 drm_dbg_kms(&dev_priv->drm, 1671 "More than one child device for port %c in VBT, using the first.\n", 1672 port_name(port)); 1673 return; 1674 } 1675 1676 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 1677 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 1678 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT; 1679 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 1680 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); 1681 1682 if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) { 1683 drm_dbg_kms(&dev_priv->drm, 1684 "VBT claims port A supports DVI%s, ignoring\n", 1685 is_hdmi ? "/HDMI" : ""); 1686 is_dvi = false; 1687 is_hdmi = false; 1688 } 1689 1690 info->supports_dvi = is_dvi; 1691 info->supports_hdmi = is_hdmi; 1692 info->supports_dp = is_dp; 1693 info->supports_edp = is_edp; 1694 1695 if (bdb_version >= 195) 1696 info->supports_typec_usb = child->dp_usb_type_c; 1697 1698 if (bdb_version >= 209) 1699 info->supports_tbt = child->tbt; 1700 1701 drm_dbg_kms(&dev_priv->drm, 1702 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 1703 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, 1704 HAS_LSPCON(dev_priv) && child->lspcon, 1705 info->supports_typec_usb, info->supports_tbt, 1706 devdata->dsc != NULL); 1707 1708 if (is_dvi) { 1709 u8 ddc_pin; 1710 1711 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin); 1712 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) { 1713 info->alternate_ddc_pin = ddc_pin; 1714 sanitize_ddc_pin(dev_priv, port); 1715 } else { 1716 drm_dbg_kms(&dev_priv->drm, 1717 "Port %c has invalid DDC pin %d, " 1718 "sticking to defaults\n", 1719 port_name(port), ddc_pin); 1720 } 1721 } 1722 1723 if (is_dp) { 1724 info->alternate_aux_channel = child->aux_channel; 1725 1726 sanitize_aux_ch(dev_priv, port); 1727 } 1728 1729 if (bdb_version >= 158) { 1730 /* The VBT HDMI level shift values match the table we have. */ 1731 u8 hdmi_level_shift = child->hdmi_level_shifter_value; 1732 drm_dbg_kms(&dev_priv->drm, 1733 "VBT HDMI level shift for port %c: %d\n", 1734 port_name(port), 1735 hdmi_level_shift); 1736 info->hdmi_level_shift = hdmi_level_shift; 1737 info->hdmi_level_shift_set = true; 1738 } 1739 1740 if (bdb_version >= 204) { 1741 int max_tmds_clock; 1742 1743 switch (child->hdmi_max_data_rate) { 1744 default: 1745 MISSING_CASE(child->hdmi_max_data_rate); 1746 /* fall through */ 1747 case HDMI_MAX_DATA_RATE_PLATFORM: 1748 max_tmds_clock = 0; 1749 break; 1750 case HDMI_MAX_DATA_RATE_297: 1751 max_tmds_clock = 297000; 1752 break; 1753 case HDMI_MAX_DATA_RATE_165: 1754 max_tmds_clock = 165000; 1755 break; 1756 } 1757 1758 if (max_tmds_clock) 1759 drm_dbg_kms(&dev_priv->drm, 1760 "VBT HDMI max TMDS clock for port %c: %d kHz\n", 1761 port_name(port), max_tmds_clock); 1762 info->max_tmds_clock = max_tmds_clock; 1763 } 1764 1765 /* Parse the I_boost config for SKL and above */ 1766 if (bdb_version >= 196 && child->iboost) { 1767 info->dp_boost_level = translate_iboost(child->dp_iboost_level); 1768 drm_dbg_kms(&dev_priv->drm, 1769 "VBT (e)DP boost level for port %c: %d\n", 1770 port_name(port), info->dp_boost_level); 1771 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level); 1772 drm_dbg_kms(&dev_priv->drm, 1773 "VBT HDMI boost level for port %c: %d\n", 1774 port_name(port), info->hdmi_boost_level); 1775 } 1776 1777 /* DP max link rate for CNL+ */ 1778 if (bdb_version >= 216) { 1779 switch (child->dp_max_link_rate) { 1780 default: 1781 case VBT_DP_MAX_LINK_RATE_HBR3: 1782 info->dp_max_link_rate = 810000; 1783 break; 1784 case VBT_DP_MAX_LINK_RATE_HBR2: 1785 info->dp_max_link_rate = 540000; 1786 break; 1787 case VBT_DP_MAX_LINK_RATE_HBR: 1788 info->dp_max_link_rate = 270000; 1789 break; 1790 case VBT_DP_MAX_LINK_RATE_LBR: 1791 info->dp_max_link_rate = 162000; 1792 break; 1793 } 1794 drm_dbg_kms(&dev_priv->drm, 1795 "VBT DP max link rate for port %c: %d\n", 1796 port_name(port), info->dp_max_link_rate); 1797 } 1798 1799 info->child = child; 1800 } 1801 1802 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version) 1803 { 1804 struct display_device_data *devdata; 1805 1806 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv)) 1807 return; 1808 1809 if (bdb_version < 155) 1810 return; 1811 1812 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) 1813 parse_ddi_port(dev_priv, devdata, bdb_version); 1814 } 1815 1816 static void 1817 parse_general_definitions(struct drm_i915_private *dev_priv, 1818 const struct bdb_header *bdb) 1819 { 1820 const struct bdb_general_definitions *defs; 1821 struct display_device_data *devdata; 1822 const struct child_device_config *child; 1823 int i, child_device_num; 1824 u8 expected_size; 1825 u16 block_size; 1826 int bus_pin; 1827 1828 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); 1829 if (!defs) { 1830 drm_dbg_kms(&dev_priv->drm, 1831 "No general definition block is found, no devices defined.\n"); 1832 return; 1833 } 1834 1835 block_size = get_blocksize(defs); 1836 if (block_size < sizeof(*defs)) { 1837 drm_dbg_kms(&dev_priv->drm, 1838 "General definitions block too small (%u)\n", 1839 block_size); 1840 return; 1841 } 1842 1843 bus_pin = defs->crt_ddc_gmbus_pin; 1844 drm_dbg_kms(&dev_priv->drm, "crt_ddc_bus_pin: %d\n", bus_pin); 1845 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin)) 1846 dev_priv->vbt.crt_ddc_pin = bus_pin; 1847 1848 if (bdb->version < 106) { 1849 expected_size = 22; 1850 } else if (bdb->version < 111) { 1851 expected_size = 27; 1852 } else if (bdb->version < 195) { 1853 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 1854 } else if (bdb->version == 195) { 1855 expected_size = 37; 1856 } else if (bdb->version <= 215) { 1857 expected_size = 38; 1858 } else if (bdb->version <= 229) { 1859 expected_size = 39; 1860 } else { 1861 expected_size = sizeof(*child); 1862 BUILD_BUG_ON(sizeof(*child) < 39); 1863 drm_dbg(&dev_priv->drm, 1864 "Expected child device config size for VBT version %u not known; assuming %u\n", 1865 bdb->version, expected_size); 1866 } 1867 1868 /* Flag an error for unexpected size, but continue anyway. */ 1869 if (defs->child_dev_size != expected_size) 1870 drm_err(&dev_priv->drm, 1871 "Unexpected child device config size %u (expected %u for VBT version %u)\n", 1872 defs->child_dev_size, expected_size, bdb->version); 1873 1874 /* The legacy sized child device config is the minimum we need. */ 1875 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 1876 drm_dbg_kms(&dev_priv->drm, 1877 "Child device config size %u is too small.\n", 1878 defs->child_dev_size); 1879 return; 1880 } 1881 1882 /* get the number of child device */ 1883 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 1884 1885 for (i = 0; i < child_device_num; i++) { 1886 child = child_device_ptr(defs, i); 1887 if (!child->device_type) 1888 continue; 1889 1890 drm_dbg_kms(&dev_priv->drm, 1891 "Found VBT child device with type 0x%x\n", 1892 child->device_type); 1893 1894 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 1895 if (!devdata) 1896 break; 1897 1898 /* 1899 * Copy as much as we know (sizeof) and is available 1900 * (child_dev_size) of the child device config. Accessing the 1901 * data must depend on VBT version. 1902 */ 1903 memcpy(&devdata->child, child, 1904 min_t(size_t, defs->child_dev_size, sizeof(*child))); 1905 1906 list_add_tail(&devdata->node, &dev_priv->vbt.display_devices); 1907 } 1908 1909 if (list_empty(&dev_priv->vbt.display_devices)) 1910 drm_dbg_kms(&dev_priv->drm, 1911 "no child dev is parsed from VBT\n"); 1912 } 1913 1914 /* Common defaults which may be overridden by VBT. */ 1915 static void 1916 init_vbt_defaults(struct drm_i915_private *dev_priv) 1917 { 1918 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 1919 1920 /* Default to having backlight */ 1921 dev_priv->vbt.backlight.present = true; 1922 1923 /* LFP panel data */ 1924 dev_priv->vbt.lvds_dither = 1; 1925 1926 /* SDVO panel data */ 1927 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 1928 1929 /* general features */ 1930 dev_priv->vbt.int_tv_support = 1; 1931 dev_priv->vbt.int_crt_support = 1; 1932 1933 /* driver features */ 1934 dev_priv->vbt.int_lvds_support = 1; 1935 1936 /* Default to using SSC */ 1937 dev_priv->vbt.lvds_use_ssc = 1; 1938 /* 1939 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 1940 * clock for LVDS. 1941 */ 1942 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv, 1943 !HAS_PCH_SPLIT(dev_priv)); 1944 drm_dbg_kms(&dev_priv->drm, "Set default to SSC at %d kHz\n", 1945 dev_priv->vbt.lvds_ssc_freq); 1946 } 1947 1948 /* Defaults to initialize only if there is no VBT. */ 1949 static void 1950 init_vbt_missing_defaults(struct drm_i915_private *dev_priv) 1951 { 1952 enum port port; 1953 1954 for_each_port(port) { 1955 struct ddi_vbt_port_info *info = 1956 &dev_priv->vbt.ddi_port_info[port]; 1957 enum phy phy = intel_port_to_phy(dev_priv, port); 1958 1959 /* 1960 * VBT has the TypeC mode (native,TBT/USB) and we don't want 1961 * to detect it. 1962 */ 1963 if (intel_phy_is_tc(dev_priv, phy)) 1964 continue; 1965 1966 info->supports_dvi = (port != PORT_A && port != PORT_E); 1967 info->supports_hdmi = info->supports_dvi; 1968 info->supports_dp = (port != PORT_E); 1969 info->supports_edp = (port == PORT_A); 1970 } 1971 } 1972 1973 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 1974 { 1975 const void *_vbt = vbt; 1976 1977 return _vbt + vbt->bdb_offset; 1978 } 1979 1980 /** 1981 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 1982 * @buf: pointer to a buffer to validate 1983 * @size: size of the buffer 1984 * 1985 * Returns true on valid VBT. 1986 */ 1987 bool intel_bios_is_valid_vbt(const void *buf, size_t size) 1988 { 1989 const struct vbt_header *vbt = buf; 1990 const struct bdb_header *bdb; 1991 1992 if (!vbt) 1993 return false; 1994 1995 if (sizeof(struct vbt_header) > size) { 1996 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 1997 return false; 1998 } 1999 2000 if (memcmp(vbt->signature, "$VBT", 4)) { 2001 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 2002 return false; 2003 } 2004 2005 if (vbt->vbt_size > size) { 2006 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 2007 return false; 2008 } 2009 2010 size = vbt->vbt_size; 2011 2012 if (range_overflows_t(size_t, 2013 vbt->bdb_offset, 2014 sizeof(struct bdb_header), 2015 size)) { 2016 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 2017 return false; 2018 } 2019 2020 bdb = get_bdb_header(vbt); 2021 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 2022 DRM_DEBUG_DRIVER("BDB incomplete\n"); 2023 return false; 2024 } 2025 2026 return vbt; 2027 } 2028 2029 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv) 2030 { 2031 struct pci_dev *pdev = dev_priv->drm.pdev; 2032 void __iomem *p = NULL, *oprom; 2033 struct vbt_header *vbt; 2034 u16 vbt_size; 2035 size_t i, size; 2036 2037 oprom = pci_map_rom(pdev, &size); 2038 if (!oprom) 2039 return NULL; 2040 2041 /* Scour memory looking for the VBT signature. */ 2042 for (i = 0; i + 4 < size; i += 4) { 2043 if (ioread32(oprom + i) != *((const u32 *)"$VBT")) 2044 continue; 2045 2046 p = oprom + i; 2047 size -= i; 2048 break; 2049 } 2050 2051 if (!p) 2052 goto err_unmap_oprom; 2053 2054 if (sizeof(struct vbt_header) > size) { 2055 drm_dbg(&dev_priv->drm, "VBT header incomplete\n"); 2056 goto err_unmap_oprom; 2057 } 2058 2059 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size)); 2060 if (vbt_size > size) { 2061 drm_dbg(&dev_priv->drm, 2062 "VBT incomplete (vbt_size overflows)\n"); 2063 goto err_unmap_oprom; 2064 } 2065 2066 /* The rest will be validated by intel_bios_is_valid_vbt() */ 2067 vbt = kmalloc(vbt_size, GFP_KERNEL); 2068 if (!vbt) 2069 goto err_unmap_oprom; 2070 2071 memcpy_fromio(vbt, p, vbt_size); 2072 2073 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2074 goto err_free_vbt; 2075 2076 pci_unmap_rom(pdev, oprom); 2077 2078 return vbt; 2079 2080 err_free_vbt: 2081 kfree(vbt); 2082 err_unmap_oprom: 2083 pci_unmap_rom(pdev, oprom); 2084 2085 return NULL; 2086 } 2087 2088 /** 2089 * intel_bios_init - find VBT and initialize settings from the BIOS 2090 * @dev_priv: i915 device instance 2091 * 2092 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 2093 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 2094 * initialize some defaults if the VBT is not present at all. 2095 */ 2096 void intel_bios_init(struct drm_i915_private *dev_priv) 2097 { 2098 const struct vbt_header *vbt = dev_priv->opregion.vbt; 2099 struct vbt_header *oprom_vbt = NULL; 2100 const struct bdb_header *bdb; 2101 2102 INIT_LIST_HEAD(&dev_priv->vbt.display_devices); 2103 2104 if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) { 2105 drm_dbg_kms(&dev_priv->drm, 2106 "Skipping VBT init due to disabled display.\n"); 2107 return; 2108 } 2109 2110 init_vbt_defaults(dev_priv); 2111 2112 /* If the OpRegion does not have VBT, look in PCI ROM. */ 2113 if (!vbt) { 2114 oprom_vbt = oprom_get_vbt(dev_priv); 2115 if (!oprom_vbt) 2116 goto out; 2117 2118 vbt = oprom_vbt; 2119 2120 drm_dbg_kms(&dev_priv->drm, "Found valid VBT in PCI ROM\n"); 2121 } 2122 2123 bdb = get_bdb_header(vbt); 2124 2125 drm_dbg_kms(&dev_priv->drm, 2126 "VBT signature \"%.*s\", BDB version %d\n", 2127 (int)sizeof(vbt->signature), vbt->signature, bdb->version); 2128 2129 /* Grab useful general definitions */ 2130 parse_general_features(dev_priv, bdb); 2131 parse_general_definitions(dev_priv, bdb); 2132 parse_panel_options(dev_priv, bdb); 2133 parse_panel_dtd(dev_priv, bdb); 2134 parse_lfp_backlight(dev_priv, bdb); 2135 parse_sdvo_panel_data(dev_priv, bdb); 2136 parse_driver_features(dev_priv, bdb); 2137 parse_power_conservation_features(dev_priv, bdb); 2138 parse_edp(dev_priv, bdb); 2139 parse_psr(dev_priv, bdb); 2140 parse_mipi_config(dev_priv, bdb); 2141 parse_mipi_sequence(dev_priv, bdb); 2142 2143 /* Depends on child device list */ 2144 parse_compression_parameters(dev_priv, bdb); 2145 2146 /* Further processing on pre-parsed data */ 2147 parse_sdvo_device_mapping(dev_priv, bdb->version); 2148 parse_ddi_ports(dev_priv, bdb->version); 2149 2150 out: 2151 if (!vbt) { 2152 drm_info(&dev_priv->drm, 2153 "Failed to find VBIOS tables (VBT)\n"); 2154 init_vbt_missing_defaults(dev_priv); 2155 } 2156 2157 kfree(oprom_vbt); 2158 } 2159 2160 /** 2161 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 2162 * @dev_priv: i915 device instance 2163 */ 2164 void intel_bios_driver_remove(struct drm_i915_private *dev_priv) 2165 { 2166 struct display_device_data *devdata, *n; 2167 2168 list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) { 2169 list_del(&devdata->node); 2170 kfree(devdata->dsc); 2171 kfree(devdata); 2172 } 2173 2174 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode); 2175 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 2176 kfree(dev_priv->vbt.lfp_lvds_vbt_mode); 2177 dev_priv->vbt.lfp_lvds_vbt_mode = NULL; 2178 kfree(dev_priv->vbt.dsi.data); 2179 dev_priv->vbt.dsi.data = NULL; 2180 kfree(dev_priv->vbt.dsi.pps); 2181 dev_priv->vbt.dsi.pps = NULL; 2182 kfree(dev_priv->vbt.dsi.config); 2183 dev_priv->vbt.dsi.config = NULL; 2184 kfree(dev_priv->vbt.dsi.deassert_seq); 2185 dev_priv->vbt.dsi.deassert_seq = NULL; 2186 } 2187 2188 /** 2189 * intel_bios_is_tv_present - is integrated TV present in VBT 2190 * @dev_priv: i915 device instance 2191 * 2192 * Return true if TV is present. If no child devices were parsed from VBT, 2193 * assume TV is present. 2194 */ 2195 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv) 2196 { 2197 const struct display_device_data *devdata; 2198 const struct child_device_config *child; 2199 2200 if (!dev_priv->vbt.int_tv_support) 2201 return false; 2202 2203 if (list_empty(&dev_priv->vbt.display_devices)) 2204 return true; 2205 2206 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2207 child = &devdata->child; 2208 2209 /* 2210 * If the device type is not TV, continue. 2211 */ 2212 switch (child->device_type) { 2213 case DEVICE_TYPE_INT_TV: 2214 case DEVICE_TYPE_TV: 2215 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 2216 break; 2217 default: 2218 continue; 2219 } 2220 /* Only when the addin_offset is non-zero, it is regarded 2221 * as present. 2222 */ 2223 if (child->addin_offset) 2224 return true; 2225 } 2226 2227 return false; 2228 } 2229 2230 /** 2231 * intel_bios_is_lvds_present - is LVDS present in VBT 2232 * @dev_priv: i915 device instance 2233 * @i2c_pin: i2c pin for LVDS if present 2234 * 2235 * Return true if LVDS is present. If no child devices were parsed from VBT, 2236 * assume LVDS is present. 2237 */ 2238 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin) 2239 { 2240 const struct display_device_data *devdata; 2241 const struct child_device_config *child; 2242 2243 if (list_empty(&dev_priv->vbt.display_devices)) 2244 return true; 2245 2246 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2247 child = &devdata->child; 2248 2249 /* If the device type is not LFP, continue. 2250 * We have to check both the new identifiers as well as the 2251 * old for compatibility with some BIOSes. 2252 */ 2253 if (child->device_type != DEVICE_TYPE_INT_LFP && 2254 child->device_type != DEVICE_TYPE_LFP) 2255 continue; 2256 2257 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin)) 2258 *i2c_pin = child->i2c_pin; 2259 2260 /* However, we cannot trust the BIOS writers to populate 2261 * the VBT correctly. Since LVDS requires additional 2262 * information from AIM blocks, a non-zero addin offset is 2263 * a good indicator that the LVDS is actually present. 2264 */ 2265 if (child->addin_offset) 2266 return true; 2267 2268 /* But even then some BIOS writers perform some black magic 2269 * and instantiate the device without reference to any 2270 * additional data. Trust that if the VBT was written into 2271 * the OpRegion then they have validated the LVDS's existence. 2272 */ 2273 if (dev_priv->opregion.vbt) 2274 return true; 2275 } 2276 2277 return false; 2278 } 2279 2280 /** 2281 * intel_bios_is_port_present - is the specified digital port present 2282 * @dev_priv: i915 device instance 2283 * @port: port to check 2284 * 2285 * Return true if the device in %port is present. 2286 */ 2287 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port) 2288 { 2289 const struct display_device_data *devdata; 2290 const struct child_device_config *child; 2291 static const struct { 2292 u16 dp, hdmi; 2293 } port_mapping[] = { 2294 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2295 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2296 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2297 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2298 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2299 }; 2300 2301 if (HAS_DDI(dev_priv)) { 2302 const struct ddi_vbt_port_info *port_info = 2303 &dev_priv->vbt.ddi_port_info[port]; 2304 2305 return port_info->child; 2306 } 2307 2308 /* FIXME maybe deal with port A as well? */ 2309 if (drm_WARN_ON(&dev_priv->drm, 2310 port == PORT_A) || port >= ARRAY_SIZE(port_mapping)) 2311 return false; 2312 2313 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2314 child = &devdata->child; 2315 2316 if ((child->dvo_port == port_mapping[port].dp || 2317 child->dvo_port == port_mapping[port].hdmi) && 2318 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING | 2319 DEVICE_TYPE_DISPLAYPORT_OUTPUT))) 2320 return true; 2321 } 2322 2323 return false; 2324 } 2325 2326 /** 2327 * intel_bios_is_port_edp - is the device in given port eDP 2328 * @dev_priv: i915 device instance 2329 * @port: port to check 2330 * 2331 * Return true if the device in %port is eDP. 2332 */ 2333 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port) 2334 { 2335 const struct display_device_data *devdata; 2336 const struct child_device_config *child; 2337 static const short port_mapping[] = { 2338 [PORT_B] = DVO_PORT_DPB, 2339 [PORT_C] = DVO_PORT_DPC, 2340 [PORT_D] = DVO_PORT_DPD, 2341 [PORT_E] = DVO_PORT_DPE, 2342 [PORT_F] = DVO_PORT_DPF, 2343 }; 2344 2345 if (HAS_DDI(dev_priv)) 2346 return dev_priv->vbt.ddi_port_info[port].supports_edp; 2347 2348 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2349 child = &devdata->child; 2350 2351 if (child->dvo_port == port_mapping[port] && 2352 (child->device_type & DEVICE_TYPE_eDP_BITS) == 2353 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS)) 2354 return true; 2355 } 2356 2357 return false; 2358 } 2359 2360 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child, 2361 enum port port) 2362 { 2363 static const struct { 2364 u16 dp, hdmi; 2365 } port_mapping[] = { 2366 /* 2367 * Buggy VBTs may declare DP ports as having 2368 * HDMI type dvo_port :( So let's check both. 2369 */ 2370 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2371 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2372 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2373 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2374 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2375 }; 2376 2377 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping)) 2378 return false; 2379 2380 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) != 2381 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS)) 2382 return false; 2383 2384 if (child->dvo_port == port_mapping[port].dp) 2385 return true; 2386 2387 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 2388 if (child->dvo_port == port_mapping[port].hdmi && 2389 child->aux_channel != 0) 2390 return true; 2391 2392 return false; 2393 } 2394 2395 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, 2396 enum port port) 2397 { 2398 const struct display_device_data *devdata; 2399 2400 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2401 if (child_dev_is_dp_dual_mode(&devdata->child, port)) 2402 return true; 2403 } 2404 2405 return false; 2406 } 2407 2408 /** 2409 * intel_bios_is_dsi_present - is DSI present in VBT 2410 * @dev_priv: i915 device instance 2411 * @port: port for DSI if present 2412 * 2413 * Return true if DSI is present, and return the port in %port. 2414 */ 2415 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, 2416 enum port *port) 2417 { 2418 const struct display_device_data *devdata; 2419 const struct child_device_config *child; 2420 u8 dvo_port; 2421 2422 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2423 child = &devdata->child; 2424 2425 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2426 continue; 2427 2428 dvo_port = child->dvo_port; 2429 2430 if (dvo_port == DVO_PORT_MIPIA || 2431 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) || 2432 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) { 2433 if (port) 2434 *port = dvo_port - DVO_PORT_MIPIA; 2435 return true; 2436 } else if (dvo_port == DVO_PORT_MIPIB || 2437 dvo_port == DVO_PORT_MIPIC || 2438 dvo_port == DVO_PORT_MIPID) { 2439 drm_dbg_kms(&dev_priv->drm, 2440 "VBT has unsupported DSI port %c\n", 2441 port_name(dvo_port - DVO_PORT_MIPIA)); 2442 } 2443 } 2444 2445 return false; 2446 } 2447 2448 static void fill_dsc(struct intel_crtc_state *crtc_state, 2449 struct dsc_compression_parameters_entry *dsc, 2450 int dsc_max_bpc) 2451 { 2452 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 2453 int bpc = 8; 2454 2455 vdsc_cfg->dsc_version_major = dsc->version_major; 2456 vdsc_cfg->dsc_version_minor = dsc->version_minor; 2457 2458 if (dsc->support_12bpc && dsc_max_bpc >= 12) 2459 bpc = 12; 2460 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 2461 bpc = 10; 2462 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 2463 bpc = 8; 2464 else 2465 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n", 2466 dsc_max_bpc); 2467 2468 crtc_state->pipe_bpp = bpc * 3; 2469 2470 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp, 2471 VBT_DSC_MAX_BPP(dsc->max_bpp)); 2472 2473 /* 2474 * FIXME: This is ugly, and slice count should take DSC engine 2475 * throughput etc. into account. 2476 * 2477 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 2478 */ 2479 if (dsc->slices_per_line & BIT(2)) { 2480 crtc_state->dsc.slice_count = 4; 2481 } else if (dsc->slices_per_line & BIT(1)) { 2482 crtc_state->dsc.slice_count = 2; 2483 } else { 2484 /* FIXME */ 2485 if (!(dsc->slices_per_line & BIT(0))) 2486 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n"); 2487 2488 crtc_state->dsc.slice_count = 1; 2489 } 2490 2491 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 2492 crtc_state->dsc.slice_count != 0) 2493 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n", 2494 crtc_state->hw.adjusted_mode.crtc_hdisplay, 2495 crtc_state->dsc.slice_count); 2496 2497 /* 2498 * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the 2499 * implementation specific physical rate buffer size. Currently we use 2500 * the required rate buffer model size calculated in 2501 * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E. 2502 * 2503 * The VBT rc_buffer_block_size and rc_buffer_size definitions 2504 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC 2505 * implementation should also use the DPCD (or perhaps VBT for eDP) 2506 * provided value for the buffer size. 2507 */ 2508 2509 /* FIXME: DSI spec says bpc + 1 for this one */ 2510 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 2511 2512 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 2513 2514 vdsc_cfg->slice_height = dsc->slice_height; 2515 } 2516 2517 /* FIXME: initially DSI specific */ 2518 bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 2519 struct intel_crtc_state *crtc_state, 2520 int dsc_max_bpc) 2521 { 2522 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2523 const struct display_device_data *devdata; 2524 const struct child_device_config *child; 2525 2526 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2527 child = &devdata->child; 2528 2529 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2530 continue; 2531 2532 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) { 2533 if (!devdata->dsc) 2534 return false; 2535 2536 if (crtc_state) 2537 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 2538 2539 return true; 2540 } 2541 } 2542 2543 return false; 2544 } 2545 2546 /** 2547 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port 2548 * @i915: i915 device instance 2549 * @port: port to check 2550 * 2551 * Return true if HPD should be inverted for %port. 2552 */ 2553 bool 2554 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, 2555 enum port port) 2556 { 2557 const struct child_device_config *child = 2558 i915->vbt.ddi_port_info[port].child; 2559 2560 if (drm_WARN_ON_ONCE(&i915->drm, !IS_GEN9_LP(i915))) 2561 return false; 2562 2563 return child && child->hpd_invert; 2564 } 2565 2566 /** 2567 * intel_bios_is_lspcon_present - if LSPCON is attached on %port 2568 * @i915: i915 device instance 2569 * @port: port to check 2570 * 2571 * Return true if LSPCON is present on this port 2572 */ 2573 bool 2574 intel_bios_is_lspcon_present(const struct drm_i915_private *i915, 2575 enum port port) 2576 { 2577 const struct child_device_config *child = 2578 i915->vbt.ddi_port_info[port].child; 2579 2580 return HAS_LSPCON(i915) && child && child->lspcon; 2581 } 2582 2583 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, 2584 enum port port) 2585 { 2586 const struct ddi_vbt_port_info *info = 2587 &dev_priv->vbt.ddi_port_info[port]; 2588 enum aux_ch aux_ch; 2589 2590 if (!info->alternate_aux_channel) { 2591 aux_ch = (enum aux_ch)port; 2592 2593 drm_dbg_kms(&dev_priv->drm, 2594 "using AUX %c for port %c (platform default)\n", 2595 aux_ch_name(aux_ch), port_name(port)); 2596 return aux_ch; 2597 } 2598 2599 switch (info->alternate_aux_channel) { 2600 case DP_AUX_A: 2601 aux_ch = AUX_CH_A; 2602 break; 2603 case DP_AUX_B: 2604 aux_ch = AUX_CH_B; 2605 break; 2606 case DP_AUX_C: 2607 aux_ch = AUX_CH_C; 2608 break; 2609 case DP_AUX_D: 2610 aux_ch = AUX_CH_D; 2611 break; 2612 case DP_AUX_E: 2613 aux_ch = AUX_CH_E; 2614 break; 2615 case DP_AUX_F: 2616 aux_ch = AUX_CH_F; 2617 break; 2618 case DP_AUX_G: 2619 aux_ch = AUX_CH_G; 2620 break; 2621 default: 2622 MISSING_CASE(info->alternate_aux_channel); 2623 aux_ch = AUX_CH_A; 2624 break; 2625 } 2626 2627 drm_dbg_kms(&dev_priv->drm, "using AUX %c for port %c (VBT)\n", 2628 aux_ch_name(aux_ch), port_name(port)); 2629 2630 return aux_ch; 2631 } 2632 2633 int intel_bios_max_tmds_clock(struct intel_encoder *encoder) 2634 { 2635 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2636 2637 return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock; 2638 } 2639 2640 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder) 2641 { 2642 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2643 const struct ddi_vbt_port_info *info = 2644 &i915->vbt.ddi_port_info[encoder->port]; 2645 2646 return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1; 2647 } 2648 2649 int intel_bios_dp_boost_level(struct intel_encoder *encoder) 2650 { 2651 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2652 2653 return i915->vbt.ddi_port_info[encoder->port].dp_boost_level; 2654 } 2655 2656 int intel_bios_hdmi_boost_level(struct intel_encoder *encoder) 2657 { 2658 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2659 2660 return i915->vbt.ddi_port_info[encoder->port].hdmi_boost_level; 2661 } 2662 2663 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder) 2664 { 2665 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2666 2667 return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate; 2668 } 2669 2670 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder) 2671 { 2672 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2673 2674 return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin; 2675 } 2676 2677 bool intel_bios_port_supports_dvi(struct drm_i915_private *i915, enum port port) 2678 { 2679 return i915->vbt.ddi_port_info[port].supports_dvi; 2680 } 2681 2682 bool intel_bios_port_supports_hdmi(struct drm_i915_private *i915, enum port port) 2683 { 2684 return i915->vbt.ddi_port_info[port].supports_hdmi; 2685 } 2686 2687 bool intel_bios_port_supports_dp(struct drm_i915_private *i915, enum port port) 2688 { 2689 return i915->vbt.ddi_port_info[port].supports_dp; 2690 } 2691 2692 bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915, 2693 enum port port) 2694 { 2695 return i915->vbt.ddi_port_info[port].supports_typec_usb; 2696 } 2697 2698 bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port) 2699 { 2700 return i915->vbt.ddi_port_info[port].supports_tbt; 2701 } 2702