1# SPDX-License-Identifier: GPL-2.0 2# 3# Makefile for the drm device driver. This driver provides support for the 4# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. 5 6# Add a set of useful warning flags and enable -Werror for CI to prevent 7# trivial mistakes from creeping in. We have to do this piecemeal as we reject 8# any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we 9# need to filter out dubious warnings. Still it is our interest 10# to keep running locally with W=1 C=1 until we are completely clean. 11# 12# Note the danger in using -Wall -Wextra is that when CI updates gcc we 13# will most likely get a sudden build breakage... Hopefully we will fix 14# new warnings before CI updates! 15subdir-ccflags-y := -Wall -Wextra 16subdir-ccflags-y += -Wno-unused-parameter 17subdir-ccflags-y += -Wno-type-limits 18subdir-ccflags-y += -Wno-missing-field-initializers 19subdir-ccflags-y += -Wno-sign-compare 20subdir-ccflags-y += $(call cc-disable-warning, unused-but-set-variable) 21subdir-ccflags-y += $(call cc-disable-warning, frame-address) 22subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror 23 24# Fine grained warnings disable 25CFLAGS_i915_pci.o = $(call cc-disable-warning, override-init) 26CFLAGS_display/intel_fbdev.o = $(call cc-disable-warning, override-init) 27 28subdir-ccflags-y += -I$(srctree)/$(src) 29 30# Please keep these build lists sorted! 31 32# core driver code 33i915-y += i915_drv.o \ 34 i915_config.o \ 35 i915_irq.o \ 36 i915_getparam.o \ 37 i915_mitigations.o \ 38 i915_module.o \ 39 i915_params.o \ 40 i915_pci.o \ 41 i915_scatterlist.o \ 42 i915_suspend.o \ 43 i915_switcheroo.o \ 44 i915_sysfs.o \ 45 i915_utils.o \ 46 intel_device_info.o \ 47 intel_dram.o \ 48 intel_memory_region.o \ 49 intel_pch.o \ 50 intel_pcode.o \ 51 intel_pm.o \ 52 intel_region_ttm.o \ 53 intel_runtime_pm.o \ 54 intel_sbi.o \ 55 intel_step.o \ 56 intel_uncore.o \ 57 intel_wakeref.o \ 58 vlv_sideband.o \ 59 vlv_suspend.o 60 61# core library code 62i915-y += \ 63 dma_resv_utils.o \ 64 i915_memcpy.o \ 65 i915_mm.o \ 66 i915_sw_fence.o \ 67 i915_sw_fence_work.o \ 68 i915_syncmap.o \ 69 i915_user_extensions.o 70 71i915-$(CONFIG_COMPAT) += i915_ioc32.o 72i915-$(CONFIG_DEBUG_FS) += \ 73 i915_debugfs.o \ 74 i915_debugfs_params.o \ 75 display/intel_display_debugfs.o \ 76 display/intel_pipe_crc.o 77i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o 78 79# "Graphics Technology" (aka we talk to the gpu) 80gt-y += \ 81 gt/gen2_engine_cs.o \ 82 gt/gen6_engine_cs.o \ 83 gt/gen6_ppgtt.o \ 84 gt/gen7_renderclear.o \ 85 gt/gen8_engine_cs.o \ 86 gt/gen8_ppgtt.o \ 87 gt/intel_breadcrumbs.o \ 88 gt/intel_context.o \ 89 gt/intel_context_sseu.o \ 90 gt/intel_engine_cs.o \ 91 gt/intel_engine_heartbeat.o \ 92 gt/intel_engine_pm.o \ 93 gt/intel_engine_user.o \ 94 gt/intel_execlists_submission.o \ 95 gt/intel_ggtt.o \ 96 gt/intel_ggtt_fencing.o \ 97 gt/intel_gt.o \ 98 gt/intel_gt_buffer_pool.o \ 99 gt/intel_gt_clock_utils.o \ 100 gt/intel_gt_debugfs.o \ 101 gt/intel_gt_engines_debugfs.o \ 102 gt/intel_gt_irq.o \ 103 gt/intel_gt_pm.o \ 104 gt/intel_gt_pm_debugfs.o \ 105 gt/intel_gt_pm_irq.o \ 106 gt/intel_gt_requests.o \ 107 gt/intel_gtt.o \ 108 gt/intel_llc.o \ 109 gt/intel_lrc.o \ 110 gt/intel_migrate.o \ 111 gt/intel_mocs.o \ 112 gt/intel_ppgtt.o \ 113 gt/intel_rc6.o \ 114 gt/intel_region_lmem.o \ 115 gt/intel_renderstate.o \ 116 gt/intel_reset.o \ 117 gt/intel_ring.o \ 118 gt/intel_ring_submission.o \ 119 gt/intel_rps.o \ 120 gt/intel_sseu.o \ 121 gt/intel_sseu_debugfs.o \ 122 gt/intel_timeline.o \ 123 gt/intel_workarounds.o \ 124 gt/shmem_utils.o \ 125 gt/sysfs_engines.o 126# autogenerated null render state 127gt-y += \ 128 gt/gen6_renderstate.o \ 129 gt/gen7_renderstate.o \ 130 gt/gen8_renderstate.o \ 131 gt/gen9_renderstate.o 132i915-y += $(gt-y) 133 134# GEM (Graphics Execution Management) code 135gem-y += \ 136 gem/i915_gem_busy.o \ 137 gem/i915_gem_clflush.o \ 138 gem/i915_gem_context.o \ 139 gem/i915_gem_create.o \ 140 gem/i915_gem_dmabuf.o \ 141 gem/i915_gem_domain.o \ 142 gem/i915_gem_execbuffer.o \ 143 gem/i915_gem_internal.o \ 144 gem/i915_gem_object.o \ 145 gem/i915_gem_lmem.o \ 146 gem/i915_gem_mman.o \ 147 gem/i915_gem_pages.o \ 148 gem/i915_gem_phys.o \ 149 gem/i915_gem_pm.o \ 150 gem/i915_gem_region.o \ 151 gem/i915_gem_shmem.o \ 152 gem/i915_gem_shrinker.o \ 153 gem/i915_gem_stolen.o \ 154 gem/i915_gem_throttle.o \ 155 gem/i915_gem_tiling.o \ 156 gem/i915_gem_ttm.o \ 157 gem/i915_gem_ttm_pm.o \ 158 gem/i915_gem_userptr.o \ 159 gem/i915_gem_wait.o \ 160 gem/i915_gemfs.o 161i915-y += \ 162 $(gem-y) \ 163 i915_active.o \ 164 i915_buddy.o \ 165 i915_cmd_parser.o \ 166 i915_gem_evict.o \ 167 i915_gem_gtt.o \ 168 i915_gem_ww.o \ 169 i915_gem.o \ 170 i915_query.o \ 171 i915_request.o \ 172 i915_scheduler.o \ 173 i915_trace_points.o \ 174 i915_ttm_buddy_manager.o \ 175 i915_vma.o \ 176 intel_wopcm.o 177 178# general-purpose microcontroller (GuC) support 179i915-y += gt/uc/intel_uc.o \ 180 gt/uc/intel_uc_debugfs.o \ 181 gt/uc/intel_uc_fw.o \ 182 gt/uc/intel_guc.o \ 183 gt/uc/intel_guc_ads.o \ 184 gt/uc/intel_guc_ct.o \ 185 gt/uc/intel_guc_debugfs.o \ 186 gt/uc/intel_guc_fw.o \ 187 gt/uc/intel_guc_log.o \ 188 gt/uc/intel_guc_log_debugfs.o \ 189 gt/uc/intel_guc_rc.o \ 190 gt/uc/intel_guc_slpc.o \ 191 gt/uc/intel_guc_submission.o \ 192 gt/uc/intel_huc.o \ 193 gt/uc/intel_huc_debugfs.o \ 194 gt/uc/intel_huc_fw.o 195 196# modesetting core code 197i915-y += \ 198 display/intel_atomic.o \ 199 display/intel_atomic_plane.o \ 200 display/intel_audio.o \ 201 display/intel_bios.o \ 202 display/intel_bw.o \ 203 display/intel_cdclk.o \ 204 display/intel_color.o \ 205 display/intel_combo_phy.o \ 206 display/intel_connector.o \ 207 display/intel_crtc.o \ 208 display/intel_cursor.o \ 209 display/intel_display.o \ 210 display/intel_display_power.o \ 211 display/intel_dmc.o \ 212 display/intel_dpio_phy.o \ 213 display/intel_dpll.o \ 214 display/intel_dpll_mgr.o \ 215 display/intel_dpt.o \ 216 display/intel_drrs.o \ 217 display/intel_dsb.o \ 218 display/intel_fb.o \ 219 display/intel_fb_pin.o \ 220 display/intel_fbc.o \ 221 display/intel_fdi.o \ 222 display/intel_fifo_underrun.o \ 223 display/intel_frontbuffer.o \ 224 display/intel_global_state.o \ 225 display/intel_hdcp.o \ 226 display/intel_hotplug.o \ 227 display/intel_lpe_audio.o \ 228 display/intel_overlay.o \ 229 display/intel_plane_initial.o \ 230 display/intel_psr.o \ 231 display/intel_quirks.o \ 232 display/intel_sprite.o \ 233 display/intel_tc.o \ 234 display/intel_vga.o \ 235 display/i9xx_plane.o \ 236 display/skl_scaler.o \ 237 display/skl_universal_plane.o 238i915-$(CONFIG_ACPI) += \ 239 display/intel_acpi.o \ 240 display/intel_opregion.o 241i915-$(CONFIG_DRM_FBDEV_EMULATION) += \ 242 display/intel_fbdev.o 243 244# modesetting output/encoder code 245i915-y += \ 246 display/dvo_ch7017.o \ 247 display/dvo_ch7xxx.o \ 248 display/dvo_ivch.o \ 249 display/dvo_ns2501.o \ 250 display/dvo_sil164.o \ 251 display/dvo_tfp410.o \ 252 display/g4x_dp.o \ 253 display/g4x_hdmi.o \ 254 display/icl_dsi.o \ 255 display/intel_backlight.o \ 256 display/intel_crt.o \ 257 display/intel_ddi.o \ 258 display/intel_ddi_buf_trans.o \ 259 display/intel_dp.o \ 260 display/intel_dp_aux.o \ 261 display/intel_dp_aux_backlight.o \ 262 display/intel_dp_hdcp.o \ 263 display/intel_dp_link_training.o \ 264 display/intel_dp_mst.o \ 265 display/intel_dsi.o \ 266 display/intel_dsi_dcs_backlight.o \ 267 display/intel_dsi_vbt.o \ 268 display/intel_dvo.o \ 269 display/intel_gmbus.o \ 270 display/intel_hdmi.o \ 271 display/intel_lspcon.o \ 272 display/intel_lvds.o \ 273 display/intel_panel.o \ 274 display/intel_pps.o \ 275 display/intel_qp_tables.o \ 276 display/intel_sdvo.o \ 277 display/intel_snps_phy.o \ 278 display/intel_tv.o \ 279 display/intel_vdsc.o \ 280 display/intel_vrr.o \ 281 display/vlv_dsi.o \ 282 display/vlv_dsi_pll.o 283 284i915-y += i915_perf.o 285 286# Protected execution platform (PXP) support 287i915-$(CONFIG_DRM_I915_PXP) += \ 288 pxp/intel_pxp.o \ 289 pxp/intel_pxp_cmd.o \ 290 pxp/intel_pxp_debugfs.o \ 291 pxp/intel_pxp_irq.o \ 292 pxp/intel_pxp_pm.o \ 293 pxp/intel_pxp_session.o \ 294 pxp/intel_pxp_tee.o 295 296# Post-mortem debug and GPU hang state capture 297i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o 298i915-$(CONFIG_DRM_I915_SELFTEST) += \ 299 gem/selftests/i915_gem_client_blt.o \ 300 gem/selftests/igt_gem_utils.o \ 301 selftests/intel_scheduler_helpers.o \ 302 selftests/i915_random.o \ 303 selftests/i915_selftest.o \ 304 selftests/igt_atomic.o \ 305 selftests/igt_flush_test.o \ 306 selftests/igt_live_test.o \ 307 selftests/igt_mmap.o \ 308 selftests/igt_reset.o \ 309 selftests/igt_spinner.o \ 310 selftests/librapl.o 311 312# virtual gpu code 313i915-y += i915_vgpu.o 314 315ifeq ($(CONFIG_DRM_I915_GVT),y) 316i915-y += intel_gvt.o 317include $(src)/gvt/Makefile 318endif 319 320obj-$(CONFIG_DRM_I915) += i915.o 321obj-$(CONFIG_DRM_I915_GVT_KVMGT) += gvt/kvmgt.o 322 323# header test 324 325# exclude some broken headers from the test coverage 326no-header-test := \ 327 display/intel_vbt_defs.h 328 329always-$(CONFIG_DRM_I915_WERROR) += \ 330 $(patsubst %.h,%.hdrtest, $(filter-out $(no-header-test), \ 331 $(shell cd $(srctree)/$(src) && find * -name '*.h'))) 332 333quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@) 334 cmd_hdrtest = $(CC) $(filter-out $(CFLAGS_GCOV), $(c_flags)) -S -o /dev/null -x c /dev/null -include $<; touch $@ 335 336$(obj)/%.hdrtest: $(src)/%.h FORCE 337 $(call if_changed_dep,hdrtest) 338