1 /* Hisilicon Hibmc SoC drm driver 2 * 3 * Based on the bochs drm driver. 4 * 5 * Copyright (c) 2016 Huawei Limited. 6 * 7 * Author: 8 * Rongrong Zou <zourongrong@huawei.com> 9 * Rongrong Zou <zourongrong@gmail.com> 10 * Jianhua Li <lijianhua@huawei.com> 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 */ 18 19 #include <linux/console.h> 20 #include <linux/module.h> 21 22 #include <drm/drm_atomic_helper.h> 23 #include <drm/drm_crtc_helper.h> 24 25 #include "hibmc_drm_drv.h" 26 #include "hibmc_drm_regs.h" 27 28 static const struct file_operations hibmc_fops = { 29 .owner = THIS_MODULE, 30 .open = drm_open, 31 .release = drm_release, 32 .unlocked_ioctl = drm_ioctl, 33 .compat_ioctl = drm_compat_ioctl, 34 .mmap = hibmc_mmap, 35 .poll = drm_poll, 36 .read = drm_read, 37 .llseek = no_llseek, 38 }; 39 40 irqreturn_t hibmc_drm_interrupt(int irq, void *arg) 41 { 42 struct drm_device *dev = (struct drm_device *)arg; 43 struct hibmc_drm_private *priv = 44 (struct hibmc_drm_private *)dev->dev_private; 45 u32 status; 46 47 status = readl(priv->mmio + HIBMC_RAW_INTERRUPT); 48 49 if (status & HIBMC_RAW_INTERRUPT_VBLANK(1)) { 50 writel(HIBMC_RAW_INTERRUPT_VBLANK(1), 51 priv->mmio + HIBMC_RAW_INTERRUPT); 52 drm_handle_vblank(dev, 0); 53 } 54 55 return IRQ_HANDLED; 56 } 57 58 static struct drm_driver hibmc_driver = { 59 .driver_features = DRIVER_GEM | DRIVER_MODESET | 60 DRIVER_ATOMIC | DRIVER_HAVE_IRQ, 61 .fops = &hibmc_fops, 62 .name = "hibmc", 63 .date = "20160828", 64 .desc = "hibmc drm driver", 65 .major = 1, 66 .minor = 0, 67 .gem_free_object_unlocked = hibmc_gem_free_object, 68 .dumb_create = hibmc_dumb_create, 69 .dumb_map_offset = hibmc_dumb_mmap_offset, 70 .irq_handler = hibmc_drm_interrupt, 71 }; 72 73 static int __maybe_unused hibmc_pm_suspend(struct device *dev) 74 { 75 struct pci_dev *pdev = to_pci_dev(dev); 76 struct drm_device *drm_dev = pci_get_drvdata(pdev); 77 struct hibmc_drm_private *priv = drm_dev->dev_private; 78 79 drm_kms_helper_poll_disable(drm_dev); 80 priv->suspend_state = drm_atomic_helper_suspend(drm_dev); 81 if (IS_ERR(priv->suspend_state)) { 82 DRM_ERROR("drm_atomic_helper_suspend failed: %ld\n", 83 PTR_ERR(priv->suspend_state)); 84 drm_kms_helper_poll_enable(drm_dev); 85 return PTR_ERR(priv->suspend_state); 86 } 87 88 return 0; 89 } 90 91 static int __maybe_unused hibmc_pm_resume(struct device *dev) 92 { 93 struct pci_dev *pdev = to_pci_dev(dev); 94 struct drm_device *drm_dev = pci_get_drvdata(pdev); 95 struct hibmc_drm_private *priv = drm_dev->dev_private; 96 97 drm_atomic_helper_resume(drm_dev, priv->suspend_state); 98 drm_kms_helper_poll_enable(drm_dev); 99 100 return 0; 101 } 102 103 static const struct dev_pm_ops hibmc_pm_ops = { 104 SET_SYSTEM_SLEEP_PM_OPS(hibmc_pm_suspend, 105 hibmc_pm_resume) 106 }; 107 108 static int hibmc_kms_init(struct hibmc_drm_private *priv) 109 { 110 int ret; 111 112 drm_mode_config_init(priv->dev); 113 priv->mode_config_initialized = true; 114 115 priv->dev->mode_config.min_width = 0; 116 priv->dev->mode_config.min_height = 0; 117 priv->dev->mode_config.max_width = 1920; 118 priv->dev->mode_config.max_height = 1440; 119 120 priv->dev->mode_config.fb_base = priv->fb_base; 121 priv->dev->mode_config.preferred_depth = 24; 122 priv->dev->mode_config.prefer_shadow = 0; 123 124 priv->dev->mode_config.funcs = (void *)&hibmc_mode_funcs; 125 126 ret = hibmc_de_init(priv); 127 if (ret) { 128 DRM_ERROR("failed to init de: %d\n", ret); 129 return ret; 130 } 131 132 ret = hibmc_vdac_init(priv); 133 if (ret) { 134 DRM_ERROR("failed to init vdac: %d\n", ret); 135 return ret; 136 } 137 138 return 0; 139 } 140 141 static void hibmc_kms_fini(struct hibmc_drm_private *priv) 142 { 143 if (priv->mode_config_initialized) { 144 drm_mode_config_cleanup(priv->dev); 145 priv->mode_config_initialized = false; 146 } 147 } 148 149 /* 150 * It can operate in one of three modes: 0, 1 or Sleep. 151 */ 152 void hibmc_set_power_mode(struct hibmc_drm_private *priv, 153 unsigned int power_mode) 154 { 155 unsigned int control_value = 0; 156 void __iomem *mmio = priv->mmio; 157 unsigned int input = 1; 158 159 if (power_mode > HIBMC_PW_MODE_CTL_MODE_SLEEP) 160 return; 161 162 if (power_mode == HIBMC_PW_MODE_CTL_MODE_SLEEP) 163 input = 0; 164 165 control_value = readl(mmio + HIBMC_POWER_MODE_CTRL); 166 control_value &= ~(HIBMC_PW_MODE_CTL_MODE_MASK | 167 HIBMC_PW_MODE_CTL_OSC_INPUT_MASK); 168 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_MODE, power_mode); 169 control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_OSC_INPUT, input); 170 writel(control_value, mmio + HIBMC_POWER_MODE_CTRL); 171 } 172 173 void hibmc_set_current_gate(struct hibmc_drm_private *priv, unsigned int gate) 174 { 175 unsigned int gate_reg; 176 unsigned int mode; 177 void __iomem *mmio = priv->mmio; 178 179 /* Get current power mode. */ 180 mode = (readl(mmio + HIBMC_POWER_MODE_CTRL) & 181 HIBMC_PW_MODE_CTL_MODE_MASK) >> HIBMC_PW_MODE_CTL_MODE_SHIFT; 182 183 switch (mode) { 184 case HIBMC_PW_MODE_CTL_MODE_MODE0: 185 gate_reg = HIBMC_MODE0_GATE; 186 break; 187 188 case HIBMC_PW_MODE_CTL_MODE_MODE1: 189 gate_reg = HIBMC_MODE1_GATE; 190 break; 191 192 default: 193 gate_reg = HIBMC_MODE0_GATE; 194 break; 195 } 196 writel(gate, mmio + gate_reg); 197 } 198 199 static void hibmc_hw_config(struct hibmc_drm_private *priv) 200 { 201 unsigned int reg; 202 203 /* On hardware reset, power mode 0 is default. */ 204 hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_MODE0); 205 206 /* Enable display power gate & LOCALMEM power gate*/ 207 reg = readl(priv->mmio + HIBMC_CURRENT_GATE); 208 reg &= ~HIBMC_CURR_GATE_DISPLAY_MASK; 209 reg &= ~HIBMC_CURR_GATE_LOCALMEM_MASK; 210 reg |= HIBMC_CURR_GATE_DISPLAY(1); 211 reg |= HIBMC_CURR_GATE_LOCALMEM(1); 212 213 hibmc_set_current_gate(priv, reg); 214 215 /* 216 * Reset the memory controller. If the memory controller 217 * is not reset in chip,the system might hang when sw accesses 218 * the memory.The memory should be resetted after 219 * changing the MXCLK. 220 */ 221 reg = readl(priv->mmio + HIBMC_MISC_CTRL); 222 reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK; 223 reg |= HIBMC_MSCCTL_LOCALMEM_RESET(0); 224 writel(reg, priv->mmio + HIBMC_MISC_CTRL); 225 226 reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK; 227 reg |= HIBMC_MSCCTL_LOCALMEM_RESET(1); 228 229 writel(reg, priv->mmio + HIBMC_MISC_CTRL); 230 } 231 232 static int hibmc_hw_map(struct hibmc_drm_private *priv) 233 { 234 struct drm_device *dev = priv->dev; 235 struct pci_dev *pdev = dev->pdev; 236 resource_size_t addr, size, ioaddr, iosize; 237 238 ioaddr = pci_resource_start(pdev, 1); 239 iosize = pci_resource_len(pdev, 1); 240 priv->mmio = devm_ioremap_nocache(dev->dev, ioaddr, iosize); 241 if (!priv->mmio) { 242 DRM_ERROR("Cannot map mmio region\n"); 243 return -ENOMEM; 244 } 245 246 addr = pci_resource_start(pdev, 0); 247 size = pci_resource_len(pdev, 0); 248 priv->fb_map = devm_ioremap(dev->dev, addr, size); 249 if (!priv->fb_map) { 250 DRM_ERROR("Cannot map framebuffer\n"); 251 return -ENOMEM; 252 } 253 priv->fb_base = addr; 254 priv->fb_size = size; 255 256 return 0; 257 } 258 259 static int hibmc_hw_init(struct hibmc_drm_private *priv) 260 { 261 int ret; 262 263 ret = hibmc_hw_map(priv); 264 if (ret) 265 return ret; 266 267 hibmc_hw_config(priv); 268 269 return 0; 270 } 271 272 static int hibmc_unload(struct drm_device *dev) 273 { 274 struct hibmc_drm_private *priv = dev->dev_private; 275 276 hibmc_fbdev_fini(priv); 277 278 drm_atomic_helper_shutdown(dev); 279 280 if (dev->irq_enabled) 281 drm_irq_uninstall(dev); 282 if (priv->msi_enabled) 283 pci_disable_msi(dev->pdev); 284 285 hibmc_kms_fini(priv); 286 hibmc_mm_fini(priv); 287 dev->dev_private = NULL; 288 return 0; 289 } 290 291 static int hibmc_load(struct drm_device *dev) 292 { 293 struct hibmc_drm_private *priv; 294 int ret; 295 296 priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL); 297 if (!priv) { 298 DRM_ERROR("no memory to allocate for hibmc_drm_private\n"); 299 return -ENOMEM; 300 } 301 dev->dev_private = priv; 302 priv->dev = dev; 303 304 ret = hibmc_hw_init(priv); 305 if (ret) 306 goto err; 307 308 ret = hibmc_mm_init(priv); 309 if (ret) 310 goto err; 311 312 ret = hibmc_kms_init(priv); 313 if (ret) 314 goto err; 315 316 ret = drm_vblank_init(dev, dev->mode_config.num_crtc); 317 if (ret) { 318 DRM_ERROR("failed to initialize vblank: %d\n", ret); 319 goto err; 320 } 321 322 priv->msi_enabled = 0; 323 ret = pci_enable_msi(dev->pdev); 324 if (ret) { 325 DRM_WARN("enabling MSI failed: %d\n", ret); 326 } else { 327 priv->msi_enabled = 1; 328 ret = drm_irq_install(dev, dev->pdev->irq); 329 if (ret) 330 DRM_WARN("install irq failed: %d\n", ret); 331 } 332 333 /* reset all the states of crtc/plane/encoder/connector */ 334 drm_mode_config_reset(dev); 335 336 ret = hibmc_fbdev_init(priv); 337 if (ret) { 338 DRM_ERROR("failed to initialize fbdev: %d\n", ret); 339 goto err; 340 } 341 342 return 0; 343 344 err: 345 hibmc_unload(dev); 346 DRM_ERROR("failed to initialize drm driver: %d\n", ret); 347 return ret; 348 } 349 350 static int hibmc_pci_probe(struct pci_dev *pdev, 351 const struct pci_device_id *ent) 352 { 353 struct drm_device *dev; 354 int ret; 355 356 dev = drm_dev_alloc(&hibmc_driver, &pdev->dev); 357 if (IS_ERR(dev)) { 358 DRM_ERROR("failed to allocate drm_device\n"); 359 return PTR_ERR(dev); 360 } 361 362 dev->pdev = pdev; 363 pci_set_drvdata(pdev, dev); 364 365 ret = pci_enable_device(pdev); 366 if (ret) { 367 DRM_ERROR("failed to enable pci device: %d\n", ret); 368 goto err_free; 369 } 370 371 ret = hibmc_load(dev); 372 if (ret) { 373 DRM_ERROR("failed to load hibmc: %d\n", ret); 374 goto err_disable; 375 } 376 377 ret = drm_dev_register(dev, 0); 378 if (ret) { 379 DRM_ERROR("failed to register drv for userspace access: %d\n", 380 ret); 381 goto err_unload; 382 } 383 return 0; 384 385 err_unload: 386 hibmc_unload(dev); 387 err_disable: 388 pci_disable_device(pdev); 389 err_free: 390 drm_dev_unref(dev); 391 392 return ret; 393 } 394 395 static void hibmc_pci_remove(struct pci_dev *pdev) 396 { 397 struct drm_device *dev = pci_get_drvdata(pdev); 398 399 drm_dev_unregister(dev); 400 hibmc_unload(dev); 401 drm_dev_unref(dev); 402 } 403 404 static struct pci_device_id hibmc_pci_table[] = { 405 {0x19e5, 0x1711, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 406 {0,} 407 }; 408 409 static struct pci_driver hibmc_pci_driver = { 410 .name = "hibmc-drm", 411 .id_table = hibmc_pci_table, 412 .probe = hibmc_pci_probe, 413 .remove = hibmc_pci_remove, 414 .driver.pm = &hibmc_pm_ops, 415 }; 416 417 static int __init hibmc_init(void) 418 { 419 return pci_register_driver(&hibmc_pci_driver); 420 } 421 422 static void __exit hibmc_exit(void) 423 { 424 return pci_unregister_driver(&hibmc_pci_driver); 425 } 426 427 module_init(hibmc_init); 428 module_exit(hibmc_exit); 429 430 MODULE_DEVICE_TABLE(pci, hibmc_pci_table); 431 MODULE_AUTHOR("RongrongZou <zourongrong@huawei.com>"); 432 MODULE_DESCRIPTION("DRM Driver for Hisilicon Hibmc"); 433 MODULE_LICENSE("GPL v2"); 434