1 /* Hisilicon Hibmc SoC drm driver
2  *
3  * Based on the bochs drm driver.
4  *
5  * Copyright (c) 2016 Huawei Limited.
6  *
7  * Author:
8  *	Rongrong Zou <zourongrong@huawei.com>
9  *	Rongrong Zou <zourongrong@gmail.com>
10  *	Jianhua Li <lijianhua@huawei.com>
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License as published by
14  * the Free Software Foundation; either version 2 of the License, or
15  * (at your option) any later version.
16  *
17  */
18 
19 #include <linux/console.h>
20 #include <linux/module.h>
21 
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 
25 #include "hibmc_drm_drv.h"
26 #include "hibmc_drm_regs.h"
27 
28 static const struct file_operations hibmc_fops = {
29 	.owner		= THIS_MODULE,
30 	.open		= drm_open,
31 	.release	= drm_release,
32 	.unlocked_ioctl	= drm_ioctl,
33 	.compat_ioctl	= drm_compat_ioctl,
34 	.mmap		= hibmc_mmap,
35 	.poll		= drm_poll,
36 	.read		= drm_read,
37 	.llseek		= no_llseek,
38 };
39 
40 static int hibmc_enable_vblank(struct drm_device *dev, unsigned int pipe)
41 {
42 	struct hibmc_drm_private *priv =
43 		(struct hibmc_drm_private *)dev->dev_private;
44 
45 	writel(HIBMC_RAW_INTERRUPT_EN_VBLANK(1),
46 	       priv->mmio + HIBMC_RAW_INTERRUPT_EN);
47 
48 	return 0;
49 }
50 
51 static void hibmc_disable_vblank(struct drm_device *dev, unsigned int pipe)
52 {
53 	struct hibmc_drm_private *priv =
54 		(struct hibmc_drm_private *)dev->dev_private;
55 
56 	writel(HIBMC_RAW_INTERRUPT_EN_VBLANK(0),
57 	       priv->mmio + HIBMC_RAW_INTERRUPT_EN);
58 }
59 
60 irqreturn_t hibmc_drm_interrupt(int irq, void *arg)
61 {
62 	struct drm_device *dev = (struct drm_device *)arg;
63 	struct hibmc_drm_private *priv =
64 		(struct hibmc_drm_private *)dev->dev_private;
65 	u32 status;
66 
67 	status = readl(priv->mmio + HIBMC_RAW_INTERRUPT);
68 
69 	if (status & HIBMC_RAW_INTERRUPT_VBLANK(1)) {
70 		writel(HIBMC_RAW_INTERRUPT_VBLANK(1),
71 		       priv->mmio + HIBMC_RAW_INTERRUPT);
72 		drm_handle_vblank(dev, 0);
73 	}
74 
75 	return IRQ_HANDLED;
76 }
77 
78 static struct drm_driver hibmc_driver = {
79 	.driver_features	= DRIVER_GEM | DRIVER_MODESET |
80 				  DRIVER_ATOMIC | DRIVER_HAVE_IRQ,
81 	.fops			= &hibmc_fops,
82 	.name			= "hibmc",
83 	.date			= "20160828",
84 	.desc			= "hibmc drm driver",
85 	.major			= 1,
86 	.minor			= 0,
87 	.get_vblank_counter	= drm_vblank_no_hw_counter,
88 	.enable_vblank		= hibmc_enable_vblank,
89 	.disable_vblank		= hibmc_disable_vblank,
90 	.gem_free_object_unlocked = hibmc_gem_free_object,
91 	.dumb_create            = hibmc_dumb_create,
92 	.dumb_map_offset        = hibmc_dumb_mmap_offset,
93 	.dumb_destroy           = drm_gem_dumb_destroy,
94 	.irq_handler		= hibmc_drm_interrupt,
95 };
96 
97 static int __maybe_unused hibmc_pm_suspend(struct device *dev)
98 {
99 	struct pci_dev *pdev = to_pci_dev(dev);
100 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
101 	struct hibmc_drm_private *priv = drm_dev->dev_private;
102 
103 	drm_kms_helper_poll_disable(drm_dev);
104 	priv->suspend_state = drm_atomic_helper_suspend(drm_dev);
105 	if (IS_ERR(priv->suspend_state)) {
106 		DRM_ERROR("drm_atomic_helper_suspend failed: %ld\n",
107 			  PTR_ERR(priv->suspend_state));
108 		drm_kms_helper_poll_enable(drm_dev);
109 		return PTR_ERR(priv->suspend_state);
110 	}
111 
112 	return 0;
113 }
114 
115 static int  __maybe_unused hibmc_pm_resume(struct device *dev)
116 {
117 	struct pci_dev *pdev = to_pci_dev(dev);
118 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
119 	struct hibmc_drm_private *priv = drm_dev->dev_private;
120 
121 	drm_atomic_helper_resume(drm_dev, priv->suspend_state);
122 	drm_kms_helper_poll_enable(drm_dev);
123 
124 	return 0;
125 }
126 
127 static const struct dev_pm_ops hibmc_pm_ops = {
128 	SET_SYSTEM_SLEEP_PM_OPS(hibmc_pm_suspend,
129 				hibmc_pm_resume)
130 };
131 
132 static int hibmc_kms_init(struct hibmc_drm_private *priv)
133 {
134 	int ret;
135 
136 	drm_mode_config_init(priv->dev);
137 	priv->mode_config_initialized = true;
138 
139 	priv->dev->mode_config.min_width = 0;
140 	priv->dev->mode_config.min_height = 0;
141 	priv->dev->mode_config.max_width = 1920;
142 	priv->dev->mode_config.max_height = 1440;
143 
144 	priv->dev->mode_config.fb_base = priv->fb_base;
145 	priv->dev->mode_config.preferred_depth = 24;
146 	priv->dev->mode_config.prefer_shadow = 0;
147 
148 	priv->dev->mode_config.funcs = (void *)&hibmc_mode_funcs;
149 
150 	ret = hibmc_de_init(priv);
151 	if (ret) {
152 		DRM_ERROR("failed to init de: %d\n", ret);
153 		return ret;
154 	}
155 
156 	ret = hibmc_vdac_init(priv);
157 	if (ret) {
158 		DRM_ERROR("failed to init vdac: %d\n", ret);
159 		return ret;
160 	}
161 
162 	return 0;
163 }
164 
165 static void hibmc_kms_fini(struct hibmc_drm_private *priv)
166 {
167 	if (priv->mode_config_initialized) {
168 		drm_mode_config_cleanup(priv->dev);
169 		priv->mode_config_initialized = false;
170 	}
171 }
172 
173 /*
174  * It can operate in one of three modes: 0, 1 or Sleep.
175  */
176 void hibmc_set_power_mode(struct hibmc_drm_private *priv,
177 			  unsigned int power_mode)
178 {
179 	unsigned int control_value = 0;
180 	void __iomem   *mmio = priv->mmio;
181 	unsigned int input = 1;
182 
183 	if (power_mode > HIBMC_PW_MODE_CTL_MODE_SLEEP)
184 		return;
185 
186 	if (power_mode == HIBMC_PW_MODE_CTL_MODE_SLEEP)
187 		input = 0;
188 
189 	control_value = readl(mmio + HIBMC_POWER_MODE_CTRL);
190 	control_value &= ~(HIBMC_PW_MODE_CTL_MODE_MASK |
191 			   HIBMC_PW_MODE_CTL_OSC_INPUT_MASK);
192 	control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_MODE, power_mode);
193 	control_value |= HIBMC_FIELD(HIBMC_PW_MODE_CTL_OSC_INPUT, input);
194 	writel(control_value, mmio + HIBMC_POWER_MODE_CTRL);
195 }
196 
197 void hibmc_set_current_gate(struct hibmc_drm_private *priv, unsigned int gate)
198 {
199 	unsigned int gate_reg;
200 	unsigned int mode;
201 	void __iomem   *mmio = priv->mmio;
202 
203 	/* Get current power mode. */
204 	mode = (readl(mmio + HIBMC_POWER_MODE_CTRL) &
205 		HIBMC_PW_MODE_CTL_MODE_MASK) >> HIBMC_PW_MODE_CTL_MODE_SHIFT;
206 
207 	switch (mode) {
208 	case HIBMC_PW_MODE_CTL_MODE_MODE0:
209 		gate_reg = HIBMC_MODE0_GATE;
210 		break;
211 
212 	case HIBMC_PW_MODE_CTL_MODE_MODE1:
213 		gate_reg = HIBMC_MODE1_GATE;
214 		break;
215 
216 	default:
217 		gate_reg = HIBMC_MODE0_GATE;
218 		break;
219 	}
220 	writel(gate, mmio + gate_reg);
221 }
222 
223 static void hibmc_hw_config(struct hibmc_drm_private *priv)
224 {
225 	unsigned int reg;
226 
227 	/* On hardware reset, power mode 0 is default. */
228 	hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_MODE0);
229 
230 	/* Enable display power gate & LOCALMEM power gate*/
231 	reg = readl(priv->mmio + HIBMC_CURRENT_GATE);
232 	reg &= ~HIBMC_CURR_GATE_DISPLAY_MASK;
233 	reg &= ~HIBMC_CURR_GATE_LOCALMEM_MASK;
234 	reg |= HIBMC_CURR_GATE_DISPLAY(1);
235 	reg |= HIBMC_CURR_GATE_LOCALMEM(1);
236 
237 	hibmc_set_current_gate(priv, reg);
238 
239 	/*
240 	 * Reset the memory controller. If the memory controller
241 	 * is not reset in chip,the system might hang when sw accesses
242 	 * the memory.The memory should be resetted after
243 	 * changing the MXCLK.
244 	 */
245 	reg = readl(priv->mmio + HIBMC_MISC_CTRL);
246 	reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK;
247 	reg |= HIBMC_MSCCTL_LOCALMEM_RESET(0);
248 	writel(reg, priv->mmio + HIBMC_MISC_CTRL);
249 
250 	reg &= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK;
251 	reg |= HIBMC_MSCCTL_LOCALMEM_RESET(1);
252 
253 	writel(reg, priv->mmio + HIBMC_MISC_CTRL);
254 }
255 
256 static int hibmc_hw_map(struct hibmc_drm_private *priv)
257 {
258 	struct drm_device *dev = priv->dev;
259 	struct pci_dev *pdev = dev->pdev;
260 	resource_size_t addr, size, ioaddr, iosize;
261 
262 	ioaddr = pci_resource_start(pdev, 1);
263 	iosize = pci_resource_len(pdev, 1);
264 	priv->mmio = devm_ioremap_nocache(dev->dev, ioaddr, iosize);
265 	if (!priv->mmio) {
266 		DRM_ERROR("Cannot map mmio region\n");
267 		return -ENOMEM;
268 	}
269 
270 	addr = pci_resource_start(pdev, 0);
271 	size = pci_resource_len(pdev, 0);
272 	priv->fb_map = devm_ioremap(dev->dev, addr, size);
273 	if (!priv->fb_map) {
274 		DRM_ERROR("Cannot map framebuffer\n");
275 		return -ENOMEM;
276 	}
277 	priv->fb_base = addr;
278 	priv->fb_size = size;
279 
280 	return 0;
281 }
282 
283 static int hibmc_hw_init(struct hibmc_drm_private *priv)
284 {
285 	int ret;
286 
287 	ret = hibmc_hw_map(priv);
288 	if (ret)
289 		return ret;
290 
291 	hibmc_hw_config(priv);
292 
293 	return 0;
294 }
295 
296 static int hibmc_unload(struct drm_device *dev)
297 {
298 	struct hibmc_drm_private *priv = dev->dev_private;
299 
300 	hibmc_fbdev_fini(priv);
301 
302 	if (dev->irq_enabled)
303 		drm_irq_uninstall(dev);
304 	if (priv->msi_enabled)
305 		pci_disable_msi(dev->pdev);
306 	drm_vblank_cleanup(dev);
307 
308 	hibmc_kms_fini(priv);
309 	hibmc_mm_fini(priv);
310 	dev->dev_private = NULL;
311 	return 0;
312 }
313 
314 static int hibmc_load(struct drm_device *dev)
315 {
316 	struct hibmc_drm_private *priv;
317 	int ret;
318 
319 	priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL);
320 	if (!priv) {
321 		DRM_ERROR("no memory to allocate for hibmc_drm_private\n");
322 		return -ENOMEM;
323 	}
324 	dev->dev_private = priv;
325 	priv->dev = dev;
326 
327 	ret = hibmc_hw_init(priv);
328 	if (ret)
329 		goto err;
330 
331 	ret = hibmc_mm_init(priv);
332 	if (ret)
333 		goto err;
334 
335 	ret = hibmc_kms_init(priv);
336 	if (ret)
337 		goto err;
338 
339 	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
340 	if (ret) {
341 		DRM_ERROR("failed to initialize vblank: %d\n", ret);
342 		goto err;
343 	}
344 
345 	priv->msi_enabled = 0;
346 	ret = pci_enable_msi(dev->pdev);
347 	if (ret) {
348 		DRM_WARN("enabling MSI failed: %d\n", ret);
349 	} else {
350 		priv->msi_enabled = 1;
351 		ret = drm_irq_install(dev, dev->pdev->irq);
352 		if (ret)
353 			DRM_WARN("install irq failed: %d\n", ret);
354 	}
355 
356 	/* reset all the states of crtc/plane/encoder/connector */
357 	drm_mode_config_reset(dev);
358 
359 	ret = hibmc_fbdev_init(priv);
360 	if (ret) {
361 		DRM_ERROR("failed to initialize fbdev: %d\n", ret);
362 		goto err;
363 	}
364 
365 	return 0;
366 
367 err:
368 	hibmc_unload(dev);
369 	DRM_ERROR("failed to initialize drm driver: %d\n", ret);
370 	return ret;
371 }
372 
373 static int hibmc_pci_probe(struct pci_dev *pdev,
374 			   const struct pci_device_id *ent)
375 {
376 	struct drm_device *dev;
377 	int ret;
378 
379 	dev = drm_dev_alloc(&hibmc_driver, &pdev->dev);
380 	if (IS_ERR(dev)) {
381 		DRM_ERROR("failed to allocate drm_device\n");
382 		return PTR_ERR(dev);
383 	}
384 
385 	dev->pdev = pdev;
386 	pci_set_drvdata(pdev, dev);
387 
388 	ret = pci_enable_device(pdev);
389 	if (ret) {
390 		DRM_ERROR("failed to enable pci device: %d\n", ret);
391 		goto err_free;
392 	}
393 
394 	ret = hibmc_load(dev);
395 	if (ret) {
396 		DRM_ERROR("failed to load hibmc: %d\n", ret);
397 		goto err_disable;
398 	}
399 
400 	ret = drm_dev_register(dev, 0);
401 	if (ret) {
402 		DRM_ERROR("failed to register drv for userspace access: %d\n",
403 			  ret);
404 		goto err_unload;
405 	}
406 	return 0;
407 
408 err_unload:
409 	hibmc_unload(dev);
410 err_disable:
411 	pci_disable_device(pdev);
412 err_free:
413 	drm_dev_unref(dev);
414 
415 	return ret;
416 }
417 
418 static void hibmc_pci_remove(struct pci_dev *pdev)
419 {
420 	struct drm_device *dev = pci_get_drvdata(pdev);
421 
422 	drm_dev_unregister(dev);
423 	hibmc_unload(dev);
424 	drm_dev_unref(dev);
425 }
426 
427 static struct pci_device_id hibmc_pci_table[] = {
428 	{0x19e5, 0x1711, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
429 	{0,}
430 };
431 
432 static struct pci_driver hibmc_pci_driver = {
433 	.name =		"hibmc-drm",
434 	.id_table =	hibmc_pci_table,
435 	.probe =	hibmc_pci_probe,
436 	.remove =	hibmc_pci_remove,
437 	.driver.pm =    &hibmc_pm_ops,
438 };
439 
440 static int __init hibmc_init(void)
441 {
442 	return pci_register_driver(&hibmc_pci_driver);
443 }
444 
445 static void __exit hibmc_exit(void)
446 {
447 	return pci_unregister_driver(&hibmc_pci_driver);
448 }
449 
450 module_init(hibmc_init);
451 module_exit(hibmc_exit);
452 
453 MODULE_DEVICE_TABLE(pci, hibmc_pci_table);
454 MODULE_AUTHOR("RongrongZou <zourongrong@huawei.com>");
455 MODULE_DESCRIPTION("DRM Driver for Hisilicon Hibmc");
456 MODULE_LICENSE("GPL v2");
457