xref: /openbmc/linux/drivers/gpu/drm/gud/gud_internal.h (revision 97e6ea6d)
1 /* SPDX-License-Identifier: MIT */
2 
3 #ifndef __LINUX_GUD_INTERNAL_H
4 #define __LINUX_GUD_INTERNAL_H
5 
6 #include <linux/list.h>
7 #include <linux/mutex.h>
8 #include <linux/scatterlist.h>
9 #include <linux/usb.h>
10 #include <linux/workqueue.h>
11 #include <uapi/drm/drm_fourcc.h>
12 
13 #include <drm/drm_modes.h>
14 #include <drm/drm_simple_kms_helper.h>
15 
16 struct gud_device {
17 	struct drm_device drm;
18 	struct drm_simple_display_pipe pipe;
19 	struct device *dmadev;
20 	struct work_struct work;
21 	u32 flags;
22 	const struct drm_format_info *xrgb8888_emulation_format;
23 
24 	u16 *properties;
25 	unsigned int num_properties;
26 
27 	unsigned int bulk_pipe;
28 	void *bulk_buf;
29 	size_t bulk_len;
30 	struct sg_table bulk_sgt;
31 
32 	u8 compression;
33 	void *lz4_comp_mem;
34 	void *compress_buf;
35 
36 	u64 stats_length;
37 	u64 stats_actual_length;
38 	unsigned int stats_num_errors;
39 
40 	struct mutex ctrl_lock; /* Serialize get/set and status transfers */
41 
42 	struct mutex damage_lock; /* Protects the following members: */
43 	struct drm_framebuffer *fb;
44 	struct drm_rect damage;
45 	bool prev_flush_failed;
46 };
47 
48 static inline struct gud_device *to_gud_device(struct drm_device *drm)
49 {
50 	return container_of(drm, struct gud_device, drm);
51 }
52 
53 static inline struct usb_device *gud_to_usb_device(struct gud_device *gdrm)
54 {
55 	return interface_to_usbdev(to_usb_interface(gdrm->drm.dev));
56 }
57 
58 int gud_usb_get(struct gud_device *gdrm, u8 request, u16 index, void *buf, size_t len);
59 int gud_usb_set(struct gud_device *gdrm, u8 request, u16 index, void *buf, size_t len);
60 int gud_usb_get_u8(struct gud_device *gdrm, u8 request, u16 index, u8 *val);
61 int gud_usb_set_u8(struct gud_device *gdrm, u8 request, u8 val);
62 
63 void gud_clear_damage(struct gud_device *gdrm);
64 void gud_flush_work(struct work_struct *work);
65 int gud_pipe_check(struct drm_simple_display_pipe *pipe,
66 		   struct drm_plane_state *new_plane_state,
67 		   struct drm_crtc_state *new_crtc_state);
68 void gud_pipe_update(struct drm_simple_display_pipe *pipe,
69 		     struct drm_plane_state *old_state);
70 int gud_connector_fill_properties(struct drm_connector_state *connector_state,
71 				  struct gud_property_req *properties);
72 int gud_get_connectors(struct gud_device *gdrm);
73 
74 /* Driver internal fourcc transfer formats */
75 #define GUD_DRM_FORMAT_R1		0x00000122
76 #define GUD_DRM_FORMAT_XRGB1111		0x03121722
77 
78 static inline u8 gud_from_fourcc(u32 fourcc)
79 {
80 	switch (fourcc) {
81 	case GUD_DRM_FORMAT_R1:
82 		return GUD_PIXEL_FORMAT_R1;
83 	case GUD_DRM_FORMAT_XRGB1111:
84 		return GUD_PIXEL_FORMAT_XRGB1111;
85 	case DRM_FORMAT_RGB565:
86 		return GUD_PIXEL_FORMAT_RGB565;
87 	case DRM_FORMAT_XRGB8888:
88 		return GUD_PIXEL_FORMAT_XRGB8888;
89 	case DRM_FORMAT_ARGB8888:
90 		return GUD_PIXEL_FORMAT_ARGB8888;
91 	}
92 
93 	return 0;
94 }
95 
96 static inline u32 gud_to_fourcc(u8 format)
97 {
98 	switch (format) {
99 	case GUD_PIXEL_FORMAT_R1:
100 		return GUD_DRM_FORMAT_R1;
101 	case GUD_PIXEL_FORMAT_XRGB1111:
102 		return GUD_DRM_FORMAT_XRGB1111;
103 	case GUD_PIXEL_FORMAT_RGB565:
104 		return DRM_FORMAT_RGB565;
105 	case GUD_PIXEL_FORMAT_XRGB8888:
106 		return DRM_FORMAT_XRGB8888;
107 	case GUD_PIXEL_FORMAT_ARGB8888:
108 		return DRM_FORMAT_ARGB8888;
109 	}
110 
111 	return 0;
112 }
113 
114 static inline void gud_from_display_mode(struct gud_display_mode_req *dst,
115 					 const struct drm_display_mode *src)
116 {
117 	u32 flags = src->flags & GUD_DISPLAY_MODE_FLAG_USER_MASK;
118 
119 	if (src->type & DRM_MODE_TYPE_PREFERRED)
120 		flags |= GUD_DISPLAY_MODE_FLAG_PREFERRED;
121 
122 	dst->clock = cpu_to_le32(src->clock);
123 	dst->hdisplay = cpu_to_le16(src->hdisplay);
124 	dst->hsync_start = cpu_to_le16(src->hsync_start);
125 	dst->hsync_end = cpu_to_le16(src->hsync_end);
126 	dst->htotal = cpu_to_le16(src->htotal);
127 	dst->vdisplay = cpu_to_le16(src->vdisplay);
128 	dst->vsync_start = cpu_to_le16(src->vsync_start);
129 	dst->vsync_end = cpu_to_le16(src->vsync_end);
130 	dst->vtotal = cpu_to_le16(src->vtotal);
131 	dst->flags = cpu_to_le32(flags);
132 }
133 
134 static inline void gud_to_display_mode(struct drm_display_mode *dst,
135 				       const struct gud_display_mode_req *src)
136 {
137 	u32 flags = le32_to_cpu(src->flags);
138 
139 	memset(dst, 0, sizeof(*dst));
140 	dst->clock = le32_to_cpu(src->clock);
141 	dst->hdisplay = le16_to_cpu(src->hdisplay);
142 	dst->hsync_start = le16_to_cpu(src->hsync_start);
143 	dst->hsync_end = le16_to_cpu(src->hsync_end);
144 	dst->htotal = le16_to_cpu(src->htotal);
145 	dst->vdisplay = le16_to_cpu(src->vdisplay);
146 	dst->vsync_start = le16_to_cpu(src->vsync_start);
147 	dst->vsync_end = le16_to_cpu(src->vsync_end);
148 	dst->vtotal = le16_to_cpu(src->vtotal);
149 	dst->flags = flags & GUD_DISPLAY_MODE_FLAG_USER_MASK;
150 	dst->type = DRM_MODE_TYPE_DRIVER;
151 	if (flags & GUD_DISPLAY_MODE_FLAG_PREFERRED)
152 		dst->type |= DRM_MODE_TYPE_PREFERRED;
153 	drm_mode_set_name(dst);
154 }
155 
156 #endif
157