1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 */ 28 #include <linux/module.h> 29 #include <linux/i2c.h> 30 #include <linux/slab.h> 31 #include <linux/delay.h> 32 #include <drm/drmP.h> 33 #include <drm/drm_crtc.h> 34 #include <drm/drm_edid.h> 35 #include "psb_intel_drv.h" 36 #include <drm/gma_drm.h> 37 #include "psb_drv.h" 38 #include "psb_intel_sdvo_regs.h" 39 #include "psb_intel_reg.h" 40 41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0) 45 46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 47 SDVO_TV_MASK) 48 49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 53 54 55 static const char *tv_format_names[] = { 56 "NTSC_M" , "NTSC_J" , "NTSC_443", 57 "PAL_B" , "PAL_D" , "PAL_G" , 58 "PAL_H" , "PAL_I" , "PAL_M" , 59 "PAL_N" , "PAL_NC" , "PAL_60" , 60 "SECAM_B" , "SECAM_D" , "SECAM_G" , 61 "SECAM_K" , "SECAM_K1", "SECAM_L" , 62 "SECAM_60" 63 }; 64 65 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) 66 67 struct psb_intel_sdvo { 68 struct psb_intel_encoder base; 69 70 struct i2c_adapter *i2c; 71 u8 slave_addr; 72 73 struct i2c_adapter ddc; 74 75 /* Register for the SDVO device: SDVOB or SDVOC */ 76 int sdvo_reg; 77 78 /* Active outputs controlled by this SDVO output */ 79 uint16_t controlled_output; 80 81 /* 82 * Capabilities of the SDVO device returned by 83 * i830_sdvo_get_capabilities() 84 */ 85 struct psb_intel_sdvo_caps caps; 86 87 /* Pixel clock limitations reported by the SDVO device, in kHz */ 88 int pixel_clock_min, pixel_clock_max; 89 90 /* 91 * For multiple function SDVO device, 92 * this is for current attached outputs. 93 */ 94 uint16_t attached_output; 95 96 /** 97 * This is used to select the color range of RBG outputs in HDMI mode. 98 * It is only valid when using TMDS encoding and 8 bit per color mode. 99 */ 100 uint32_t color_range; 101 102 /** 103 * This is set if we're going to treat the device as TV-out. 104 * 105 * While we have these nice friendly flags for output types that ought 106 * to decide this for us, the S-Video output on our HDMI+S-Video card 107 * shows up as RGB1 (VGA). 108 */ 109 bool is_tv; 110 111 /* This is for current tv format name */ 112 int tv_format_index; 113 114 /** 115 * This is set if we treat the device as HDMI, instead of DVI. 116 */ 117 bool is_hdmi; 118 bool has_hdmi_monitor; 119 bool has_hdmi_audio; 120 121 /** 122 * This is set if we detect output of sdvo device as LVDS and 123 * have a valid fixed mode to use with the panel. 124 */ 125 bool is_lvds; 126 127 /** 128 * This is sdvo fixed pannel mode pointer 129 */ 130 struct drm_display_mode *sdvo_lvds_fixed_mode; 131 132 /* DDC bus used by this SDVO encoder */ 133 uint8_t ddc_bus; 134 135 /* Input timings for adjusted_mode */ 136 struct psb_intel_sdvo_dtd input_dtd; 137 138 /* Saved SDVO output states */ 139 uint32_t saveSDVO; /* Can be SDVOB or SDVOC depending on sdvo_reg */ 140 }; 141 142 struct psb_intel_sdvo_connector { 143 struct psb_intel_connector base; 144 145 /* Mark the type of connector */ 146 uint16_t output_flag; 147 148 int force_audio; 149 150 /* This contains all current supported TV format */ 151 u8 tv_format_supported[TV_FORMAT_NUM]; 152 int format_supported_num; 153 struct drm_property *tv_format; 154 155 /* add the property for the SDVO-TV */ 156 struct drm_property *left; 157 struct drm_property *right; 158 struct drm_property *top; 159 struct drm_property *bottom; 160 struct drm_property *hpos; 161 struct drm_property *vpos; 162 struct drm_property *contrast; 163 struct drm_property *saturation; 164 struct drm_property *hue; 165 struct drm_property *sharpness; 166 struct drm_property *flicker_filter; 167 struct drm_property *flicker_filter_adaptive; 168 struct drm_property *flicker_filter_2d; 169 struct drm_property *tv_chroma_filter; 170 struct drm_property *tv_luma_filter; 171 struct drm_property *dot_crawl; 172 173 /* add the property for the SDVO-TV/LVDS */ 174 struct drm_property *brightness; 175 176 /* Add variable to record current setting for the above property */ 177 u32 left_margin, right_margin, top_margin, bottom_margin; 178 179 /* this is to get the range of margin.*/ 180 u32 max_hscan, max_vscan; 181 u32 max_hpos, cur_hpos; 182 u32 max_vpos, cur_vpos; 183 u32 cur_brightness, max_brightness; 184 u32 cur_contrast, max_contrast; 185 u32 cur_saturation, max_saturation; 186 u32 cur_hue, max_hue; 187 u32 cur_sharpness, max_sharpness; 188 u32 cur_flicker_filter, max_flicker_filter; 189 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; 190 u32 cur_flicker_filter_2d, max_flicker_filter_2d; 191 u32 cur_tv_chroma_filter, max_tv_chroma_filter; 192 u32 cur_tv_luma_filter, max_tv_luma_filter; 193 u32 cur_dot_crawl, max_dot_crawl; 194 }; 195 196 static struct psb_intel_sdvo *to_psb_intel_sdvo(struct drm_encoder *encoder) 197 { 198 return container_of(encoder, struct psb_intel_sdvo, base.base); 199 } 200 201 static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) 202 { 203 return container_of(psb_intel_attached_encoder(connector), 204 struct psb_intel_sdvo, base); 205 } 206 207 static struct psb_intel_sdvo_connector *to_psb_intel_sdvo_connector(struct drm_connector *connector) 208 { 209 return container_of(to_psb_intel_connector(connector), struct psb_intel_sdvo_connector, base); 210 } 211 212 static bool 213 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags); 214 static bool 215 psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo, 216 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 217 int type); 218 static bool 219 psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo, 220 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector); 221 222 /** 223 * Writes the SDVOB or SDVOC with the given value, but always writes both 224 * SDVOB and SDVOC to work around apparent hardware issues (according to 225 * comments in the BIOS). 226 */ 227 static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo *psb_intel_sdvo, u32 val) 228 { 229 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 230 u32 bval = val, cval = val; 231 int i; 232 233 if (psb_intel_sdvo->sdvo_reg == SDVOB) { 234 cval = REG_READ(SDVOC); 235 } else { 236 bval = REG_READ(SDVOB); 237 } 238 /* 239 * Write the registers twice for luck. Sometimes, 240 * writing them only once doesn't appear to 'stick'. 241 * The BIOS does this too. Yay, magic 242 */ 243 for (i = 0; i < 2; i++) 244 { 245 REG_WRITE(SDVOB, bval); 246 REG_READ(SDVOB); 247 REG_WRITE(SDVOC, cval); 248 REG_READ(SDVOC); 249 } 250 } 251 252 static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo *psb_intel_sdvo, u8 addr, u8 *ch) 253 { 254 struct i2c_msg msgs[] = { 255 { 256 .addr = psb_intel_sdvo->slave_addr, 257 .flags = 0, 258 .len = 1, 259 .buf = &addr, 260 }, 261 { 262 .addr = psb_intel_sdvo->slave_addr, 263 .flags = I2C_M_RD, 264 .len = 1, 265 .buf = ch, 266 } 267 }; 268 int ret; 269 270 if ((ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, 2)) == 2) 271 return true; 272 273 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 274 return false; 275 } 276 277 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} 278 /** Mapping of command numbers to names, for debug output */ 279 static const struct _sdvo_cmd_name { 280 u8 cmd; 281 const char *name; 282 } sdvo_cmd_names[] = { 283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), 284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), 285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), 286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), 287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), 288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), 289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), 290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), 291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), 292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), 293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), 294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), 295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), 296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), 297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), 298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), 299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), 300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), 302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), 304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), 305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), 306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), 307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), 308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), 309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), 310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), 311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), 312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), 313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), 314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), 315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), 316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), 317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), 318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), 319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), 320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), 321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), 322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), 323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), 324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), 325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), 326 327 /* Add the op code for SDVO enhancements */ 328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), 329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), 330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), 331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), 332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), 333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), 334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), 335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), 336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), 337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), 338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), 339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), 340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), 341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), 342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), 343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), 344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), 345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), 346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), 347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), 348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), 349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), 350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), 351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), 352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), 353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), 354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), 355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), 356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), 357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), 358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), 359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), 360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), 361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), 362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), 363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), 364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), 365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), 366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), 367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), 368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), 369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), 370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), 371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), 372 373 /* HDMI op code */ 374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), 375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), 376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), 377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), 378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), 379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), 380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), 381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), 382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), 383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), 384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), 385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), 386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), 387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), 388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), 389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), 390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), 391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), 392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), 393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), 394 }; 395 396 #define IS_SDVOB(reg) (reg == SDVOB) 397 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC") 398 399 static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, 400 const void *args, int args_len) 401 { 402 int i; 403 404 DRM_DEBUG_KMS("%s: W: %02X ", 405 SDVO_NAME(psb_intel_sdvo), cmd); 406 for (i = 0; i < args_len; i++) 407 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]); 408 for (; i < 8; i++) 409 DRM_LOG_KMS(" "); 410 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { 411 if (cmd == sdvo_cmd_names[i].cmd) { 412 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name); 413 break; 414 } 415 } 416 if (i == ARRAY_SIZE(sdvo_cmd_names)) 417 DRM_LOG_KMS("(%02X)", cmd); 418 DRM_LOG_KMS("\n"); 419 } 420 421 static const char *cmd_status_names[] = { 422 "Power on", 423 "Success", 424 "Not supported", 425 "Invalid arg", 426 "Pending", 427 "Target not specified", 428 "Scaling not supported" 429 }; 430 431 static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, 432 const void *args, int args_len) 433 { 434 u8 buf[args_len*2 + 2], status; 435 struct i2c_msg msgs[args_len + 3]; 436 int i, ret; 437 438 psb_intel_sdvo_debug_write(psb_intel_sdvo, cmd, args, args_len); 439 440 for (i = 0; i < args_len; i++) { 441 msgs[i].addr = psb_intel_sdvo->slave_addr; 442 msgs[i].flags = 0; 443 msgs[i].len = 2; 444 msgs[i].buf = buf + 2 *i; 445 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 446 buf[2*i + 1] = ((u8*)args)[i]; 447 } 448 msgs[i].addr = psb_intel_sdvo->slave_addr; 449 msgs[i].flags = 0; 450 msgs[i].len = 2; 451 msgs[i].buf = buf + 2*i; 452 buf[2*i + 0] = SDVO_I2C_OPCODE; 453 buf[2*i + 1] = cmd; 454 455 /* the following two are to read the response */ 456 status = SDVO_I2C_CMD_STATUS; 457 msgs[i+1].addr = psb_intel_sdvo->slave_addr; 458 msgs[i+1].flags = 0; 459 msgs[i+1].len = 1; 460 msgs[i+1].buf = &status; 461 462 msgs[i+2].addr = psb_intel_sdvo->slave_addr; 463 msgs[i+2].flags = I2C_M_RD; 464 msgs[i+2].len = 1; 465 msgs[i+2].buf = &status; 466 467 ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, i+3); 468 if (ret < 0) { 469 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 470 return false; 471 } 472 if (ret != i+3) { 473 /* failure in I2C transfer */ 474 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); 475 return false; 476 } 477 478 return true; 479 } 480 481 static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo *psb_intel_sdvo, 482 void *response, int response_len) 483 { 484 u8 retry = 5; 485 u8 status; 486 int i; 487 488 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(psb_intel_sdvo)); 489 490 /* 491 * The documentation states that all commands will be 492 * processed within 15µs, and that we need only poll 493 * the status byte a maximum of 3 times in order for the 494 * command to be complete. 495 * 496 * Check 5 times in case the hardware failed to read the docs. 497 */ 498 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, 499 SDVO_I2C_CMD_STATUS, 500 &status)) 501 goto log_fail; 502 503 while ((status == SDVO_CMD_STATUS_PENDING || 504 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && retry--) { 505 udelay(15); 506 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, 507 SDVO_I2C_CMD_STATUS, 508 &status)) 509 goto log_fail; 510 } 511 512 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) 513 DRM_LOG_KMS("(%s)", cmd_status_names[status]); 514 else 515 DRM_LOG_KMS("(??? %d)", status); 516 517 if (status != SDVO_CMD_STATUS_SUCCESS) 518 goto log_fail; 519 520 /* Read the command response */ 521 for (i = 0; i < response_len; i++) { 522 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, 523 SDVO_I2C_RETURN_0 + i, 524 &((u8 *)response)[i])) 525 goto log_fail; 526 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]); 527 } 528 DRM_LOG_KMS("\n"); 529 return true; 530 531 log_fail: 532 DRM_LOG_KMS("... failed\n"); 533 return false; 534 } 535 536 static int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) 537 { 538 if (mode->clock >= 100000) 539 return 1; 540 else if (mode->clock >= 50000) 541 return 2; 542 else 543 return 4; 544 } 545 546 static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo *psb_intel_sdvo, 547 u8 ddc_bus) 548 { 549 /* This must be the immediately preceding write before the i2c xfer */ 550 return psb_intel_sdvo_write_cmd(psb_intel_sdvo, 551 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 552 &ddc_bus, 1); 553 } 554 555 static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, const void *data, int len) 556 { 557 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, data, len)) 558 return false; 559 560 return psb_intel_sdvo_read_response(psb_intel_sdvo, NULL, 0); 561 } 562 563 static bool 564 psb_intel_sdvo_get_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, void *value, int len) 565 { 566 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, NULL, 0)) 567 return false; 568 569 return psb_intel_sdvo_read_response(psb_intel_sdvo, value, len); 570 } 571 572 static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo *psb_intel_sdvo) 573 { 574 struct psb_intel_sdvo_set_target_input_args targets = {0}; 575 return psb_intel_sdvo_set_value(psb_intel_sdvo, 576 SDVO_CMD_SET_TARGET_INPUT, 577 &targets, sizeof(targets)); 578 } 579 580 /** 581 * Return whether each input is trained. 582 * 583 * This function is making an assumption about the layout of the response, 584 * which should be checked against the docs. 585 */ 586 static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo *psb_intel_sdvo, bool *input_1, bool *input_2) 587 { 588 struct psb_intel_sdvo_get_trained_inputs_response response; 589 590 BUILD_BUG_ON(sizeof(response) != 1); 591 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 592 &response, sizeof(response))) 593 return false; 594 595 *input_1 = response.input0_trained; 596 *input_2 = response.input1_trained; 597 return true; 598 } 599 600 static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo *psb_intel_sdvo, 601 u16 outputs) 602 { 603 return psb_intel_sdvo_set_value(psb_intel_sdvo, 604 SDVO_CMD_SET_ACTIVE_OUTPUTS, 605 &outputs, sizeof(outputs)); 606 } 607 608 static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo *psb_intel_sdvo, 609 int mode) 610 { 611 u8 state = SDVO_ENCODER_STATE_ON; 612 613 switch (mode) { 614 case DRM_MODE_DPMS_ON: 615 state = SDVO_ENCODER_STATE_ON; 616 break; 617 case DRM_MODE_DPMS_STANDBY: 618 state = SDVO_ENCODER_STATE_STANDBY; 619 break; 620 case DRM_MODE_DPMS_SUSPEND: 621 state = SDVO_ENCODER_STATE_SUSPEND; 622 break; 623 case DRM_MODE_DPMS_OFF: 624 state = SDVO_ENCODER_STATE_OFF; 625 break; 626 } 627 628 return psb_intel_sdvo_set_value(psb_intel_sdvo, 629 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 630 } 631 632 static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo *psb_intel_sdvo, 633 int *clock_min, 634 int *clock_max) 635 { 636 struct psb_intel_sdvo_pixel_clock_range clocks; 637 638 BUILD_BUG_ON(sizeof(clocks) != 4); 639 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 640 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 641 &clocks, sizeof(clocks))) 642 return false; 643 644 /* Convert the values from units of 10 kHz to kHz. */ 645 *clock_min = clocks.min * 10; 646 *clock_max = clocks.max * 10; 647 return true; 648 } 649 650 static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo *psb_intel_sdvo, 651 u16 outputs) 652 { 653 return psb_intel_sdvo_set_value(psb_intel_sdvo, 654 SDVO_CMD_SET_TARGET_OUTPUT, 655 &outputs, sizeof(outputs)); 656 } 657 658 static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, 659 struct psb_intel_sdvo_dtd *dtd) 660 { 661 return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 662 psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 663 } 664 665 static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo *psb_intel_sdvo, 666 struct psb_intel_sdvo_dtd *dtd) 667 { 668 return psb_intel_sdvo_set_timing(psb_intel_sdvo, 669 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 670 } 671 672 static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo *psb_intel_sdvo, 673 struct psb_intel_sdvo_dtd *dtd) 674 { 675 return psb_intel_sdvo_set_timing(psb_intel_sdvo, 676 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 677 } 678 679 static bool 680 psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo, 681 uint16_t clock, 682 uint16_t width, 683 uint16_t height) 684 { 685 struct psb_intel_sdvo_preferred_input_timing_args args; 686 687 memset(&args, 0, sizeof(args)); 688 args.clock = clock; 689 args.width = width; 690 args.height = height; 691 args.interlace = 0; 692 693 if (psb_intel_sdvo->is_lvds && 694 (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || 695 psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) 696 args.scaled = 1; 697 698 return psb_intel_sdvo_set_value(psb_intel_sdvo, 699 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 700 &args, sizeof(args)); 701 } 702 703 static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo, 704 struct psb_intel_sdvo_dtd *dtd) 705 { 706 BUILD_BUG_ON(sizeof(dtd->part1) != 8); 707 BUILD_BUG_ON(sizeof(dtd->part2) != 8); 708 return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 709 &dtd->part1, sizeof(dtd->part1)) && 710 psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 711 &dtd->part2, sizeof(dtd->part2)); 712 } 713 714 static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo *psb_intel_sdvo, u8 val) 715 { 716 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 717 } 718 719 static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd *dtd, 720 const struct drm_display_mode *mode) 721 { 722 uint16_t width, height; 723 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; 724 uint16_t h_sync_offset, v_sync_offset; 725 726 width = mode->crtc_hdisplay; 727 height = mode->crtc_vdisplay; 728 729 /* do some mode translations */ 730 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start; 731 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; 732 733 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start; 734 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; 735 736 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; 737 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start; 738 739 dtd->part1.clock = mode->clock / 10; 740 dtd->part1.h_active = width & 0xff; 741 dtd->part1.h_blank = h_blank_len & 0xff; 742 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 743 ((h_blank_len >> 8) & 0xf); 744 dtd->part1.v_active = height & 0xff; 745 dtd->part1.v_blank = v_blank_len & 0xff; 746 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 747 ((v_blank_len >> 8) & 0xf); 748 749 dtd->part2.h_sync_off = h_sync_offset & 0xff; 750 dtd->part2.h_sync_width = h_sync_len & 0xff; 751 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 752 (v_sync_len & 0xf); 753 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 754 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 755 ((v_sync_len & 0x30) >> 4); 756 757 dtd->part2.dtd_flags = 0x18; 758 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 759 dtd->part2.dtd_flags |= 0x2; 760 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 761 dtd->part2.dtd_flags |= 0x4; 762 763 dtd->part2.sdvo_flags = 0; 764 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 765 dtd->part2.reserved = 0; 766 } 767 768 static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, 769 const struct psb_intel_sdvo_dtd *dtd) 770 { 771 mode->hdisplay = dtd->part1.h_active; 772 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 773 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; 774 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 775 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; 776 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 777 mode->htotal = mode->hdisplay + dtd->part1.h_blank; 778 mode->htotal += (dtd->part1.h_high & 0xf) << 8; 779 780 mode->vdisplay = dtd->part1.v_active; 781 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 782 mode->vsync_start = mode->vdisplay; 783 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 784 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 785 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; 786 mode->vsync_end = mode->vsync_start + 787 (dtd->part2.v_sync_off_width & 0xf); 788 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 789 mode->vtotal = mode->vdisplay + dtd->part1.v_blank; 790 mode->vtotal += (dtd->part1.v_high & 0xf) << 8; 791 792 mode->clock = dtd->part1.clock * 10; 793 794 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); 795 if (dtd->part2.dtd_flags & 0x2) 796 mode->flags |= DRM_MODE_FLAG_PHSYNC; 797 if (dtd->part2.dtd_flags & 0x4) 798 mode->flags |= DRM_MODE_FLAG_PVSYNC; 799 } 800 801 static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo *psb_intel_sdvo) 802 { 803 struct psb_intel_sdvo_encode encode; 804 805 BUILD_BUG_ON(sizeof(encode) != 2); 806 return psb_intel_sdvo_get_value(psb_intel_sdvo, 807 SDVO_CMD_GET_SUPP_ENCODE, 808 &encode, sizeof(encode)); 809 } 810 811 static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo *psb_intel_sdvo, 812 uint8_t mode) 813 { 814 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 815 } 816 817 static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo *psb_intel_sdvo, 818 uint8_t mode) 819 { 820 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 821 } 822 823 #if 0 824 static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo *psb_intel_sdvo) 825 { 826 int i, j; 827 uint8_t set_buf_index[2]; 828 uint8_t av_split; 829 uint8_t buf_size; 830 uint8_t buf[48]; 831 uint8_t *pos; 832 833 psb_intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 834 835 for (i = 0; i <= av_split; i++) { 836 set_buf_index[0] = i; set_buf_index[1] = 0; 837 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 838 set_buf_index, 2); 839 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 840 psb_intel_sdvo_read_response(encoder, &buf_size, 1); 841 842 pos = buf; 843 for (j = 0; j <= buf_size; j += 8) { 844 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 845 NULL, 0); 846 psb_intel_sdvo_read_response(encoder, pos, 8); 847 pos += 8; 848 } 849 } 850 } 851 #endif 852 853 static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo *psb_intel_sdvo) 854 { 855 DRM_INFO("HDMI is not supported yet"); 856 857 return false; 858 #if 0 859 struct dip_infoframe avi_if = { 860 .type = DIP_TYPE_AVI, 861 .ver = DIP_VERSION_AVI, 862 .len = DIP_LEN_AVI, 863 }; 864 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC; 865 uint8_t set_buf_index[2] = { 1, 0 }; 866 uint64_t *data = (uint64_t *)&avi_if; 867 unsigned i; 868 869 intel_dip_infoframe_csum(&avi_if); 870 871 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, 872 SDVO_CMD_SET_HBUF_INDEX, 873 set_buf_index, 2)) 874 return false; 875 876 for (i = 0; i < sizeof(avi_if); i += 8) { 877 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, 878 SDVO_CMD_SET_HBUF_DATA, 879 data, 8)) 880 return false; 881 data++; 882 } 883 884 return psb_intel_sdvo_set_value(psb_intel_sdvo, 885 SDVO_CMD_SET_HBUF_TXRATE, 886 &tx_rate, 1); 887 #endif 888 } 889 890 static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo) 891 { 892 struct psb_intel_sdvo_tv_format format; 893 uint32_t format_map; 894 895 format_map = 1 << psb_intel_sdvo->tv_format_index; 896 memset(&format, 0, sizeof(format)); 897 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 898 899 BUILD_BUG_ON(sizeof(format) != 6); 900 return psb_intel_sdvo_set_value(psb_intel_sdvo, 901 SDVO_CMD_SET_TV_FORMAT, 902 &format, sizeof(format)); 903 } 904 905 static bool 906 psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo, 907 const struct drm_display_mode *mode) 908 { 909 struct psb_intel_sdvo_dtd output_dtd; 910 911 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, 912 psb_intel_sdvo->attached_output)) 913 return false; 914 915 psb_intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 916 if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &output_dtd)) 917 return false; 918 919 return true; 920 } 921 922 static bool 923 psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo, 924 const struct drm_display_mode *mode, 925 struct drm_display_mode *adjusted_mode) 926 { 927 /* Reset the input timing to the screen. Assume always input 0. */ 928 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo)) 929 return false; 930 931 if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo, 932 mode->clock / 10, 933 mode->hdisplay, 934 mode->vdisplay)) 935 return false; 936 937 if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo, 938 &psb_intel_sdvo->input_dtd)) 939 return false; 940 941 psb_intel_sdvo_get_mode_from_dtd(adjusted_mode, &psb_intel_sdvo->input_dtd); 942 943 drm_mode_set_crtcinfo(adjusted_mode, 0); 944 return true; 945 } 946 947 static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder, 948 const struct drm_display_mode *mode, 949 struct drm_display_mode *adjusted_mode) 950 { 951 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 952 int multiplier; 953 954 /* We need to construct preferred input timings based on our 955 * output timings. To do that, we have to set the output 956 * timings, even though this isn't really the right place in 957 * the sequence to do it. Oh well. 958 */ 959 if (psb_intel_sdvo->is_tv) { 960 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, mode)) 961 return false; 962 963 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo, 964 mode, 965 adjusted_mode); 966 } else if (psb_intel_sdvo->is_lvds) { 967 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, 968 psb_intel_sdvo->sdvo_lvds_fixed_mode)) 969 return false; 970 971 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo, 972 mode, 973 adjusted_mode); 974 } 975 976 /* Make the CRTC code factor in the SDVO pixel multiplier. The 977 * SDVO device will factor out the multiplier during mode_set. 978 */ 979 multiplier = psb_intel_sdvo_get_pixel_multiplier(adjusted_mode); 980 psb_intel_mode_set_pixel_multiplier(adjusted_mode, multiplier); 981 982 return true; 983 } 984 985 static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder, 986 struct drm_display_mode *mode, 987 struct drm_display_mode *adjusted_mode) 988 { 989 struct drm_device *dev = encoder->dev; 990 struct drm_crtc *crtc = encoder->crtc; 991 struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc); 992 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 993 u32 sdvox; 994 struct psb_intel_sdvo_in_out_map in_out; 995 struct psb_intel_sdvo_dtd input_dtd; 996 int pixel_multiplier = psb_intel_mode_get_pixel_multiplier(adjusted_mode); 997 int rate; 998 999 if (!mode) 1000 return; 1001 1002 /* First, set the input mapping for the first input to our controlled 1003 * output. This is only correct if we're a single-input device, in 1004 * which case the first input is the output from the appropriate SDVO 1005 * channel on the motherboard. In a two-input device, the first input 1006 * will be SDVOB and the second SDVOC. 1007 */ 1008 in_out.in0 = psb_intel_sdvo->attached_output; 1009 in_out.in1 = 0; 1010 1011 psb_intel_sdvo_set_value(psb_intel_sdvo, 1012 SDVO_CMD_SET_IN_OUT_MAP, 1013 &in_out, sizeof(in_out)); 1014 1015 /* Set the output timings to the screen */ 1016 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, 1017 psb_intel_sdvo->attached_output)) 1018 return; 1019 1020 /* We have tried to get input timing in mode_fixup, and filled into 1021 * adjusted_mode. 1022 */ 1023 if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) { 1024 input_dtd = psb_intel_sdvo->input_dtd; 1025 } else { 1026 /* Set the output timing to the screen */ 1027 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, 1028 psb_intel_sdvo->attached_output)) 1029 return; 1030 1031 psb_intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1032 (void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &input_dtd); 1033 } 1034 1035 /* Set the input timing to the screen. Assume always input 0. */ 1036 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo)) 1037 return; 1038 1039 if (psb_intel_sdvo->has_hdmi_monitor) { 1040 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_HDMI); 1041 psb_intel_sdvo_set_colorimetry(psb_intel_sdvo, 1042 SDVO_COLORIMETRY_RGB256); 1043 psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo); 1044 } else 1045 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_DVI); 1046 1047 if (psb_intel_sdvo->is_tv && 1048 !psb_intel_sdvo_set_tv_format(psb_intel_sdvo)) 1049 return; 1050 1051 (void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo, &input_dtd); 1052 1053 switch (pixel_multiplier) { 1054 default: 1055 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1056 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1057 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1058 } 1059 if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo, rate)) 1060 return; 1061 1062 /* Set the SDVO control regs. */ 1063 sdvox = REG_READ(psb_intel_sdvo->sdvo_reg); 1064 switch (psb_intel_sdvo->sdvo_reg) { 1065 case SDVOB: 1066 sdvox &= SDVOB_PRESERVE_MASK; 1067 break; 1068 case SDVOC: 1069 sdvox &= SDVOC_PRESERVE_MASK; 1070 break; 1071 } 1072 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1073 1074 if (psb_intel_crtc->pipe == 1) 1075 sdvox |= SDVO_PIPE_B_SELECT; 1076 if (psb_intel_sdvo->has_hdmi_audio) 1077 sdvox |= SDVO_AUDIO_ENABLE; 1078 1079 /* FIXME: Check if this is needed for PSB 1080 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT; 1081 */ 1082 1083 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL) 1084 sdvox |= SDVO_STALL_SELECT; 1085 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, sdvox); 1086 } 1087 1088 static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode) 1089 { 1090 struct drm_device *dev = encoder->dev; 1091 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 1092 u32 temp; 1093 1094 switch (mode) { 1095 case DRM_MODE_DPMS_ON: 1096 DRM_DEBUG("DPMS_ON"); 1097 break; 1098 case DRM_MODE_DPMS_OFF: 1099 DRM_DEBUG("DPMS_OFF"); 1100 break; 1101 default: 1102 DRM_DEBUG("DPMS: %d", mode); 1103 } 1104 1105 if (mode != DRM_MODE_DPMS_ON) { 1106 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, 0); 1107 if (0) 1108 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode); 1109 1110 if (mode == DRM_MODE_DPMS_OFF) { 1111 temp = REG_READ(psb_intel_sdvo->sdvo_reg); 1112 if ((temp & SDVO_ENABLE) != 0) { 1113 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE); 1114 } 1115 } 1116 } else { 1117 bool input1, input2; 1118 int i; 1119 u8 status; 1120 1121 temp = REG_READ(psb_intel_sdvo->sdvo_reg); 1122 if ((temp & SDVO_ENABLE) == 0) 1123 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE); 1124 for (i = 0; i < 2; i++) 1125 psb_intel_wait_for_vblank(dev); 1126 1127 status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2); 1128 /* Warn if the device reported failure to sync. 1129 * A lot of SDVO devices fail to notify of sync, but it's 1130 * a given it the status is a success, we succeeded. 1131 */ 1132 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { 1133 DRM_DEBUG_KMS("First %s output reported failure to " 1134 "sync\n", SDVO_NAME(psb_intel_sdvo)); 1135 } 1136 1137 if (0) 1138 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode); 1139 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, psb_intel_sdvo->attached_output); 1140 } 1141 return; 1142 } 1143 1144 static int psb_intel_sdvo_mode_valid(struct drm_connector *connector, 1145 struct drm_display_mode *mode) 1146 { 1147 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1148 1149 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1150 return MODE_NO_DBLESCAN; 1151 1152 if (psb_intel_sdvo->pixel_clock_min > mode->clock) 1153 return MODE_CLOCK_LOW; 1154 1155 if (psb_intel_sdvo->pixel_clock_max < mode->clock) 1156 return MODE_CLOCK_HIGH; 1157 1158 if (psb_intel_sdvo->is_lvds) { 1159 if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) 1160 return MODE_PANEL; 1161 1162 if (mode->vdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) 1163 return MODE_PANEL; 1164 } 1165 1166 return MODE_OK; 1167 } 1168 1169 static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps) 1170 { 1171 BUILD_BUG_ON(sizeof(*caps) != 8); 1172 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 1173 SDVO_CMD_GET_DEVICE_CAPS, 1174 caps, sizeof(*caps))) 1175 return false; 1176 1177 DRM_DEBUG_KMS("SDVO capabilities:\n" 1178 " vendor_id: %d\n" 1179 " device_id: %d\n" 1180 " device_rev_id: %d\n" 1181 " sdvo_version_major: %d\n" 1182 " sdvo_version_minor: %d\n" 1183 " sdvo_inputs_mask: %d\n" 1184 " smooth_scaling: %d\n" 1185 " sharp_scaling: %d\n" 1186 " up_scaling: %d\n" 1187 " down_scaling: %d\n" 1188 " stall_support: %d\n" 1189 " output_flags: %d\n", 1190 caps->vendor_id, 1191 caps->device_id, 1192 caps->device_rev_id, 1193 caps->sdvo_version_major, 1194 caps->sdvo_version_minor, 1195 caps->sdvo_inputs_mask, 1196 caps->smooth_scaling, 1197 caps->sharp_scaling, 1198 caps->up_scaling, 1199 caps->down_scaling, 1200 caps->stall_support, 1201 caps->output_flags); 1202 1203 return true; 1204 } 1205 1206 /* No use! */ 1207 #if 0 1208 struct drm_connector* psb_intel_sdvo_find(struct drm_device *dev, int sdvoB) 1209 { 1210 struct drm_connector *connector = NULL; 1211 struct psb_intel_sdvo *iout = NULL; 1212 struct psb_intel_sdvo *sdvo; 1213 1214 /* find the sdvo connector */ 1215 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 1216 iout = to_psb_intel_sdvo(connector); 1217 1218 if (iout->type != INTEL_OUTPUT_SDVO) 1219 continue; 1220 1221 sdvo = iout->dev_priv; 1222 1223 if (sdvo->sdvo_reg == SDVOB && sdvoB) 1224 return connector; 1225 1226 if (sdvo->sdvo_reg == SDVOC && !sdvoB) 1227 return connector; 1228 1229 } 1230 1231 return NULL; 1232 } 1233 1234 int psb_intel_sdvo_supports_hotplug(struct drm_connector *connector) 1235 { 1236 u8 response[2]; 1237 u8 status; 1238 struct psb_intel_sdvo *psb_intel_sdvo; 1239 DRM_DEBUG_KMS("\n"); 1240 1241 if (!connector) 1242 return 0; 1243 1244 psb_intel_sdvo = to_psb_intel_sdvo(connector); 1245 1246 return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, 1247 &response, 2) && response[0]; 1248 } 1249 1250 void psb_intel_sdvo_set_hotplug(struct drm_connector *connector, int on) 1251 { 1252 u8 response[2]; 1253 u8 status; 1254 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(connector); 1255 1256 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); 1257 psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2); 1258 1259 if (on) { 1260 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); 1261 status = psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2); 1262 1263 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); 1264 } else { 1265 response[0] = 0; 1266 response[1] = 0; 1267 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); 1268 } 1269 1270 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); 1271 psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2); 1272 } 1273 #endif 1274 1275 static bool 1276 psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo *psb_intel_sdvo) 1277 { 1278 /* Is there more than one type of output? */ 1279 int caps = psb_intel_sdvo->caps.output_flags & 0xf; 1280 return caps & -caps; 1281 } 1282 1283 static struct edid * 1284 psb_intel_sdvo_get_edid(struct drm_connector *connector) 1285 { 1286 struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector); 1287 return drm_get_edid(connector, &sdvo->ddc); 1288 } 1289 1290 /* Mac mini hack -- use the same DDC as the analog connector */ 1291 static struct edid * 1292 psb_intel_sdvo_get_analog_edid(struct drm_connector *connector) 1293 { 1294 struct drm_psb_private *dev_priv = connector->dev->dev_private; 1295 1296 return drm_get_edid(connector, 1297 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter); 1298 } 1299 1300 static enum drm_connector_status 1301 psb_intel_sdvo_hdmi_sink_detect(struct drm_connector *connector) 1302 { 1303 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1304 enum drm_connector_status status; 1305 struct edid *edid; 1306 1307 edid = psb_intel_sdvo_get_edid(connector); 1308 1309 if (edid == NULL && psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo)) { 1310 u8 ddc, saved_ddc = psb_intel_sdvo->ddc_bus; 1311 1312 /* 1313 * Don't use the 1 as the argument of DDC bus switch to get 1314 * the EDID. It is used for SDVO SPD ROM. 1315 */ 1316 for (ddc = psb_intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1317 psb_intel_sdvo->ddc_bus = ddc; 1318 edid = psb_intel_sdvo_get_edid(connector); 1319 if (edid) 1320 break; 1321 } 1322 /* 1323 * If we found the EDID on the other bus, 1324 * assume that is the correct DDC bus. 1325 */ 1326 if (edid == NULL) 1327 psb_intel_sdvo->ddc_bus = saved_ddc; 1328 } 1329 1330 /* 1331 * When there is no edid and no monitor is connected with VGA 1332 * port, try to use the CRT ddc to read the EDID for DVI-connector. 1333 */ 1334 if (edid == NULL) 1335 edid = psb_intel_sdvo_get_analog_edid(connector); 1336 1337 status = connector_status_unknown; 1338 if (edid != NULL) { 1339 /* DDC bus is shared, match EDID to connector type */ 1340 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 1341 status = connector_status_connected; 1342 if (psb_intel_sdvo->is_hdmi) { 1343 psb_intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 1344 psb_intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 1345 } 1346 } else 1347 status = connector_status_disconnected; 1348 kfree(edid); 1349 } 1350 1351 if (status == connector_status_connected) { 1352 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1353 if (psb_intel_sdvo_connector->force_audio) 1354 psb_intel_sdvo->has_hdmi_audio = psb_intel_sdvo_connector->force_audio > 0; 1355 } 1356 1357 return status; 1358 } 1359 1360 static enum drm_connector_status 1361 psb_intel_sdvo_detect(struct drm_connector *connector, bool force) 1362 { 1363 uint16_t response; 1364 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1365 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1366 enum drm_connector_status ret; 1367 1368 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, 1369 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0)) 1370 return connector_status_unknown; 1371 1372 /* add 30ms delay when the output type might be TV */ 1373 if (psb_intel_sdvo->caps.output_flags & 1374 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0)) 1375 mdelay(30); 1376 1377 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2)) 1378 return connector_status_unknown; 1379 1380 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 1381 response & 0xff, response >> 8, 1382 psb_intel_sdvo_connector->output_flag); 1383 1384 if (response == 0) 1385 return connector_status_disconnected; 1386 1387 psb_intel_sdvo->attached_output = response; 1388 1389 psb_intel_sdvo->has_hdmi_monitor = false; 1390 psb_intel_sdvo->has_hdmi_audio = false; 1391 1392 if ((psb_intel_sdvo_connector->output_flag & response) == 0) 1393 ret = connector_status_disconnected; 1394 else if (IS_TMDS(psb_intel_sdvo_connector)) 1395 ret = psb_intel_sdvo_hdmi_sink_detect(connector); 1396 else { 1397 struct edid *edid; 1398 1399 /* if we have an edid check it matches the connection */ 1400 edid = psb_intel_sdvo_get_edid(connector); 1401 if (edid == NULL) 1402 edid = psb_intel_sdvo_get_analog_edid(connector); 1403 if (edid != NULL) { 1404 if (edid->input & DRM_EDID_INPUT_DIGITAL) 1405 ret = connector_status_disconnected; 1406 else 1407 ret = connector_status_connected; 1408 kfree(edid); 1409 } else 1410 ret = connector_status_connected; 1411 } 1412 1413 /* May update encoder flag for like clock for SDVO TV, etc.*/ 1414 if (ret == connector_status_connected) { 1415 psb_intel_sdvo->is_tv = false; 1416 psb_intel_sdvo->is_lvds = false; 1417 psb_intel_sdvo->base.needs_tv_clock = false; 1418 1419 if (response & SDVO_TV_MASK) { 1420 psb_intel_sdvo->is_tv = true; 1421 psb_intel_sdvo->base.needs_tv_clock = true; 1422 } 1423 if (response & SDVO_LVDS_MASK) 1424 psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL; 1425 } 1426 1427 return ret; 1428 } 1429 1430 static void psb_intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1431 { 1432 struct edid *edid; 1433 1434 /* set the bus switch and get the modes */ 1435 edid = psb_intel_sdvo_get_edid(connector); 1436 1437 /* 1438 * Mac mini hack. On this device, the DVI-I connector shares one DDC 1439 * link between analog and digital outputs. So, if the regular SDVO 1440 * DDC fails, check to see if the analog output is disconnected, in 1441 * which case we'll look there for the digital DDC data. 1442 */ 1443 if (edid == NULL) 1444 edid = psb_intel_sdvo_get_analog_edid(connector); 1445 1446 if (edid != NULL) { 1447 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1448 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 1449 bool connector_is_digital = !!IS_TMDS(psb_intel_sdvo_connector); 1450 1451 if (connector_is_digital == monitor_is_digital) { 1452 drm_mode_connector_update_edid_property(connector, edid); 1453 drm_add_edid_modes(connector, edid); 1454 } 1455 1456 kfree(edid); 1457 } 1458 } 1459 1460 /* 1461 * Set of SDVO TV modes. 1462 * Note! This is in reply order (see loop in get_tv_modes). 1463 * XXX: all 60Hz refresh? 1464 */ 1465 static const struct drm_display_mode sdvo_tv_modes[] = { 1466 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 1467 416, 0, 200, 201, 232, 233, 0, 1468 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1469 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 1470 416, 0, 240, 241, 272, 273, 0, 1471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1472 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 1473 496, 0, 300, 301, 332, 333, 0, 1474 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1475 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 1476 736, 0, 350, 351, 382, 383, 0, 1477 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1478 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 1479 736, 0, 400, 401, 432, 433, 0, 1480 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1481 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 1482 736, 0, 480, 481, 512, 513, 0, 1483 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1484 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 1485 800, 0, 480, 481, 512, 513, 0, 1486 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1487 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 1488 800, 0, 576, 577, 608, 609, 0, 1489 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1490 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 1491 816, 0, 350, 351, 382, 383, 0, 1492 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1493 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 1494 816, 0, 400, 401, 432, 433, 0, 1495 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1496 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 1497 816, 0, 480, 481, 512, 513, 0, 1498 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1499 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 1500 816, 0, 540, 541, 572, 573, 0, 1501 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1502 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 1503 816, 0, 576, 577, 608, 609, 0, 1504 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1505 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 1506 864, 0, 576, 577, 608, 609, 0, 1507 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1508 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 1509 896, 0, 600, 601, 632, 633, 0, 1510 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1511 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 1512 928, 0, 624, 625, 656, 657, 0, 1513 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1514 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 1515 1016, 0, 766, 767, 798, 799, 0, 1516 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1517 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 1518 1120, 0, 768, 769, 800, 801, 0, 1519 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1520 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 1521 1376, 0, 1024, 1025, 1056, 1057, 0, 1522 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1523 }; 1524 1525 static void psb_intel_sdvo_get_tv_modes(struct drm_connector *connector) 1526 { 1527 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1528 struct psb_intel_sdvo_sdtv_resolution_request tv_res; 1529 uint32_t reply = 0, format_map = 0; 1530 int i; 1531 1532 /* Read the list of supported input resolutions for the selected TV 1533 * format. 1534 */ 1535 format_map = 1 << psb_intel_sdvo->tv_format_index; 1536 memcpy(&tv_res, &format_map, 1537 min(sizeof(format_map), sizeof(struct psb_intel_sdvo_sdtv_resolution_request))); 1538 1539 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, psb_intel_sdvo->attached_output)) 1540 return; 1541 1542 BUILD_BUG_ON(sizeof(tv_res) != 3); 1543 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, 1544 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 1545 &tv_res, sizeof(tv_res))) 1546 return; 1547 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &reply, 3)) 1548 return; 1549 1550 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) 1551 if (reply & (1 << i)) { 1552 struct drm_display_mode *nmode; 1553 nmode = drm_mode_duplicate(connector->dev, 1554 &sdvo_tv_modes[i]); 1555 if (nmode) 1556 drm_mode_probed_add(connector, nmode); 1557 } 1558 } 1559 1560 static void psb_intel_sdvo_get_lvds_modes(struct drm_connector *connector) 1561 { 1562 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1563 struct drm_psb_private *dev_priv = connector->dev->dev_private; 1564 struct drm_display_mode *newmode; 1565 1566 /* 1567 * Attempt to get the mode list from DDC. 1568 * Assume that the preferred modes are 1569 * arranged in priority order. 1570 */ 1571 psb_intel_ddc_get_modes(connector, psb_intel_sdvo->i2c); 1572 if (list_empty(&connector->probed_modes) == false) 1573 goto end; 1574 1575 /* Fetch modes from VBT */ 1576 if (dev_priv->sdvo_lvds_vbt_mode != NULL) { 1577 newmode = drm_mode_duplicate(connector->dev, 1578 dev_priv->sdvo_lvds_vbt_mode); 1579 if (newmode != NULL) { 1580 /* Guarantee the mode is preferred */ 1581 newmode->type = (DRM_MODE_TYPE_PREFERRED | 1582 DRM_MODE_TYPE_DRIVER); 1583 drm_mode_probed_add(connector, newmode); 1584 } 1585 } 1586 1587 end: 1588 list_for_each_entry(newmode, &connector->probed_modes, head) { 1589 if (newmode->type & DRM_MODE_TYPE_PREFERRED) { 1590 psb_intel_sdvo->sdvo_lvds_fixed_mode = 1591 drm_mode_duplicate(connector->dev, newmode); 1592 1593 drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode, 1594 0); 1595 1596 psb_intel_sdvo->is_lvds = true; 1597 break; 1598 } 1599 } 1600 1601 } 1602 1603 static int psb_intel_sdvo_get_modes(struct drm_connector *connector) 1604 { 1605 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1606 1607 if (IS_TV(psb_intel_sdvo_connector)) 1608 psb_intel_sdvo_get_tv_modes(connector); 1609 else if (IS_LVDS(psb_intel_sdvo_connector)) 1610 psb_intel_sdvo_get_lvds_modes(connector); 1611 else 1612 psb_intel_sdvo_get_ddc_modes(connector); 1613 1614 return !list_empty(&connector->probed_modes); 1615 } 1616 1617 static void 1618 psb_intel_sdvo_destroy_enhance_property(struct drm_connector *connector) 1619 { 1620 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1621 struct drm_device *dev = connector->dev; 1622 1623 if (psb_intel_sdvo_connector->left) 1624 drm_property_destroy(dev, psb_intel_sdvo_connector->left); 1625 if (psb_intel_sdvo_connector->right) 1626 drm_property_destroy(dev, psb_intel_sdvo_connector->right); 1627 if (psb_intel_sdvo_connector->top) 1628 drm_property_destroy(dev, psb_intel_sdvo_connector->top); 1629 if (psb_intel_sdvo_connector->bottom) 1630 drm_property_destroy(dev, psb_intel_sdvo_connector->bottom); 1631 if (psb_intel_sdvo_connector->hpos) 1632 drm_property_destroy(dev, psb_intel_sdvo_connector->hpos); 1633 if (psb_intel_sdvo_connector->vpos) 1634 drm_property_destroy(dev, psb_intel_sdvo_connector->vpos); 1635 if (psb_intel_sdvo_connector->saturation) 1636 drm_property_destroy(dev, psb_intel_sdvo_connector->saturation); 1637 if (psb_intel_sdvo_connector->contrast) 1638 drm_property_destroy(dev, psb_intel_sdvo_connector->contrast); 1639 if (psb_intel_sdvo_connector->hue) 1640 drm_property_destroy(dev, psb_intel_sdvo_connector->hue); 1641 if (psb_intel_sdvo_connector->sharpness) 1642 drm_property_destroy(dev, psb_intel_sdvo_connector->sharpness); 1643 if (psb_intel_sdvo_connector->flicker_filter) 1644 drm_property_destroy(dev, psb_intel_sdvo_connector->flicker_filter); 1645 if (psb_intel_sdvo_connector->flicker_filter_2d) 1646 drm_property_destroy(dev, psb_intel_sdvo_connector->flicker_filter_2d); 1647 if (psb_intel_sdvo_connector->flicker_filter_adaptive) 1648 drm_property_destroy(dev, psb_intel_sdvo_connector->flicker_filter_adaptive); 1649 if (psb_intel_sdvo_connector->tv_luma_filter) 1650 drm_property_destroy(dev, psb_intel_sdvo_connector->tv_luma_filter); 1651 if (psb_intel_sdvo_connector->tv_chroma_filter) 1652 drm_property_destroy(dev, psb_intel_sdvo_connector->tv_chroma_filter); 1653 if (psb_intel_sdvo_connector->dot_crawl) 1654 drm_property_destroy(dev, psb_intel_sdvo_connector->dot_crawl); 1655 if (psb_intel_sdvo_connector->brightness) 1656 drm_property_destroy(dev, psb_intel_sdvo_connector->brightness); 1657 } 1658 1659 static void psb_intel_sdvo_destroy(struct drm_connector *connector) 1660 { 1661 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1662 1663 if (psb_intel_sdvo_connector->tv_format) 1664 drm_property_destroy(connector->dev, 1665 psb_intel_sdvo_connector->tv_format); 1666 1667 psb_intel_sdvo_destroy_enhance_property(connector); 1668 drm_sysfs_connector_remove(connector); 1669 drm_connector_cleanup(connector); 1670 kfree(connector); 1671 } 1672 1673 static bool psb_intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) 1674 { 1675 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1676 struct edid *edid; 1677 bool has_audio = false; 1678 1679 if (!psb_intel_sdvo->is_hdmi) 1680 return false; 1681 1682 edid = psb_intel_sdvo_get_edid(connector); 1683 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) 1684 has_audio = drm_detect_monitor_audio(edid); 1685 1686 return has_audio; 1687 } 1688 1689 static int 1690 psb_intel_sdvo_set_property(struct drm_connector *connector, 1691 struct drm_property *property, 1692 uint64_t val) 1693 { 1694 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1695 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1696 struct drm_psb_private *dev_priv = connector->dev->dev_private; 1697 uint16_t temp_value; 1698 uint8_t cmd; 1699 int ret; 1700 1701 ret = drm_object_property_set_value(&connector->base, property, val); 1702 if (ret) 1703 return ret; 1704 1705 if (property == dev_priv->force_audio_property) { 1706 int i = val; 1707 bool has_audio; 1708 1709 if (i == psb_intel_sdvo_connector->force_audio) 1710 return 0; 1711 1712 psb_intel_sdvo_connector->force_audio = i; 1713 1714 if (i == 0) 1715 has_audio = psb_intel_sdvo_detect_hdmi_audio(connector); 1716 else 1717 has_audio = i > 0; 1718 1719 if (has_audio == psb_intel_sdvo->has_hdmi_audio) 1720 return 0; 1721 1722 psb_intel_sdvo->has_hdmi_audio = has_audio; 1723 goto done; 1724 } 1725 1726 if (property == dev_priv->broadcast_rgb_property) { 1727 if (val == !!psb_intel_sdvo->color_range) 1728 return 0; 1729 1730 psb_intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0; 1731 goto done; 1732 } 1733 1734 #define CHECK_PROPERTY(name, NAME) \ 1735 if (psb_intel_sdvo_connector->name == property) { \ 1736 if (psb_intel_sdvo_connector->cur_##name == temp_value) return 0; \ 1737 if (psb_intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ 1738 cmd = SDVO_CMD_SET_##NAME; \ 1739 psb_intel_sdvo_connector->cur_##name = temp_value; \ 1740 goto set_value; \ 1741 } 1742 1743 if (property == psb_intel_sdvo_connector->tv_format) { 1744 if (val >= TV_FORMAT_NUM) 1745 return -EINVAL; 1746 1747 if (psb_intel_sdvo->tv_format_index == 1748 psb_intel_sdvo_connector->tv_format_supported[val]) 1749 return 0; 1750 1751 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[val]; 1752 goto done; 1753 } else if (IS_TV_OR_LVDS(psb_intel_sdvo_connector)) { 1754 temp_value = val; 1755 if (psb_intel_sdvo_connector->left == property) { 1756 drm_object_property_set_value(&connector->base, 1757 psb_intel_sdvo_connector->right, val); 1758 if (psb_intel_sdvo_connector->left_margin == temp_value) 1759 return 0; 1760 1761 psb_intel_sdvo_connector->left_margin = temp_value; 1762 psb_intel_sdvo_connector->right_margin = temp_value; 1763 temp_value = psb_intel_sdvo_connector->max_hscan - 1764 psb_intel_sdvo_connector->left_margin; 1765 cmd = SDVO_CMD_SET_OVERSCAN_H; 1766 goto set_value; 1767 } else if (psb_intel_sdvo_connector->right == property) { 1768 drm_object_property_set_value(&connector->base, 1769 psb_intel_sdvo_connector->left, val); 1770 if (psb_intel_sdvo_connector->right_margin == temp_value) 1771 return 0; 1772 1773 psb_intel_sdvo_connector->left_margin = temp_value; 1774 psb_intel_sdvo_connector->right_margin = temp_value; 1775 temp_value = psb_intel_sdvo_connector->max_hscan - 1776 psb_intel_sdvo_connector->left_margin; 1777 cmd = SDVO_CMD_SET_OVERSCAN_H; 1778 goto set_value; 1779 } else if (psb_intel_sdvo_connector->top == property) { 1780 drm_object_property_set_value(&connector->base, 1781 psb_intel_sdvo_connector->bottom, val); 1782 if (psb_intel_sdvo_connector->top_margin == temp_value) 1783 return 0; 1784 1785 psb_intel_sdvo_connector->top_margin = temp_value; 1786 psb_intel_sdvo_connector->bottom_margin = temp_value; 1787 temp_value = psb_intel_sdvo_connector->max_vscan - 1788 psb_intel_sdvo_connector->top_margin; 1789 cmd = SDVO_CMD_SET_OVERSCAN_V; 1790 goto set_value; 1791 } else if (psb_intel_sdvo_connector->bottom == property) { 1792 drm_object_property_set_value(&connector->base, 1793 psb_intel_sdvo_connector->top, val); 1794 if (psb_intel_sdvo_connector->bottom_margin == temp_value) 1795 return 0; 1796 1797 psb_intel_sdvo_connector->top_margin = temp_value; 1798 psb_intel_sdvo_connector->bottom_margin = temp_value; 1799 temp_value = psb_intel_sdvo_connector->max_vscan - 1800 psb_intel_sdvo_connector->top_margin; 1801 cmd = SDVO_CMD_SET_OVERSCAN_V; 1802 goto set_value; 1803 } 1804 CHECK_PROPERTY(hpos, HPOS) 1805 CHECK_PROPERTY(vpos, VPOS) 1806 CHECK_PROPERTY(saturation, SATURATION) 1807 CHECK_PROPERTY(contrast, CONTRAST) 1808 CHECK_PROPERTY(hue, HUE) 1809 CHECK_PROPERTY(brightness, BRIGHTNESS) 1810 CHECK_PROPERTY(sharpness, SHARPNESS) 1811 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) 1812 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) 1813 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) 1814 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) 1815 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) 1816 CHECK_PROPERTY(dot_crawl, DOT_CRAWL) 1817 } 1818 1819 return -EINVAL; /* unknown property */ 1820 1821 set_value: 1822 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &temp_value, 2)) 1823 return -EIO; 1824 1825 1826 done: 1827 if (psb_intel_sdvo->base.base.crtc) { 1828 struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc; 1829 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, 1830 crtc->y, crtc->fb); 1831 } 1832 1833 return 0; 1834 #undef CHECK_PROPERTY 1835 } 1836 1837 static void psb_intel_sdvo_save(struct drm_connector *connector) 1838 { 1839 struct drm_device *dev = connector->dev; 1840 struct psb_intel_encoder *psb_intel_encoder = 1841 psb_intel_attached_encoder(connector); 1842 struct psb_intel_sdvo *sdvo = 1843 to_psb_intel_sdvo(&psb_intel_encoder->base); 1844 1845 sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg); 1846 } 1847 1848 static void psb_intel_sdvo_restore(struct drm_connector *connector) 1849 { 1850 struct drm_device *dev = connector->dev; 1851 struct drm_encoder *encoder = 1852 &psb_intel_attached_encoder(connector)->base; 1853 struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder); 1854 struct drm_crtc *crtc = encoder->crtc; 1855 1856 REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO); 1857 1858 /* Force a full mode set on the crtc. We're supposed to have the 1859 mode_config lock already. */ 1860 if (connector->status == connector_status_connected) 1861 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y, 1862 NULL); 1863 } 1864 1865 static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = { 1866 .dpms = psb_intel_sdvo_dpms, 1867 .mode_fixup = psb_intel_sdvo_mode_fixup, 1868 .prepare = psb_intel_encoder_prepare, 1869 .mode_set = psb_intel_sdvo_mode_set, 1870 .commit = psb_intel_encoder_commit, 1871 }; 1872 1873 static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = { 1874 .dpms = drm_helper_connector_dpms, 1875 .save = psb_intel_sdvo_save, 1876 .restore = psb_intel_sdvo_restore, 1877 .detect = psb_intel_sdvo_detect, 1878 .fill_modes = drm_helper_probe_single_connector_modes, 1879 .set_property = psb_intel_sdvo_set_property, 1880 .destroy = psb_intel_sdvo_destroy, 1881 }; 1882 1883 static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs = { 1884 .get_modes = psb_intel_sdvo_get_modes, 1885 .mode_valid = psb_intel_sdvo_mode_valid, 1886 .best_encoder = psb_intel_best_encoder, 1887 }; 1888 1889 static void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder) 1890 { 1891 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 1892 1893 if (psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL) 1894 drm_mode_destroy(encoder->dev, 1895 psb_intel_sdvo->sdvo_lvds_fixed_mode); 1896 1897 i2c_del_adapter(&psb_intel_sdvo->ddc); 1898 psb_intel_encoder_destroy(encoder); 1899 } 1900 1901 static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = { 1902 .destroy = psb_intel_sdvo_enc_destroy, 1903 }; 1904 1905 static void 1906 psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo) 1907 { 1908 /* FIXME: At the moment, ddc_bus = 2 is the only thing that works. 1909 * We need to figure out if this is true for all available poulsbo 1910 * hardware, or if we need to fiddle with the guessing code above. 1911 * The problem might go away if we can parse sdvo mappings from bios */ 1912 sdvo->ddc_bus = 2; 1913 1914 #if 0 1915 uint16_t mask = 0; 1916 unsigned int num_bits; 1917 1918 /* Make a mask of outputs less than or equal to our own priority in the 1919 * list. 1920 */ 1921 switch (sdvo->controlled_output) { 1922 case SDVO_OUTPUT_LVDS1: 1923 mask |= SDVO_OUTPUT_LVDS1; 1924 case SDVO_OUTPUT_LVDS0: 1925 mask |= SDVO_OUTPUT_LVDS0; 1926 case SDVO_OUTPUT_TMDS1: 1927 mask |= SDVO_OUTPUT_TMDS1; 1928 case SDVO_OUTPUT_TMDS0: 1929 mask |= SDVO_OUTPUT_TMDS0; 1930 case SDVO_OUTPUT_RGB1: 1931 mask |= SDVO_OUTPUT_RGB1; 1932 case SDVO_OUTPUT_RGB0: 1933 mask |= SDVO_OUTPUT_RGB0; 1934 break; 1935 } 1936 1937 /* Count bits to find what number we are in the priority list. */ 1938 mask &= sdvo->caps.output_flags; 1939 num_bits = hweight16(mask); 1940 /* If more than 3 outputs, default to DDC bus 3 for now. */ 1941 if (num_bits > 3) 1942 num_bits = 3; 1943 1944 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 1945 sdvo->ddc_bus = 1 << num_bits; 1946 #endif 1947 } 1948 1949 /** 1950 * Choose the appropriate DDC bus for control bus switch command for this 1951 * SDVO output based on the controlled output. 1952 * 1953 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 1954 * outputs, then LVDS outputs. 1955 */ 1956 static void 1957 psb_intel_sdvo_select_ddc_bus(struct drm_psb_private *dev_priv, 1958 struct psb_intel_sdvo *sdvo, u32 reg) 1959 { 1960 struct sdvo_device_mapping *mapping; 1961 1962 if (IS_SDVOB(reg)) 1963 mapping = &(dev_priv->sdvo_mappings[0]); 1964 else 1965 mapping = &(dev_priv->sdvo_mappings[1]); 1966 1967 if (mapping->initialized) 1968 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 1969 else 1970 psb_intel_sdvo_guess_ddc_bus(sdvo); 1971 } 1972 1973 static void 1974 psb_intel_sdvo_select_i2c_bus(struct drm_psb_private *dev_priv, 1975 struct psb_intel_sdvo *sdvo, u32 reg) 1976 { 1977 struct sdvo_device_mapping *mapping; 1978 u8 pin, speed; 1979 1980 if (IS_SDVOB(reg)) 1981 mapping = &dev_priv->sdvo_mappings[0]; 1982 else 1983 mapping = &dev_priv->sdvo_mappings[1]; 1984 1985 pin = GMBUS_PORT_DPB; 1986 speed = GMBUS_RATE_1MHZ >> 8; 1987 if (mapping->initialized) { 1988 pin = mapping->i2c_pin; 1989 speed = mapping->i2c_speed; 1990 } 1991 1992 if (pin < GMBUS_NUM_PORTS) { 1993 sdvo->i2c = &dev_priv->gmbus[pin].adapter; 1994 gma_intel_gmbus_set_speed(sdvo->i2c, speed); 1995 gma_intel_gmbus_force_bit(sdvo->i2c, true); 1996 } else 1997 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter; 1998 } 1999 2000 static bool 2001 psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo *psb_intel_sdvo, int device) 2002 { 2003 return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo); 2004 } 2005 2006 static u8 2007 psb_intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg) 2008 { 2009 struct drm_psb_private *dev_priv = dev->dev_private; 2010 struct sdvo_device_mapping *my_mapping, *other_mapping; 2011 2012 if (IS_SDVOB(sdvo_reg)) { 2013 my_mapping = &dev_priv->sdvo_mappings[0]; 2014 other_mapping = &dev_priv->sdvo_mappings[1]; 2015 } else { 2016 my_mapping = &dev_priv->sdvo_mappings[1]; 2017 other_mapping = &dev_priv->sdvo_mappings[0]; 2018 } 2019 2020 /* If the BIOS described our SDVO device, take advantage of it. */ 2021 if (my_mapping->slave_addr) 2022 return my_mapping->slave_addr; 2023 2024 /* If the BIOS only described a different SDVO device, use the 2025 * address that it isn't using. 2026 */ 2027 if (other_mapping->slave_addr) { 2028 if (other_mapping->slave_addr == 0x70) 2029 return 0x72; 2030 else 2031 return 0x70; 2032 } 2033 2034 /* No SDVO device info is found for another DVO port, 2035 * so use mapping assumption we had before BIOS parsing. 2036 */ 2037 if (IS_SDVOB(sdvo_reg)) 2038 return 0x70; 2039 else 2040 return 0x72; 2041 } 2042 2043 static void 2044 psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector *connector, 2045 struct psb_intel_sdvo *encoder) 2046 { 2047 drm_connector_init(encoder->base.base.dev, 2048 &connector->base.base, 2049 &psb_intel_sdvo_connector_funcs, 2050 connector->base.base.connector_type); 2051 2052 drm_connector_helper_add(&connector->base.base, 2053 &psb_intel_sdvo_connector_helper_funcs); 2054 2055 connector->base.base.interlace_allowed = 0; 2056 connector->base.base.doublescan_allowed = 0; 2057 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 2058 2059 psb_intel_connector_attach_encoder(&connector->base, &encoder->base); 2060 drm_sysfs_connector_add(&connector->base.base); 2061 } 2062 2063 static void 2064 psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector *connector) 2065 { 2066 /* FIXME: We don't support HDMI at the moment 2067 struct drm_device *dev = connector->base.base.dev; 2068 2069 intel_attach_force_audio_property(&connector->base.base); 2070 intel_attach_broadcast_rgb_property(&connector->base.base); 2071 */ 2072 } 2073 2074 static bool 2075 psb_intel_sdvo_dvi_init(struct psb_intel_sdvo *psb_intel_sdvo, int device) 2076 { 2077 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2078 struct drm_connector *connector; 2079 struct psb_intel_connector *intel_connector; 2080 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2081 2082 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2083 if (!psb_intel_sdvo_connector) 2084 return false; 2085 2086 if (device == 0) { 2087 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 2088 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2089 } else if (device == 1) { 2090 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 2091 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2092 } 2093 2094 intel_connector = &psb_intel_sdvo_connector->base; 2095 connector = &intel_connector->base; 2096 // connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 2097 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2098 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2099 2100 if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo, device)) { 2101 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2102 psb_intel_sdvo->is_hdmi = true; 2103 } 2104 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2105 (1 << INTEL_ANALOG_CLONE_BIT)); 2106 2107 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo); 2108 if (psb_intel_sdvo->is_hdmi) 2109 psb_intel_sdvo_add_hdmi_properties(psb_intel_sdvo_connector); 2110 2111 return true; 2112 } 2113 2114 static bool 2115 psb_intel_sdvo_tv_init(struct psb_intel_sdvo *psb_intel_sdvo, int type) 2116 { 2117 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2118 struct drm_connector *connector; 2119 struct psb_intel_connector *intel_connector; 2120 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2121 2122 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2123 if (!psb_intel_sdvo_connector) 2124 return false; 2125 2126 intel_connector = &psb_intel_sdvo_connector->base; 2127 connector = &intel_connector->base; 2128 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2129 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2130 2131 psb_intel_sdvo->controlled_output |= type; 2132 psb_intel_sdvo_connector->output_flag = type; 2133 2134 psb_intel_sdvo->is_tv = true; 2135 psb_intel_sdvo->base.needs_tv_clock = true; 2136 psb_intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; 2137 2138 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo); 2139 2140 if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo, psb_intel_sdvo_connector, type)) 2141 goto err; 2142 2143 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector)) 2144 goto err; 2145 2146 return true; 2147 2148 err: 2149 psb_intel_sdvo_destroy(connector); 2150 return false; 2151 } 2152 2153 static bool 2154 psb_intel_sdvo_analog_init(struct psb_intel_sdvo *psb_intel_sdvo, int device) 2155 { 2156 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2157 struct drm_connector *connector; 2158 struct psb_intel_connector *intel_connector; 2159 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2160 2161 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2162 if (!psb_intel_sdvo_connector) 2163 return false; 2164 2165 intel_connector = &psb_intel_sdvo_connector->base; 2166 connector = &intel_connector->base; 2167 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2168 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2169 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2170 2171 if (device == 0) { 2172 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2173 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2174 } else if (device == 1) { 2175 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2176 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2177 } 2178 2179 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2180 (1 << INTEL_ANALOG_CLONE_BIT)); 2181 2182 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, 2183 psb_intel_sdvo); 2184 return true; 2185 } 2186 2187 static bool 2188 psb_intel_sdvo_lvds_init(struct psb_intel_sdvo *psb_intel_sdvo, int device) 2189 { 2190 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2191 struct drm_connector *connector; 2192 struct psb_intel_connector *intel_connector; 2193 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2194 2195 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2196 if (!psb_intel_sdvo_connector) 2197 return false; 2198 2199 intel_connector = &psb_intel_sdvo_connector->base; 2200 connector = &intel_connector->base; 2201 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2202 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2203 2204 if (device == 0) { 2205 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2206 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2207 } else if (device == 1) { 2208 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2209 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2210 } 2211 2212 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) | 2213 (1 << INTEL_SDVO_LVDS_CLONE_BIT)); 2214 2215 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo); 2216 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector)) 2217 goto err; 2218 2219 return true; 2220 2221 err: 2222 psb_intel_sdvo_destroy(connector); 2223 return false; 2224 } 2225 2226 static bool 2227 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags) 2228 { 2229 psb_intel_sdvo->is_tv = false; 2230 psb_intel_sdvo->base.needs_tv_clock = false; 2231 psb_intel_sdvo->is_lvds = false; 2232 2233 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2234 2235 if (flags & SDVO_OUTPUT_TMDS0) 2236 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 0)) 2237 return false; 2238 2239 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2240 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 1)) 2241 return false; 2242 2243 /* TV has no XXX1 function block */ 2244 if (flags & SDVO_OUTPUT_SVID0) 2245 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_SVID0)) 2246 return false; 2247 2248 if (flags & SDVO_OUTPUT_CVBS0) 2249 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_CVBS0)) 2250 return false; 2251 2252 if (flags & SDVO_OUTPUT_RGB0) 2253 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 0)) 2254 return false; 2255 2256 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2257 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 1)) 2258 return false; 2259 2260 if (flags & SDVO_OUTPUT_LVDS0) 2261 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 0)) 2262 return false; 2263 2264 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2265 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 1)) 2266 return false; 2267 2268 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2269 unsigned char bytes[2]; 2270 2271 psb_intel_sdvo->controlled_output = 0; 2272 memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2); 2273 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2274 SDVO_NAME(psb_intel_sdvo), 2275 bytes[0], bytes[1]); 2276 return false; 2277 } 2278 psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1); 2279 2280 return true; 2281 } 2282 2283 static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo, 2284 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 2285 int type) 2286 { 2287 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 2288 struct psb_intel_sdvo_tv_format format; 2289 uint32_t format_map, i; 2290 2291 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, type)) 2292 return false; 2293 2294 BUILD_BUG_ON(sizeof(format) != 6); 2295 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2296 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2297 &format, sizeof(format))) 2298 return false; 2299 2300 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2301 2302 if (format_map == 0) 2303 return false; 2304 2305 psb_intel_sdvo_connector->format_supported_num = 0; 2306 for (i = 0 ; i < TV_FORMAT_NUM; i++) 2307 if (format_map & (1 << i)) 2308 psb_intel_sdvo_connector->tv_format_supported[psb_intel_sdvo_connector->format_supported_num++] = i; 2309 2310 2311 psb_intel_sdvo_connector->tv_format = 2312 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2313 "mode", psb_intel_sdvo_connector->format_supported_num); 2314 if (!psb_intel_sdvo_connector->tv_format) 2315 return false; 2316 2317 for (i = 0; i < psb_intel_sdvo_connector->format_supported_num; i++) 2318 drm_property_add_enum( 2319 psb_intel_sdvo_connector->tv_format, i, 2320 i, tv_format_names[psb_intel_sdvo_connector->tv_format_supported[i]]); 2321 2322 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[0]; 2323 drm_object_attach_property(&psb_intel_sdvo_connector->base.base.base, 2324 psb_intel_sdvo_connector->tv_format, 0); 2325 return true; 2326 2327 } 2328 2329 #define ENHANCEMENT(name, NAME) do { \ 2330 if (enhancements.name) { \ 2331 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 2332 !psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 2333 return false; \ 2334 psb_intel_sdvo_connector->max_##name = data_value[0]; \ 2335 psb_intel_sdvo_connector->cur_##name = response; \ 2336 psb_intel_sdvo_connector->name = \ 2337 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 2338 if (!psb_intel_sdvo_connector->name) return false; \ 2339 drm_object_attach_property(&connector->base, \ 2340 psb_intel_sdvo_connector->name, \ 2341 psb_intel_sdvo_connector->cur_##name); \ 2342 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 2343 data_value[0], data_value[1], response); \ 2344 } \ 2345 } while(0) 2346 2347 static bool 2348 psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo *psb_intel_sdvo, 2349 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 2350 struct psb_intel_sdvo_enhancements_reply enhancements) 2351 { 2352 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 2353 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base; 2354 uint16_t response, data_value[2]; 2355 2356 /* when horizontal overscan is supported, Add the left/right property */ 2357 if (enhancements.overscan_h) { 2358 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2359 SDVO_CMD_GET_MAX_OVERSCAN_H, 2360 &data_value, 4)) 2361 return false; 2362 2363 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2364 SDVO_CMD_GET_OVERSCAN_H, 2365 &response, 2)) 2366 return false; 2367 2368 psb_intel_sdvo_connector->max_hscan = data_value[0]; 2369 psb_intel_sdvo_connector->left_margin = data_value[0] - response; 2370 psb_intel_sdvo_connector->right_margin = psb_intel_sdvo_connector->left_margin; 2371 psb_intel_sdvo_connector->left = 2372 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 2373 if (!psb_intel_sdvo_connector->left) 2374 return false; 2375 2376 drm_object_attach_property(&connector->base, 2377 psb_intel_sdvo_connector->left, 2378 psb_intel_sdvo_connector->left_margin); 2379 2380 psb_intel_sdvo_connector->right = 2381 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 2382 if (!psb_intel_sdvo_connector->right) 2383 return false; 2384 2385 drm_object_attach_property(&connector->base, 2386 psb_intel_sdvo_connector->right, 2387 psb_intel_sdvo_connector->right_margin); 2388 DRM_DEBUG_KMS("h_overscan: max %d, " 2389 "default %d, current %d\n", 2390 data_value[0], data_value[1], response); 2391 } 2392 2393 if (enhancements.overscan_v) { 2394 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2395 SDVO_CMD_GET_MAX_OVERSCAN_V, 2396 &data_value, 4)) 2397 return false; 2398 2399 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2400 SDVO_CMD_GET_OVERSCAN_V, 2401 &response, 2)) 2402 return false; 2403 2404 psb_intel_sdvo_connector->max_vscan = data_value[0]; 2405 psb_intel_sdvo_connector->top_margin = data_value[0] - response; 2406 psb_intel_sdvo_connector->bottom_margin = psb_intel_sdvo_connector->top_margin; 2407 psb_intel_sdvo_connector->top = 2408 drm_property_create_range(dev, 0, "top_margin", 0, data_value[0]); 2409 if (!psb_intel_sdvo_connector->top) 2410 return false; 2411 2412 drm_object_attach_property(&connector->base, 2413 psb_intel_sdvo_connector->top, 2414 psb_intel_sdvo_connector->top_margin); 2415 2416 psb_intel_sdvo_connector->bottom = 2417 drm_property_create_range(dev, 0, "bottom_margin", 0, data_value[0]); 2418 if (!psb_intel_sdvo_connector->bottom) 2419 return false; 2420 2421 drm_object_attach_property(&connector->base, 2422 psb_intel_sdvo_connector->bottom, 2423 psb_intel_sdvo_connector->bottom_margin); 2424 DRM_DEBUG_KMS("v_overscan: max %d, " 2425 "default %d, current %d\n", 2426 data_value[0], data_value[1], response); 2427 } 2428 2429 ENHANCEMENT(hpos, HPOS); 2430 ENHANCEMENT(vpos, VPOS); 2431 ENHANCEMENT(saturation, SATURATION); 2432 ENHANCEMENT(contrast, CONTRAST); 2433 ENHANCEMENT(hue, HUE); 2434 ENHANCEMENT(sharpness, SHARPNESS); 2435 ENHANCEMENT(brightness, BRIGHTNESS); 2436 ENHANCEMENT(flicker_filter, FLICKER_FILTER); 2437 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 2438 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); 2439 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); 2440 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); 2441 2442 if (enhancements.dot_crawl) { 2443 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 2444 return false; 2445 2446 psb_intel_sdvo_connector->max_dot_crawl = 1; 2447 psb_intel_sdvo_connector->cur_dot_crawl = response & 0x1; 2448 psb_intel_sdvo_connector->dot_crawl = 2449 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 2450 if (!psb_intel_sdvo_connector->dot_crawl) 2451 return false; 2452 2453 drm_object_attach_property(&connector->base, 2454 psb_intel_sdvo_connector->dot_crawl, 2455 psb_intel_sdvo_connector->cur_dot_crawl); 2456 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 2457 } 2458 2459 return true; 2460 } 2461 2462 static bool 2463 psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo *psb_intel_sdvo, 2464 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 2465 struct psb_intel_sdvo_enhancements_reply enhancements) 2466 { 2467 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 2468 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base; 2469 uint16_t response, data_value[2]; 2470 2471 ENHANCEMENT(brightness, BRIGHTNESS); 2472 2473 return true; 2474 } 2475 #undef ENHANCEMENT 2476 2477 static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo, 2478 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector) 2479 { 2480 union { 2481 struct psb_intel_sdvo_enhancements_reply reply; 2482 uint16_t response; 2483 } enhancements; 2484 2485 BUILD_BUG_ON(sizeof(enhancements) != 2); 2486 2487 enhancements.response = 0; 2488 psb_intel_sdvo_get_value(psb_intel_sdvo, 2489 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 2490 &enhancements, sizeof(enhancements)); 2491 if (enhancements.response == 0) { 2492 DRM_DEBUG_KMS("No enhancement is supported\n"); 2493 return true; 2494 } 2495 2496 if (IS_TV(psb_intel_sdvo_connector)) 2497 return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply); 2498 else if(IS_LVDS(psb_intel_sdvo_connector)) 2499 return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply); 2500 else 2501 return true; 2502 } 2503 2504 static int psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, 2505 struct i2c_msg *msgs, 2506 int num) 2507 { 2508 struct psb_intel_sdvo *sdvo = adapter->algo_data; 2509 2510 if (!psb_intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 2511 return -EIO; 2512 2513 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); 2514 } 2515 2516 static u32 psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) 2517 { 2518 struct psb_intel_sdvo *sdvo = adapter->algo_data; 2519 return sdvo->i2c->algo->functionality(sdvo->i2c); 2520 } 2521 2522 static const struct i2c_algorithm psb_intel_sdvo_ddc_proxy = { 2523 .master_xfer = psb_intel_sdvo_ddc_proxy_xfer, 2524 .functionality = psb_intel_sdvo_ddc_proxy_func 2525 }; 2526 2527 static bool 2528 psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo, 2529 struct drm_device *dev) 2530 { 2531 sdvo->ddc.owner = THIS_MODULE; 2532 sdvo->ddc.class = I2C_CLASS_DDC; 2533 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); 2534 sdvo->ddc.dev.parent = &dev->pdev->dev; 2535 sdvo->ddc.algo_data = sdvo; 2536 sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy; 2537 2538 return i2c_add_adapter(&sdvo->ddc) == 0; 2539 } 2540 2541 bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg) 2542 { 2543 struct drm_psb_private *dev_priv = dev->dev_private; 2544 struct psb_intel_encoder *psb_intel_encoder; 2545 struct psb_intel_sdvo *psb_intel_sdvo; 2546 int i; 2547 2548 psb_intel_sdvo = kzalloc(sizeof(struct psb_intel_sdvo), GFP_KERNEL); 2549 if (!psb_intel_sdvo) 2550 return false; 2551 2552 psb_intel_sdvo->sdvo_reg = sdvo_reg; 2553 psb_intel_sdvo->slave_addr = psb_intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1; 2554 psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg); 2555 if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo, dev)) { 2556 kfree(psb_intel_sdvo); 2557 return false; 2558 } 2559 2560 /* encoder type will be decided later */ 2561 psb_intel_encoder = &psb_intel_sdvo->base; 2562 psb_intel_encoder->type = INTEL_OUTPUT_SDVO; 2563 drm_encoder_init(dev, &psb_intel_encoder->base, &psb_intel_sdvo_enc_funcs, 0); 2564 2565 /* Read the regs to test if we can talk to the device */ 2566 for (i = 0; i < 0x40; i++) { 2567 u8 byte; 2568 2569 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, i, &byte)) { 2570 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", 2571 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2572 goto err; 2573 } 2574 } 2575 2576 if (IS_SDVOB(sdvo_reg)) 2577 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS; 2578 else 2579 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS; 2580 2581 drm_encoder_helper_add(&psb_intel_encoder->base, &psb_intel_sdvo_helper_funcs); 2582 2583 /* In default case sdvo lvds is false */ 2584 if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps)) 2585 goto err; 2586 2587 if (psb_intel_sdvo_output_setup(psb_intel_sdvo, 2588 psb_intel_sdvo->caps.output_flags) != true) { 2589 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", 2590 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2591 goto err; 2592 } 2593 2594 psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg); 2595 2596 /* Set the input timing to the screen. Assume always input 0. */ 2597 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo)) 2598 goto err; 2599 2600 if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo, 2601 &psb_intel_sdvo->pixel_clock_min, 2602 &psb_intel_sdvo->pixel_clock_max)) 2603 goto err; 2604 2605 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 2606 "clock range %dMHz - %dMHz, " 2607 "input 1: %c, input 2: %c, " 2608 "output 1: %c, output 2: %c\n", 2609 SDVO_NAME(psb_intel_sdvo), 2610 psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id, 2611 psb_intel_sdvo->caps.device_rev_id, 2612 psb_intel_sdvo->pixel_clock_min / 1000, 2613 psb_intel_sdvo->pixel_clock_max / 1000, 2614 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 2615 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 2616 /* check currently supported outputs */ 2617 psb_intel_sdvo->caps.output_flags & 2618 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 2619 psb_intel_sdvo->caps.output_flags & 2620 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 2621 return true; 2622 2623 err: 2624 drm_encoder_cleanup(&psb_intel_encoder->base); 2625 i2c_del_adapter(&psb_intel_sdvo->ddc); 2626 kfree(psb_intel_sdvo); 2627 2628 return false; 2629 } 2630