1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  *
13  * You should have received a copy of the GNU General Public License along with
14  * this program; if not, write to the Free Software Foundation, Inc.,
15  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
16  *
17  * Authors:
18  *	Eric Anholt <eric@anholt.net>
19  *	Dave Airlie <airlied@linux.ie>
20  *	Jesse Barnes <jesse.barnes@intel.com>
21  */
22 
23 #include <linux/i2c.h>
24 #include <linux/pm_runtime.h>
25 
26 #include "intel_bios.h"
27 #include "power.h"
28 #include "psb_drv.h"
29 #include "psb_intel_drv.h"
30 #include "psb_intel_reg.h"
31 
32 /*
33  * LVDS I2C backlight control macros
34  */
35 #define BRIGHTNESS_MAX_LEVEL 100
36 #define BRIGHTNESS_MASK 0xFF
37 #define BLC_I2C_TYPE	0x01
38 #define BLC_PWM_TYPT	0x02
39 
40 #define BLC_POLARITY_NORMAL 0
41 #define BLC_POLARITY_INVERSE 1
42 
43 #define PSB_BLC_MAX_PWM_REG_FREQ       (0xFFFE)
44 #define PSB_BLC_MIN_PWM_REG_FREQ	(0x2)
45 #define PSB_BLC_PWM_PRECISION_FACTOR	(10)
46 #define PSB_BACKLIGHT_PWM_CTL_SHIFT	(16)
47 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
48 
49 struct psb_intel_lvds_priv {
50 	/*
51 	 * Saved LVDO output states
52 	 */
53 	uint32_t savePP_ON;
54 	uint32_t savePP_OFF;
55 	uint32_t saveLVDS;
56 	uint32_t savePP_CONTROL;
57 	uint32_t savePP_CYCLE;
58 	uint32_t savePFIT_CONTROL;
59 	uint32_t savePFIT_PGM_RATIOS;
60 	uint32_t saveBLC_PWM_CTL;
61 
62 	struct psb_intel_i2c_chan *i2c_bus;
63 	struct psb_intel_i2c_chan *ddc_bus;
64 };
65 
66 
67 /*
68  * Returns the maximum level of the backlight duty cycle field.
69  */
70 static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
71 {
72 	struct drm_psb_private *dev_priv = dev->dev_private;
73 	u32 ret;
74 
75 	if (gma_power_begin(dev, false)) {
76 		ret = REG_READ(BLC_PWM_CTL);
77 		gma_power_end(dev);
78 	} else /* Powered off, use the saved value */
79 		ret = dev_priv->regs.saveBLC_PWM_CTL;
80 
81 	/* Top 15bits hold the frequency mask */
82 	ret = (ret &  BACKLIGHT_MODULATION_FREQ_MASK) >>
83 					BACKLIGHT_MODULATION_FREQ_SHIFT;
84 
85         ret *= 2;	/* Return a 16bit range as needed for setting */
86         if (ret == 0)
87                 dev_err(dev->dev, "BL bug: Reg %08x save %08X\n",
88                         REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL);
89 	return ret;
90 }
91 
92 /*
93  * Set LVDS backlight level by I2C command
94  *
95  * FIXME: at some point we need to both track this for PM and also
96  * disable runtime pm on MRST if the brightness is nil (ie blanked)
97  */
98 static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
99 					unsigned int level)
100 {
101 	struct drm_psb_private *dev_priv =
102 		(struct drm_psb_private *)dev->dev_private;
103 
104 	struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
105 	u8 out_buf[2];
106 	unsigned int blc_i2c_brightness;
107 
108 	struct i2c_msg msgs[] = {
109 		{
110 			.addr = lvds_i2c_bus->slave_addr,
111 			.flags = 0,
112 			.len = 2,
113 			.buf = out_buf,
114 		}
115 	};
116 
117 	blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
118 			     BRIGHTNESS_MASK /
119 			     BRIGHTNESS_MAX_LEVEL);
120 
121 	if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
122 		blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
123 
124 	out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
125 	out_buf[1] = (u8)blc_i2c_brightness;
126 
127 	if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) {
128 		dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
129 			dev_priv->lvds_bl->brightnesscmd,
130 			blc_i2c_brightness);
131 		return 0;
132 	}
133 
134 	dev_err(dev->dev, "I2C transfer error\n");
135 	return -1;
136 }
137 
138 
139 static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
140 {
141 	struct drm_psb_private *dev_priv =
142 			(struct drm_psb_private *)dev->dev_private;
143 
144 	u32 max_pwm_blc;
145 	u32 blc_pwm_duty_cycle;
146 
147 	max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
148 
149 	/*BLC_PWM_CTL Should be initiated while backlight device init*/
150 	BUG_ON(max_pwm_blc == 0);
151 
152 	blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
153 
154 	if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
155 		blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
156 
157 	blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
158 	REG_WRITE(BLC_PWM_CTL,
159 		  (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
160 		  (blc_pwm_duty_cycle));
161 
162         dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
163 		  (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
164 		  (blc_pwm_duty_cycle));
165 
166 	return 0;
167 }
168 
169 /*
170  * Set LVDS backlight level either by I2C or PWM
171  */
172 void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
173 {
174 	struct drm_psb_private *dev_priv = dev->dev_private;
175 
176 	dev_dbg(dev->dev, "backlight level is %d\n", level);
177 
178 	if (!dev_priv->lvds_bl) {
179 		dev_err(dev->dev, "NO LVDS backlight info\n");
180 		return;
181 	}
182 
183 	if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
184 		psb_lvds_i2c_set_brightness(dev, level);
185 	else
186 		psb_lvds_pwm_set_brightness(dev, level);
187 }
188 
189 /*
190  * Sets the backlight level.
191  *
192  * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight().
193  */
194 static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
195 {
196 	struct drm_psb_private *dev_priv = dev->dev_private;
197 	u32 blc_pwm_ctl;
198 
199 	if (gma_power_begin(dev, false)) {
200 		blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
201 		blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
202 		REG_WRITE(BLC_PWM_CTL,
203 				(blc_pwm_ctl |
204 				(level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
205 		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
206 					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
207 		gma_power_end(dev);
208 	} else {
209 		blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
210 				~BACKLIGHT_DUTY_CYCLE_MASK;
211 		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
212 					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
213 	}
214 }
215 
216 /*
217  * Sets the power state for the panel.
218  */
219 static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
220 {
221 	struct drm_psb_private *dev_priv = dev->dev_private;
222 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
223 	u32 pp_status;
224 
225 	if (!gma_power_begin(dev, true)) {
226 	        dev_err(dev->dev, "set power, chip off!\n");
227 		return;
228         }
229 
230 	if (on) {
231 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
232 			  POWER_TARGET_ON);
233 		do {
234 			pp_status = REG_READ(PP_STATUS);
235 		} while ((pp_status & PP_ON) == 0);
236 
237 		psb_intel_lvds_set_backlight(dev,
238 					     mode_dev->backlight_duty_cycle);
239 	} else {
240 		psb_intel_lvds_set_backlight(dev, 0);
241 
242 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
243 			  ~POWER_TARGET_ON);
244 		do {
245 			pp_status = REG_READ(PP_STATUS);
246 		} while (pp_status & PP_ON);
247 	}
248 
249 	gma_power_end(dev);
250 }
251 
252 static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
253 {
254 	struct drm_device *dev = encoder->dev;
255 
256 	if (mode == DRM_MODE_DPMS_ON)
257 		psb_intel_lvds_set_power(dev, true);
258 	else
259 		psb_intel_lvds_set_power(dev, false);
260 
261 	/* XXX: We never power down the LVDS pairs. */
262 }
263 
264 static void psb_intel_lvds_save(struct drm_connector *connector)
265 {
266 	struct drm_device *dev = connector->dev;
267 	struct drm_psb_private *dev_priv =
268 		(struct drm_psb_private *)dev->dev_private;
269 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
270 	struct psb_intel_lvds_priv *lvds_priv =
271 		(struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
272 
273 	lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
274 	lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
275 	lvds_priv->saveLVDS = REG_READ(LVDS);
276 	lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
277 	lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
278 	/*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
279 	lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
280 	lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
281 	lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
282 
283 	/*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
284 	dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL &
285 						BACKLIGHT_DUTY_CYCLE_MASK);
286 
287 	/*
288 	 * If the light is off at server startup,
289 	 * just make it full brightness
290 	 */
291 	if (dev_priv->backlight_duty_cycle == 0)
292 		dev_priv->backlight_duty_cycle =
293 		psb_intel_lvds_get_max_backlight(dev);
294 
295 	dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
296 			lvds_priv->savePP_ON,
297 			lvds_priv->savePP_OFF,
298 			lvds_priv->saveLVDS,
299 			lvds_priv->savePP_CONTROL,
300 			lvds_priv->savePP_CYCLE,
301 			lvds_priv->saveBLC_PWM_CTL);
302 }
303 
304 static void psb_intel_lvds_restore(struct drm_connector *connector)
305 {
306 	struct drm_device *dev = connector->dev;
307 	u32 pp_status;
308 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
309 	struct psb_intel_lvds_priv *lvds_priv =
310 		(struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
311 
312 	dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
313 			lvds_priv->savePP_ON,
314 			lvds_priv->savePP_OFF,
315 			lvds_priv->saveLVDS,
316 			lvds_priv->savePP_CONTROL,
317 			lvds_priv->savePP_CYCLE,
318 			lvds_priv->saveBLC_PWM_CTL);
319 
320 	REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
321 	REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
322 	REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
323 	REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
324 	REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
325 	/*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
326 	REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
327 	REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
328 	REG_WRITE(LVDS, lvds_priv->saveLVDS);
329 
330 	if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
331 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
332 			POWER_TARGET_ON);
333 		do {
334 			pp_status = REG_READ(PP_STATUS);
335 		} while ((pp_status & PP_ON) == 0);
336 	} else {
337 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
338 			~POWER_TARGET_ON);
339 		do {
340 			pp_status = REG_READ(PP_STATUS);
341 		} while (pp_status & PP_ON);
342 	}
343 }
344 
345 enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector,
346 				 struct drm_display_mode *mode)
347 {
348 	struct drm_psb_private *dev_priv = connector->dev->dev_private;
349 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
350 	struct drm_display_mode *fixed_mode =
351 					dev_priv->mode_dev.panel_fixed_mode;
352 
353 	if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
354 		fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
355 
356 	/* just in case */
357 	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
358 		return MODE_NO_DBLESCAN;
359 
360 	/* just in case */
361 	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
362 		return MODE_NO_INTERLACE;
363 
364 	if (fixed_mode) {
365 		if (mode->hdisplay > fixed_mode->hdisplay)
366 			return MODE_PANEL;
367 		if (mode->vdisplay > fixed_mode->vdisplay)
368 			return MODE_PANEL;
369 	}
370 	return MODE_OK;
371 }
372 
373 bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
374 				  const struct drm_display_mode *mode,
375 				  struct drm_display_mode *adjusted_mode)
376 {
377 	struct drm_device *dev = encoder->dev;
378 	struct drm_psb_private *dev_priv = dev->dev_private;
379 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
380 	struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
381 	struct drm_encoder *tmp_encoder;
382 	struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
383 	struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
384 
385 	if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
386 		panel_fixed_mode = mode_dev->panel_fixed_mode2;
387 
388 	/* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
389 	if (!IS_MRST(dev) && gma_crtc->pipe == 0) {
390 		pr_err("Can't support LVDS on pipe A\n");
391 		return false;
392 	}
393 	if (IS_MRST(dev) && gma_crtc->pipe != 0) {
394 		pr_err("Must use PIPE A\n");
395 		return false;
396 	}
397 	/* Should never happen!! */
398 	list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
399 			    head) {
400 		if (tmp_encoder != encoder
401 		    && tmp_encoder->crtc == encoder->crtc) {
402 			pr_err("Can't enable LVDS and another encoder on the same pipe\n");
403 			return false;
404 		}
405 	}
406 
407 	/*
408 	 * If we have timings from the BIOS for the panel, put them in
409 	 * to the adjusted mode.  The CRTC will be set up for this mode,
410 	 * with the panel scaling set up to source from the H/VDisplay
411 	 * of the original mode.
412 	 */
413 	if (panel_fixed_mode != NULL) {
414 		adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
415 		adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
416 		adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
417 		adjusted_mode->htotal = panel_fixed_mode->htotal;
418 		adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
419 		adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
420 		adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
421 		adjusted_mode->vtotal = panel_fixed_mode->vtotal;
422 		adjusted_mode->clock = panel_fixed_mode->clock;
423 		drm_mode_set_crtcinfo(adjusted_mode,
424 				      CRTC_INTERLACE_HALVE_V);
425 	}
426 
427 	/*
428 	 * XXX: It would be nice to support lower refresh rates on the
429 	 * panels to reduce power consumption, and perhaps match the
430 	 * user's requested refresh rate.
431 	 */
432 
433 	return true;
434 }
435 
436 static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
437 {
438 	struct drm_device *dev = encoder->dev;
439 	struct drm_psb_private *dev_priv = dev->dev_private;
440 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
441 
442 	if (!gma_power_begin(dev, true))
443 		return;
444 
445 	mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
446 	mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
447 					  BACKLIGHT_DUTY_CYCLE_MASK);
448 
449 	psb_intel_lvds_set_power(dev, false);
450 
451 	gma_power_end(dev);
452 }
453 
454 static void psb_intel_lvds_commit(struct drm_encoder *encoder)
455 {
456 	struct drm_device *dev = encoder->dev;
457 	struct drm_psb_private *dev_priv = dev->dev_private;
458 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
459 
460 	if (mode_dev->backlight_duty_cycle == 0)
461 		mode_dev->backlight_duty_cycle =
462 		    psb_intel_lvds_get_max_backlight(dev);
463 
464 	psb_intel_lvds_set_power(dev, true);
465 }
466 
467 static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
468 				struct drm_display_mode *mode,
469 				struct drm_display_mode *adjusted_mode)
470 {
471 	struct drm_device *dev = encoder->dev;
472 	struct drm_psb_private *dev_priv = dev->dev_private;
473 	u32 pfit_control;
474 
475 	/*
476 	 * The LVDS pin pair will already have been turned on in the
477 	 * psb_intel_crtc_mode_set since it has a large impact on the DPLL
478 	 * settings.
479 	 */
480 
481 	/*
482 	 * Enable automatic panel scaling so that non-native modes fill the
483 	 * screen.  Should be enabled before the pipe is enabled, according to
484 	 * register description and PRM.
485 	 */
486 	if (mode->hdisplay != adjusted_mode->hdisplay ||
487 	    mode->vdisplay != adjusted_mode->vdisplay)
488 		pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
489 				HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
490 				HORIZ_INTERP_BILINEAR);
491 	else
492 		pfit_control = 0;
493 
494 	if (dev_priv->lvds_dither)
495 		pfit_control |= PANEL_8TO6_DITHER_ENABLE;
496 
497 	REG_WRITE(PFIT_CONTROL, pfit_control);
498 }
499 
500 /*
501  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
502  */
503 static int psb_intel_lvds_get_modes(struct drm_connector *connector)
504 {
505 	struct drm_device *dev = connector->dev;
506 	struct drm_psb_private *dev_priv = dev->dev_private;
507 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
508 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
509 	struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
510 	int ret = 0;
511 
512 	if (!IS_MRST(dev))
513 		ret = psb_intel_ddc_get_modes(connector, &lvds_priv->i2c_bus->adapter);
514 
515 	if (ret)
516 		return ret;
517 
518 	if (mode_dev->panel_fixed_mode != NULL) {
519 		struct drm_display_mode *mode =
520 		    drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
521 		drm_mode_probed_add(connector, mode);
522 		return 1;
523 	}
524 
525 	return 0;
526 }
527 
528 /**
529  * psb_intel_lvds_destroy - unregister and free LVDS structures
530  * @connector: connector to free
531  *
532  * Unregister the DDC bus for this connector then free the driver private
533  * structure.
534  */
535 void psb_intel_lvds_destroy(struct drm_connector *connector)
536 {
537 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
538 	struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
539 
540 	psb_intel_i2c_destroy(lvds_priv->ddc_bus);
541 	drm_connector_unregister(connector);
542 	drm_connector_cleanup(connector);
543 	kfree(connector);
544 }
545 
546 int psb_intel_lvds_set_property(struct drm_connector *connector,
547 				       struct drm_property *property,
548 				       uint64_t value)
549 {
550 	struct drm_encoder *encoder = connector->encoder;
551 
552 	if (!encoder)
553 		return -1;
554 
555 	if (!strcmp(property->name, "scaling mode")) {
556 		struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
557 		uint64_t curval;
558 
559 		if (!crtc)
560 			goto set_prop_error;
561 
562 		switch (value) {
563 		case DRM_MODE_SCALE_FULLSCREEN:
564 			break;
565 		case DRM_MODE_SCALE_NO_SCALE:
566 			break;
567 		case DRM_MODE_SCALE_ASPECT:
568 			break;
569 		default:
570 			goto set_prop_error;
571 		}
572 
573 		if (drm_object_property_get_value(&connector->base,
574 						     property,
575 						     &curval))
576 			goto set_prop_error;
577 
578 		if (curval == value)
579 			goto set_prop_done;
580 
581 		if (drm_object_property_set_value(&connector->base,
582 							property,
583 							value))
584 			goto set_prop_error;
585 
586 		if (crtc->saved_mode.hdisplay != 0 &&
587 		    crtc->saved_mode.vdisplay != 0) {
588 			if (!drm_crtc_helper_set_mode(encoder->crtc,
589 						      &crtc->saved_mode,
590 						      encoder->crtc->x,
591 						      encoder->crtc->y,
592 						      encoder->crtc->primary->fb))
593 				goto set_prop_error;
594 		}
595 	} else if (!strcmp(property->name, "backlight")) {
596 		if (drm_object_property_set_value(&connector->base,
597 							property,
598 							value))
599 			goto set_prop_error;
600 		else
601                         gma_backlight_set(encoder->dev, value);
602 	} else if (!strcmp(property->name, "DPMS")) {
603 		const struct drm_encoder_helper_funcs *hfuncs
604 						= encoder->helper_private;
605 		hfuncs->dpms(encoder, value);
606 	}
607 
608 set_prop_done:
609 	return 0;
610 set_prop_error:
611 	return -1;
612 }
613 
614 static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
615 	.dpms = psb_intel_lvds_encoder_dpms,
616 	.mode_fixup = psb_intel_lvds_mode_fixup,
617 	.prepare = psb_intel_lvds_prepare,
618 	.mode_set = psb_intel_lvds_mode_set,
619 	.commit = psb_intel_lvds_commit,
620 };
621 
622 const struct drm_connector_helper_funcs
623 				psb_intel_lvds_connector_helper_funcs = {
624 	.get_modes = psb_intel_lvds_get_modes,
625 	.mode_valid = psb_intel_lvds_mode_valid,
626 	.best_encoder = gma_best_encoder,
627 };
628 
629 const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
630 	.dpms = drm_helper_connector_dpms,
631 	.fill_modes = drm_helper_probe_single_connector_modes,
632 	.set_property = psb_intel_lvds_set_property,
633 	.destroy = psb_intel_lvds_destroy,
634 };
635 
636 
637 static void psb_intel_lvds_enc_destroy(struct drm_encoder *encoder)
638 {
639 	drm_encoder_cleanup(encoder);
640 }
641 
642 const struct drm_encoder_funcs psb_intel_lvds_enc_funcs = {
643 	.destroy = psb_intel_lvds_enc_destroy,
644 };
645 
646 
647 
648 /**
649  * psb_intel_lvds_init - setup LVDS connectors on this device
650  * @dev: drm device
651  *
652  * Create the connector, register the LVDS DDC bus, and try to figure out what
653  * modes we can display on the LVDS panel (if present).
654  */
655 void psb_intel_lvds_init(struct drm_device *dev,
656 			 struct psb_intel_mode_device *mode_dev)
657 {
658 	struct gma_encoder *gma_encoder;
659 	struct gma_connector *gma_connector;
660 	struct psb_intel_lvds_priv *lvds_priv;
661 	struct drm_connector *connector;
662 	struct drm_encoder *encoder;
663 	struct drm_display_mode *scan;	/* *modes, *bios_mode; */
664 	struct drm_crtc *crtc;
665 	struct drm_psb_private *dev_priv = dev->dev_private;
666 	u32 lvds;
667 	int pipe;
668 
669 	gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
670 	if (!gma_encoder) {
671 		dev_err(dev->dev, "gma_encoder allocation error\n");
672 		return;
673 	}
674 
675 	gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
676 	if (!gma_connector) {
677 		dev_err(dev->dev, "gma_connector allocation error\n");
678 		goto failed_encoder;
679 	}
680 
681 	lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
682 	if (!lvds_priv) {
683 		dev_err(dev->dev, "LVDS private allocation error\n");
684 		goto failed_connector;
685 	}
686 
687 	gma_encoder->dev_priv = lvds_priv;
688 
689 	connector = &gma_connector->base;
690 	gma_connector->save = psb_intel_lvds_save;
691 	gma_connector->restore = psb_intel_lvds_restore;
692 
693 	encoder = &gma_encoder->base;
694 	drm_connector_init(dev, connector,
695 			   &psb_intel_lvds_connector_funcs,
696 			   DRM_MODE_CONNECTOR_LVDS);
697 
698 	drm_encoder_init(dev, encoder,
699 			 &psb_intel_lvds_enc_funcs,
700 			 DRM_MODE_ENCODER_LVDS, NULL);
701 
702 	gma_connector_attach_encoder(gma_connector, gma_encoder);
703 	gma_encoder->type = INTEL_OUTPUT_LVDS;
704 
705 	drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
706 	drm_connector_helper_add(connector,
707 				 &psb_intel_lvds_connector_helper_funcs);
708 	connector->display_info.subpixel_order = SubPixelHorizontalRGB;
709 	connector->interlace_allowed = false;
710 	connector->doublescan_allowed = false;
711 
712 	/*Attach connector properties*/
713 	drm_object_attach_property(&connector->base,
714 				      dev->mode_config.scaling_mode_property,
715 				      DRM_MODE_SCALE_FULLSCREEN);
716 	drm_object_attach_property(&connector->base,
717 				      dev_priv->backlight_property,
718 				      BRIGHTNESS_MAX_LEVEL);
719 
720 	/*
721 	 * Set up I2C bus
722 	 * FIXME: distroy i2c_bus when exit
723 	 */
724 	lvds_priv->i2c_bus = psb_intel_i2c_create(dev, GPIOB, "LVDSBLC_B");
725 	if (!lvds_priv->i2c_bus) {
726 		dev_printk(KERN_ERR,
727 			&dev->pdev->dev, "I2C bus registration failed.\n");
728 		goto failed_blc_i2c;
729 	}
730 	lvds_priv->i2c_bus->slave_addr = 0x2C;
731 	dev_priv->lvds_i2c_bus =  lvds_priv->i2c_bus;
732 
733 	/*
734 	 * LVDS discovery:
735 	 * 1) check for EDID on DDC
736 	 * 2) check for VBT data
737 	 * 3) check to see if LVDS is already on
738 	 *    if none of the above, no panel
739 	 * 4) make sure lid is open
740 	 *    if closed, act like it's not there for now
741 	 */
742 
743 	/* Set up the DDC bus. */
744 	lvds_priv->ddc_bus = psb_intel_i2c_create(dev, GPIOC, "LVDSDDC_C");
745 	if (!lvds_priv->ddc_bus) {
746 		dev_printk(KERN_ERR, &dev->pdev->dev,
747 			   "DDC bus registration " "failed.\n");
748 		goto failed_ddc;
749 	}
750 
751 	/*
752 	 * Attempt to get the fixed panel mode from DDC.  Assume that the
753 	 * preferred mode is the right one.
754 	 */
755 	mutex_lock(&dev->mode_config.mutex);
756 	psb_intel_ddc_get_modes(connector, &lvds_priv->ddc_bus->adapter);
757 	list_for_each_entry(scan, &connector->probed_modes, head) {
758 		if (scan->type & DRM_MODE_TYPE_PREFERRED) {
759 			mode_dev->panel_fixed_mode =
760 			    drm_mode_duplicate(dev, scan);
761 			DRM_DEBUG_KMS("Using mode from DDC\n");
762 			goto out;	/* FIXME: check for quirks */
763 		}
764 	}
765 
766 	/* Failed to get EDID, what about VBT? do we need this? */
767 	if (dev_priv->lfp_lvds_vbt_mode) {
768 		mode_dev->panel_fixed_mode =
769 			drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
770 
771 		if (mode_dev->panel_fixed_mode) {
772 			mode_dev->panel_fixed_mode->type |=
773 				DRM_MODE_TYPE_PREFERRED;
774 			DRM_DEBUG_KMS("Using mode from VBT\n");
775 			goto out;
776 		}
777 	}
778 
779 	/*
780 	 * If we didn't get EDID, try checking if the panel is already turned
781 	 * on.	If so, assume that whatever is currently programmed is the
782 	 * correct mode.
783 	 */
784 	lvds = REG_READ(LVDS);
785 	pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
786 	crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
787 
788 	if (crtc && (lvds & LVDS_PORT_EN)) {
789 		mode_dev->panel_fixed_mode =
790 		    psb_intel_crtc_mode_get(dev, crtc);
791 		if (mode_dev->panel_fixed_mode) {
792 			mode_dev->panel_fixed_mode->type |=
793 			    DRM_MODE_TYPE_PREFERRED;
794 			DRM_DEBUG_KMS("Using pre-programmed mode\n");
795 			goto out;	/* FIXME: check for quirks */
796 		}
797 	}
798 
799 	/* If we still don't have a mode after all that, give up. */
800 	if (!mode_dev->panel_fixed_mode) {
801 		dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
802 		goto failed_find;
803 	}
804 
805 	/*
806 	 * Blacklist machines with BIOSes that list an LVDS panel without
807 	 * actually having one.
808 	 */
809 out:
810 	mutex_unlock(&dev->mode_config.mutex);
811 	drm_connector_register(connector);
812 	return;
813 
814 failed_find:
815 	mutex_unlock(&dev->mode_config.mutex);
816 	psb_intel_i2c_destroy(lvds_priv->ddc_bus);
817 failed_ddc:
818 	psb_intel_i2c_destroy(lvds_priv->i2c_bus);
819 failed_blc_i2c:
820 	drm_encoder_cleanup(encoder);
821 	drm_connector_cleanup(connector);
822 failed_connector:
823 	kfree(gma_connector);
824 failed_encoder:
825 	kfree(gma_encoder);
826 }
827 
828