1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright © 2006-2007 Intel Corporation 4 * 5 * Authors: 6 * Eric Anholt <eric@anholt.net> 7 * Dave Airlie <airlied@linux.ie> 8 * Jesse Barnes <jesse.barnes@intel.com> 9 */ 10 11 #include <linux/i2c.h> 12 #include <drm/drmP.h> 13 14 #include "intel_bios.h" 15 #include "psb_drv.h" 16 #include "psb_intel_drv.h" 17 #include "psb_intel_reg.h" 18 #include "power.h" 19 #include <linux/pm_runtime.h> 20 21 /* 22 * LVDS I2C backlight control macros 23 */ 24 #define BRIGHTNESS_MAX_LEVEL 100 25 #define BRIGHTNESS_MASK 0xFF 26 #define BLC_I2C_TYPE 0x01 27 #define BLC_PWM_TYPT 0x02 28 29 #define BLC_POLARITY_NORMAL 0 30 #define BLC_POLARITY_INVERSE 1 31 32 #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE) 33 #define PSB_BLC_MIN_PWM_REG_FREQ (0x2) 34 #define PSB_BLC_PWM_PRECISION_FACTOR (10) 35 #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16) 36 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE) 37 38 struct psb_intel_lvds_priv { 39 /* 40 * Saved LVDO output states 41 */ 42 uint32_t savePP_ON; 43 uint32_t savePP_OFF; 44 uint32_t saveLVDS; 45 uint32_t savePP_CONTROL; 46 uint32_t savePP_CYCLE; 47 uint32_t savePFIT_CONTROL; 48 uint32_t savePFIT_PGM_RATIOS; 49 uint32_t saveBLC_PWM_CTL; 50 51 struct psb_intel_i2c_chan *i2c_bus; 52 struct psb_intel_i2c_chan *ddc_bus; 53 }; 54 55 56 /* 57 * Returns the maximum level of the backlight duty cycle field. 58 */ 59 static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev) 60 { 61 struct drm_psb_private *dev_priv = dev->dev_private; 62 u32 ret; 63 64 if (gma_power_begin(dev, false)) { 65 ret = REG_READ(BLC_PWM_CTL); 66 gma_power_end(dev); 67 } else /* Powered off, use the saved value */ 68 ret = dev_priv->regs.saveBLC_PWM_CTL; 69 70 /* Top 15bits hold the frequency mask */ 71 ret = (ret & BACKLIGHT_MODULATION_FREQ_MASK) >> 72 BACKLIGHT_MODULATION_FREQ_SHIFT; 73 74 ret *= 2; /* Return a 16bit range as needed for setting */ 75 if (ret == 0) 76 dev_err(dev->dev, "BL bug: Reg %08x save %08X\n", 77 REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL); 78 return ret; 79 } 80 81 /* 82 * Set LVDS backlight level by I2C command 83 * 84 * FIXME: at some point we need to both track this for PM and also 85 * disable runtime pm on MRST if the brightness is nil (ie blanked) 86 */ 87 static int psb_lvds_i2c_set_brightness(struct drm_device *dev, 88 unsigned int level) 89 { 90 struct drm_psb_private *dev_priv = 91 (struct drm_psb_private *)dev->dev_private; 92 93 struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus; 94 u8 out_buf[2]; 95 unsigned int blc_i2c_brightness; 96 97 struct i2c_msg msgs[] = { 98 { 99 .addr = lvds_i2c_bus->slave_addr, 100 .flags = 0, 101 .len = 2, 102 .buf = out_buf, 103 } 104 }; 105 106 blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level * 107 BRIGHTNESS_MASK / 108 BRIGHTNESS_MAX_LEVEL); 109 110 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE) 111 blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness; 112 113 out_buf[0] = dev_priv->lvds_bl->brightnesscmd; 114 out_buf[1] = (u8)blc_i2c_brightness; 115 116 if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) { 117 dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n", 118 dev_priv->lvds_bl->brightnesscmd, 119 blc_i2c_brightness); 120 return 0; 121 } 122 123 dev_err(dev->dev, "I2C transfer error\n"); 124 return -1; 125 } 126 127 128 static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level) 129 { 130 struct drm_psb_private *dev_priv = 131 (struct drm_psb_private *)dev->dev_private; 132 133 u32 max_pwm_blc; 134 u32 blc_pwm_duty_cycle; 135 136 max_pwm_blc = psb_intel_lvds_get_max_backlight(dev); 137 138 /*BLC_PWM_CTL Should be initiated while backlight device init*/ 139 BUG_ON(max_pwm_blc == 0); 140 141 blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL; 142 143 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE) 144 blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle; 145 146 blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR; 147 REG_WRITE(BLC_PWM_CTL, 148 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) | 149 (blc_pwm_duty_cycle)); 150 151 dev_info(dev->dev, "Backlight lvds set brightness %08x\n", 152 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) | 153 (blc_pwm_duty_cycle)); 154 155 return 0; 156 } 157 158 /* 159 * Set LVDS backlight level either by I2C or PWM 160 */ 161 void psb_intel_lvds_set_brightness(struct drm_device *dev, int level) 162 { 163 struct drm_psb_private *dev_priv = dev->dev_private; 164 165 dev_dbg(dev->dev, "backlight level is %d\n", level); 166 167 if (!dev_priv->lvds_bl) { 168 dev_err(dev->dev, "NO LVDS backlight info\n"); 169 return; 170 } 171 172 if (dev_priv->lvds_bl->type == BLC_I2C_TYPE) 173 psb_lvds_i2c_set_brightness(dev, level); 174 else 175 psb_lvds_pwm_set_brightness(dev, level); 176 } 177 178 /* 179 * Sets the backlight level. 180 * 181 * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight(). 182 */ 183 static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level) 184 { 185 struct drm_psb_private *dev_priv = dev->dev_private; 186 u32 blc_pwm_ctl; 187 188 if (gma_power_begin(dev, false)) { 189 blc_pwm_ctl = REG_READ(BLC_PWM_CTL); 190 blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK; 191 REG_WRITE(BLC_PWM_CTL, 192 (blc_pwm_ctl | 193 (level << BACKLIGHT_DUTY_CYCLE_SHIFT))); 194 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl | 195 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)); 196 gma_power_end(dev); 197 } else { 198 blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL & 199 ~BACKLIGHT_DUTY_CYCLE_MASK; 200 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl | 201 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)); 202 } 203 } 204 205 /* 206 * Sets the power state for the panel. 207 */ 208 static void psb_intel_lvds_set_power(struct drm_device *dev, bool on) 209 { 210 struct drm_psb_private *dev_priv = dev->dev_private; 211 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; 212 u32 pp_status; 213 214 if (!gma_power_begin(dev, true)) { 215 dev_err(dev->dev, "set power, chip off!\n"); 216 return; 217 } 218 219 if (on) { 220 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | 221 POWER_TARGET_ON); 222 do { 223 pp_status = REG_READ(PP_STATUS); 224 } while ((pp_status & PP_ON) == 0); 225 226 psb_intel_lvds_set_backlight(dev, 227 mode_dev->backlight_duty_cycle); 228 } else { 229 psb_intel_lvds_set_backlight(dev, 0); 230 231 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & 232 ~POWER_TARGET_ON); 233 do { 234 pp_status = REG_READ(PP_STATUS); 235 } while (pp_status & PP_ON); 236 } 237 238 gma_power_end(dev); 239 } 240 241 static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode) 242 { 243 struct drm_device *dev = encoder->dev; 244 245 if (mode == DRM_MODE_DPMS_ON) 246 psb_intel_lvds_set_power(dev, true); 247 else 248 psb_intel_lvds_set_power(dev, false); 249 250 /* XXX: We never power down the LVDS pairs. */ 251 } 252 253 static void psb_intel_lvds_save(struct drm_connector *connector) 254 { 255 struct drm_device *dev = connector->dev; 256 struct drm_psb_private *dev_priv = 257 (struct drm_psb_private *)dev->dev_private; 258 struct gma_encoder *gma_encoder = gma_attached_encoder(connector); 259 struct psb_intel_lvds_priv *lvds_priv = 260 (struct psb_intel_lvds_priv *)gma_encoder->dev_priv; 261 262 lvds_priv->savePP_ON = REG_READ(LVDSPP_ON); 263 lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF); 264 lvds_priv->saveLVDS = REG_READ(LVDS); 265 lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL); 266 lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE); 267 /*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/ 268 lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); 269 lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL); 270 lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS); 271 272 /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/ 273 dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL & 274 BACKLIGHT_DUTY_CYCLE_MASK); 275 276 /* 277 * If the light is off at server startup, 278 * just make it full brightness 279 */ 280 if (dev_priv->backlight_duty_cycle == 0) 281 dev_priv->backlight_duty_cycle = 282 psb_intel_lvds_get_max_backlight(dev); 283 284 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n", 285 lvds_priv->savePP_ON, 286 lvds_priv->savePP_OFF, 287 lvds_priv->saveLVDS, 288 lvds_priv->savePP_CONTROL, 289 lvds_priv->savePP_CYCLE, 290 lvds_priv->saveBLC_PWM_CTL); 291 } 292 293 static void psb_intel_lvds_restore(struct drm_connector *connector) 294 { 295 struct drm_device *dev = connector->dev; 296 u32 pp_status; 297 struct gma_encoder *gma_encoder = gma_attached_encoder(connector); 298 struct psb_intel_lvds_priv *lvds_priv = 299 (struct psb_intel_lvds_priv *)gma_encoder->dev_priv; 300 301 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n", 302 lvds_priv->savePP_ON, 303 lvds_priv->savePP_OFF, 304 lvds_priv->saveLVDS, 305 lvds_priv->savePP_CONTROL, 306 lvds_priv->savePP_CYCLE, 307 lvds_priv->saveBLC_PWM_CTL); 308 309 REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL); 310 REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL); 311 REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS); 312 REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON); 313 REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF); 314 /*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/ 315 REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE); 316 REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL); 317 REG_WRITE(LVDS, lvds_priv->saveLVDS); 318 319 if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) { 320 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | 321 POWER_TARGET_ON); 322 do { 323 pp_status = REG_READ(PP_STATUS); 324 } while ((pp_status & PP_ON) == 0); 325 } else { 326 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & 327 ~POWER_TARGET_ON); 328 do { 329 pp_status = REG_READ(PP_STATUS); 330 } while (pp_status & PP_ON); 331 } 332 } 333 334 enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector, 335 struct drm_display_mode *mode) 336 { 337 struct drm_psb_private *dev_priv = connector->dev->dev_private; 338 struct gma_encoder *gma_encoder = gma_attached_encoder(connector); 339 struct drm_display_mode *fixed_mode = 340 dev_priv->mode_dev.panel_fixed_mode; 341 342 if (gma_encoder->type == INTEL_OUTPUT_MIPI2) 343 fixed_mode = dev_priv->mode_dev.panel_fixed_mode2; 344 345 /* just in case */ 346 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 347 return MODE_NO_DBLESCAN; 348 349 /* just in case */ 350 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 351 return MODE_NO_INTERLACE; 352 353 if (fixed_mode) { 354 if (mode->hdisplay > fixed_mode->hdisplay) 355 return MODE_PANEL; 356 if (mode->vdisplay > fixed_mode->vdisplay) 357 return MODE_PANEL; 358 } 359 return MODE_OK; 360 } 361 362 bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder, 363 const struct drm_display_mode *mode, 364 struct drm_display_mode *adjusted_mode) 365 { 366 struct drm_device *dev = encoder->dev; 367 struct drm_psb_private *dev_priv = dev->dev_private; 368 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; 369 struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc); 370 struct drm_encoder *tmp_encoder; 371 struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode; 372 struct gma_encoder *gma_encoder = to_gma_encoder(encoder); 373 374 if (gma_encoder->type == INTEL_OUTPUT_MIPI2) 375 panel_fixed_mode = mode_dev->panel_fixed_mode2; 376 377 /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */ 378 if (!IS_MRST(dev) && gma_crtc->pipe == 0) { 379 pr_err("Can't support LVDS on pipe A\n"); 380 return false; 381 } 382 if (IS_MRST(dev) && gma_crtc->pipe != 0) { 383 pr_err("Must use PIPE A\n"); 384 return false; 385 } 386 /* Should never happen!! */ 387 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, 388 head) { 389 if (tmp_encoder != encoder 390 && tmp_encoder->crtc == encoder->crtc) { 391 pr_err("Can't enable LVDS and another encoder on the same pipe\n"); 392 return false; 393 } 394 } 395 396 /* 397 * If we have timings from the BIOS for the panel, put them in 398 * to the adjusted mode. The CRTC will be set up for this mode, 399 * with the panel scaling set up to source from the H/VDisplay 400 * of the original mode. 401 */ 402 if (panel_fixed_mode != NULL) { 403 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay; 404 adjusted_mode->hsync_start = panel_fixed_mode->hsync_start; 405 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end; 406 adjusted_mode->htotal = panel_fixed_mode->htotal; 407 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay; 408 adjusted_mode->vsync_start = panel_fixed_mode->vsync_start; 409 adjusted_mode->vsync_end = panel_fixed_mode->vsync_end; 410 adjusted_mode->vtotal = panel_fixed_mode->vtotal; 411 adjusted_mode->clock = panel_fixed_mode->clock; 412 drm_mode_set_crtcinfo(adjusted_mode, 413 CRTC_INTERLACE_HALVE_V); 414 } 415 416 /* 417 * XXX: It would be nice to support lower refresh rates on the 418 * panels to reduce power consumption, and perhaps match the 419 * user's requested refresh rate. 420 */ 421 422 return true; 423 } 424 425 static void psb_intel_lvds_prepare(struct drm_encoder *encoder) 426 { 427 struct drm_device *dev = encoder->dev; 428 struct drm_psb_private *dev_priv = dev->dev_private; 429 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; 430 431 if (!gma_power_begin(dev, true)) 432 return; 433 434 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); 435 mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL & 436 BACKLIGHT_DUTY_CYCLE_MASK); 437 438 psb_intel_lvds_set_power(dev, false); 439 440 gma_power_end(dev); 441 } 442 443 static void psb_intel_lvds_commit(struct drm_encoder *encoder) 444 { 445 struct drm_device *dev = encoder->dev; 446 struct drm_psb_private *dev_priv = dev->dev_private; 447 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; 448 449 if (mode_dev->backlight_duty_cycle == 0) 450 mode_dev->backlight_duty_cycle = 451 psb_intel_lvds_get_max_backlight(dev); 452 453 psb_intel_lvds_set_power(dev, true); 454 } 455 456 static void psb_intel_lvds_mode_set(struct drm_encoder *encoder, 457 struct drm_display_mode *mode, 458 struct drm_display_mode *adjusted_mode) 459 { 460 struct drm_device *dev = encoder->dev; 461 struct drm_psb_private *dev_priv = dev->dev_private; 462 u32 pfit_control; 463 464 /* 465 * The LVDS pin pair will already have been turned on in the 466 * psb_intel_crtc_mode_set since it has a large impact on the DPLL 467 * settings. 468 */ 469 470 /* 471 * Enable automatic panel scaling so that non-native modes fill the 472 * screen. Should be enabled before the pipe is enabled, according to 473 * register description and PRM. 474 */ 475 if (mode->hdisplay != adjusted_mode->hdisplay || 476 mode->vdisplay != adjusted_mode->vdisplay) 477 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE | 478 HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR | 479 HORIZ_INTERP_BILINEAR); 480 else 481 pfit_control = 0; 482 483 if (dev_priv->lvds_dither) 484 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 485 486 REG_WRITE(PFIT_CONTROL, pfit_control); 487 } 488 489 /* 490 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. 491 */ 492 static int psb_intel_lvds_get_modes(struct drm_connector *connector) 493 { 494 struct drm_device *dev = connector->dev; 495 struct drm_psb_private *dev_priv = dev->dev_private; 496 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; 497 struct gma_encoder *gma_encoder = gma_attached_encoder(connector); 498 struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv; 499 int ret = 0; 500 501 if (!IS_MRST(dev)) 502 ret = psb_intel_ddc_get_modes(connector, &lvds_priv->i2c_bus->adapter); 503 504 if (ret) 505 return ret; 506 507 if (mode_dev->panel_fixed_mode != NULL) { 508 struct drm_display_mode *mode = 509 drm_mode_duplicate(dev, mode_dev->panel_fixed_mode); 510 drm_mode_probed_add(connector, mode); 511 return 1; 512 } 513 514 return 0; 515 } 516 517 /** 518 * psb_intel_lvds_destroy - unregister and free LVDS structures 519 * @connector: connector to free 520 * 521 * Unregister the DDC bus for this connector then free the driver private 522 * structure. 523 */ 524 void psb_intel_lvds_destroy(struct drm_connector *connector) 525 { 526 struct gma_encoder *gma_encoder = gma_attached_encoder(connector); 527 struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv; 528 529 psb_intel_i2c_destroy(lvds_priv->ddc_bus); 530 drm_connector_unregister(connector); 531 drm_connector_cleanup(connector); 532 kfree(connector); 533 } 534 535 int psb_intel_lvds_set_property(struct drm_connector *connector, 536 struct drm_property *property, 537 uint64_t value) 538 { 539 struct drm_encoder *encoder = connector->encoder; 540 541 if (!encoder) 542 return -1; 543 544 if (!strcmp(property->name, "scaling mode")) { 545 struct gma_crtc *crtc = to_gma_crtc(encoder->crtc); 546 uint64_t curval; 547 548 if (!crtc) 549 goto set_prop_error; 550 551 switch (value) { 552 case DRM_MODE_SCALE_FULLSCREEN: 553 break; 554 case DRM_MODE_SCALE_NO_SCALE: 555 break; 556 case DRM_MODE_SCALE_ASPECT: 557 break; 558 default: 559 goto set_prop_error; 560 } 561 562 if (drm_object_property_get_value(&connector->base, 563 property, 564 &curval)) 565 goto set_prop_error; 566 567 if (curval == value) 568 goto set_prop_done; 569 570 if (drm_object_property_set_value(&connector->base, 571 property, 572 value)) 573 goto set_prop_error; 574 575 if (crtc->saved_mode.hdisplay != 0 && 576 crtc->saved_mode.vdisplay != 0) { 577 if (!drm_crtc_helper_set_mode(encoder->crtc, 578 &crtc->saved_mode, 579 encoder->crtc->x, 580 encoder->crtc->y, 581 encoder->crtc->primary->fb)) 582 goto set_prop_error; 583 } 584 } else if (!strcmp(property->name, "backlight")) { 585 if (drm_object_property_set_value(&connector->base, 586 property, 587 value)) 588 goto set_prop_error; 589 else 590 gma_backlight_set(encoder->dev, value); 591 } else if (!strcmp(property->name, "DPMS")) { 592 const struct drm_encoder_helper_funcs *hfuncs 593 = encoder->helper_private; 594 hfuncs->dpms(encoder, value); 595 } 596 597 set_prop_done: 598 return 0; 599 set_prop_error: 600 return -1; 601 } 602 603 static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = { 604 .dpms = psb_intel_lvds_encoder_dpms, 605 .mode_fixup = psb_intel_lvds_mode_fixup, 606 .prepare = psb_intel_lvds_prepare, 607 .mode_set = psb_intel_lvds_mode_set, 608 .commit = psb_intel_lvds_commit, 609 }; 610 611 const struct drm_connector_helper_funcs 612 psb_intel_lvds_connector_helper_funcs = { 613 .get_modes = psb_intel_lvds_get_modes, 614 .mode_valid = psb_intel_lvds_mode_valid, 615 .best_encoder = gma_best_encoder, 616 }; 617 618 const struct drm_connector_funcs psb_intel_lvds_connector_funcs = { 619 .dpms = drm_helper_connector_dpms, 620 .fill_modes = drm_helper_probe_single_connector_modes, 621 .set_property = psb_intel_lvds_set_property, 622 .destroy = psb_intel_lvds_destroy, 623 }; 624 625 626 static void psb_intel_lvds_enc_destroy(struct drm_encoder *encoder) 627 { 628 drm_encoder_cleanup(encoder); 629 } 630 631 const struct drm_encoder_funcs psb_intel_lvds_enc_funcs = { 632 .destroy = psb_intel_lvds_enc_destroy, 633 }; 634 635 636 637 /** 638 * psb_intel_lvds_init - setup LVDS connectors on this device 639 * @dev: drm device 640 * 641 * Create the connector, register the LVDS DDC bus, and try to figure out what 642 * modes we can display on the LVDS panel (if present). 643 */ 644 void psb_intel_lvds_init(struct drm_device *dev, 645 struct psb_intel_mode_device *mode_dev) 646 { 647 struct gma_encoder *gma_encoder; 648 struct gma_connector *gma_connector; 649 struct psb_intel_lvds_priv *lvds_priv; 650 struct drm_connector *connector; 651 struct drm_encoder *encoder; 652 struct drm_display_mode *scan; /* *modes, *bios_mode; */ 653 struct drm_crtc *crtc; 654 struct drm_psb_private *dev_priv = dev->dev_private; 655 u32 lvds; 656 int pipe; 657 658 gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL); 659 if (!gma_encoder) { 660 dev_err(dev->dev, "gma_encoder allocation error\n"); 661 return; 662 } 663 664 gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL); 665 if (!gma_connector) { 666 dev_err(dev->dev, "gma_connector allocation error\n"); 667 goto failed_encoder; 668 } 669 670 lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL); 671 if (!lvds_priv) { 672 dev_err(dev->dev, "LVDS private allocation error\n"); 673 goto failed_connector; 674 } 675 676 gma_encoder->dev_priv = lvds_priv; 677 678 connector = &gma_connector->base; 679 gma_connector->save = psb_intel_lvds_save; 680 gma_connector->restore = psb_intel_lvds_restore; 681 682 encoder = &gma_encoder->base; 683 drm_connector_init(dev, connector, 684 &psb_intel_lvds_connector_funcs, 685 DRM_MODE_CONNECTOR_LVDS); 686 687 drm_encoder_init(dev, encoder, 688 &psb_intel_lvds_enc_funcs, 689 DRM_MODE_ENCODER_LVDS, NULL); 690 691 gma_connector_attach_encoder(gma_connector, gma_encoder); 692 gma_encoder->type = INTEL_OUTPUT_LVDS; 693 694 drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs); 695 drm_connector_helper_add(connector, 696 &psb_intel_lvds_connector_helper_funcs); 697 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 698 connector->interlace_allowed = false; 699 connector->doublescan_allowed = false; 700 701 /*Attach connector properties*/ 702 drm_object_attach_property(&connector->base, 703 dev->mode_config.scaling_mode_property, 704 DRM_MODE_SCALE_FULLSCREEN); 705 drm_object_attach_property(&connector->base, 706 dev_priv->backlight_property, 707 BRIGHTNESS_MAX_LEVEL); 708 709 /* 710 * Set up I2C bus 711 * FIXME: distroy i2c_bus when exit 712 */ 713 lvds_priv->i2c_bus = psb_intel_i2c_create(dev, GPIOB, "LVDSBLC_B"); 714 if (!lvds_priv->i2c_bus) { 715 dev_printk(KERN_ERR, 716 &dev->pdev->dev, "I2C bus registration failed.\n"); 717 goto failed_blc_i2c; 718 } 719 lvds_priv->i2c_bus->slave_addr = 0x2C; 720 dev_priv->lvds_i2c_bus = lvds_priv->i2c_bus; 721 722 /* 723 * LVDS discovery: 724 * 1) check for EDID on DDC 725 * 2) check for VBT data 726 * 3) check to see if LVDS is already on 727 * if none of the above, no panel 728 * 4) make sure lid is open 729 * if closed, act like it's not there for now 730 */ 731 732 /* Set up the DDC bus. */ 733 lvds_priv->ddc_bus = psb_intel_i2c_create(dev, GPIOC, "LVDSDDC_C"); 734 if (!lvds_priv->ddc_bus) { 735 dev_printk(KERN_ERR, &dev->pdev->dev, 736 "DDC bus registration " "failed.\n"); 737 goto failed_ddc; 738 } 739 740 /* 741 * Attempt to get the fixed panel mode from DDC. Assume that the 742 * preferred mode is the right one. 743 */ 744 mutex_lock(&dev->mode_config.mutex); 745 psb_intel_ddc_get_modes(connector, &lvds_priv->ddc_bus->adapter); 746 list_for_each_entry(scan, &connector->probed_modes, head) { 747 if (scan->type & DRM_MODE_TYPE_PREFERRED) { 748 mode_dev->panel_fixed_mode = 749 drm_mode_duplicate(dev, scan); 750 DRM_DEBUG_KMS("Using mode from DDC\n"); 751 goto out; /* FIXME: check for quirks */ 752 } 753 } 754 755 /* Failed to get EDID, what about VBT? do we need this? */ 756 if (dev_priv->lfp_lvds_vbt_mode) { 757 mode_dev->panel_fixed_mode = 758 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); 759 760 if (mode_dev->panel_fixed_mode) { 761 mode_dev->panel_fixed_mode->type |= 762 DRM_MODE_TYPE_PREFERRED; 763 DRM_DEBUG_KMS("Using mode from VBT\n"); 764 goto out; 765 } 766 } 767 768 /* 769 * If we didn't get EDID, try checking if the panel is already turned 770 * on. If so, assume that whatever is currently programmed is the 771 * correct mode. 772 */ 773 lvds = REG_READ(LVDS); 774 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; 775 crtc = psb_intel_get_crtc_from_pipe(dev, pipe); 776 777 if (crtc && (lvds & LVDS_PORT_EN)) { 778 mode_dev->panel_fixed_mode = 779 psb_intel_crtc_mode_get(dev, crtc); 780 if (mode_dev->panel_fixed_mode) { 781 mode_dev->panel_fixed_mode->type |= 782 DRM_MODE_TYPE_PREFERRED; 783 DRM_DEBUG_KMS("Using pre-programmed mode\n"); 784 goto out; /* FIXME: check for quirks */ 785 } 786 } 787 788 /* If we still don't have a mode after all that, give up. */ 789 if (!mode_dev->panel_fixed_mode) { 790 dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n"); 791 goto failed_find; 792 } 793 794 /* 795 * Blacklist machines with BIOSes that list an LVDS panel without 796 * actually having one. 797 */ 798 out: 799 mutex_unlock(&dev->mode_config.mutex); 800 drm_connector_register(connector); 801 return; 802 803 failed_find: 804 mutex_unlock(&dev->mode_config.mutex); 805 psb_intel_i2c_destroy(lvds_priv->ddc_bus); 806 failed_ddc: 807 psb_intel_i2c_destroy(lvds_priv->i2c_bus); 808 failed_blc_i2c: 809 drm_encoder_cleanup(encoder); 810 drm_connector_cleanup(connector); 811 failed_connector: 812 kfree(gma_connector); 813 failed_encoder: 814 kfree(gma_encoder); 815 } 816 817