1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  *
13  * You should have received a copy of the GNU General Public License along with
14  * this program; if not, write to the Free Software Foundation, Inc.,
15  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
16  *
17  * Authors:
18  *	Eric Anholt <eric@anholt.net>
19  *	Dave Airlie <airlied@linux.ie>
20  *	Jesse Barnes <jesse.barnes@intel.com>
21  */
22 
23 #include <linux/i2c.h>
24 #include <drm/drmP.h>
25 
26 #include "intel_bios.h"
27 #include "psb_drv.h"
28 #include "psb_intel_drv.h"
29 #include "psb_intel_reg.h"
30 #include "power.h"
31 #include <linux/pm_runtime.h>
32 
33 /*
34  * LVDS I2C backlight control macros
35  */
36 #define BRIGHTNESS_MAX_LEVEL 100
37 #define BRIGHTNESS_MASK 0xFF
38 #define BLC_I2C_TYPE	0x01
39 #define BLC_PWM_TYPT	0x02
40 
41 #define BLC_POLARITY_NORMAL 0
42 #define BLC_POLARITY_INVERSE 1
43 
44 #define PSB_BLC_MAX_PWM_REG_FREQ       (0xFFFE)
45 #define PSB_BLC_MIN_PWM_REG_FREQ	(0x2)
46 #define PSB_BLC_PWM_PRECISION_FACTOR	(10)
47 #define PSB_BACKLIGHT_PWM_CTL_SHIFT	(16)
48 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
49 
50 struct psb_intel_lvds_priv {
51 	/*
52 	 * Saved LVDO output states
53 	 */
54 	uint32_t savePP_ON;
55 	uint32_t savePP_OFF;
56 	uint32_t saveLVDS;
57 	uint32_t savePP_CONTROL;
58 	uint32_t savePP_CYCLE;
59 	uint32_t savePFIT_CONTROL;
60 	uint32_t savePFIT_PGM_RATIOS;
61 	uint32_t saveBLC_PWM_CTL;
62 
63 	struct psb_intel_i2c_chan *i2c_bus;
64 	struct psb_intel_i2c_chan *ddc_bus;
65 };
66 
67 
68 /*
69  * Returns the maximum level of the backlight duty cycle field.
70  */
71 static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
72 {
73 	struct drm_psb_private *dev_priv = dev->dev_private;
74 	u32 ret;
75 
76 	if (gma_power_begin(dev, false)) {
77 		ret = REG_READ(BLC_PWM_CTL);
78 		gma_power_end(dev);
79 	} else /* Powered off, use the saved value */
80 		ret = dev_priv->regs.saveBLC_PWM_CTL;
81 
82 	/* Top 15bits hold the frequency mask */
83 	ret = (ret &  BACKLIGHT_MODULATION_FREQ_MASK) >>
84 					BACKLIGHT_MODULATION_FREQ_SHIFT;
85 
86         ret *= 2;	/* Return a 16bit range as needed for setting */
87         if (ret == 0)
88                 dev_err(dev->dev, "BL bug: Reg %08x save %08X\n",
89                         REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL);
90 	return ret;
91 }
92 
93 /*
94  * Set LVDS backlight level by I2C command
95  *
96  * FIXME: at some point we need to both track this for PM and also
97  * disable runtime pm on MRST if the brightness is nil (ie blanked)
98  */
99 static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
100 					unsigned int level)
101 {
102 	struct drm_psb_private *dev_priv =
103 		(struct drm_psb_private *)dev->dev_private;
104 
105 	struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
106 	u8 out_buf[2];
107 	unsigned int blc_i2c_brightness;
108 
109 	struct i2c_msg msgs[] = {
110 		{
111 			.addr = lvds_i2c_bus->slave_addr,
112 			.flags = 0,
113 			.len = 2,
114 			.buf = out_buf,
115 		}
116 	};
117 
118 	blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
119 			     BRIGHTNESS_MASK /
120 			     BRIGHTNESS_MAX_LEVEL);
121 
122 	if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
123 		blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
124 
125 	out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
126 	out_buf[1] = (u8)blc_i2c_brightness;
127 
128 	if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) {
129 		dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
130 			dev_priv->lvds_bl->brightnesscmd,
131 			blc_i2c_brightness);
132 		return 0;
133 	}
134 
135 	dev_err(dev->dev, "I2C transfer error\n");
136 	return -1;
137 }
138 
139 
140 static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
141 {
142 	struct drm_psb_private *dev_priv =
143 			(struct drm_psb_private *)dev->dev_private;
144 
145 	u32 max_pwm_blc;
146 	u32 blc_pwm_duty_cycle;
147 
148 	max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
149 
150 	/*BLC_PWM_CTL Should be initiated while backlight device init*/
151 	BUG_ON(max_pwm_blc == 0);
152 
153 	blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
154 
155 	if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
156 		blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
157 
158 	blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
159 	REG_WRITE(BLC_PWM_CTL,
160 		  (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
161 		  (blc_pwm_duty_cycle));
162 
163         dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
164 		  (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
165 		  (blc_pwm_duty_cycle));
166 
167 	return 0;
168 }
169 
170 /*
171  * Set LVDS backlight level either by I2C or PWM
172  */
173 void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
174 {
175 	struct drm_psb_private *dev_priv = dev->dev_private;
176 
177 	dev_dbg(dev->dev, "backlight level is %d\n", level);
178 
179 	if (!dev_priv->lvds_bl) {
180 		dev_err(dev->dev, "NO LVDS backlight info\n");
181 		return;
182 	}
183 
184 	if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
185 		psb_lvds_i2c_set_brightness(dev, level);
186 	else
187 		psb_lvds_pwm_set_brightness(dev, level);
188 }
189 
190 /*
191  * Sets the backlight level.
192  *
193  * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight().
194  */
195 static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
196 {
197 	struct drm_psb_private *dev_priv = dev->dev_private;
198 	u32 blc_pwm_ctl;
199 
200 	if (gma_power_begin(dev, false)) {
201 		blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
202 		blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
203 		REG_WRITE(BLC_PWM_CTL,
204 				(blc_pwm_ctl |
205 				(level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
206 		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
207 					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
208 		gma_power_end(dev);
209 	} else {
210 		blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
211 				~BACKLIGHT_DUTY_CYCLE_MASK;
212 		dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
213 					(level << BACKLIGHT_DUTY_CYCLE_SHIFT));
214 	}
215 }
216 
217 /*
218  * Sets the power state for the panel.
219  */
220 static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
221 {
222 	struct drm_psb_private *dev_priv = dev->dev_private;
223 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
224 	u32 pp_status;
225 
226 	if (!gma_power_begin(dev, true)) {
227 	        dev_err(dev->dev, "set power, chip off!\n");
228 		return;
229         }
230 
231 	if (on) {
232 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
233 			  POWER_TARGET_ON);
234 		do {
235 			pp_status = REG_READ(PP_STATUS);
236 		} while ((pp_status & PP_ON) == 0);
237 
238 		psb_intel_lvds_set_backlight(dev,
239 					     mode_dev->backlight_duty_cycle);
240 	} else {
241 		psb_intel_lvds_set_backlight(dev, 0);
242 
243 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
244 			  ~POWER_TARGET_ON);
245 		do {
246 			pp_status = REG_READ(PP_STATUS);
247 		} while (pp_status & PP_ON);
248 	}
249 
250 	gma_power_end(dev);
251 }
252 
253 static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
254 {
255 	struct drm_device *dev = encoder->dev;
256 
257 	if (mode == DRM_MODE_DPMS_ON)
258 		psb_intel_lvds_set_power(dev, true);
259 	else
260 		psb_intel_lvds_set_power(dev, false);
261 
262 	/* XXX: We never power down the LVDS pairs. */
263 }
264 
265 static void psb_intel_lvds_save(struct drm_connector *connector)
266 {
267 	struct drm_device *dev = connector->dev;
268 	struct drm_psb_private *dev_priv =
269 		(struct drm_psb_private *)dev->dev_private;
270 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
271 	struct psb_intel_lvds_priv *lvds_priv =
272 		(struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
273 
274 	lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
275 	lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
276 	lvds_priv->saveLVDS = REG_READ(LVDS);
277 	lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
278 	lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
279 	/*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
280 	lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
281 	lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
282 	lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
283 
284 	/*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
285 	dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL &
286 						BACKLIGHT_DUTY_CYCLE_MASK);
287 
288 	/*
289 	 * If the light is off at server startup,
290 	 * just make it full brightness
291 	 */
292 	if (dev_priv->backlight_duty_cycle == 0)
293 		dev_priv->backlight_duty_cycle =
294 		psb_intel_lvds_get_max_backlight(dev);
295 
296 	dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
297 			lvds_priv->savePP_ON,
298 			lvds_priv->savePP_OFF,
299 			lvds_priv->saveLVDS,
300 			lvds_priv->savePP_CONTROL,
301 			lvds_priv->savePP_CYCLE,
302 			lvds_priv->saveBLC_PWM_CTL);
303 }
304 
305 static void psb_intel_lvds_restore(struct drm_connector *connector)
306 {
307 	struct drm_device *dev = connector->dev;
308 	u32 pp_status;
309 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
310 	struct psb_intel_lvds_priv *lvds_priv =
311 		(struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
312 
313 	dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
314 			lvds_priv->savePP_ON,
315 			lvds_priv->savePP_OFF,
316 			lvds_priv->saveLVDS,
317 			lvds_priv->savePP_CONTROL,
318 			lvds_priv->savePP_CYCLE,
319 			lvds_priv->saveBLC_PWM_CTL);
320 
321 	REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
322 	REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
323 	REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
324 	REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
325 	REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
326 	/*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
327 	REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
328 	REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
329 	REG_WRITE(LVDS, lvds_priv->saveLVDS);
330 
331 	if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
332 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
333 			POWER_TARGET_ON);
334 		do {
335 			pp_status = REG_READ(PP_STATUS);
336 		} while ((pp_status & PP_ON) == 0);
337 	} else {
338 		REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
339 			~POWER_TARGET_ON);
340 		do {
341 			pp_status = REG_READ(PP_STATUS);
342 		} while (pp_status & PP_ON);
343 	}
344 }
345 
346 int psb_intel_lvds_mode_valid(struct drm_connector *connector,
347 				 struct drm_display_mode *mode)
348 {
349 	struct drm_psb_private *dev_priv = connector->dev->dev_private;
350 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
351 	struct drm_display_mode *fixed_mode =
352 					dev_priv->mode_dev.panel_fixed_mode;
353 
354 	if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
355 		fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
356 
357 	/* just in case */
358 	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
359 		return MODE_NO_DBLESCAN;
360 
361 	/* just in case */
362 	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
363 		return MODE_NO_INTERLACE;
364 
365 	if (fixed_mode) {
366 		if (mode->hdisplay > fixed_mode->hdisplay)
367 			return MODE_PANEL;
368 		if (mode->vdisplay > fixed_mode->vdisplay)
369 			return MODE_PANEL;
370 	}
371 	return MODE_OK;
372 }
373 
374 bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
375 				  const struct drm_display_mode *mode,
376 				  struct drm_display_mode *adjusted_mode)
377 {
378 	struct drm_device *dev = encoder->dev;
379 	struct drm_psb_private *dev_priv = dev->dev_private;
380 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
381 	struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
382 	struct drm_encoder *tmp_encoder;
383 	struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
384 	struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
385 
386 	if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
387 		panel_fixed_mode = mode_dev->panel_fixed_mode2;
388 
389 	/* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
390 	if (!IS_MRST(dev) && gma_crtc->pipe == 0) {
391 		printk(KERN_ERR "Can't support LVDS on pipe A\n");
392 		return false;
393 	}
394 	if (IS_MRST(dev) && gma_crtc->pipe != 0) {
395 		printk(KERN_ERR "Must use PIPE A\n");
396 		return false;
397 	}
398 	/* Should never happen!! */
399 	list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
400 			    head) {
401 		if (tmp_encoder != encoder
402 		    && tmp_encoder->crtc == encoder->crtc) {
403 			printk(KERN_ERR "Can't enable LVDS and another "
404 			       "encoder on the same pipe\n");
405 			return false;
406 		}
407 	}
408 
409 	/*
410 	 * If we have timings from the BIOS for the panel, put them in
411 	 * to the adjusted mode.  The CRTC will be set up for this mode,
412 	 * with the panel scaling set up to source from the H/VDisplay
413 	 * of the original mode.
414 	 */
415 	if (panel_fixed_mode != NULL) {
416 		adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
417 		adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
418 		adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
419 		adjusted_mode->htotal = panel_fixed_mode->htotal;
420 		adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
421 		adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
422 		adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
423 		adjusted_mode->vtotal = panel_fixed_mode->vtotal;
424 		adjusted_mode->clock = panel_fixed_mode->clock;
425 		drm_mode_set_crtcinfo(adjusted_mode,
426 				      CRTC_INTERLACE_HALVE_V);
427 	}
428 
429 	/*
430 	 * XXX: It would be nice to support lower refresh rates on the
431 	 * panels to reduce power consumption, and perhaps match the
432 	 * user's requested refresh rate.
433 	 */
434 
435 	return true;
436 }
437 
438 static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
439 {
440 	struct drm_device *dev = encoder->dev;
441 	struct drm_psb_private *dev_priv = dev->dev_private;
442 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
443 
444 	if (!gma_power_begin(dev, true))
445 		return;
446 
447 	mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
448 	mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
449 					  BACKLIGHT_DUTY_CYCLE_MASK);
450 
451 	psb_intel_lvds_set_power(dev, false);
452 
453 	gma_power_end(dev);
454 }
455 
456 static void psb_intel_lvds_commit(struct drm_encoder *encoder)
457 {
458 	struct drm_device *dev = encoder->dev;
459 	struct drm_psb_private *dev_priv = dev->dev_private;
460 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
461 
462 	if (mode_dev->backlight_duty_cycle == 0)
463 		mode_dev->backlight_duty_cycle =
464 		    psb_intel_lvds_get_max_backlight(dev);
465 
466 	psb_intel_lvds_set_power(dev, true);
467 }
468 
469 static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
470 				struct drm_display_mode *mode,
471 				struct drm_display_mode *adjusted_mode)
472 {
473 	struct drm_device *dev = encoder->dev;
474 	struct drm_psb_private *dev_priv = dev->dev_private;
475 	u32 pfit_control;
476 
477 	/*
478 	 * The LVDS pin pair will already have been turned on in the
479 	 * psb_intel_crtc_mode_set since it has a large impact on the DPLL
480 	 * settings.
481 	 */
482 
483 	/*
484 	 * Enable automatic panel scaling so that non-native modes fill the
485 	 * screen.  Should be enabled before the pipe is enabled, according to
486 	 * register description and PRM.
487 	 */
488 	if (mode->hdisplay != adjusted_mode->hdisplay ||
489 	    mode->vdisplay != adjusted_mode->vdisplay)
490 		pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
491 				HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
492 				HORIZ_INTERP_BILINEAR);
493 	else
494 		pfit_control = 0;
495 
496 	if (dev_priv->lvds_dither)
497 		pfit_control |= PANEL_8TO6_DITHER_ENABLE;
498 
499 	REG_WRITE(PFIT_CONTROL, pfit_control);
500 }
501 
502 /*
503  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
504  */
505 static int psb_intel_lvds_get_modes(struct drm_connector *connector)
506 {
507 	struct drm_device *dev = connector->dev;
508 	struct drm_psb_private *dev_priv = dev->dev_private;
509 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
510 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
511 	struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
512 	int ret = 0;
513 
514 	if (!IS_MRST(dev))
515 		ret = psb_intel_ddc_get_modes(connector, &lvds_priv->i2c_bus->adapter);
516 
517 	if (ret)
518 		return ret;
519 
520 	if (mode_dev->panel_fixed_mode != NULL) {
521 		struct drm_display_mode *mode =
522 		    drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
523 		drm_mode_probed_add(connector, mode);
524 		return 1;
525 	}
526 
527 	return 0;
528 }
529 
530 /**
531  * psb_intel_lvds_destroy - unregister and free LVDS structures
532  * @connector: connector to free
533  *
534  * Unregister the DDC bus for this connector then free the driver private
535  * structure.
536  */
537 void psb_intel_lvds_destroy(struct drm_connector *connector)
538 {
539 	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
540 	struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
541 
542 	psb_intel_i2c_destroy(lvds_priv->ddc_bus);
543 	drm_connector_unregister(connector);
544 	drm_connector_cleanup(connector);
545 	kfree(connector);
546 }
547 
548 int psb_intel_lvds_set_property(struct drm_connector *connector,
549 				       struct drm_property *property,
550 				       uint64_t value)
551 {
552 	struct drm_encoder *encoder = connector->encoder;
553 
554 	if (!encoder)
555 		return -1;
556 
557 	if (!strcmp(property->name, "scaling mode")) {
558 		struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
559 		uint64_t curval;
560 
561 		if (!crtc)
562 			goto set_prop_error;
563 
564 		switch (value) {
565 		case DRM_MODE_SCALE_FULLSCREEN:
566 			break;
567 		case DRM_MODE_SCALE_NO_SCALE:
568 			break;
569 		case DRM_MODE_SCALE_ASPECT:
570 			break;
571 		default:
572 			goto set_prop_error;
573 		}
574 
575 		if (drm_object_property_get_value(&connector->base,
576 						     property,
577 						     &curval))
578 			goto set_prop_error;
579 
580 		if (curval == value)
581 			goto set_prop_done;
582 
583 		if (drm_object_property_set_value(&connector->base,
584 							property,
585 							value))
586 			goto set_prop_error;
587 
588 		if (crtc->saved_mode.hdisplay != 0 &&
589 		    crtc->saved_mode.vdisplay != 0) {
590 			if (!drm_crtc_helper_set_mode(encoder->crtc,
591 						      &crtc->saved_mode,
592 						      encoder->crtc->x,
593 						      encoder->crtc->y,
594 						      encoder->crtc->primary->fb))
595 				goto set_prop_error;
596 		}
597 	} else if (!strcmp(property->name, "backlight")) {
598 		if (drm_object_property_set_value(&connector->base,
599 							property,
600 							value))
601 			goto set_prop_error;
602 		else
603                         gma_backlight_set(encoder->dev, value);
604 	} else if (!strcmp(property->name, "DPMS")) {
605 		const struct drm_encoder_helper_funcs *hfuncs
606 						= encoder->helper_private;
607 		hfuncs->dpms(encoder, value);
608 	}
609 
610 set_prop_done:
611 	return 0;
612 set_prop_error:
613 	return -1;
614 }
615 
616 static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
617 	.dpms = psb_intel_lvds_encoder_dpms,
618 	.mode_fixup = psb_intel_lvds_mode_fixup,
619 	.prepare = psb_intel_lvds_prepare,
620 	.mode_set = psb_intel_lvds_mode_set,
621 	.commit = psb_intel_lvds_commit,
622 };
623 
624 const struct drm_connector_helper_funcs
625 				psb_intel_lvds_connector_helper_funcs = {
626 	.get_modes = psb_intel_lvds_get_modes,
627 	.mode_valid = psb_intel_lvds_mode_valid,
628 	.best_encoder = gma_best_encoder,
629 };
630 
631 const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
632 	.dpms = drm_helper_connector_dpms,
633 	.fill_modes = drm_helper_probe_single_connector_modes,
634 	.set_property = psb_intel_lvds_set_property,
635 	.destroy = psb_intel_lvds_destroy,
636 };
637 
638 
639 static void psb_intel_lvds_enc_destroy(struct drm_encoder *encoder)
640 {
641 	drm_encoder_cleanup(encoder);
642 }
643 
644 const struct drm_encoder_funcs psb_intel_lvds_enc_funcs = {
645 	.destroy = psb_intel_lvds_enc_destroy,
646 };
647 
648 
649 
650 /**
651  * psb_intel_lvds_init - setup LVDS connectors on this device
652  * @dev: drm device
653  *
654  * Create the connector, register the LVDS DDC bus, and try to figure out what
655  * modes we can display on the LVDS panel (if present).
656  */
657 void psb_intel_lvds_init(struct drm_device *dev,
658 			 struct psb_intel_mode_device *mode_dev)
659 {
660 	struct gma_encoder *gma_encoder;
661 	struct gma_connector *gma_connector;
662 	struct psb_intel_lvds_priv *lvds_priv;
663 	struct drm_connector *connector;
664 	struct drm_encoder *encoder;
665 	struct drm_display_mode *scan;	/* *modes, *bios_mode; */
666 	struct drm_crtc *crtc;
667 	struct drm_psb_private *dev_priv = dev->dev_private;
668 	u32 lvds;
669 	int pipe;
670 
671 	gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
672 	if (!gma_encoder) {
673 		dev_err(dev->dev, "gma_encoder allocation error\n");
674 		return;
675 	}
676 
677 	gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
678 	if (!gma_connector) {
679 		dev_err(dev->dev, "gma_connector allocation error\n");
680 		goto failed_encoder;
681 	}
682 
683 	lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
684 	if (!lvds_priv) {
685 		dev_err(dev->dev, "LVDS private allocation error\n");
686 		goto failed_connector;
687 	}
688 
689 	gma_encoder->dev_priv = lvds_priv;
690 
691 	connector = &gma_connector->base;
692 	gma_connector->save = psb_intel_lvds_save;
693 	gma_connector->restore = psb_intel_lvds_restore;
694 
695 	encoder = &gma_encoder->base;
696 	drm_connector_init(dev, connector,
697 			   &psb_intel_lvds_connector_funcs,
698 			   DRM_MODE_CONNECTOR_LVDS);
699 
700 	drm_encoder_init(dev, encoder,
701 			 &psb_intel_lvds_enc_funcs,
702 			 DRM_MODE_ENCODER_LVDS, NULL);
703 
704 	gma_connector_attach_encoder(gma_connector, gma_encoder);
705 	gma_encoder->type = INTEL_OUTPUT_LVDS;
706 
707 	drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
708 	drm_connector_helper_add(connector,
709 				 &psb_intel_lvds_connector_helper_funcs);
710 	connector->display_info.subpixel_order = SubPixelHorizontalRGB;
711 	connector->interlace_allowed = false;
712 	connector->doublescan_allowed = false;
713 
714 	/*Attach connector properties*/
715 	drm_object_attach_property(&connector->base,
716 				      dev->mode_config.scaling_mode_property,
717 				      DRM_MODE_SCALE_FULLSCREEN);
718 	drm_object_attach_property(&connector->base,
719 				      dev_priv->backlight_property,
720 				      BRIGHTNESS_MAX_LEVEL);
721 
722 	/*
723 	 * Set up I2C bus
724 	 * FIXME: distroy i2c_bus when exit
725 	 */
726 	lvds_priv->i2c_bus = psb_intel_i2c_create(dev, GPIOB, "LVDSBLC_B");
727 	if (!lvds_priv->i2c_bus) {
728 		dev_printk(KERN_ERR,
729 			&dev->pdev->dev, "I2C bus registration failed.\n");
730 		goto failed_blc_i2c;
731 	}
732 	lvds_priv->i2c_bus->slave_addr = 0x2C;
733 	dev_priv->lvds_i2c_bus =  lvds_priv->i2c_bus;
734 
735 	/*
736 	 * LVDS discovery:
737 	 * 1) check for EDID on DDC
738 	 * 2) check for VBT data
739 	 * 3) check to see if LVDS is already on
740 	 *    if none of the above, no panel
741 	 * 4) make sure lid is open
742 	 *    if closed, act like it's not there for now
743 	 */
744 
745 	/* Set up the DDC bus. */
746 	lvds_priv->ddc_bus = psb_intel_i2c_create(dev, GPIOC, "LVDSDDC_C");
747 	if (!lvds_priv->ddc_bus) {
748 		dev_printk(KERN_ERR, &dev->pdev->dev,
749 			   "DDC bus registration " "failed.\n");
750 		goto failed_ddc;
751 	}
752 
753 	/*
754 	 * Attempt to get the fixed panel mode from DDC.  Assume that the
755 	 * preferred mode is the right one.
756 	 */
757 	mutex_lock(&dev->mode_config.mutex);
758 	psb_intel_ddc_get_modes(connector, &lvds_priv->ddc_bus->adapter);
759 	list_for_each_entry(scan, &connector->probed_modes, head) {
760 		if (scan->type & DRM_MODE_TYPE_PREFERRED) {
761 			mode_dev->panel_fixed_mode =
762 			    drm_mode_duplicate(dev, scan);
763 			goto out;	/* FIXME: check for quirks */
764 		}
765 	}
766 
767 	/* Failed to get EDID, what about VBT? do we need this? */
768 	if (mode_dev->vbt_mode)
769 		mode_dev->panel_fixed_mode =
770 		    drm_mode_duplicate(dev, mode_dev->vbt_mode);
771 
772 	if (!mode_dev->panel_fixed_mode)
773 		if (dev_priv->lfp_lvds_vbt_mode)
774 			mode_dev->panel_fixed_mode =
775 				drm_mode_duplicate(dev,
776 					dev_priv->lfp_lvds_vbt_mode);
777 
778 	/*
779 	 * If we didn't get EDID, try checking if the panel is already turned
780 	 * on.	If so, assume that whatever is currently programmed is the
781 	 * correct mode.
782 	 */
783 	lvds = REG_READ(LVDS);
784 	pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
785 	crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
786 
787 	if (crtc && (lvds & LVDS_PORT_EN)) {
788 		mode_dev->panel_fixed_mode =
789 		    psb_intel_crtc_mode_get(dev, crtc);
790 		if (mode_dev->panel_fixed_mode) {
791 			mode_dev->panel_fixed_mode->type |=
792 			    DRM_MODE_TYPE_PREFERRED;
793 			goto out;	/* FIXME: check for quirks */
794 		}
795 	}
796 
797 	/* If we still don't have a mode after all that, give up. */
798 	if (!mode_dev->panel_fixed_mode) {
799 		dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
800 		goto failed_find;
801 	}
802 
803 	/*
804 	 * Blacklist machines with BIOSes that list an LVDS panel without
805 	 * actually having one.
806 	 */
807 out:
808 	mutex_unlock(&dev->mode_config.mutex);
809 	drm_connector_register(connector);
810 	return;
811 
812 failed_find:
813 	mutex_unlock(&dev->mode_config.mutex);
814 	psb_intel_i2c_destroy(lvds_priv->ddc_bus);
815 failed_ddc:
816 	psb_intel_i2c_destroy(lvds_priv->i2c_bus);
817 failed_blc_i2c:
818 	drm_encoder_cleanup(encoder);
819 	drm_connector_cleanup(connector);
820 failed_connector:
821 	kfree(gma_connector);
822 failed_encoder:
823 	kfree(gma_encoder);
824 }
825 
826