1 // SPDX-License-Identifier: GPL-2.0-only 2 /************************************************************************** 3 * Copyright (c) 2007-2011, Intel Corporation. 4 * All Rights Reserved. 5 * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA. 6 * All Rights Reserved. 7 * 8 **************************************************************************/ 9 10 #include <linux/cpu.h> 11 #include <linux/module.h> 12 #include <linux/notifier.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/spinlock.h> 15 #include <linux/delay.h> 16 17 #include <asm/set_memory.h> 18 19 #include <acpi/video.h> 20 21 #include <drm/drm.h> 22 #include <drm/drm_aperture.h> 23 #include <drm/drm_drv.h> 24 #include <drm/drm_fb_helper.h> 25 #include <drm/drm_file.h> 26 #include <drm/drm_ioctl.h> 27 #include <drm/drm_pciids.h> 28 #include <drm/drm_vblank.h> 29 30 #include "framebuffer.h" 31 #include "gem.h" 32 #include "intel_bios.h" 33 #include "mid_bios.h" 34 #include "power.h" 35 #include "psb_drv.h" 36 #include "psb_intel_reg.h" 37 #include "psb_irq.h" 38 #include "psb_reg.h" 39 40 static const struct drm_driver driver; 41 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent); 42 43 /* 44 * The table below contains a mapping of the PCI vendor ID and the PCI Device ID 45 * to the different groups of PowerVR 5-series chip designs 46 * 47 * 0x8086 = Intel Corporation 48 * 49 * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx 50 * PowerVR SGX535 - Moorestown - Intel GMA 600 51 * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx 52 * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600 53 * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700, 54 * N2800 55 */ 56 static const struct pci_device_id pciidlist[] = { 57 /* Poulsbo */ 58 { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, 59 { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, 60 /* Oak Trail */ 61 { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 62 { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 63 { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 64 { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 65 { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 66 { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 67 { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 68 { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 69 { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 70 /* Cedar Trail */ 71 { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 72 { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 73 { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 74 { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 75 { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 76 { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 77 { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 78 { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 79 { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 80 { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 81 { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 82 { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 83 { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 84 { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 85 { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 86 { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 87 { 0, } 88 }; 89 MODULE_DEVICE_TABLE(pci, pciidlist); 90 91 /* 92 * Standard IOCTLs. 93 */ 94 static const struct drm_ioctl_desc psb_ioctls[] = { 95 }; 96 97 /** 98 * psb_spank - reset the 2D engine 99 * @dev_priv: our PSB DRM device 100 * 101 * Soft reset the graphics engine and then reload the necessary registers. 102 */ 103 static void psb_spank(struct drm_psb_private *dev_priv) 104 { 105 PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET | 106 _PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET | 107 _PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET | 108 _PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET); 109 PSB_RSGX32(PSB_CR_SOFT_RESET); 110 111 msleep(1); 112 113 PSB_WSGX32(0, PSB_CR_SOFT_RESET); 114 wmb(); 115 PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT, 116 PSB_CR_BIF_CTRL); 117 wmb(); 118 (void) PSB_RSGX32(PSB_CR_BIF_CTRL); 119 120 msleep(1); 121 PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT, 122 PSB_CR_BIF_CTRL); 123 (void) PSB_RSGX32(PSB_CR_BIF_CTRL); 124 PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE); 125 } 126 127 static int psb_do_init(struct drm_device *dev) 128 { 129 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); 130 struct psb_gtt *pg = &dev_priv->gtt; 131 132 uint32_t stolen_gtt; 133 134 if (pg->mmu_gatt_start & 0x0FFFFFFF) { 135 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n"); 136 return -EINVAL; 137 } 138 139 stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4; 140 stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT; 141 stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages; 142 143 dev_priv->gatt_free_offset = pg->mmu_gatt_start + 144 (stolen_gtt << PAGE_SHIFT) * 1024; 145 146 spin_lock_init(&dev_priv->irqmask_lock); 147 148 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0); 149 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1); 150 PSB_RSGX32(PSB_CR_BIF_BANK1); 151 152 /* Do not bypass any MMU access, let them pagefault instead */ 153 PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK), 154 PSB_CR_BIF_CTRL); 155 PSB_RSGX32(PSB_CR_BIF_CTRL); 156 157 psb_spank(dev_priv); 158 159 /* mmu_gatt ?? */ 160 PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE); 161 PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */ 162 163 return 0; 164 } 165 166 static void psb_driver_unload(struct drm_device *dev) 167 { 168 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); 169 170 /* TODO: Kill vblank etc here */ 171 172 gma_backlight_exit(dev); 173 psb_modeset_cleanup(dev); 174 175 gma_irq_uninstall(dev); 176 177 if (dev_priv->ops->chip_teardown) 178 dev_priv->ops->chip_teardown(dev); 179 180 psb_intel_opregion_fini(dev); 181 182 if (dev_priv->pf_pd) { 183 psb_mmu_free_pagedir(dev_priv->pf_pd); 184 dev_priv->pf_pd = NULL; 185 } 186 if (dev_priv->mmu) { 187 struct psb_gtt *pg = &dev_priv->gtt; 188 189 psb_mmu_remove_pfn_sequence( 190 psb_mmu_get_default_pd 191 (dev_priv->mmu), 192 pg->mmu_gatt_start, 193 dev_priv->vram_stolen_size >> PAGE_SHIFT); 194 psb_mmu_driver_takedown(dev_priv->mmu); 195 dev_priv->mmu = NULL; 196 } 197 psb_gem_mm_fini(dev); 198 psb_gtt_fini(dev); 199 if (dev_priv->scratch_page) { 200 set_pages_wb(dev_priv->scratch_page, 1); 201 __free_page(dev_priv->scratch_page); 202 dev_priv->scratch_page = NULL; 203 } 204 if (dev_priv->vdc_reg) { 205 iounmap(dev_priv->vdc_reg); 206 dev_priv->vdc_reg = NULL; 207 } 208 if (dev_priv->sgx_reg) { 209 iounmap(dev_priv->sgx_reg); 210 dev_priv->sgx_reg = NULL; 211 } 212 if (dev_priv->aux_reg) { 213 iounmap(dev_priv->aux_reg); 214 dev_priv->aux_reg = NULL; 215 } 216 pci_dev_put(dev_priv->aux_pdev); 217 pci_dev_put(dev_priv->lpc_pdev); 218 219 /* Destroy VBT data */ 220 psb_intel_destroy_bios(dev); 221 222 gma_power_uninit(dev); 223 } 224 225 static void psb_device_release(void *data) 226 { 227 struct drm_device *dev = data; 228 229 psb_driver_unload(dev); 230 } 231 232 static int psb_driver_load(struct drm_device *dev, unsigned long flags) 233 { 234 struct pci_dev *pdev = to_pci_dev(dev->dev); 235 struct drm_psb_private *dev_priv = to_drm_psb_private(dev); 236 unsigned long resource_start, resource_len; 237 unsigned long irqflags; 238 struct drm_connector_list_iter conn_iter; 239 struct drm_connector *connector; 240 struct gma_encoder *gma_encoder; 241 struct psb_gtt *pg; 242 int ret = -ENOMEM; 243 244 /* initializing driver private data */ 245 246 dev_priv->ops = (struct psb_ops *)flags; 247 248 pg = &dev_priv->gtt; 249 250 pci_set_master(pdev); 251 252 dev_priv->num_pipe = dev_priv->ops->pipes; 253 254 resource_start = pci_resource_start(pdev, PSB_MMIO_RESOURCE); 255 256 dev_priv->vdc_reg = 257 ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE); 258 if (!dev_priv->vdc_reg) 259 goto out_err; 260 261 dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset, 262 PSB_SGX_SIZE); 263 if (!dev_priv->sgx_reg) 264 goto out_err; 265 266 if (IS_MRST(dev)) { 267 int domain = pci_domain_nr(pdev->bus); 268 269 dev_priv->aux_pdev = 270 pci_get_domain_bus_and_slot(domain, 0, 271 PCI_DEVFN(3, 0)); 272 273 if (dev_priv->aux_pdev) { 274 resource_start = pci_resource_start(dev_priv->aux_pdev, 275 PSB_AUX_RESOURCE); 276 resource_len = pci_resource_len(dev_priv->aux_pdev, 277 PSB_AUX_RESOURCE); 278 dev_priv->aux_reg = ioremap(resource_start, 279 resource_len); 280 if (!dev_priv->aux_reg) 281 goto out_err; 282 283 DRM_DEBUG_KMS("Found aux vdc"); 284 } else { 285 /* Couldn't find the aux vdc so map to primary vdc */ 286 dev_priv->aux_reg = dev_priv->vdc_reg; 287 DRM_DEBUG_KMS("Couldn't find aux pci device"); 288 } 289 dev_priv->gmbus_reg = dev_priv->aux_reg; 290 291 dev_priv->lpc_pdev = 292 pci_get_domain_bus_and_slot(domain, 0, 293 PCI_DEVFN(31, 0)); 294 if (dev_priv->lpc_pdev) { 295 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA, 296 &dev_priv->lpc_gpio_base); 297 pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA, 298 (u32)dev_priv->lpc_gpio_base | (1L<<31)); 299 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA, 300 &dev_priv->lpc_gpio_base); 301 dev_priv->lpc_gpio_base &= 0xffc0; 302 if (dev_priv->lpc_gpio_base) 303 DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n", 304 dev_priv->lpc_gpio_base); 305 else { 306 pci_dev_put(dev_priv->lpc_pdev); 307 dev_priv->lpc_pdev = NULL; 308 } 309 } 310 } else { 311 dev_priv->gmbus_reg = dev_priv->vdc_reg; 312 } 313 314 psb_intel_opregion_setup(dev); 315 316 ret = dev_priv->ops->chip_setup(dev); 317 if (ret) 318 goto out_err; 319 320 /* Init OSPM support */ 321 gma_power_init(dev); 322 323 ret = -ENOMEM; 324 325 dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO); 326 if (!dev_priv->scratch_page) 327 goto out_err; 328 329 set_pages_uc(dev_priv->scratch_page, 1); 330 331 ret = psb_gtt_init(dev); 332 if (ret) 333 goto out_err; 334 ret = psb_gem_mm_init(dev); 335 if (ret) 336 goto out_err; 337 338 ret = -ENOMEM; 339 340 dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, NULL); 341 if (!dev_priv->mmu) 342 goto out_err; 343 344 dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0); 345 if (!dev_priv->pf_pd) 346 goto out_err; 347 348 ret = psb_do_init(dev); 349 if (ret) 350 return ret; 351 352 /* Add stolen memory to SGX MMU */ 353 ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu), 354 dev_priv->stolen_base >> PAGE_SHIFT, 355 pg->gatt_start, 356 pg->stolen_size >> PAGE_SHIFT, 0); 357 358 psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0); 359 psb_mmu_set_pd_context(dev_priv->pf_pd, 1); 360 361 PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE); 362 PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE); 363 364 acpi_video_register(); 365 366 /* Setup vertical blanking handling */ 367 ret = drm_vblank_init(dev, dev_priv->num_pipe); 368 if (ret) 369 goto out_err; 370 371 /* 372 * Install interrupt handlers prior to powering off SGX or else we will 373 * crash. 374 */ 375 dev_priv->vdc_irq_mask = 0; 376 dev_priv->pipestat[0] = 0; 377 dev_priv->pipestat[1] = 0; 378 dev_priv->pipestat[2] = 0; 379 spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags); 380 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); 381 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R); 382 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R); 383 spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags); 384 385 gma_irq_install(dev); 386 387 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */ 388 389 psb_modeset_init(dev); 390 psb_fbdev_init(dev); 391 drm_kms_helper_poll_init(dev); 392 393 /* Only add backlight support if we have LVDS or MIPI output */ 394 drm_connector_list_iter_begin(dev, &conn_iter); 395 drm_for_each_connector_iter(connector, &conn_iter) { 396 gma_encoder = gma_attached_encoder(connector); 397 398 if (gma_encoder->type == INTEL_OUTPUT_LVDS || 399 gma_encoder->type == INTEL_OUTPUT_MIPI) { 400 ret = gma_backlight_init(dev); 401 if (ret == 0) 402 acpi_video_register_backlight(); 403 break; 404 } 405 } 406 drm_connector_list_iter_end(&conn_iter); 407 408 if (ret) 409 return ret; 410 psb_intel_opregion_enable_asle(dev); 411 412 return devm_add_action_or_reset(dev->dev, psb_device_release, dev); 413 414 out_err: 415 psb_driver_unload(dev); 416 return ret; 417 } 418 419 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 420 { 421 struct drm_psb_private *dev_priv; 422 struct drm_device *dev; 423 int ret; 424 425 /* 426 * We cannot yet easily find the framebuffer's location in memory. So 427 * remove all framebuffers here. 428 * 429 * TODO: Refactor psb_driver_load() to map vdc_reg earlier. Then we 430 * might be able to read the framebuffer range from the device. 431 */ 432 ret = drm_aperture_remove_framebuffers(true, &driver); 433 if (ret) 434 return ret; 435 436 ret = pcim_enable_device(pdev); 437 if (ret) 438 return ret; 439 440 dev_priv = devm_drm_dev_alloc(&pdev->dev, &driver, struct drm_psb_private, dev); 441 if (IS_ERR(dev_priv)) 442 return PTR_ERR(dev_priv); 443 dev = &dev_priv->dev; 444 445 pci_set_drvdata(pdev, dev); 446 447 ret = psb_driver_load(dev, ent->driver_data); 448 if (ret) 449 return ret; 450 451 ret = drm_dev_register(dev, ent->driver_data); 452 if (ret) 453 return ret; 454 455 return 0; 456 } 457 458 static void psb_pci_remove(struct pci_dev *pdev) 459 { 460 struct drm_device *dev = pci_get_drvdata(pdev); 461 462 drm_dev_unregister(dev); 463 } 464 465 static DEFINE_RUNTIME_DEV_PM_OPS(psb_pm_ops, gma_power_suspend, gma_power_resume, NULL); 466 467 static const struct file_operations psb_gem_fops = { 468 .owner = THIS_MODULE, 469 .open = drm_open, 470 .release = drm_release, 471 .unlocked_ioctl = drm_ioctl, 472 .compat_ioctl = drm_compat_ioctl, 473 .mmap = drm_gem_mmap, 474 .poll = drm_poll, 475 .read = drm_read, 476 }; 477 478 static const struct drm_driver driver = { 479 .driver_features = DRIVER_MODESET | DRIVER_GEM, 480 .lastclose = drm_fb_helper_lastclose, 481 482 .num_ioctls = ARRAY_SIZE(psb_ioctls), 483 484 .dumb_create = psb_gem_dumb_create, 485 .ioctls = psb_ioctls, 486 .fops = &psb_gem_fops, 487 .name = DRIVER_NAME, 488 .desc = DRIVER_DESC, 489 .date = DRIVER_DATE, 490 .major = DRIVER_MAJOR, 491 .minor = DRIVER_MINOR, 492 .patchlevel = DRIVER_PATCHLEVEL 493 }; 494 495 static struct pci_driver psb_pci_driver = { 496 .name = DRIVER_NAME, 497 .id_table = pciidlist, 498 .probe = psb_pci_probe, 499 .remove = psb_pci_remove, 500 .driver.pm = &psb_pm_ops, 501 }; 502 503 static int __init psb_init(void) 504 { 505 if (drm_firmware_drivers_only()) 506 return -ENODEV; 507 508 return pci_register_driver(&psb_pci_driver); 509 } 510 511 static void __exit psb_exit(void) 512 { 513 pci_unregister_driver(&psb_pci_driver); 514 } 515 516 late_initcall(psb_init); 517 module_exit(psb_exit); 518 519 MODULE_AUTHOR(DRIVER_AUTHOR); 520 MODULE_DESCRIPTION(DRIVER_DESC); 521 MODULE_LICENSE("GPL"); 522