xref: /openbmc/linux/drivers/gpu/drm/gma500/psb_drv.c (revision 8e74a48d)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /**************************************************************************
3  * Copyright (c) 2007-2011, Intel Corporation.
4  * All Rights Reserved.
5  * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
6  * All Rights Reserved.
7  *
8  **************************************************************************/
9 
10 #include <linux/cpu.h>
11 #include <linux/module.h>
12 #include <linux/notifier.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/spinlock.h>
15 #include <linux/delay.h>
16 
17 #include <asm/set_memory.h>
18 
19 #include <acpi/video.h>
20 
21 #include <drm/drm.h>
22 #include <drm/drm_aperture.h>
23 #include <drm/drm_drv.h>
24 #include <drm/drm_fb_helper.h>
25 #include <drm/drm_file.h>
26 #include <drm/drm_ioctl.h>
27 #include <drm/drm_pciids.h>
28 #include <drm/drm_vblank.h>
29 
30 #include "framebuffer.h"
31 #include "intel_bios.h"
32 #include "mid_bios.h"
33 #include "power.h"
34 #include "psb_drv.h"
35 #include "psb_intel_reg.h"
36 #include "psb_irq.h"
37 #include "psb_reg.h"
38 
39 static const struct drm_driver driver;
40 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
41 
42 /*
43  * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
44  * to the different groups of PowerVR 5-series chip designs
45  *
46  * 0x8086 = Intel Corporation
47  *
48  * PowerVR SGX535    - Poulsbo    - Intel GMA 500, Intel Atom Z5xx
49  * PowerVR SGX535    - Moorestown - Intel GMA 600
50  * PowerVR SGX535    - Oaktrail   - Intel GMA 600, Intel Atom Z6xx, E6xx
51  * PowerVR SGX545    - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
52  * PowerVR SGX545    - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
53  *                                  N2800
54  */
55 static const struct pci_device_id pciidlist[] = {
56 	/* Poulsbo */
57 	{ 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
58 	{ 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
59 	/* Oak Trail */
60 	{ 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
61 	{ 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
62 	{ 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
63 	{ 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
64 	{ 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
65 	{ 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
66 	{ 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
67 	{ 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
68 	{ 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
69 	/* Cedar Trail */
70 	{ 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
71 	{ 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
72 	{ 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
73 	{ 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
74 	{ 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
75 	{ 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
76 	{ 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
77 	{ 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
78 	{ 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
79 	{ 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
80 	{ 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
81 	{ 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
82 	{ 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
83 	{ 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
84 	{ 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
85 	{ 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
86 	{ 0, }
87 };
88 MODULE_DEVICE_TABLE(pci, pciidlist);
89 
90 /*
91  * Standard IOCTLs.
92  */
93 static const struct drm_ioctl_desc psb_ioctls[] = {
94 };
95 
96 /**
97  *	psb_spank		-	reset the 2D engine
98  *	@dev_priv: our PSB DRM device
99  *
100  *	Soft reset the graphics engine and then reload the necessary registers.
101  */
102 void psb_spank(struct drm_psb_private *dev_priv)
103 {
104 	PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
105 		_PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
106 		_PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
107 		_PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
108 	PSB_RSGX32(PSB_CR_SOFT_RESET);
109 
110 	msleep(1);
111 
112 	PSB_WSGX32(0, PSB_CR_SOFT_RESET);
113 	wmb();
114 	PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
115 		   PSB_CR_BIF_CTRL);
116 	wmb();
117 	(void) PSB_RSGX32(PSB_CR_BIF_CTRL);
118 
119 	msleep(1);
120 	PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
121 		   PSB_CR_BIF_CTRL);
122 	(void) PSB_RSGX32(PSB_CR_BIF_CTRL);
123 	PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
124 }
125 
126 static int psb_do_init(struct drm_device *dev)
127 {
128 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
129 	struct psb_gtt *pg = &dev_priv->gtt;
130 
131 	uint32_t stolen_gtt;
132 
133 	if (pg->mmu_gatt_start & 0x0FFFFFFF) {
134 		dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
135 		return -EINVAL;
136 	}
137 
138 	stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
139 	stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
140 	stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
141 
142 	dev_priv->gatt_free_offset = pg->mmu_gatt_start +
143 	    (stolen_gtt << PAGE_SHIFT) * 1024;
144 
145 	spin_lock_init(&dev_priv->irqmask_lock);
146 
147 	PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
148 	PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
149 	PSB_RSGX32(PSB_CR_BIF_BANK1);
150 
151 	/* Do not bypass any MMU access, let them pagefault instead */
152 	PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
153 		   PSB_CR_BIF_CTRL);
154 	PSB_RSGX32(PSB_CR_BIF_CTRL);
155 
156 	psb_spank(dev_priv);
157 
158 	/* mmu_gatt ?? */
159 	PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
160 	PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
161 
162 	return 0;
163 }
164 
165 static void psb_driver_unload(struct drm_device *dev)
166 {
167 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
168 
169 	/* TODO: Kill vblank etc here */
170 
171 	if (dev_priv->backlight_device)
172 		gma_backlight_exit(dev);
173 	psb_modeset_cleanup(dev);
174 
175 	if (dev_priv->ops->chip_teardown)
176 		dev_priv->ops->chip_teardown(dev);
177 
178 	psb_intel_opregion_fini(dev);
179 
180 	if (dev_priv->pf_pd) {
181 		psb_mmu_free_pagedir(dev_priv->pf_pd);
182 		dev_priv->pf_pd = NULL;
183 	}
184 	if (dev_priv->mmu) {
185 		struct psb_gtt *pg = &dev_priv->gtt;
186 
187 		down_read(&pg->sem);
188 		psb_mmu_remove_pfn_sequence(
189 			psb_mmu_get_default_pd
190 			(dev_priv->mmu),
191 			pg->mmu_gatt_start,
192 			dev_priv->vram_stolen_size >> PAGE_SHIFT);
193 		up_read(&pg->sem);
194 		psb_mmu_driver_takedown(dev_priv->mmu);
195 		dev_priv->mmu = NULL;
196 	}
197 	psb_gtt_takedown(dev);
198 	if (dev_priv->scratch_page) {
199 		set_pages_wb(dev_priv->scratch_page, 1);
200 		__free_page(dev_priv->scratch_page);
201 		dev_priv->scratch_page = NULL;
202 	}
203 	if (dev_priv->vdc_reg) {
204 		iounmap(dev_priv->vdc_reg);
205 		dev_priv->vdc_reg = NULL;
206 	}
207 	if (dev_priv->sgx_reg) {
208 		iounmap(dev_priv->sgx_reg);
209 		dev_priv->sgx_reg = NULL;
210 	}
211 	if (dev_priv->aux_reg) {
212 		iounmap(dev_priv->aux_reg);
213 		dev_priv->aux_reg = NULL;
214 	}
215 	pci_dev_put(dev_priv->aux_pdev);
216 	pci_dev_put(dev_priv->lpc_pdev);
217 
218 	/* Destroy VBT data */
219 	psb_intel_destroy_bios(dev);
220 
221 	gma_power_uninit(dev);
222 }
223 
224 static void psb_device_release(void *data)
225 {
226 	struct drm_device *dev = data;
227 
228 	psb_driver_unload(dev);
229 }
230 
231 static int psb_driver_load(struct drm_device *dev, unsigned long flags)
232 {
233 	struct pci_dev *pdev = to_pci_dev(dev->dev);
234 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
235 	unsigned long resource_start, resource_len;
236 	unsigned long irqflags;
237 	int ret = -ENOMEM;
238 	struct drm_connector *connector;
239 	struct gma_encoder *gma_encoder;
240 	struct psb_gtt *pg;
241 
242 	/* initializing driver private data */
243 
244 	dev_priv->ops = (struct psb_ops *)flags;
245 
246 	pg = &dev_priv->gtt;
247 
248 	pci_set_master(pdev);
249 
250 	dev_priv->num_pipe = dev_priv->ops->pipes;
251 
252 	resource_start = pci_resource_start(pdev, PSB_MMIO_RESOURCE);
253 
254 	dev_priv->vdc_reg =
255 	    ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
256 	if (!dev_priv->vdc_reg)
257 		goto out_err;
258 
259 	dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
260 							PSB_SGX_SIZE);
261 	if (!dev_priv->sgx_reg)
262 		goto out_err;
263 
264 	if (IS_MRST(dev)) {
265 		int domain = pci_domain_nr(pdev->bus);
266 
267 		dev_priv->aux_pdev =
268 			pci_get_domain_bus_and_slot(domain, 0,
269 						    PCI_DEVFN(3, 0));
270 
271 		if (dev_priv->aux_pdev) {
272 			resource_start = pci_resource_start(dev_priv->aux_pdev,
273 							    PSB_AUX_RESOURCE);
274 			resource_len = pci_resource_len(dev_priv->aux_pdev,
275 							PSB_AUX_RESOURCE);
276 			dev_priv->aux_reg = ioremap(resource_start,
277 							    resource_len);
278 			if (!dev_priv->aux_reg)
279 				goto out_err;
280 
281 			DRM_DEBUG_KMS("Found aux vdc");
282 		} else {
283 			/* Couldn't find the aux vdc so map to primary vdc */
284 			dev_priv->aux_reg = dev_priv->vdc_reg;
285 			DRM_DEBUG_KMS("Couldn't find aux pci device");
286 		}
287 		dev_priv->gmbus_reg = dev_priv->aux_reg;
288 
289 		dev_priv->lpc_pdev =
290 			pci_get_domain_bus_and_slot(domain, 0,
291 						    PCI_DEVFN(31, 0));
292 		if (dev_priv->lpc_pdev) {
293 			pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
294 				&dev_priv->lpc_gpio_base);
295 			pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
296 				(u32)dev_priv->lpc_gpio_base | (1L<<31));
297 			pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
298 				&dev_priv->lpc_gpio_base);
299 			dev_priv->lpc_gpio_base &= 0xffc0;
300 			if (dev_priv->lpc_gpio_base)
301 				DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
302 						dev_priv->lpc_gpio_base);
303 			else {
304 				pci_dev_put(dev_priv->lpc_pdev);
305 				dev_priv->lpc_pdev = NULL;
306 			}
307 		}
308 	} else {
309 		dev_priv->gmbus_reg = dev_priv->vdc_reg;
310 	}
311 
312 	psb_intel_opregion_setup(dev);
313 
314 	ret = dev_priv->ops->chip_setup(dev);
315 	if (ret)
316 		goto out_err;
317 
318 	/* Init OSPM support */
319 	gma_power_init(dev);
320 
321 	ret = -ENOMEM;
322 
323 	dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
324 	if (!dev_priv->scratch_page)
325 		goto out_err;
326 
327 	set_pages_uc(dev_priv->scratch_page, 1);
328 
329 	ret = psb_gtt_init(dev, 0);
330 	if (ret)
331 		goto out_err;
332 
333 	ret = -ENOMEM;
334 
335 	dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, NULL);
336 	if (!dev_priv->mmu)
337 		goto out_err;
338 
339 	dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
340 	if (!dev_priv->pf_pd)
341 		goto out_err;
342 
343 	ret = psb_do_init(dev);
344 	if (ret)
345 		return ret;
346 
347 	/* Add stolen memory to SGX MMU */
348 	down_read(&pg->sem);
349 	ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
350 					  dev_priv->stolen_base >> PAGE_SHIFT,
351 					  pg->gatt_start,
352 					  pg->stolen_size >> PAGE_SHIFT, 0);
353 	up_read(&pg->sem);
354 
355 	psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
356 	psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
357 
358 	PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
359 	PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
360 
361 	acpi_video_register();
362 
363 	/* Setup vertical blanking handling */
364 	ret = drm_vblank_init(dev, dev_priv->num_pipe);
365 	if (ret)
366 		goto out_err;
367 
368 	/*
369 	 * Install interrupt handlers prior to powering off SGX or else we will
370 	 * crash.
371 	 */
372 	dev_priv->vdc_irq_mask = 0;
373 	dev_priv->pipestat[0] = 0;
374 	dev_priv->pipestat[1] = 0;
375 	dev_priv->pipestat[2] = 0;
376 	spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
377 	PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
378 	PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
379 	PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
380 	spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
381 
382 	psb_irq_install(dev, pdev->irq);
383 
384 	dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
385 
386 	psb_modeset_init(dev);
387 	psb_fbdev_init(dev);
388 	drm_kms_helper_poll_init(dev);
389 
390 	/* Only add backlight support if we have LVDS output */
391 	list_for_each_entry(connector, &dev->mode_config.connector_list,
392 			    head) {
393 		gma_encoder = gma_attached_encoder(connector);
394 
395 		switch (gma_encoder->type) {
396 		case INTEL_OUTPUT_LVDS:
397 		case INTEL_OUTPUT_MIPI:
398 			ret = gma_backlight_init(dev);
399 			break;
400 		}
401 	}
402 
403 	if (ret)
404 		return ret;
405 	psb_intel_opregion_enable_asle(dev);
406 #if 0
407 	/* Enable runtime pm at last */
408 	pm_runtime_enable(dev->dev);
409 	pm_runtime_set_active(dev->dev);
410 #endif
411 
412 	return devm_add_action_or_reset(dev->dev, psb_device_release, dev);
413 
414 out_err:
415 	psb_driver_unload(dev);
416 	return ret;
417 }
418 
419 static inline void get_brightness(struct backlight_device *bd)
420 {
421 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
422 	if (bd) {
423 		bd->props.brightness = bd->ops->get_brightness(bd);
424 		backlight_update_status(bd);
425 	}
426 #endif
427 }
428 
429 static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
430 			       unsigned long arg)
431 {
432 	struct drm_file *file_priv = filp->private_data;
433 	struct drm_device *dev = file_priv->minor->dev;
434 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
435 	static unsigned int runtime_allowed;
436 
437 	if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
438 		runtime_allowed++;
439 		pm_runtime_allow(dev->dev);
440 		dev_priv->rpm_enabled = 1;
441 	}
442 	return drm_ioctl(filp, cmd, arg);
443 	/* FIXME: do we need to wrap the other side of this */
444 }
445 
446 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
447 {
448 	struct drm_psb_private *dev_priv;
449 	struct drm_device *dev;
450 	int ret;
451 
452 	/*
453 	 * We cannot yet easily find the framebuffer's location in memory. So
454 	 * remove all framebuffers here.
455 	 *
456 	 * TODO: Refactor psb_driver_load() to map vdc_reg earlier. Then we
457 	 *       might be able to read the framebuffer range from the device.
458 	 */
459 	ret = drm_aperture_remove_framebuffers(true, &driver);
460 	if (ret)
461 		return ret;
462 
463 	ret = pcim_enable_device(pdev);
464 	if (ret)
465 		return ret;
466 
467 	dev_priv = devm_drm_dev_alloc(&pdev->dev, &driver, struct drm_psb_private, dev);
468 	if (IS_ERR(dev_priv))
469 		return PTR_ERR(dev_priv);
470 	dev = &dev_priv->dev;
471 
472 	pci_set_drvdata(pdev, dev);
473 
474 	ret = psb_driver_load(dev, ent->driver_data);
475 	if (ret)
476 		return ret;
477 
478 	ret = drm_dev_register(dev, ent->driver_data);
479 	if (ret)
480 		return ret;
481 
482 	return 0;
483 }
484 
485 static void psb_pci_remove(struct pci_dev *pdev)
486 {
487 	struct drm_device *dev = pci_get_drvdata(pdev);
488 
489 	drm_dev_unregister(dev);
490 }
491 
492 static const struct dev_pm_ops psb_pm_ops = {
493 	.resume = gma_power_resume,
494 	.suspend = gma_power_suspend,
495 	.thaw = gma_power_thaw,
496 	.freeze = gma_power_freeze,
497 	.restore = gma_power_restore,
498 	.runtime_suspend = psb_runtime_suspend,
499 	.runtime_resume = psb_runtime_resume,
500 	.runtime_idle = psb_runtime_idle,
501 };
502 
503 static const struct file_operations psb_gem_fops = {
504 	.owner = THIS_MODULE,
505 	.open = drm_open,
506 	.release = drm_release,
507 	.unlocked_ioctl = psb_unlocked_ioctl,
508 	.compat_ioctl = drm_compat_ioctl,
509 	.mmap = drm_gem_mmap,
510 	.poll = drm_poll,
511 	.read = drm_read,
512 };
513 
514 static const struct drm_driver driver = {
515 	.driver_features = DRIVER_MODESET | DRIVER_GEM,
516 	.lastclose = drm_fb_helper_lastclose,
517 
518 	.num_ioctls = ARRAY_SIZE(psb_ioctls),
519 
520 	.dumb_create = psb_gem_dumb_create,
521 	.ioctls = psb_ioctls,
522 	.fops = &psb_gem_fops,
523 	.name = DRIVER_NAME,
524 	.desc = DRIVER_DESC,
525 	.date = DRIVER_DATE,
526 	.major = DRIVER_MAJOR,
527 	.minor = DRIVER_MINOR,
528 	.patchlevel = DRIVER_PATCHLEVEL
529 };
530 
531 static struct pci_driver psb_pci_driver = {
532 	.name = DRIVER_NAME,
533 	.id_table = pciidlist,
534 	.probe = psb_pci_probe,
535 	.remove = psb_pci_remove,
536 	.driver.pm = &psb_pm_ops,
537 };
538 
539 static int __init psb_init(void)
540 {
541 	return pci_register_driver(&psb_pci_driver);
542 }
543 
544 static void __exit psb_exit(void)
545 {
546 	pci_unregister_driver(&psb_pci_driver);
547 }
548 
549 late_initcall(psb_init);
550 module_exit(psb_exit);
551 
552 MODULE_AUTHOR(DRIVER_AUTHOR);
553 MODULE_DESCRIPTION(DRIVER_DESC);
554 MODULE_LICENSE("GPL");
555