1 // SPDX-License-Identifier: GPL-2.0-only 2 /************************************************************************** 3 * Copyright (c) 2007-2011, Intel Corporation. 4 * All Rights Reserved. 5 * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA. 6 * All Rights Reserved. 7 * 8 **************************************************************************/ 9 10 #include <linux/cpu.h> 11 #include <linux/module.h> 12 #include <linux/notifier.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/spinlock.h> 15 16 #include <asm/set_memory.h> 17 18 #include <acpi/video.h> 19 20 #include <drm/drm.h> 21 #include <drm/drm_drv.h> 22 #include <drm/drm_fb_helper.h> 23 #include <drm/drm_file.h> 24 #include <drm/drm_ioctl.h> 25 #include <drm/drm_irq.h> 26 #include <drm/drm_pciids.h> 27 #include <drm/drm_vblank.h> 28 29 #include "framebuffer.h" 30 #include "intel_bios.h" 31 #include "mid_bios.h" 32 #include "power.h" 33 #include "psb_drv.h" 34 #include "psb_intel_reg.h" 35 #include "psb_reg.h" 36 37 static const struct drm_driver driver; 38 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent); 39 40 /* 41 * The table below contains a mapping of the PCI vendor ID and the PCI Device ID 42 * to the different groups of PowerVR 5-series chip designs 43 * 44 * 0x8086 = Intel Corporation 45 * 46 * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx 47 * PowerVR SGX535 - Moorestown - Intel GMA 600 48 * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx 49 * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600 50 * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700, 51 * N2800 52 */ 53 static const struct pci_device_id pciidlist[] = { 54 /* Poulsbo */ 55 { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, 56 { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, 57 #if defined(CONFIG_DRM_GMA600) 58 { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 59 { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 60 { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 61 { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 62 { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 63 { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 64 { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 65 { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 66 { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 67 #endif 68 /* Cedartrail */ 69 { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 70 { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 71 { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 72 { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 73 { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 74 { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 75 { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 76 { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 77 { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 78 { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 79 { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 80 { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 81 { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 82 { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 83 { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 84 { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 85 { 0, } 86 }; 87 MODULE_DEVICE_TABLE(pci, pciidlist); 88 89 /* 90 * Standard IOCTLs. 91 */ 92 static const struct drm_ioctl_desc psb_ioctls[] = { 93 }; 94 95 static int psb_do_init(struct drm_device *dev) 96 { 97 struct drm_psb_private *dev_priv = dev->dev_private; 98 struct psb_gtt *pg = &dev_priv->gtt; 99 100 uint32_t stolen_gtt; 101 102 if (pg->mmu_gatt_start & 0x0FFFFFFF) { 103 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n"); 104 return -EINVAL; 105 } 106 107 stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4; 108 stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT; 109 stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages; 110 111 dev_priv->gatt_free_offset = pg->mmu_gatt_start + 112 (stolen_gtt << PAGE_SHIFT) * 1024; 113 114 spin_lock_init(&dev_priv->irqmask_lock); 115 116 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0); 117 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1); 118 PSB_RSGX32(PSB_CR_BIF_BANK1); 119 120 /* Do not bypass any MMU access, let them pagefault instead */ 121 PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK), 122 PSB_CR_BIF_CTRL); 123 PSB_RSGX32(PSB_CR_BIF_CTRL); 124 125 psb_spank(dev_priv); 126 127 /* mmu_gatt ?? */ 128 PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE); 129 PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */ 130 131 return 0; 132 } 133 134 static void psb_driver_unload(struct drm_device *dev) 135 { 136 struct drm_psb_private *dev_priv = dev->dev_private; 137 138 /* TODO: Kill vblank etc here */ 139 140 if (dev_priv) { 141 if (dev_priv->backlight_device) 142 gma_backlight_exit(dev); 143 psb_modeset_cleanup(dev); 144 145 if (dev_priv->ops->chip_teardown) 146 dev_priv->ops->chip_teardown(dev); 147 148 psb_intel_opregion_fini(dev); 149 150 if (dev_priv->pf_pd) { 151 psb_mmu_free_pagedir(dev_priv->pf_pd); 152 dev_priv->pf_pd = NULL; 153 } 154 if (dev_priv->mmu) { 155 struct psb_gtt *pg = &dev_priv->gtt; 156 157 down_read(&pg->sem); 158 psb_mmu_remove_pfn_sequence( 159 psb_mmu_get_default_pd 160 (dev_priv->mmu), 161 pg->mmu_gatt_start, 162 dev_priv->vram_stolen_size >> PAGE_SHIFT); 163 up_read(&pg->sem); 164 psb_mmu_driver_takedown(dev_priv->mmu); 165 dev_priv->mmu = NULL; 166 } 167 psb_gtt_takedown(dev); 168 if (dev_priv->scratch_page) { 169 set_pages_wb(dev_priv->scratch_page, 1); 170 __free_page(dev_priv->scratch_page); 171 dev_priv->scratch_page = NULL; 172 } 173 if (dev_priv->vdc_reg) { 174 iounmap(dev_priv->vdc_reg); 175 dev_priv->vdc_reg = NULL; 176 } 177 if (dev_priv->sgx_reg) { 178 iounmap(dev_priv->sgx_reg); 179 dev_priv->sgx_reg = NULL; 180 } 181 if (dev_priv->aux_reg) { 182 iounmap(dev_priv->aux_reg); 183 dev_priv->aux_reg = NULL; 184 } 185 pci_dev_put(dev_priv->aux_pdev); 186 pci_dev_put(dev_priv->lpc_pdev); 187 188 /* Destroy VBT data */ 189 psb_intel_destroy_bios(dev); 190 191 kfree(dev_priv); 192 dev->dev_private = NULL; 193 } 194 gma_power_uninit(dev); 195 } 196 197 static int psb_driver_load(struct drm_device *dev, unsigned long flags) 198 { 199 struct pci_dev *pdev = to_pci_dev(dev->dev); 200 struct drm_psb_private *dev_priv; 201 unsigned long resource_start, resource_len; 202 unsigned long irqflags; 203 int ret = -ENOMEM; 204 struct drm_connector *connector; 205 struct gma_encoder *gma_encoder; 206 struct psb_gtt *pg; 207 208 /* allocating and initializing driver private data */ 209 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL); 210 if (dev_priv == NULL) 211 return -ENOMEM; 212 213 dev_priv->ops = (struct psb_ops *)flags; 214 dev_priv->dev = dev; 215 dev->dev_private = (void *) dev_priv; 216 217 pg = &dev_priv->gtt; 218 219 pci_set_master(pdev); 220 221 dev_priv->num_pipe = dev_priv->ops->pipes; 222 223 resource_start = pci_resource_start(pdev, PSB_MMIO_RESOURCE); 224 225 dev_priv->vdc_reg = 226 ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE); 227 if (!dev_priv->vdc_reg) 228 goto out_err; 229 230 dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset, 231 PSB_SGX_SIZE); 232 if (!dev_priv->sgx_reg) 233 goto out_err; 234 235 if (IS_MRST(dev)) { 236 int domain = pci_domain_nr(pdev->bus); 237 238 dev_priv->aux_pdev = 239 pci_get_domain_bus_and_slot(domain, 0, 240 PCI_DEVFN(3, 0)); 241 242 if (dev_priv->aux_pdev) { 243 resource_start = pci_resource_start(dev_priv->aux_pdev, 244 PSB_AUX_RESOURCE); 245 resource_len = pci_resource_len(dev_priv->aux_pdev, 246 PSB_AUX_RESOURCE); 247 dev_priv->aux_reg = ioremap(resource_start, 248 resource_len); 249 if (!dev_priv->aux_reg) 250 goto out_err; 251 252 DRM_DEBUG_KMS("Found aux vdc"); 253 } else { 254 /* Couldn't find the aux vdc so map to primary vdc */ 255 dev_priv->aux_reg = dev_priv->vdc_reg; 256 DRM_DEBUG_KMS("Couldn't find aux pci device"); 257 } 258 dev_priv->gmbus_reg = dev_priv->aux_reg; 259 260 dev_priv->lpc_pdev = 261 pci_get_domain_bus_and_slot(domain, 0, 262 PCI_DEVFN(31, 0)); 263 if (dev_priv->lpc_pdev) { 264 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA, 265 &dev_priv->lpc_gpio_base); 266 pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA, 267 (u32)dev_priv->lpc_gpio_base | (1L<<31)); 268 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA, 269 &dev_priv->lpc_gpio_base); 270 dev_priv->lpc_gpio_base &= 0xffc0; 271 if (dev_priv->lpc_gpio_base) 272 DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n", 273 dev_priv->lpc_gpio_base); 274 else { 275 pci_dev_put(dev_priv->lpc_pdev); 276 dev_priv->lpc_pdev = NULL; 277 } 278 } 279 } else { 280 dev_priv->gmbus_reg = dev_priv->vdc_reg; 281 } 282 283 psb_intel_opregion_setup(dev); 284 285 ret = dev_priv->ops->chip_setup(dev); 286 if (ret) 287 goto out_err; 288 289 /* Init OSPM support */ 290 gma_power_init(dev); 291 292 ret = -ENOMEM; 293 294 dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO); 295 if (!dev_priv->scratch_page) 296 goto out_err; 297 298 set_pages_uc(dev_priv->scratch_page, 1); 299 300 ret = psb_gtt_init(dev, 0); 301 if (ret) 302 goto out_err; 303 304 ret = -ENOMEM; 305 306 dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, 0); 307 if (!dev_priv->mmu) 308 goto out_err; 309 310 dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0); 311 if (!dev_priv->pf_pd) 312 goto out_err; 313 314 ret = psb_do_init(dev); 315 if (ret) 316 return ret; 317 318 /* Add stolen memory to SGX MMU */ 319 down_read(&pg->sem); 320 ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu), 321 dev_priv->stolen_base >> PAGE_SHIFT, 322 pg->gatt_start, 323 pg->stolen_size >> PAGE_SHIFT, 0); 324 up_read(&pg->sem); 325 326 psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0); 327 psb_mmu_set_pd_context(dev_priv->pf_pd, 1); 328 329 PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE); 330 PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE); 331 332 acpi_video_register(); 333 334 /* Setup vertical blanking handling */ 335 ret = drm_vblank_init(dev, dev_priv->num_pipe); 336 if (ret) 337 goto out_err; 338 339 /* 340 * Install interrupt handlers prior to powering off SGX or else we will 341 * crash. 342 */ 343 dev_priv->vdc_irq_mask = 0; 344 dev_priv->pipestat[0] = 0; 345 dev_priv->pipestat[1] = 0; 346 dev_priv->pipestat[2] = 0; 347 spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags); 348 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); 349 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R); 350 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R); 351 spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags); 352 353 drm_irq_install(dev, pdev->irq); 354 355 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */ 356 357 psb_modeset_init(dev); 358 psb_fbdev_init(dev); 359 drm_kms_helper_poll_init(dev); 360 361 /* Only add backlight support if we have LVDS output */ 362 list_for_each_entry(connector, &dev->mode_config.connector_list, 363 head) { 364 gma_encoder = gma_attached_encoder(connector); 365 366 switch (gma_encoder->type) { 367 case INTEL_OUTPUT_LVDS: 368 case INTEL_OUTPUT_MIPI: 369 ret = gma_backlight_init(dev); 370 break; 371 } 372 } 373 374 if (ret) 375 return ret; 376 psb_intel_opregion_enable_asle(dev); 377 #if 0 378 /* Enable runtime pm at last */ 379 pm_runtime_enable(dev->dev); 380 pm_runtime_set_active(dev->dev); 381 #endif 382 /* Intel drm driver load is done, continue doing pvr load */ 383 return 0; 384 out_err: 385 psb_driver_unload(dev); 386 return ret; 387 } 388 389 static inline void get_brightness(struct backlight_device *bd) 390 { 391 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE 392 if (bd) { 393 bd->props.brightness = bd->ops->get_brightness(bd); 394 backlight_update_status(bd); 395 } 396 #endif 397 } 398 399 static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd, 400 unsigned long arg) 401 { 402 struct drm_file *file_priv = filp->private_data; 403 struct drm_device *dev = file_priv->minor->dev; 404 struct drm_psb_private *dev_priv = dev->dev_private; 405 static unsigned int runtime_allowed; 406 407 if (runtime_allowed == 1 && dev_priv->is_lvds_on) { 408 runtime_allowed++; 409 pm_runtime_allow(dev->dev); 410 dev_priv->rpm_enabled = 1; 411 } 412 return drm_ioctl(filp, cmd, arg); 413 /* FIXME: do we need to wrap the other side of this */ 414 } 415 416 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 417 { 418 struct drm_device *dev; 419 int ret; 420 421 ret = pci_enable_device(pdev); 422 if (ret) 423 return ret; 424 425 dev = drm_dev_alloc(&driver, &pdev->dev); 426 if (IS_ERR(dev)) { 427 ret = PTR_ERR(dev); 428 goto err_pci_disable_device; 429 } 430 431 pci_set_drvdata(pdev, dev); 432 433 ret = psb_driver_load(dev, ent->driver_data); 434 if (ret) 435 goto err_drm_dev_put; 436 437 ret = drm_dev_register(dev, ent->driver_data); 438 if (ret) 439 goto err_psb_driver_unload; 440 441 return 0; 442 443 err_psb_driver_unload: 444 psb_driver_unload(dev); 445 err_drm_dev_put: 446 drm_dev_put(dev); 447 err_pci_disable_device: 448 pci_disable_device(pdev); 449 return ret; 450 } 451 452 static void psb_pci_remove(struct pci_dev *pdev) 453 { 454 struct drm_device *dev = pci_get_drvdata(pdev); 455 456 drm_dev_unregister(dev); 457 psb_driver_unload(dev); 458 drm_dev_put(dev); 459 } 460 461 static const struct dev_pm_ops psb_pm_ops = { 462 .resume = gma_power_resume, 463 .suspend = gma_power_suspend, 464 .thaw = gma_power_thaw, 465 .freeze = gma_power_freeze, 466 .restore = gma_power_restore, 467 .runtime_suspend = psb_runtime_suspend, 468 .runtime_resume = psb_runtime_resume, 469 .runtime_idle = psb_runtime_idle, 470 }; 471 472 static const struct file_operations psb_gem_fops = { 473 .owner = THIS_MODULE, 474 .open = drm_open, 475 .release = drm_release, 476 .unlocked_ioctl = psb_unlocked_ioctl, 477 .compat_ioctl = drm_compat_ioctl, 478 .mmap = drm_gem_mmap, 479 .poll = drm_poll, 480 .read = drm_read, 481 }; 482 483 static const struct drm_driver driver = { 484 .driver_features = DRIVER_MODESET | DRIVER_GEM, 485 .lastclose = drm_fb_helper_lastclose, 486 487 .num_ioctls = ARRAY_SIZE(psb_ioctls), 488 .irq_preinstall = psb_irq_preinstall, 489 .irq_postinstall = psb_irq_postinstall, 490 .irq_uninstall = psb_irq_uninstall, 491 .irq_handler = psb_irq_handler, 492 493 .dumb_create = psb_gem_dumb_create, 494 .ioctls = psb_ioctls, 495 .fops = &psb_gem_fops, 496 .name = DRIVER_NAME, 497 .desc = DRIVER_DESC, 498 .date = DRIVER_DATE, 499 .major = DRIVER_MAJOR, 500 .minor = DRIVER_MINOR, 501 .patchlevel = DRIVER_PATCHLEVEL 502 }; 503 504 static struct pci_driver psb_pci_driver = { 505 .name = DRIVER_NAME, 506 .id_table = pciidlist, 507 .probe = psb_pci_probe, 508 .remove = psb_pci_remove, 509 .driver.pm = &psb_pm_ops, 510 }; 511 512 static int __init psb_init(void) 513 { 514 return pci_register_driver(&psb_pci_driver); 515 } 516 517 static void __exit psb_exit(void) 518 { 519 pci_unregister_driver(&psb_pci_driver); 520 } 521 522 late_initcall(psb_init); 523 module_exit(psb_exit); 524 525 MODULE_AUTHOR(DRIVER_AUTHOR); 526 MODULE_DESCRIPTION(DRIVER_DESC); 527 MODULE_LICENSE("GPL"); 528