1 /************************************************************************** 2 * Copyright (c) 2007-2011, Intel Corporation. 3 * All Rights Reserved. 4 * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA. 5 * All Rights Reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms and conditions of the GNU General Public License, 9 * version 2, as published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 * more details. 15 * 16 * You should have received a copy of the GNU General Public License along with 17 * this program; if not, write to the Free Software Foundation, Inc., 18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 **************************************************************************/ 21 22 #include <drm/drmP.h> 23 #include <drm/drm.h> 24 #include "psb_drv.h" 25 #include "framebuffer.h" 26 #include "psb_reg.h" 27 #include "psb_intel_reg.h" 28 #include "intel_bios.h" 29 #include "mid_bios.h" 30 #include <drm/drm_pciids.h> 31 #include "power.h" 32 #include <linux/cpu.h> 33 #include <linux/notifier.h> 34 #include <linux/spinlock.h> 35 #include <linux/pm_runtime.h> 36 #include <acpi/video.h> 37 #include <linux/module.h> 38 #include <asm/set_memory.h> 39 40 static struct drm_driver driver; 41 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent); 42 43 /* 44 * The table below contains a mapping of the PCI vendor ID and the PCI Device ID 45 * to the different groups of PowerVR 5-series chip designs 46 * 47 * 0x8086 = Intel Corporation 48 * 49 * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx 50 * PowerVR SGX535 - Moorestown - Intel GMA 600 51 * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx 52 * PowerVR SGX540 - Medfield - Intel Atom Z2460 53 * PowerVR SGX544MP2 - Medfield - 54 * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600 55 * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700, 56 * N2800 57 */ 58 static const struct pci_device_id pciidlist[] = { 59 { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, 60 { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, 61 #if defined(CONFIG_DRM_GMA600) 62 { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 63 { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 64 { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 65 { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 66 { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 67 { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 68 { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 69 { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 70 { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 71 #endif 72 #if defined(CONFIG_DRM_MEDFIELD) 73 { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 74 { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 75 { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 76 { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 77 { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 78 { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 79 { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 80 { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 81 #endif 82 #if defined(CONFIG_DRM_GMA3600) 83 { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 84 { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 85 { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 86 { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 87 { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 88 { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 89 { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 90 { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 91 { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 92 { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 93 { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 94 { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 95 { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 96 { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 97 { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 98 { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 99 #endif 100 { 0, } 101 }; 102 MODULE_DEVICE_TABLE(pci, pciidlist); 103 104 /* 105 * Standard IOCTLs. 106 */ 107 static const struct drm_ioctl_desc psb_ioctls[] = { 108 }; 109 110 static int psb_do_init(struct drm_device *dev) 111 { 112 struct drm_psb_private *dev_priv = dev->dev_private; 113 struct psb_gtt *pg = &dev_priv->gtt; 114 115 uint32_t stolen_gtt; 116 117 if (pg->mmu_gatt_start & 0x0FFFFFFF) { 118 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n"); 119 return -EINVAL; 120 } 121 122 stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4; 123 stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT; 124 stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages; 125 126 dev_priv->gatt_free_offset = pg->mmu_gatt_start + 127 (stolen_gtt << PAGE_SHIFT) * 1024; 128 129 spin_lock_init(&dev_priv->irqmask_lock); 130 spin_lock_init(&dev_priv->lock_2d); 131 132 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0); 133 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1); 134 PSB_RSGX32(PSB_CR_BIF_BANK1); 135 136 /* Do not bypass any MMU access, let them pagefault instead */ 137 PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK), 138 PSB_CR_BIF_CTRL); 139 PSB_RSGX32(PSB_CR_BIF_CTRL); 140 141 psb_spank(dev_priv); 142 143 /* mmu_gatt ?? */ 144 PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE); 145 PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */ 146 147 return 0; 148 } 149 150 static void psb_driver_unload(struct drm_device *dev) 151 { 152 struct drm_psb_private *dev_priv = dev->dev_private; 153 154 /* TODO: Kill vblank etc here */ 155 156 if (dev_priv) { 157 if (dev_priv->backlight_device) 158 gma_backlight_exit(dev); 159 psb_modeset_cleanup(dev); 160 161 if (dev_priv->ops->chip_teardown) 162 dev_priv->ops->chip_teardown(dev); 163 164 psb_intel_opregion_fini(dev); 165 166 if (dev_priv->pf_pd) { 167 psb_mmu_free_pagedir(dev_priv->pf_pd); 168 dev_priv->pf_pd = NULL; 169 } 170 if (dev_priv->mmu) { 171 struct psb_gtt *pg = &dev_priv->gtt; 172 173 down_read(&pg->sem); 174 psb_mmu_remove_pfn_sequence( 175 psb_mmu_get_default_pd 176 (dev_priv->mmu), 177 pg->mmu_gatt_start, 178 dev_priv->vram_stolen_size >> PAGE_SHIFT); 179 up_read(&pg->sem); 180 psb_mmu_driver_takedown(dev_priv->mmu); 181 dev_priv->mmu = NULL; 182 } 183 psb_gtt_takedown(dev); 184 if (dev_priv->scratch_page) { 185 set_pages_wb(dev_priv->scratch_page, 1); 186 __free_page(dev_priv->scratch_page); 187 dev_priv->scratch_page = NULL; 188 } 189 if (dev_priv->vdc_reg) { 190 iounmap(dev_priv->vdc_reg); 191 dev_priv->vdc_reg = NULL; 192 } 193 if (dev_priv->sgx_reg) { 194 iounmap(dev_priv->sgx_reg); 195 dev_priv->sgx_reg = NULL; 196 } 197 if (dev_priv->aux_reg) { 198 iounmap(dev_priv->aux_reg); 199 dev_priv->aux_reg = NULL; 200 } 201 pci_dev_put(dev_priv->aux_pdev); 202 pci_dev_put(dev_priv->lpc_pdev); 203 204 /* Destroy VBT data */ 205 psb_intel_destroy_bios(dev); 206 207 kfree(dev_priv); 208 dev->dev_private = NULL; 209 } 210 gma_power_uninit(dev); 211 } 212 213 static int psb_driver_load(struct drm_device *dev, unsigned long flags) 214 { 215 struct drm_psb_private *dev_priv; 216 unsigned long resource_start, resource_len; 217 unsigned long irqflags; 218 int ret = -ENOMEM; 219 struct drm_connector *connector; 220 struct gma_encoder *gma_encoder; 221 struct psb_gtt *pg; 222 223 /* allocating and initializing driver private data */ 224 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL); 225 if (dev_priv == NULL) 226 return -ENOMEM; 227 228 dev_priv->ops = (struct psb_ops *)flags; 229 dev_priv->dev = dev; 230 dev->dev_private = (void *) dev_priv; 231 232 pg = &dev_priv->gtt; 233 234 pci_set_master(dev->pdev); 235 236 dev_priv->num_pipe = dev_priv->ops->pipes; 237 238 resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE); 239 240 dev_priv->vdc_reg = 241 ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE); 242 if (!dev_priv->vdc_reg) 243 goto out_err; 244 245 dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset, 246 PSB_SGX_SIZE); 247 if (!dev_priv->sgx_reg) 248 goto out_err; 249 250 if (IS_MRST(dev)) { 251 int domain = pci_domain_nr(dev->pdev->bus); 252 253 dev_priv->aux_pdev = 254 pci_get_domain_bus_and_slot(domain, 0, 255 PCI_DEVFN(3, 0)); 256 257 if (dev_priv->aux_pdev) { 258 resource_start = pci_resource_start(dev_priv->aux_pdev, 259 PSB_AUX_RESOURCE); 260 resource_len = pci_resource_len(dev_priv->aux_pdev, 261 PSB_AUX_RESOURCE); 262 dev_priv->aux_reg = ioremap_nocache(resource_start, 263 resource_len); 264 if (!dev_priv->aux_reg) 265 goto out_err; 266 267 DRM_DEBUG_KMS("Found aux vdc"); 268 } else { 269 /* Couldn't find the aux vdc so map to primary vdc */ 270 dev_priv->aux_reg = dev_priv->vdc_reg; 271 DRM_DEBUG_KMS("Couldn't find aux pci device"); 272 } 273 dev_priv->gmbus_reg = dev_priv->aux_reg; 274 275 dev_priv->lpc_pdev = 276 pci_get_domain_bus_and_slot(domain, 0, 277 PCI_DEVFN(31, 0)); 278 if (dev_priv->lpc_pdev) { 279 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA, 280 &dev_priv->lpc_gpio_base); 281 pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA, 282 (u32)dev_priv->lpc_gpio_base | (1L<<31)); 283 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA, 284 &dev_priv->lpc_gpio_base); 285 dev_priv->lpc_gpio_base &= 0xffc0; 286 if (dev_priv->lpc_gpio_base) 287 DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n", 288 dev_priv->lpc_gpio_base); 289 else { 290 pci_dev_put(dev_priv->lpc_pdev); 291 dev_priv->lpc_pdev = NULL; 292 } 293 } 294 } else { 295 dev_priv->gmbus_reg = dev_priv->vdc_reg; 296 } 297 298 psb_intel_opregion_setup(dev); 299 300 ret = dev_priv->ops->chip_setup(dev); 301 if (ret) 302 goto out_err; 303 304 /* Init OSPM support */ 305 gma_power_init(dev); 306 307 ret = -ENOMEM; 308 309 dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO); 310 if (!dev_priv->scratch_page) 311 goto out_err; 312 313 set_pages_uc(dev_priv->scratch_page, 1); 314 315 ret = psb_gtt_init(dev, 0); 316 if (ret) 317 goto out_err; 318 319 dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, 0); 320 if (!dev_priv->mmu) 321 goto out_err; 322 323 dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0); 324 if (!dev_priv->pf_pd) 325 goto out_err; 326 327 ret = psb_do_init(dev); 328 if (ret) 329 return ret; 330 331 /* Add stolen memory to SGX MMU */ 332 down_read(&pg->sem); 333 ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu), 334 dev_priv->stolen_base >> PAGE_SHIFT, 335 pg->gatt_start, 336 pg->stolen_size >> PAGE_SHIFT, 0); 337 up_read(&pg->sem); 338 339 psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0); 340 psb_mmu_set_pd_context(dev_priv->pf_pd, 1); 341 342 PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE); 343 PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE); 344 345 acpi_video_register(); 346 347 /* Setup vertical blanking handling */ 348 ret = drm_vblank_init(dev, dev_priv->num_pipe); 349 if (ret) 350 goto out_err; 351 352 /* 353 * Install interrupt handlers prior to powering off SGX or else we will 354 * crash. 355 */ 356 dev_priv->vdc_irq_mask = 0; 357 dev_priv->pipestat[0] = 0; 358 dev_priv->pipestat[1] = 0; 359 dev_priv->pipestat[2] = 0; 360 spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags); 361 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); 362 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R); 363 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R); 364 spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags); 365 366 drm_irq_install(dev, dev->pdev->irq); 367 368 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */ 369 dev->driver->get_vblank_counter = psb_get_vblank_counter; 370 371 psb_modeset_init(dev); 372 psb_fbdev_init(dev); 373 drm_kms_helper_poll_init(dev); 374 375 /* Only add backlight support if we have LVDS output */ 376 list_for_each_entry(connector, &dev->mode_config.connector_list, 377 head) { 378 gma_encoder = gma_attached_encoder(connector); 379 380 switch (gma_encoder->type) { 381 case INTEL_OUTPUT_LVDS: 382 case INTEL_OUTPUT_MIPI: 383 ret = gma_backlight_init(dev); 384 break; 385 } 386 } 387 388 if (ret) 389 return ret; 390 psb_intel_opregion_enable_asle(dev); 391 #if 0 392 /* Enable runtime pm at last */ 393 pm_runtime_enable(&dev->pdev->dev); 394 pm_runtime_set_active(&dev->pdev->dev); 395 #endif 396 /* Intel drm driver load is done, continue doing pvr load */ 397 return 0; 398 out_err: 399 psb_driver_unload(dev); 400 return ret; 401 } 402 403 static inline void get_brightness(struct backlight_device *bd) 404 { 405 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE 406 if (bd) { 407 bd->props.brightness = bd->ops->get_brightness(bd); 408 backlight_update_status(bd); 409 } 410 #endif 411 } 412 413 static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd, 414 unsigned long arg) 415 { 416 struct drm_file *file_priv = filp->private_data; 417 struct drm_device *dev = file_priv->minor->dev; 418 struct drm_psb_private *dev_priv = dev->dev_private; 419 static unsigned int runtime_allowed; 420 421 if (runtime_allowed == 1 && dev_priv->is_lvds_on) { 422 runtime_allowed++; 423 pm_runtime_allow(&dev->pdev->dev); 424 dev_priv->rpm_enabled = 1; 425 } 426 return drm_ioctl(filp, cmd, arg); 427 /* FIXME: do we need to wrap the other side of this */ 428 } 429 430 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 431 { 432 return drm_get_pci_dev(pdev, ent, &driver); 433 } 434 435 436 static void psb_pci_remove(struct pci_dev *pdev) 437 { 438 struct drm_device *dev = pci_get_drvdata(pdev); 439 drm_put_dev(dev); 440 } 441 442 static const struct dev_pm_ops psb_pm_ops = { 443 .resume = gma_power_resume, 444 .suspend = gma_power_suspend, 445 .thaw = gma_power_thaw, 446 .freeze = gma_power_freeze, 447 .restore = gma_power_restore, 448 .runtime_suspend = psb_runtime_suspend, 449 .runtime_resume = psb_runtime_resume, 450 .runtime_idle = psb_runtime_idle, 451 }; 452 453 static const struct vm_operations_struct psb_gem_vm_ops = { 454 .fault = psb_gem_fault, 455 .open = drm_gem_vm_open, 456 .close = drm_gem_vm_close, 457 }; 458 459 static const struct file_operations psb_gem_fops = { 460 .owner = THIS_MODULE, 461 .open = drm_open, 462 .release = drm_release, 463 .unlocked_ioctl = psb_unlocked_ioctl, 464 .compat_ioctl = drm_compat_ioctl, 465 .mmap = drm_gem_mmap, 466 .poll = drm_poll, 467 .read = drm_read, 468 }; 469 470 static struct drm_driver driver = { 471 .driver_features = DRIVER_MODESET | DRIVER_GEM, 472 .load = psb_driver_load, 473 .unload = psb_driver_unload, 474 .lastclose = drm_fb_helper_lastclose, 475 476 .num_ioctls = ARRAY_SIZE(psb_ioctls), 477 .irq_preinstall = psb_irq_preinstall, 478 .irq_postinstall = psb_irq_postinstall, 479 .irq_uninstall = psb_irq_uninstall, 480 .irq_handler = psb_irq_handler, 481 .enable_vblank = psb_enable_vblank, 482 .disable_vblank = psb_disable_vblank, 483 .get_vblank_counter = psb_get_vblank_counter, 484 485 .gem_free_object = psb_gem_free_object, 486 .gem_vm_ops = &psb_gem_vm_ops, 487 488 .dumb_create = psb_gem_dumb_create, 489 .ioctls = psb_ioctls, 490 .fops = &psb_gem_fops, 491 .name = DRIVER_NAME, 492 .desc = DRIVER_DESC, 493 .date = DRIVER_DATE, 494 .major = DRIVER_MAJOR, 495 .minor = DRIVER_MINOR, 496 .patchlevel = DRIVER_PATCHLEVEL 497 }; 498 499 static struct pci_driver psb_pci_driver = { 500 .name = DRIVER_NAME, 501 .id_table = pciidlist, 502 .probe = psb_pci_probe, 503 .remove = psb_pci_remove, 504 .driver.pm = &psb_pm_ops, 505 }; 506 507 static int __init psb_init(void) 508 { 509 return pci_register_driver(&psb_pci_driver); 510 } 511 512 static void __exit psb_exit(void) 513 { 514 pci_unregister_driver(&psb_pci_driver); 515 } 516 517 late_initcall(psb_init); 518 module_exit(psb_exit); 519 520 MODULE_AUTHOR(DRIVER_AUTHOR); 521 MODULE_DESCRIPTION(DRIVER_DESC); 522 MODULE_LICENSE("GPL"); 523