1 /************************************************************************** 2 * Copyright (c) 2007-2011, Intel Corporation. 3 * All Rights Reserved. 4 * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA. 5 * All Rights Reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms and conditions of the GNU General Public License, 9 * version 2, as published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 * more details. 15 * 16 * You should have received a copy of the GNU General Public License along with 17 * this program; if not, write to the Free Software Foundation, Inc., 18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 **************************************************************************/ 21 22 #include <drm/drmP.h> 23 #include <drm/drm.h> 24 #include "psb_drv.h" 25 #include "framebuffer.h" 26 #include "psb_reg.h" 27 #include "psb_intel_reg.h" 28 #include "intel_bios.h" 29 #include "mid_bios.h" 30 #include <drm/drm_pciids.h> 31 #include "power.h" 32 #include <linux/cpu.h> 33 #include <linux/notifier.h> 34 #include <linux/spinlock.h> 35 #include <linux/pm_runtime.h> 36 #include <acpi/video.h> 37 #include <linux/module.h> 38 39 static struct drm_driver driver; 40 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent); 41 42 /* 43 * The table below contains a mapping of the PCI vendor ID and the PCI Device ID 44 * to the different groups of PowerVR 5-series chip designs 45 * 46 * 0x8086 = Intel Corporation 47 * 48 * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx 49 * PowerVR SGX535 - Moorestown - Intel GMA 600 50 * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx 51 * PowerVR SGX540 - Medfield - Intel Atom Z2460 52 * PowerVR SGX544MP2 - Medfield - 53 * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600 54 * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700, 55 * N2800 56 */ 57 static const struct pci_device_id pciidlist[] = { 58 { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, 59 { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, 60 #if defined(CONFIG_DRM_GMA600) 61 { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 62 { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 63 { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 64 { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 65 { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 66 { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 67 { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 68 { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 69 { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops }, 70 #endif 71 #if defined(CONFIG_DRM_MEDFIELD) 72 { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 73 { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 74 { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 75 { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 76 { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 77 { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 78 { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 79 { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops }, 80 #endif 81 #if defined(CONFIG_DRM_GMA3600) 82 { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 83 { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 84 { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 85 { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 86 { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 87 { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 88 { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 89 { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 90 { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 91 { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 92 { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 93 { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 94 { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 95 { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 96 { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 97 { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops }, 98 #endif 99 { 0, } 100 }; 101 MODULE_DEVICE_TABLE(pci, pciidlist); 102 103 /* 104 * Standard IOCTLs. 105 */ 106 static const struct drm_ioctl_desc psb_ioctls[] = { 107 }; 108 109 static void psb_driver_lastclose(struct drm_device *dev) 110 { 111 int ret; 112 struct drm_psb_private *dev_priv = dev->dev_private; 113 struct psb_fbdev *fbdev = dev_priv->fbdev; 114 115 ret = drm_fb_helper_restore_fbdev_mode_unlocked(&fbdev->psb_fb_helper); 116 if (ret) 117 DRM_DEBUG("failed to restore crtc mode\n"); 118 119 return; 120 } 121 122 static int psb_do_init(struct drm_device *dev) 123 { 124 struct drm_psb_private *dev_priv = dev->dev_private; 125 struct psb_gtt *pg = &dev_priv->gtt; 126 127 uint32_t stolen_gtt; 128 129 if (pg->mmu_gatt_start & 0x0FFFFFFF) { 130 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n"); 131 return -EINVAL; 132 } 133 134 stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4; 135 stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT; 136 stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages; 137 138 dev_priv->gatt_free_offset = pg->mmu_gatt_start + 139 (stolen_gtt << PAGE_SHIFT) * 1024; 140 141 spin_lock_init(&dev_priv->irqmask_lock); 142 spin_lock_init(&dev_priv->lock_2d); 143 144 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0); 145 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1); 146 PSB_RSGX32(PSB_CR_BIF_BANK1); 147 148 /* Do not bypass any MMU access, let them pagefault instead */ 149 PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK), 150 PSB_CR_BIF_CTRL); 151 PSB_RSGX32(PSB_CR_BIF_CTRL); 152 153 psb_spank(dev_priv); 154 155 /* mmu_gatt ?? */ 156 PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE); 157 PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */ 158 159 return 0; 160 } 161 162 static int psb_driver_unload(struct drm_device *dev) 163 { 164 struct drm_psb_private *dev_priv = dev->dev_private; 165 166 /* TODO: Kill vblank etc here */ 167 168 if (dev_priv) { 169 if (dev_priv->backlight_device) 170 gma_backlight_exit(dev); 171 psb_modeset_cleanup(dev); 172 173 if (dev_priv->ops->chip_teardown) 174 dev_priv->ops->chip_teardown(dev); 175 176 psb_intel_opregion_fini(dev); 177 178 if (dev_priv->pf_pd) { 179 psb_mmu_free_pagedir(dev_priv->pf_pd); 180 dev_priv->pf_pd = NULL; 181 } 182 if (dev_priv->mmu) { 183 struct psb_gtt *pg = &dev_priv->gtt; 184 185 down_read(&pg->sem); 186 psb_mmu_remove_pfn_sequence( 187 psb_mmu_get_default_pd 188 (dev_priv->mmu), 189 pg->mmu_gatt_start, 190 dev_priv->vram_stolen_size >> PAGE_SHIFT); 191 up_read(&pg->sem); 192 psb_mmu_driver_takedown(dev_priv->mmu); 193 dev_priv->mmu = NULL; 194 } 195 psb_gtt_takedown(dev); 196 if (dev_priv->scratch_page) { 197 set_pages_wb(dev_priv->scratch_page, 1); 198 __free_page(dev_priv->scratch_page); 199 dev_priv->scratch_page = NULL; 200 } 201 if (dev_priv->vdc_reg) { 202 iounmap(dev_priv->vdc_reg); 203 dev_priv->vdc_reg = NULL; 204 } 205 if (dev_priv->sgx_reg) { 206 iounmap(dev_priv->sgx_reg); 207 dev_priv->sgx_reg = NULL; 208 } 209 if (dev_priv->aux_reg) { 210 iounmap(dev_priv->aux_reg); 211 dev_priv->aux_reg = NULL; 212 } 213 pci_dev_put(dev_priv->aux_pdev); 214 pci_dev_put(dev_priv->lpc_pdev); 215 216 /* Destroy VBT data */ 217 psb_intel_destroy_bios(dev); 218 219 kfree(dev_priv); 220 dev->dev_private = NULL; 221 } 222 gma_power_uninit(dev); 223 return 0; 224 } 225 226 static int psb_driver_load(struct drm_device *dev, unsigned long flags) 227 { 228 struct drm_psb_private *dev_priv; 229 unsigned long resource_start, resource_len; 230 unsigned long irqflags; 231 int ret = -ENOMEM; 232 struct drm_connector *connector; 233 struct gma_encoder *gma_encoder; 234 struct psb_gtt *pg; 235 236 /* allocating and initializing driver private data */ 237 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL); 238 if (dev_priv == NULL) 239 return -ENOMEM; 240 241 dev_priv->ops = (struct psb_ops *)flags; 242 dev_priv->dev = dev; 243 dev->dev_private = (void *) dev_priv; 244 245 pg = &dev_priv->gtt; 246 247 pci_set_master(dev->pdev); 248 249 dev_priv->num_pipe = dev_priv->ops->pipes; 250 251 resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE); 252 253 dev_priv->vdc_reg = 254 ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE); 255 if (!dev_priv->vdc_reg) 256 goto out_err; 257 258 dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset, 259 PSB_SGX_SIZE); 260 if (!dev_priv->sgx_reg) 261 goto out_err; 262 263 if (IS_MRST(dev)) { 264 dev_priv->aux_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(3, 0)); 265 266 if (dev_priv->aux_pdev) { 267 resource_start = pci_resource_start(dev_priv->aux_pdev, 268 PSB_AUX_RESOURCE); 269 resource_len = pci_resource_len(dev_priv->aux_pdev, 270 PSB_AUX_RESOURCE); 271 dev_priv->aux_reg = ioremap_nocache(resource_start, 272 resource_len); 273 if (!dev_priv->aux_reg) 274 goto out_err; 275 276 DRM_DEBUG_KMS("Found aux vdc"); 277 } else { 278 /* Couldn't find the aux vdc so map to primary vdc */ 279 dev_priv->aux_reg = dev_priv->vdc_reg; 280 DRM_DEBUG_KMS("Couldn't find aux pci device"); 281 } 282 dev_priv->gmbus_reg = dev_priv->aux_reg; 283 284 dev_priv->lpc_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(31, 0)); 285 if (dev_priv->lpc_pdev) { 286 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA, 287 &dev_priv->lpc_gpio_base); 288 pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA, 289 (u32)dev_priv->lpc_gpio_base | (1L<<31)); 290 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA, 291 &dev_priv->lpc_gpio_base); 292 dev_priv->lpc_gpio_base &= 0xffc0; 293 if (dev_priv->lpc_gpio_base) 294 DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n", 295 dev_priv->lpc_gpio_base); 296 else { 297 pci_dev_put(dev_priv->lpc_pdev); 298 dev_priv->lpc_pdev = NULL; 299 } 300 } 301 } else { 302 dev_priv->gmbus_reg = dev_priv->vdc_reg; 303 } 304 305 psb_intel_opregion_setup(dev); 306 307 ret = dev_priv->ops->chip_setup(dev); 308 if (ret) 309 goto out_err; 310 311 /* Init OSPM support */ 312 gma_power_init(dev); 313 314 ret = -ENOMEM; 315 316 dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO); 317 if (!dev_priv->scratch_page) 318 goto out_err; 319 320 set_pages_uc(dev_priv->scratch_page, 1); 321 322 ret = psb_gtt_init(dev, 0); 323 if (ret) 324 goto out_err; 325 326 dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, 0); 327 if (!dev_priv->mmu) 328 goto out_err; 329 330 dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0); 331 if (!dev_priv->pf_pd) 332 goto out_err; 333 334 ret = psb_do_init(dev); 335 if (ret) 336 return ret; 337 338 /* Add stolen memory to SGX MMU */ 339 down_read(&pg->sem); 340 ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu), 341 dev_priv->stolen_base >> PAGE_SHIFT, 342 pg->gatt_start, 343 pg->stolen_size >> PAGE_SHIFT, 0); 344 up_read(&pg->sem); 345 346 psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0); 347 psb_mmu_set_pd_context(dev_priv->pf_pd, 1); 348 349 PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE); 350 PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE); 351 352 acpi_video_register(); 353 354 /* Setup vertical blanking handling */ 355 ret = drm_vblank_init(dev, dev_priv->num_pipe); 356 if (ret) 357 goto out_err; 358 359 /* 360 * Install interrupt handlers prior to powering off SGX or else we will 361 * crash. 362 */ 363 dev_priv->vdc_irq_mask = 0; 364 dev_priv->pipestat[0] = 0; 365 dev_priv->pipestat[1] = 0; 366 dev_priv->pipestat[2] = 0; 367 spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags); 368 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); 369 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R); 370 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R); 371 spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags); 372 373 drm_irq_install(dev, dev->pdev->irq); 374 375 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */ 376 dev->driver->get_vblank_counter = psb_get_vblank_counter; 377 378 psb_modeset_init(dev); 379 psb_fbdev_init(dev); 380 drm_kms_helper_poll_init(dev); 381 382 /* Only add backlight support if we have LVDS output */ 383 list_for_each_entry(connector, &dev->mode_config.connector_list, 384 head) { 385 gma_encoder = gma_attached_encoder(connector); 386 387 switch (gma_encoder->type) { 388 case INTEL_OUTPUT_LVDS: 389 case INTEL_OUTPUT_MIPI: 390 ret = gma_backlight_init(dev); 391 break; 392 } 393 } 394 395 if (ret) 396 return ret; 397 psb_intel_opregion_enable_asle(dev); 398 #if 0 399 /* Enable runtime pm at last */ 400 pm_runtime_enable(&dev->pdev->dev); 401 pm_runtime_set_active(&dev->pdev->dev); 402 #endif 403 /* Intel drm driver load is done, continue doing pvr load */ 404 return 0; 405 out_err: 406 psb_driver_unload(dev); 407 return ret; 408 } 409 410 static int psb_driver_device_is_agp(struct drm_device *dev) 411 { 412 return 0; 413 } 414 415 static inline void get_brightness(struct backlight_device *bd) 416 { 417 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE 418 if (bd) { 419 bd->props.brightness = bd->ops->get_brightness(bd); 420 backlight_update_status(bd); 421 } 422 #endif 423 } 424 425 static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd, 426 unsigned long arg) 427 { 428 struct drm_file *file_priv = filp->private_data; 429 struct drm_device *dev = file_priv->minor->dev; 430 struct drm_psb_private *dev_priv = dev->dev_private; 431 static unsigned int runtime_allowed; 432 433 if (runtime_allowed == 1 && dev_priv->is_lvds_on) { 434 runtime_allowed++; 435 pm_runtime_allow(&dev->pdev->dev); 436 dev_priv->rpm_enabled = 1; 437 } 438 return drm_ioctl(filp, cmd, arg); 439 /* FIXME: do we need to wrap the other side of this */ 440 } 441 442 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 443 { 444 return drm_get_pci_dev(pdev, ent, &driver); 445 } 446 447 448 static void psb_pci_remove(struct pci_dev *pdev) 449 { 450 struct drm_device *dev = pci_get_drvdata(pdev); 451 drm_put_dev(dev); 452 } 453 454 static const struct dev_pm_ops psb_pm_ops = { 455 .resume = gma_power_resume, 456 .suspend = gma_power_suspend, 457 .thaw = gma_power_thaw, 458 .freeze = gma_power_freeze, 459 .restore = gma_power_restore, 460 .runtime_suspend = psb_runtime_suspend, 461 .runtime_resume = psb_runtime_resume, 462 .runtime_idle = psb_runtime_idle, 463 }; 464 465 static const struct vm_operations_struct psb_gem_vm_ops = { 466 .fault = psb_gem_fault, 467 .open = drm_gem_vm_open, 468 .close = drm_gem_vm_close, 469 }; 470 471 static const struct file_operations psb_gem_fops = { 472 .owner = THIS_MODULE, 473 .open = drm_open, 474 .release = drm_release, 475 .unlocked_ioctl = psb_unlocked_ioctl, 476 .mmap = drm_gem_mmap, 477 .poll = drm_poll, 478 .read = drm_read, 479 }; 480 481 static struct drm_driver driver = { 482 .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \ 483 DRIVER_MODESET | DRIVER_GEM, 484 .load = psb_driver_load, 485 .unload = psb_driver_unload, 486 .lastclose = psb_driver_lastclose, 487 .set_busid = drm_pci_set_busid, 488 489 .num_ioctls = ARRAY_SIZE(psb_ioctls), 490 .device_is_agp = psb_driver_device_is_agp, 491 .irq_preinstall = psb_irq_preinstall, 492 .irq_postinstall = psb_irq_postinstall, 493 .irq_uninstall = psb_irq_uninstall, 494 .irq_handler = psb_irq_handler, 495 .enable_vblank = psb_enable_vblank, 496 .disable_vblank = psb_disable_vblank, 497 .get_vblank_counter = psb_get_vblank_counter, 498 499 .gem_free_object = psb_gem_free_object, 500 .gem_vm_ops = &psb_gem_vm_ops, 501 502 .dumb_create = psb_gem_dumb_create, 503 .dumb_map_offset = psb_gem_dumb_map_gtt, 504 .dumb_destroy = drm_gem_dumb_destroy, 505 .ioctls = psb_ioctls, 506 .fops = &psb_gem_fops, 507 .name = DRIVER_NAME, 508 .desc = DRIVER_DESC, 509 .date = DRIVER_DATE, 510 .major = DRIVER_MAJOR, 511 .minor = DRIVER_MINOR, 512 .patchlevel = DRIVER_PATCHLEVEL 513 }; 514 515 static struct pci_driver psb_pci_driver = { 516 .name = DRIVER_NAME, 517 .id_table = pciidlist, 518 .probe = psb_pci_probe, 519 .remove = psb_pci_remove, 520 .driver.pm = &psb_pm_ops, 521 }; 522 523 static int __init psb_init(void) 524 { 525 return drm_pci_init(&driver, &psb_pci_driver); 526 } 527 528 static void __exit psb_exit(void) 529 { 530 drm_pci_exit(&driver, &psb_pci_driver); 531 } 532 533 late_initcall(psb_init); 534 module_exit(psb_exit); 535 536 MODULE_AUTHOR(DRIVER_AUTHOR); 537 MODULE_DESCRIPTION(DRIVER_DESC); 538 MODULE_LICENSE(DRIVER_LICENSE); 539